COMPAL CONFIDENTIAL N32NN6 LA736B/C DISCRETE MODEL AMD MOBILE K7 + ALI M1647 & M1535+ VER1.0 (w/ LCL) LA-736B AND LA-736C DIFFERENCE IN PAGE 41(P.I.R) FOR DETAIL! Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 MODEL NAME : N32N AMD K7 M/B LA-736C REV:1.A COREFB +/VID & FID AMD K7(Socket A) CPU CPUCLK +/- PROCRDY CONNECT CFWDRST page 3,4 TV OUT page 10 Address IN[14:2]# Address OUT[14:2]# AOCLK# AICLK# SDATAIN CLK[3:0]# CLOCK GEN ICS9248-171 SDATA[0 63]# PAGE SDATAOUT CLK[3:0]# SODIMM CRT CONN page VGA Board CONN ALI M1647 14.3M_VGA PAGE 13 PAGE 5,6 AGP Bus page PAGE 12 SODIMM PCI BUS CARD-BUS CONTROLLER TI1420 Solt1/2 AUDIO ESS 1988 ALI M1535 FOR LA-736B ALI M1535+ FOR LA-736C PAGE 19 PAGE 26 PAGE 28 AMP AUDIO JACK PCMCIA POWER PAGE 27 PAGE 20 PAGE 18 PAGE 21 PAGE 15,16 ISA/PCI BUS PULLUP/DOWN PAGE 14 EQ MINI_PCI SLOT HDD CONN CARDBUS SLOT OZ163 CD-ROM CONN PAGE 22 PAGE 21 USB PAGE 20 PAGE 17 ISA BUS PIO SIO PAGE 17 DOT MATRIX LCD CONN FDD CONN PAGE TOUCH PAD CONN INTERNAL K/B CONN RESET PS2 CKT 23 EMBEDDED CONTLR NS PC87570 PAGE 29 PAGE 24 VID & FID POWER GOOD VID & FID PAGE 31,32 PIR PAGE 37 POWER CIRCUIT COREFB +/- DC-DC INTERFACE RTC BATT PAGE 30 I/O BUFFER BIOS PAGE 25 PAGE 30,33,34,35,36 Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 +CPU_CORE JP6A CFWDRST CONNECT PROCRDY FILVAL# SADDINCLK AJ21 AL23 AN23 AJ31 CLKFWDRST CONNECT PROCRDY SFILLVAL R413 PLLMON2 R416 R417 56_0402 TDI R418 510_0402 AIN#1 R432 820_0402 +CPU_CORE TRST# R420 510_0402 PLLTEST# R421 510_0402 R422 @1K_0402 FLUSH# R932 820_0402 R427 @1K_0402 PLLBP# R933 820_0402 R429 820_0402 CLKIN CLKIN AN17 AL17 R419 820_0402 RSTCLK RSTCLK AN19 AL19 R434 820_0402 K7CLKOUT K7CLKOUT AL21 AN21 0_0402 AOUT#0 +3VS AOUT#1 R423 820_0402 R424 4.7K FERR# R968 COREFBCOREFB+ FERR Q50 FERR# AIN#0 RP1 A20M# CPURST# IGNNE# INIT# MMBT2222A 1K +CPU_CORE CLKOUT CLKOUT# +3VS AJ13 SYSVREFMODE VREF_SYS AA5 W5 ZN ZP AC5 AE5 ZN ZP PLLBYPASS PLLBYPASSCLK PLLBYPASSCLK AJ25 AN15 AL15 PLLBP# PLLMON1 PLLMON2 PLLTEST AN13 AL13 AC3 PLLMON1 PLLMON2 PLLTEST# FILVAL# 15 CPUCK CPUCK# VREFMODE VREF_SYS APICCLK R436 @330_0402 APICD0 R437 @330_0402 APICD1 R438 @330_0402 10 INTR NMI SMI# STPCLK# DOVAL# +CPU_CORE 10P8R_680 NMI C1189 560PF_0402 +CPU_CORE +CPU_CORE RP2 Reduce NMI noise for C3 DEL BY AMD SUGGESTION R439 R440 100_1%_0402 56_0402 R441 R442 R443 1K_0402 1K_0402 1K_0402 100_1%_0402 SSHIFTEN SINTVAL SCANCLK2 SCANCLK1 R444 60.4 1% R445 60.4 1% 8P4R-270 R446 Near socket-A R447 R448 100_1%_0402 301 1% 100_1%_0402 SCANCLK1 SCANCLK2 SINTVAL SSHIFTEN S1 S5 S3 Q5 VREF_SYS is set at 50% of VCC_CORE to CPU 1 L1 L3 L5 L7 J7 PVID0 PVID1 PVID2 PVID3 PVID4 FID0 FID1 FID2 FID3 W1 W3 Y1 Y3 FID0 FID1 FID2 FID3 CPUCK# C584 680PF_0402 CPUCLK CPUCLK# +CPU_CORE TP1 TP2 C585 C586 01UF_0402 R450 100_1%_0402 +CPU_CORE R451 @1K_0402 0.1UF R452 100_1%_0402 VREFMODE TCK TDI TDO TMS TRST# VID0 VID1 VID2 VID3 VID4 680PF_0402 R449 100_1%_0402 DBRDY DBREQ# FLUSH# Q1 U1 U5 Q3 U3 C583 +CPU_CORE VREF_SYS TCK TDI TDO TMS TRST CPUCK CLKOUT R453 1.5K_0402 FOR A-TEST RESERVE TP3 R454 100_1%_0402 JP7 +5VALW PVID[0 4] 32 10 ATF# SMD SMC 22 25,36 22 25,36 ATF# 25 VREFMODE=Low=No voltage scaling +CPU_CORE +CPU_CORE HEADER 5X2 FID[0 3] 31 ZN R456 36.5 1% ZP R457 36.5 1% R455 100_1%_0402 CLKOUT# R458 100_1%_0402 Change Value by tunning U37 Y33 L35 E33 E25 A31 C13 A19 Trace lengths of CLKOUT and CLKOUT# are between 2" and 3" +3V R459 SADDOUT0 SADDOUT1 SADDOUT2 SADDOUT3 SADDOUT4 SADDOUT5 SADDOUT6 SADDOUT7 SADDOUT8 SADDOUT9 SADDOUT10 SADDOUT11 SADDOUT12 SADDOUT13 SADDOUT14 J1 J3 C7 A7 E5 A5 E7 C1 C5 C3 G1 E1 A3 G5 G3 AOUT#0 AOUT#1 AOUT#2 AOUT#3 AOUT#4 AOUT#5 AOUT#6 AOUT#7 AOUT#8 AOUT#9 AOUT#10 AOUT#11 AOUT#12 AOUT#13 AOUT#14 SADDOUTCLK E3 AOCLK# AOUT#[2 14] 10 Miles THERMDA @MMBT3904 10 Miles THERMDC Q52 C588 @2200PF_0402 R462 @1K_0402 @2N7002 NC VCC DXP DXN NC ADD1 GND GND NC STBY SMBCLK NC SMBDATA ALERT ADD0 NC @NE1617DS Q51 U18 +3V AOCLK# +3V @10K_0402 C587 @.1UF_0402 16 15 14 13 12 11 10 R460 R461 @4.7K_0402 @4.7K_0402 SMC 22 25,36 SMD 22 25,36 SCHECK0 SCHECK1 SCHECK2 SCHECK3 SCHECK4 SCHECK5 SCHECK6 SCHECK7 ATF# 25 R463 @1K_0402 Q53 @2N7002 G AICLK# CFWDRST CONNECT PROCRDY AJ33 PLLMON1 510_0402 R464 +3VS @10K_0402 SADDIN0 SADDIN1 SADDIN2 SADDIN3 SADDIN4 SADDIN5 SADDIN6 SADDIN7 SADDIN8 SADDIN9 SADDIN10 SADDIN11 SADDIN12 SADDIN13 SADDIN14 510_0402 R415 SDTATOUTVAL AJ29 AL29 AG33 AJ37 AL35 AE33 AJ35 AG37 AL33 AN37 AL37 AG35 AN29 AN35 AN31 R412 TMS @10K_0402 R465 @10K_0402 RESERVE FOR MOBILE K7 AL31 AIN#0 AIN#1 AIN#2 AIN#3 AIN#4 AIN#5 AIN#6 AIN#7 AIN#8 AIN#9 AIN#10 AIN#11 AIN#12 AIN#13 AIN#14 COREFBCOREFB+ AA1 AA3 AL3 TCK +CPU_CORE R414 COREFB- 510_0402 G DOVAL# COREFB+ R411 D SDATAOUTCLK0 SDATAOUTCLK1 SDATAOUTCLK2 SDATAOUTCLK3 AG13 AG11 DBRDY DBREQ FLUSH 15 15 15 15 5,15 15 15 +CPU_CORE DBREQ# S SDATAINVAL AE35 C37 A33 C11 COREFBCOREFB+ SCANCLK1 SCANCLK2 SCANINTEVAL SCANSHIFTEN CPUINIT INTR IGNNE# NMI CPURST# SMI# STPCLK# Near socket-A D 5 AN33 DOCLK#0 DOCLK#1 DOCLK#2 DOCLK#3 APICCLK APICD0 APICD1 ANALOG 15,24 PWROKCPU 29 N1 N3 N5 PICCLK PICD0/BYPASSCLK PICD1/BYPASSCLK A20M# S DIVAL# PWROK AE3 A20M# FERR INIT# INTR IGNNE# NMI CPURST# SMI# STPCLK# AIN#[2 14] SDATAINCLK0 SDATAINCLK1 SDATAINCLK2 SDATAINCLK3 AE1 AG1 AJ3 AL1 AJ1 AN3 AG3 AN5 AC1 DIVAL# DOCLK#[0 3] W33 J35 E27 E15 A20M FERR INIT INTR IGNNE NMI RESET SMI STPCLK 5 DICLK#0 DICLK#1 DICLK#2 DICLK#3 SDATA0 SDATA1 SDATA2 SDATA3 SDATA4 SDATA5 SDATA6 SDATA7 SDATA8 SDATA9 SDATA10 SDATA11 SDATA12 SDATA13 SDATA14 SDATA15 SDATA16 SDATA17 SDATA18 SDATA19 SDATA20 SDATA21 SDATA22 SDATA23 SDATA24 SDATA25 SDATA26 SDATA27 SDATA28 SDATA29 SDATA30 SDATA31 SDATA32 SDATA33 SDATA34 SDATA35 SDATA36 SDATA37 SDATA38 SDATA39 SDATA40 SDATA41 SDATA42 SDATA43 SDATA44 SDATA45 SDATA46 SDATA47 SDATA48 SDATA49 SDATA50 SDATA51 SDATA52 SDATA53 SDATA54 SDATA55 SDATA56 SDATA57 SDATA58 SDATA59 SDATA60 SDATA61 SDATA62 SDATA63 DICLK#[0 3] AA35 W37 W35 Y35 U35 U33 S37 S33 AA33 AE37 AC33 AC37 Y37 AA37 AC35 S35 Q37 Q35 N37 J33 G33 G37 E37 G35 Q33 N33 L33 N35 L37 J37 A37 E35 E31 E29 A27 A25 E21 C23 C27 A23 A35 C35 C33 C31 A29 C29 E23 C25 E17 E13 E11 C15 E9 A13 C9 A9 C21 A21 E19 C19 C17 A11 A17 A15 SDATA#0 SDATA#1 SDATA#2 SDATA#3 SDATA#4 SDATA#5 SDATA#6 SDATA#7 SDATA#8 SDATA#9 SDATA#10 SDATA#11 SDATA#12 SDATA#13 SDATA#14 SDATA#15 SDATA#16 SDATA#17 SDATA#18 SDATA#19 SDATA#20 SDATA#21 SDATA#22 SDATA#23 SDATA#24 SDATA#25 SDATA#26 SDATA#27 SDATA#28 SDATA#29 SDATA#30 SDATA#31 SDATA#32 SDATA#33 SDATA#34 SDATA#35 SDATA#36 SDATA#37 SDATA#38 SDATA#39 SDATA#40 SDATA#41 SDATA#42 SDATA#43 SDATA#44 SDATA#45 SDATA#46 SDATA#47 SDATA#48 SDATA#49 SDATA#50 SDATA#51 SDATA#52 SDATA#53 SDATA#54 SDATA#55 SDATA#56 SDATA#57 SDATA#58 SDATA#59 SDATA#60 SDATA#61 SDATA#62 SDATA#63 SDATA#[0 63] PPGA_462 +3V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Compal Electronics, inc Title SCHEMATIC, M/B LA-736/736B/736C Size Document Number Rev 1F 401168 Date: Monday, September 10, 2001 Sheet of 45 2.2UF C618 2 01UF_0402 C617 1000PF_0402 2 1000PF_0402 C616 C615 1000PF_0402 2 1UF_0402 C614 C613 1 1 2 2 1UF_0402 01UF_0402 01UF_0402 C635 C636 C634 1 +CPU_CORE C641 C638 C637 C639 C640 10UF_10V_1206 1UF_10V_0603 1UF_10V_0603 1UF_10V_0603 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 +CPU_CORE 0.22UF C612 01UF_0402 1UF_0402 2 C633 C632 1UF_0402 2 C623 0.22UF C611 +CPU_CORE C622 C621 1 C620 0.22UF 2 1 C619 0.22UF +CPU_CORE C610 1000PF_0402 0.22UF 0.22UF +CPU_CORE C609 C608 C607 1 C606 0.22UF 0.22UF 2 C605 C604 0.22UF C603 0.22UF 1 C602 0.22UF 2 C601 0.22UF C600 0.22UF C599 0.22UF +CPU_CORE 1 C598 0.22UF 2 C597 0.22UF C596 0.22UF 1 C595 0.22UF C594 0.22UF 1 C593 0.22UF 0.22UF C592 1 C591 0.22UF 2 C590 0.22UF C589 0.22UF +CPU_CORE 1 +CPU_CORE 1UF_10V_0603 +VCCA2.5 Located at Socket-A Cap +CPU_CORE + C1163 G7 Q7 AA7 AG9 AG17 AG27 G15 G23 KEY KEY KEY KEY KEY KEY KEY KEY AH6 AMD + C1164 220UF_4V_D AJ23 VCC_A AC7 VCC_Z R466 VR_ON 0-0402 VOUT R467 + C671 C672 BP C673 39PF_0402 1UF_10V_0603 1 1 2 2 2 1 1 C655 560PF_0402 560PF_0402 560PF_0402 THERMDA THERMDC THERMDC 9/04/2000 CHANGE BACK C659 C660 1000PF_0402 +VCCP2.5 C661 C662 C663 1000PF_0402 1000PF_0402 FOR EMI RESERVE 1000PF_0402 C664 01UF_0402 39PF_0402 39PF_0402 Compal Electronics, inc Title C674 4.7UF_10V_0805 1UF_0402 C654 C667 220UF_4V_D 220UF_4V_D 220UF_4V_D 220UF_4V_D SD# C666 + C670 VSS + C669 1 + C668 C665 C653 1000PF_0402 +VCCA2.5 VIN 560PF_0402 THERMDA 2.5V,if 1GHz need 100mA U19 SI9183BT-25 +3VS C652 560PF_0402 25,35 +CPU_CORE (2.5V Output) C651 VCCA for cpu internal PLL power source! CONTROL ON/OFF 39PF_0402 ONE INCH SPACING ALONG THE PLANE EDGE +CPU_CORE 220UF_4V_D AMD Socket-A processors will not implement a pin at location AH6 AN27 AL27 AN25 AL25 BP0_CUT BP1_CUT BP2_CUT BP3_CUT 39PF_0402 +CPU_CORE 220UF_4V_D 39PF_0402 C650 39PF_0402 + C1162 220UF_4V_D C649 + C658 KEY4 KEY6 KEY8 KEY10 KEY12 KEY14 KEY16 KEY18 C648 39PF_0402 +CPU_CORE G25 G17 G9 N7 Y7 AG7 AG15 AG29 C647 SVID1 C646 SVID2 SVID3 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +CPU_CORE SVID0 SVID4 NC1 NC2 NC3 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC42 NC43 NC44 NC45 SVID[0 4] C644 1UF_10V_0603 220UF_4V_D 32 C643 1UF_10V_0603 1UF_10V_0603 1UF_10V_0603 220UF_4V_D C645 C642 + C657 PPGA_462 AE7 VSS_Z + C656 VCC_SRAM1 VCC_SRAM2 VCC_SRAM3 VCC_SRAM4 VCC_SRAM5 VCC_SRAM6 VCC_SRAM7 VCC_SRAM8 VCC_SRAM9 VCC_SRAM11 VCC_SRAM13 VCC_SRAM14 VCC_SRAM16 VCC_SRAM17 VCC_SRAM19 VCC_SRAM20 VCC_SRAM21 VCC_SRAM22 VCC_SRAM23 VCC_SRAM24 VCC_SRAM25 VCC_SRAM26 VCC_SRAM27 VCC_SRAM28 VCC_SRAM29 VCC_SRAM30 VCC_SRAM31 JP6B AA31 AC31 AE31 AG23 AG25 AG31 AG5 AJ11 AJ15 AJ17 AJ19 AJ27 AL11 AN11 AN9 G11 G13 G27 G29 G31 J31 J5 L31 N31 Q31 S31 S7 U31 U7 W31 W7 Y31 Y5 AG19 G21 AG21 G19 H14 VSS1 H18 VSS2 H22 VSS3 H26 VSS4 M30 VSS5 P8 VSS6 R30 VSS7 T8 VSS8 V30 VSS9 X8 VSS10 Z30 VSS11 AB8 VSS12 AF12 VSS13 AF16 VSS14 AF20 VSS15 AF24 VSS16 AM36VSS17 AK32 VSS18 AK28 VSS19 AK24 VSS20 AK20 VSS21 AK16 VSS22 AK12 VSS23 AK4 VSS25 AK2 VSS26 AH36VSS27 AM32VSS28 AH34VSS29 AH32VSS30 AH28VSS31 AH24VSS32 AH20VSS33 AH16VSS34 AH12VSS35 AF4 VSS37 AF2 VSS38 AD36VSS39 AD34VSS40 AD32VSS41 AB6 VSS42 AB4 VSS43 AB2 VSS44 Z36 VSS45 Z34 VSS46 Z32 VSS47 X6 VSS48 AM28VSS49 X4 VSS50 X2 VSS51 V36 VSS52 V34 VSS53 V32 VSS54 T6 VSS55 T4 VSS56 T2 VSS57 R36 VSS58 R34 VSS59 AM24VSS60 R32 VSS61 P6 VSS62 P4 VSS63 P2 VSS64 M36 VSS65 M34 VSS66 M32 VSS67 K6 VSS68 K4 VSS69 K2 VSS70 AM20VSS71 H36 VSS72 H34 VSS73 F26 VSS74 F22 VSS75 F18 VSS76 F14 VSS77 F10 VSS78 F6 VSS79 F4 VSS80 F2 VSS81 AM16VSS82 D36 VSS83 D34 VSS84 D30 VSS85 D26 VSS86 D22 VSS87 D18 VSS88 D14 VSS89 D10 VSS90 D6 VSS91 B34 VSS92 AM12VSS93 B30 VSS94 B26 VSS95 B22 VSS96 B18 VSS97 B14 VSS98 B10 VSS99 B6 VSS100 B2 VSS101 AM4 VSS102 AK6 VSS103 AM6 VSS104 +CPU_CORE AD30 AD8 AF10 AF28 AF30 AF32 AF6 AF8 AH30 AH8 AJ9 AK8 AL9 AM8 F30 F8 H10 H28 H30 H32 H6 H8 K30 K8 AJ7 AL7 AN7 VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8 VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23 VCC_CORE24 VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49 VCC_CORE50 VCC_CORE51 VCC_CORE52 VCC_CORE53 VCC_CORE54 VCC_CORE55 VCC_CORE56 VCC_CORE57 VCC_CORE58 VCC_CORE59 VCC_CORE60 VCC_CORE61 VCC_CORE62 VCC_CORE63 VCC_CORE64 VCC_CORE65 VCC_CORE66 VCC_CORE67 VCC_CORE68 VCC_CORE69 VCC_CORE70 VCC_CORE71 VCC_CORE72 VCC_CORE73 VCC_CORE74 VCC_CORE75 VCC_CORE76 VCC_CORE77 VCC_CORE78 VCC_CORE79 VCC_CORE80 VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98 VCC_CORE99 VCC_CORE100 VCC_CORE101 AMD recommandation 220UF X10 H12 H16 H20 H24 M8 P30 R8 T30 V8 X30 Z8 AB30 AF14 AF18 AF22 AF26 AM34 AK36 AK34 AK30 AK26 AK22 AK18 AK14 AK10 AL5 AH26 AM30 AH22 AH18 AH14 AH10 AH4 AH2 AF36 AF34 AD6 AM26 AD4 AD2 AB36 AB34 AB32 Z6 Z4 Z2 X36 X34 AM22 X32 V6 V4 V2 T36 T34 T32 R6 R4 R2 AM18 P36 P34 P32 M4 M6 M2 K36 K34 K32 H4 H2 AM14 F36 F34 F32 F28 F24 F20 F16 F12 D32 D28 AM10 D24 D20 D16 D12 D8 D4 D2 B36 B32 AM2 B28 B24 B20 B16 B12 B8 B4 AJ5 +CPU_CORE 0.22UF(0603) X 22 0.22UF(0603) X3 FOR RESERVE 0.1UF(0603) X 0.01UF(0603) X 1UF(0805) X 10UF(1206) X Near socket-A pin AJ23 SCHEMATIC, M/B LA-736/736B/736C Size Document Number Rev 1F 401168 Date: Monday, September 10, 2001 Sheet of 45 Near M1647 Under M1647 (Solder side) +3VS M1647 North Bridge (1/2) R468 11K 1% SDATA#[0 63] DOCLK#[0 3] DICLK_NB#[0 3] CPUCLK_NBVR R469 C675 5.9K 1% 047UF AOUT#[2 14] AOCLK# C676 0.1uF +3VS AIN#[2 14] AICLK_NB# 3 3 DIVAL# PROCRDY CONNECT CFWDRST R984 @0_0402 3,15 CPURST# R470 CPUCLK_NBVR 15,18,19,26 PAR 15,18,19 SERR# 14,15 14,15 PHLD# PHLDA# PCIREQ# 18 18 26 19 8,15 AGP_BUSY# 18 18 26 19 R476 @0 GNT#0 GNT#1 GNT#2 GNT#3 R477 @0 15,18,19,26 15,18,19,26 15,18,19,26 15,18,19,26 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 +3VS RP3 8P4R-2.7K +3VS RP4 8P4R-2.7K SERR# R959 560 RP5 REQ#_0 REQ#_1 REQ#_2 REQ#_3 +3VS 8P4R-2.7K +3VS RP6 GNT#_0 GNT#_1 GNT#_2 GNT#_3 GNT#_4 GNT#_5 REQ#_4 REQ#_5 D3 C3 B6 C8 C/BE#0 C/BE#1 C/BE#2 C/BE#3 15,18,19,26,31 AD[0 31] PDEVSEL# SERR# PLOCK# PCIREQ# F6 D10 B10 E11 C11 A11 B12 C10 A10 D11 B11 C12 A12 F1 F4 F2 F3 E2 E1 E3 D1 D2 C1 C2 B1 D4 B2 A2 B3 D7 A6 C7 B7 F8 A7 E8 D8 B8 A8 D9 E9 C9 B9 F10 A9 E6 TESTMODE AE2 TESTEN1 AF2 8P4R-2.7K AREQ# PREQ0# PREQ1# PREQ2# PREQ3# PREQ4# PREQ5# PGNT0# PGNT1# PGNT2# PGNT3# PGNT4# PGNT5# AOCLK# AOUT#2 AOUT#3 AOUT#4 AOUT#5 AOUT#6 AOUT#7 AOUT#8 AOUT#9 AOUT#10 AOUT#11 AOUT#12 AOUT#13 AOUT#14 DICLK_NB#0 DICLK_NB#1 DICLK_NB#2 DICLK_NB#3 DOCLK#0 DOCLK#1 DOCLK#2 DOCLK#3 SDATA#0 SDATA#1 SDATA#2 SDATA#3 SDATA#4 SDATA#5 SDATA#6 SDATA#7 SDATA#8 SDATA#9 SDATA#10 SDATA#11 SDATA#12 SDATA#13 SDATA#14 SDATA#15 SDATA#16 SDATA#17 SDATA#18 SDATA#19 SDATA#20 SDATA#21 SDATA#22 SDATA#23 SDATA#24 SDATA#25 SDATA#26 SDATA#27 SDATA#28 SDATA#29 SDATA#30 SDATA#31 SDATA#32 SDATA#33 SDATA#34 SDATA#35 SDATA#36 SDATA#37 SDATA#38 SDATA#39 SDATA#40 SDATA#41 SDATA#42 SDATA#43 SDATA#44 SDATA#45 SDATA#46 SDATA#47 SDATA#48 SDATA#49 SDATA#50 SDATA#51 SDATA#52 SDATA#53 SDATA#54 SDATA#55 SDATA#56 SDATA#57 SDATA#58 SDATA#59 SDATA#60 SDATA#61 SDATA#62 SDATA#63 R25 R26 N22 T26 R24 V26 T25 T24 P25 P26 U26 V25 V24 C20 D22 F24 L25 D16 D24 G23 N25 A20 F18 A21 B20 B21 A22 B22 C23 F17 B18 E16 C18 D17 B19 A19 D18 A23 B23 A24 A25 B26 C26 D26 C25 D19 E19 D20 F19 E20 F20 E23 E22 F23 F22 G21 H22 J22 H21 G24 J26 D25 E26 E25 F26 G26 G25 J21 H26 J23 M25 K21 K23 L23 M24 M23 M22 H25 J25 J24 K26 K24 L22 L26 M26 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 M1647-SDR Northbridge NC TESTMODE NT_TESTEN H6 AGPFRAME# AGPIRDY# AGPTRDY# AGPDEVSEL# AGPSTOP# GREQ# GGNT# GSERR# AGPPAR PIPE# TYPEDET# WBF# RBF# U1 V3 V2 V1 W2 H3 G1 Y3 W1 J2 G2 K2 J1 ST0 ST1 ST2 H1 H2 J3 ST0 ST1 ST2 8 GCBE0# GCBE1# GCBE2# GCBE3# U5 Y2 U2 M5 GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3 8 8 W6 AE1 V4 AD1 V5 AD2 V6 AC1 AA1 U6 AA2 T4 AA3 T5 Y1 R5 R4 U3 P5 T1 N4 T2 N5 R1 L4 P2 L5 P3 K4 N1 K5 N2 +3VALW ACNBS @0 AC15DQM0 AF15 DQM1 AE16 DQM2 AD17DQM3 AE15 DQM4 AD16DQM5 AF16 DQM6 AE17 DQM7 CAS#0 CAS#1 CAS#2 CAS#3 CAS#4 CAS#5 CAS#6 CAS#7 AB25 DQS0 AD25DQS1 AF21 DQS2 AC18DQS3 AF14 DQS4 AE11 DQS5 AF7 DQS6 AE4 DQS7 AD3 MD0 AF3 MD1 AF4 MD2 AE5 MD3 AC6 MD4 AF6 MD5 AE7 MD6 AE8 MD7 AC9 MD8 AF9 MD9 AE10 MD10 AD11MD11 AC12MD12 AF12 MD13 AE13 MD14 AD14MD15 AF17 MD16 AF18 MD17 AE19 MD18 AD20MD19 AF20 MD20 AE21 MD21 AE22 MD22 AC23MD23 AF23 MD24 AE24 MD25 AF25 MD26 AE26 MD27 AC24MD28 AC26MD29 AB26 MD30 AA25 MD31 AE3 MD32 AD4 MD33 AD5 MD34 AF5 MD35 AE6 MD36 AD7 MD37 AD8 MD38 AF8 MD39 AE9 MD40 AD10MD41 AF10 MD42 AF11 MD43 AE12 MD44 AD13MD45 AF13 MD46 AE14 MD47 AE18 MD48 AD19MD49 AF19 MD50 AE20 MD51 AC21MD52 AD22MD53 AF22 MD54 AE23 MD55 AD23MD56 AF24 MD57 AE25 MD58 AD26MD59 AC25MD60 AB24 MD61 AA23 MD62 AA26 MD63 MMD0 MMD1 MMD2 MMD3 MMD4 MMD5 MMD6 MMD7 MMD8 MMD9 MMD10 MMD11 MMD12 MMD13 MMD14 MMD15 MMD16 MMD17 MMD18 MMD19 MMD20 MMD21 MMD22 MMD23 MMD24 MMD25 MMD26 MMD27 MMD28 MMD29 MMD30 MMD31 MMD32 MMD33 MMD34 MMD35 MMD36 MMD37 MMD38 MMD39 MMD40 MMD41 MMD42 MMD43 MMD44 MMD45 MMD46 MMD47 MMD48 MMD49 MMD50 MMD51 MMD52 MMD53 MMD54 MMD55 MMD56 MMD57 MMD58 MMD59 MMD60 MMD61 MMD62 MMD63 10K R491 @10PF 8,16,20 RTCCLK C1204 +3VS ** R949 @?PF R492 AD12 R493 R494 AD16 R495 AD20 R496 AD24 R497 AD27 @2.2K-0402 10K-0402 @2.2K-0402 2.2K-0402 ADD FOR SUSPEND ISSUE C/BE#1 R499 AD13 2 AD17 R501 AD21 R502 R951 ST0 AD11 10K-0402 R506 2.2K-0402 @2.2K-0402 R952 C/BE#2 AD25 10K-0402 AD14 R507 AD18 R508 AD22 2.2K-0402 Modify by 4/10 Tunning Time R509 AD26 AD28 R953 ST1 2.2K-0402 R511 AD5 R512 2.2K-0402 2.2K-0402 @2.2K-0402 2.2K-0402 @2.2K-0402 AD15 R513 2.2K-0402 AD[5 31] M1647 HARDWARE STRAPPING AD19 AD23 @2.2K-0402 +3VS R999 10K-0402 +3VS R1000 AD8 AD9 10K-0402 +3VS R1001 10K-0402 +3VS R1002 AD10 10K-0402 AD6~10,12,24,25,29~31 strapping for C3 8P4R-10K 4 SBSTB SBSTB# +3VS GSBA[0 7] AD12 AD24 10K-0402 R1004 R1003 8 AD29 +3VS @10K-0402 R1006 +3VS 10K-0402 +3VS R1007 AD30 AD31 AD30 +3VS R1008 CKE0 CKE1 CKE2 CKE3 12 12 13 13 @10K-0402 R1026 @2.2K-0402 +3VS R988 AD26 R989 AD28 R1025 AD31 2 2.2K-0402 R510 AD29 10K-0402 Strapping Pin Set: 7C +3VS @10K-0402 R1005 RP71 8P4R-10K CCKE0 CCKE1 CCKE2 CCKE3 10K-0402 +3VS +3VS R990 10K-0402 RESERVE BY 2/19 R991 AD27 @2.2K-0402 10K-0402 Compal Electronics, inc Title R514 2.2K-0402 AD7 10K-0402 +3VS 10K-0402 10K-0402 R954 C/BE#3 2.2K-0402 1 10K-0402 R987 AD6 @2.2K-0402 AD22 2.2K-0402 +3VS AD21 2.2K-0402 R505 AD23 R503 +3VS 2.2K-0402 RP70 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 +3VS 10K-0402 R500 +3VS R998 R986 @2.2K-0402 +3VS 10K GAD[0 31] GSBA0 GSBA1 GSBA2 GSBA3 GSBA4 GSBA5 GSBA6 GSBA7 U20A +3VS R985 AD20 10K 2.2K-0402 R950 GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 AD25 Modify by 4/10 Tunning Time RAS#[0 3] 11 RRMWEA# 11 SCAS#0 11 SRAS#0 11 8,15,16 SUS_STAT# C/BE#0 K1 H4 L3 J6 M3 J5 M1 J4 R475 AD_STBA AD_STBA# AD_STBB AD_STBB# CAS#[0 7] 11 MMD[0 63] 11 MMA[0 14] 11 10K R1024 0-0402 SUSPEND# L1 L2 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 AA11 MA0 AB11 MA1 AB12 MA2 AB15 MA3 AC14MA4 AB14 MA5 AC17MA6 AA16 MA7 AB16 MA8 AA18 MA9 AA17 MA10 AA19 MA11 AB19 MA12 AB17 BA0 AB18 BA1 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA11 MMA12 MMA13 MMA14 CS0# CS1# CS2# CS3# CS4# CS5# R490 C680 Y23 CKE0 Y26 CKE1 AB22 CKE2 Y25 CKE3 AB21 CKE4 Y24 CKE5 R485 TP5 CCKE0 CCKE1 CCKE2 CCKE3 DCLK_NB AA9 AB9 AB8 AC8 AB7 AA8 Near M1647 RAS#0 RAS#1 RAS#2 RAS#3 8P4R-2.7K AB10 SRAS# AA10 SCAS# AC20MWE# 10K AB5 SUSPEND# AC5 CLK32KI 10K SB_STB SB_STB# +VDDQ 2X AGP 4X AGP NEED PULL LOW WBF# RBF# GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 SDR SDRAM Interface W21 DCLK_NBJ Y21 DCLK DCLK# R479 GIRDY# GTRDY# GDEVSEL# GSTOP# GREQ# GGNT# GSERR# GPAR PIPE# AB1 AB2 R3 P1 +3VS R478 AGPCLK_NB GFRAME# AD_STB0 AD_STB0# AD_STB1 AD_STB1# RP7 C679 10PF GCLK ? CBE0# CBE1# CBE2# CBE3# ACNBG C21 E17 B24 D21 H23 F25 N26 K25 B17 A17 B16 A18 E13 E15 D13 C15 A16 C17 B14 B15 A15 U25 AICLK# AIN#2 AIN#3 AIN#4 AIN#5 AIN#6 AIN#7 AIN#8 AIN#9 AIN#10 AIN#11 AIN#12 AIN#13 AIN#14 A14 CPU Interface PCI Interface 8,15 AGP_STP# PFRAME# PIRDY# PTRDY# PSTOP# PCIREQ# REQ#_0 REQ#_1 REQ#_2 REQ#_3 REQ#_4 REQ#_5 GNT#_0 GNT#_1 GNT#_2 GNT#_3 GNT#_4 GNT#_5 REQ#0 REQ#1 REQ#2 REQ#3 PCIRST# FRAME# IRDY# TRDY# STOP# DEVSEL# PAR SERR#/CLKRUN# LOCK# PHLD# PHLDA# SCHECK0# SCHECK1# SCHECK2# SCHECK3# SCHECK4# SCHECK5# SCHECK6# SCHECK7# G6 PFRAME# D6 PIRDY# A5 PTRDY# B5 PSTOP# A4 PDEVSEL# C5 PAR A3 SERR# C4 PLOCK# B4 PHLD# E5 PHLDA# F5 LA-736B : R472 USE Ohm 33 AGP Interface 10,14,15,18 21,26 PCIRST# 15,18,19,26 FRAME# 15,18,19,26 IRDY# 15,18,19,26 TRDY# 15,18,19,26 STOP# 15,18,19,26 DEVSEL# PCICLK R472 SDATA0# SDATA1# SDATA2# SDATA3# SDATA4# SDATA5# SDATA6# SDATA7# SDATA8# SDATA9# SDATA10# SDATA11# SDATA12# SDATA13# SDATA14# SDATA15# SDATA16# SDATA17# SDATA18# SDATA19# SDATA20# SDATA21# SDATA22# SDATA23# SDATA24# SDATA25# SDATA26# SDATA27# SDATA28# SDATA29# SDATA30# SDATA31# SDATA32# SDATA33# SDATA34# SDATA35# SDATA36# SDATA37# SDATA38# SDATA39# SDATA40# SDATA41# SDATA42# SDATA43# SDATA44# SDATA45# SDATA46# SDATA47# SDATA48# SDATA49# SDATA50# SDATA51# SDATA52# SDATA53# SDATA54# SDATA55# SDATA56# SDATA57# SDATA58# SDATA59# SDATA60# SDATA61# SDATA62# SDATA63# F9 Near M1647 SDICLK0# SDICLK1# SDICLK2# SDICLK3# SDOCLK0# SDOCLK1# SDOCLK2# SDOCLK3# @10PF PCLK_NB SAOUT2# SAOUT3# SAOUT4# SAOUT5# SAOUT6# SAOUT7# SAOUT8# SAOUT9# SAOUT10# SAOUT11# SAOUT12# SAOUT13# SAOUT14# SAOCLK# C678 @10PF SAIN2# SAIN3# SAIN4# SAIN5# SAIN6# SAIN7# SAIN8# SAIN9# SAIN10# SAIN11# SAIN12# SAIN13# SAIN14# C677 SAICLK# @10 V21 U21 120 CPURST# CLKFRST CONNECT PROCRDY SDINVAL# @0 R474 ACNBP R473 HCLK VREF_HCLK R471 W26 C13 A13 E12 C14 CPUCLK_NB Near M1647 120 CPUCLK_NB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 M1647 North Bridge (2/2) +VCC_2.5 R516 4.7_0805 0.1UF W22 W23 AVDD_MEM VDDPL_MEM AVDD_CPU T22 T23 AVDD_CPU VDDPL_CPU C691 0.1UF 1000PF M1647-SDR C693 AVDD_AGP 0.1UF H5 AVDD_AGP D12 D15 E18 E21 D23 B25 G22 K22 N23 N24 T21 VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K R519 4.7 VCC_CORENB C694 1000PF C695 0.1UF Near M1647 K10 K11 K16 K17 L10 L17 T10 T17 U10 U11 U16 U17 VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE G4 M4 P4 U4 W4 W5 AB4 AC3 VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP AC7 AC10 AC11 AC13 AC16 AC19 AB20 AC22 AB23 VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM E4 D5 E7 E10 L6 T6 L21 F16 VDDIO_PCI VDDIO_PCI VDDIO_PCI VDDIO_PCI VDDPD_S2K VDDPD_S2K VDDPD_AGP VDDPD_AGP +VCC_2.5 VCC2_5NB +VCC_2.5 +CPU_CORE R520 R521 4.7_0805 4.7_0805 VDDPM_CPU1 VDDPM_CPU2 +VDDQ C715 C716 1000PF C717 0.1UF C718 1000PF VCC_AGPNB 0.1UF Near M1647 +3V 3V_DRAMNB +3V 3V_PCINB LA-736B :R522 USED 270_1% ; +VDDQ +3V R23 USED 180_1% 3V_DRAMNB AGP 2X,R522,R523 USE 270 1%,180 1% AGP 4X,R522,R523 USE 100 1%,100 1% R522 1.5K_1% +5V VCC_DRAMNB R523 C730 1000PF C731 0.1UF F7 F11 VDD5V VDD5V AA4 AA5 AA6 Y6 SENSE_AGP VDDPM1_AGP VDDPM2_AGP GNDPM +VDDQ SENSE_AGP R524 150 1%_0805 VDDPM_AGP1 Change Value by tunning VDDPM_AGP2 AGP 2X Near M1647 R936 10 MILES VREF_GC VREF_AGP @0 +CPU_CORE Close the Node 100_1% SENSE_CPU R525 120 1%_0805 VDDPM_CPU1 Change Value by tunning VDDPM_CPU2 R526 C732 U23 U22 V23 V22 VREF_AGP VREF_AGP SHLD_AGP SENSE_CPU VDDPM1_CPU VDDPM2_CPU GNDPM 1000P C742 VREF_CPU 0.1UF R527 150_1% Y5 K6 Y4 +CPU_CORE C743 1000PF C744 0.1UF R528 R529 R530 Near M1647 10K-0402 VREF_MEM1 10K-0402 VREF_MEM2 10K-0402 VREF_MEM3 P23 D14 F21 P22 E14 VREF_CPU VREF_CPU VREF_CPU SHLD_CPU SHLD_CPU AA7 AB13 AA20 AA21 AB6 VREF_MEM VREF_MEM VREF_MEM SHLD_MEM SHLD_MEM NOTE : R524,R525 Value depend on PCB impedance X 3V_PCINB R22 Y22 G5 C686 C687 C688 C689 1000PF 0.1UF 1000PF 0.1UF + C685 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND B13 C16 C19 C22 C24 A26 E24 H24 L24 P24 U24 W24 W25 AC4 AD6 AD9 AD12 AD15 AD18 AD21 AA24 AD24 AF26 G3 K3 M2 N3 R2 T3 W3 AB3 AC2 AF1 A1 C6 G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T G/T L12 L13 L14 L15 L16 M11 M12 M13 M14 M15 M16 N11 N12 N13 N14 N15 N16 P16 P15 P14 P13 P12 P11 T16 T15 T14 T13 T12 T11 R16 R15 R14 R13 R12 R11 L11 K12 K13 K14 K15 U12 U13 U14 U15 M10 M17 N10 N17 P10 P17 R10 R17 22UF_10V_1206 3V_DRAMNB PLACE NEAR M1647 + C696 C697 C698 C699 C700 C701 C702 C703 C704 C705 C706 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF 47UF_6.3V_B VCC2_5NB 26 VCC2_5NB PLACE NEAR M1647 C707 C708 C709 C710 C711 C712 C713 C714 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF + C1165 PLACE ON M1647 SOLDER SIDE 22UF_10V_1206 VCC_CORENB 1K_1% Modify By 6/5/2001 AGND AGND AGND Power +CPU_CORE Near M1647 AA22 R23 1000PF C692 GNDPL GNDPL AVDD_MEM R518 CHB2012B800_0805 VDDPM_AGP2 C690 C684 1000PF +VCC_2.5 R517 4.7 C683 0.1UF C682 1000PF C681 PLACE NEAR M1647 C720 C721 C722 C723 C724 C725 C726 1000PF 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF + C719 VDDPM_AGP1 22UF_10V_1206 VCC_CORENB PLACE UNDER M1647 SOLDER SIDE VCC_DRAMNB C727 C728 C729 0.1UF 1000PF 0.1UF VCC_AGPNB R515 4.7 PLACE NEAR M1647 C734 C735 C736 C737 C738 C739 C740 C741 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1000PF + C733 +VDDQ 47UF_6.3V_B VCC_AGPNB PLACE ON M1647 SOLDER SIDE C745 C746 C747 C748 C749 0.1UF 1000PF 0.1UF 1000PF 1000PF U20B A M1647 NORTHBRIDGE 35x35mm 528 BALLS Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC SCHEMATIC, M/B LA-736/736B/736C AF Size TOPSIDE VIEW Document Number Rev 1F 401168 Date: Monday, September 10, 2001 Sheet of 45 Clock Generator PLACE NEAR CLOCK GENERATOR Place close to CLK gen +3VS L1 CHB3216U121_1206 U21 VDD3_3 C750 C751 C1170 C752 C1171 C753 C1172 C754 C1173 C755 C1174 C756 C1175 C757 1UF 01UF 1UF 01UF 1UF 01UF 1UF 01UF 1UF 01UF 1UF 01UF 1UF 22UF_10V_1206 16,24 CPU_STP# RB751V FOR S1 FUNCTION R934 +3VS 10K MODE PCI_STP# +3VS R935 12 12 10K SCK_CLK SDA_CLK CPUCLKT0 CPUCKLC0 CPUCLKT1 47 46 45 RCPUCLK RCPUCLK# RCPUCLK_NB R531 R532 R533 10 10 CPUCLK CPUCLK# CPUCLK_NB CPUCLK CPUCLK# CPUCLK_NB SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 43 42 39 38 37 36 33 32 31 30 RDCLK_NB RDCLK0 RDCLK1 RDCLK2 RDCLK3 R534 R535 R536 R537 R538 22 22 22 22 22 DCLK_NB CLK_SDRAM0 CLK_SDRAM1 CLK_SDRAM2 CLK_SDRAM3 DCLK_NB CLK_SDRAM0 CLK_SDRAM1 CLK_SDRAM2 CLK_SDRAM3 FS1/AGP0 AGP1 10 FS1 RAGPCLK FS2/PCICLK_F PCICLK0 PCICLK1 PCICLK2 PCICLK4 PCICLK5 12 13 14 15 19 20 FS2 FS3/48MHZ FS0/REF0 PD# 22 VDD VDD VDD VDD VDD VDD VDD D12 16 17 21 28 35 40 DG_STOP# 11 16 23 29 34 41 48 GND GND GND GND GND GND GND GND 25 26 27 18 SDRAM12 SDRAM11 SDRAM10/PCI_STOP# MODE/PCICLK3 24 44 SCLK SDATA X1 Change Kenny 5/31/2001 R539 22 R540 22 AGPCLK_NB GCLK_O AGPCLK_NB GCLK_O RPCLK_PCM RPCLK_MINI RPCLK_AUD R541 R542 R543 R544 R545 33 22 22 33 22 PCLK_NB PCLK_1535 PCLK_PCM PCLK_MINI PCLK_AUD PCLK_NB PCLK_1535 15 PCLK_PCM 19 PCLK_MINI 18 PCLK_AUD 26 FS3 FS0 R546 R547 22 22 48M 14MOSC 48M 14MOSC 15 16 14MTV 14MTV 10 X2 R548 ICS9248AF-171 R549 22 Place close to CLK gen Y1 XIN +3VS R550 C758 XOUT 12 12 13 13 VR_POK 29,32 0-0402 C759 XTAL-14.318MHZ 10K C760 @22PF 10PF RCPUCLK 10PF RP8 @22PF RCPUCLK_NB C762 @22PF 8P4R-10K C761 RCPUCLK# RP9 R551 R552 R553 R554 0 @0 @0 FS3 FS2 FS1 FS0 CLOCK FREQUENCY TABLE FS3 FS2 FS1 FS0 8P4R-10K Place close to CLK gen and series terminator 0 1 1 1 1 CPU 100.00 100.00 100.00 100.00 SDRAM 100.00 133.33 100.00 133.33 PCICLK AGP 33.33 33.33 33.33 33.33 66.66 66.66 66.66 66.66 SPREAD +/- 0.25 % +/- 0.25 % ~ 0.5% DOWN SPREAD ~ 0.5% DOWN SPREAD Note : S0 ~ S1 & CPU ON C0~C3,THE CPU CLOCK CAN'T STOPPED LCL Place these component near middle of trace Place these component near middle of trace DICLK#[0 3] DICLK#2 AICLK# DICLK#0 L44 10nH L45 10nH DICLK_NB#0 DICLK#1 L48 10nH L49 10nH DICLK_NB#1 L50 10nH L51 10nH AICLK_NB# C1195 C1196 C1197 5PF 5PF 5PF DICLK_NB#0 DICLK#3 DICLK_NB#1 AICLK_NB# No data traces should be routed within 20mil of the L L42 10nH L43 10nH DICLK_NB#2 L46 10nH L47 10nH DICLK_NB#3 C1193 C1194 5PF 5PF DICLK_NB#2 DICLK_NB#3 Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 24 VGA_SUSP# 30 SUSP 14,15,18,19 CLKRUN# 10,19,20 DEV_RST# 14,15,26 PIRQC# 14,15,18,19 PIRQB# 14,15,19 PIRQA# 24 DAC_CONTR 10 TVCLK 10 TVHS 10 TVVS TVHS TVVS TVD7 TVD6 TVD5 TVD4 TVD3 TVD2 TVD1 TVD0 CONT-80P AGP_STP# 5,15 GSERR# +5V JP9 C778 10UF_10V_1206 5 5 5 5 +VDDQ GPAR GFRAME# GIRDY# GTRDY# GPAR GFRAME# GIRDY# GTRDY# GDEVSEL# GREQ# GGNT# GSTOP# GSBA5 GSBA6 GSBA4 GSBA7 SBSTB GDEVSEL# GREQ# GGNT# GSTOP# C780 10UF_10V_1206 +12VS +3VS SBSTB 5 ST1 RBF# ST1 RBF# GAD25 GAD30 GAD24 GAD29 GC/BE#3 GAD26 +5VS +VDDQ GC/BE#3 GAD31 GAD27 GAD28 VREF_CG VREF_GC AD_STBB GAD23 GAD17 GAD20 GAD16 GC/BE#2 VREF_GC GC/BE#2 GAD18 GAD22 GAD21 GAD19 AD_STBA# AD_STBB# 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 AD_STBA# AD_STBB# PIPE# SBSTB# WBF# GCLKO PIPE# SBSTB# 5 RTCCLK 5,16,20 WBF# GCLK_O GSBA3 GSBA0 GSBA1 GSBA2 GCLKO AGP BUS PULL/DOWN RESISTER ST0 ST2 GAD1 GAD4 GAD2 GAD3 GC/BE#0 GAD0 ST0 ST2 GC/BE#0 5 C779 @22PF +VDDQ GAD7 GAD5 GAD6 AD_STBA GAD8 GAD13 GAD12 GAD10 GC/BE#1 GC/BE#1 GFRAME# R555 8.2K GIRDY# R556 8.2K GTRDY# R557 8.2K GDEVSEL# R558 8.2K GSTOP# R559 8.2K GREQ# R560 8.2K GPAR R561 8.2K RBF# R562 8.2K PIPE# R563 8.2K GGNT# R564 8.2K WBF# R565 8.2K GSERR# R566 8.2K ST2 R567 8.2K AD_STBA R568 8.2K AD_STBB R569 8.2K SBSTB R570 8.2K AD_STBA# R571 8.2K AD_STBB# R573 8.2K SBSTB# R576 8.2K GAD15 GAD11 GAD14 GAD9 TVD[0 7] CONT-80P +VDDQ +VDDQ C781 G_VREF1 @560PF +3VS R572 R574 @1K 1% R577 @75 1% VREF_CG R579 @75 1% @0 R575 10K +3V R578 1G_VREF2 TVD[0 7] 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 5,15 AGP_BUSY# 10K AGP_BUSY# D14 GGREQ# 16 @RB751V R580 @1K 1% GREQ# PCIREQ# D15 @RB717F C782 R581 @560PF 10 GSBA[0 7] GSBA[0 7] +3V +3V ENVEE 25 BKOFF# 24 DISPOFF# 23 GPIO0_VGA 16 16 16 16 ST[0 2] ST[0 2] AGP_BUSY# PID0 PID1 PID2 PID3 5,15,16 SUS_STAT# GAD[0 31] GAD[0 31] M_SEN# CRTGND G R B CRTGND HSYNC VSYNC DDC_DATA DDC_CLK 9,24 M_SEN# CRTGND G R B CRTGND HSYNC VSYNC 9,10 DDC_DATA 9,10 DDC_CLK 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 1 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 JP8 Change by 8/28/2000 ALI Suggest Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 D16 D17 1 2 G DDC_DATA 8,10 Q54 2N7002 S D R587 G DDC_CLK 8,10 1 +12VS DDC_CLK Q56 2N7002 C793 220PF C795 68PF C794 68PF C792 220PF Q57 2N7002 2 R588 G R589 2 R590 @10K @10K 1 L7 CB-1608D-121T D VSYNC C791 100PF CB-1608D-121T S +12VS DDC_DATA G VSYNC D HSYNC 2N7002 Q55 S 0_0805 HSYNC JP10 CRT-15P S C790 10PF DAN217 D C789 10PF L5 3 2 1 C788 10PF C787 10PF 1 C786 10PF C784 68PF 11 12 13 14 10 15 M_SEN# R583 2.2K C785 10PF R586 75 CRTGND L6 R585 75 R584 75 B B +5VALW 1 G 8 8,24 CB-2012D-800T_0805 L3 CB-2012D-800T_0805 L4 CB-2012D-800T_0805 G C783 1UF DAN217 R582 2.2K L2 R CRT Connector R DAN217 RB491D DAN217 CRTVDD +5VS D20 D19 1 CRTVDD D18 CRTVDD Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet of 45 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +5V +3VS Modify By 4/10,For Power Consumption XTALO Y2 @14.318MHZ +3V +3VS C797 @10PF R1010 1UF 1 C809 21 CSYNC DVDD ADDR 17 35 37 TVHS TVVS 40 41 TVD7 TVD6 TVD5 TVD4 TVD3 TVD2 TVD1 TVD0 44 43 42 29 XTALO XTALI 33 32 HS VS D7 D6 D5 D4 D3 D2 D1 D0 SUBSTRATE XTALO 14MTV2 1UF R596 75 DVDD 14MTV D10 D11 D12 D13 D14 D15 10 11 12 13 14 15 IRSET 24 REV C813 150PF C814 270PF DAC_GND C815 @270PF DAC_GND DAC_GND DAC_GND +3VS 22K R601 +3V 4.7K @22K R1012 Modify By 4/10, For Power ADD FOR TVXPRESS R603 Consumption SET "C0H/C1H" TVXPRESS_LQFP 14MTV2 R602 @22 L13 CB-2012D-601T DAC_GND 560_1% DAC_GND C816 TVRST# @10PF Clean GND required TVVS CLK_GND L14 CB-2012D-601T DAC_GND TVD[0 7] C812 R600 34 23 19 TVHS Stuff For TVXpress R599 1 XCLK 39 CB-1608D-121T C/G CB-1608D-121T 30 16 22 JP11 RCA JACK L12 TVCLK DAC_GND TVVS 20 Y/R @27PF L11 REV TVCLK CVBS/B D8/SUSP D9 2 TVCLK TVHS 38 C810 47PF 1UF 1 R595 1K Modify by 11/03/2K V5SF C811 2 USE VGA DIRECTORY VLF DVDD DVDD SD SC RESET# 8,9 DDC_CLK R598 1 28 R597 AGND GND GND 8,9 DDC_DATA R594 @0 DGND DGND DGND 18 36 SCK_TV 31 25 12 26 27 U22 DVDD AVDD VDD SDA_TV 1 560PF 12 C807 10UF_10V_1206 VLF C808 CLK_GND R593 @0 C806 10UF_10V_1206 1UF Modify By 4/10,For Power Consumption @0 CLKVDD DACVDD 1UF CLK_GND C805 CB-1608D-121T L10 C804 1UF C803 CLK_GND R958 2 VLF C802 10UF_10V_1206 C801 10UF_10V_1206 CLKVDD 1 DVDD DAC_GND DAC_GND CB-1608D-121T L9 R1011 @0 C796 @27PF C800 C799 10UF_10V_1206 C798 10UF_10V_1206 14MTV2 DACVDD 1 CB-1608D-121T L8 Modify By 4/10,For Power Consumption @0 R592 R591 1 @0 R1009 2 +3V TVD[0 7] CLK_GND R604 TVRST# TVCLK +3VS TVRST# 10K R605 @22 TVRST# PCIRST# 5,14,15,18 21,26 RB751V D21 R1013 DEV_RST# 8,19,20 R606 @0 2 C817 Add R1009~R1013 for TVout leakage on C3 @0 @10PF CONFIGURATION PART R592 R591 R599 R601 R603 C808 D21 R606 R958 TVXpress CH7004 NOTE STUFF OPEN STUFF STUFF 560 1% 560PF STUFF OPEN OPEN OPEN STUFF OPEN OPEN 360 1% OPEN OPEN STUFF STUFF USE +3VS USE +5VS FOR TVXPRESS ADDR SET "C0H/C1H" Compal Electronics, inc Title NOTE :CH7004 ADDR SET 76H BY PIN 29 "LOW" THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 10 of 45 +5VS +VCC_2.5S Modify By 3/8 R913 SUSPEN POWER 3.9K RP69 S D S D G D G VID3 Q106 2N7002 S D PVID4 VID2 Q105 2N7002 S PVID3 G PVID2 VID1 Q104 2N7002 PVID1 VID0 Q103 2N7002 G FROM PROCESSOR D 8P4R-3.9K PVID0 PVID[0 4] K7 PGA IO only 2.5 volt tolerant S 3.9K G R914 VID4 VID0 35 VID1 35 VID2 35 VID3 35 VID4 35 Q107 2N7002 RP73 +5V Modify By 3/8 For Mobil Athlon Model SVID_GATE : HIGH & Mobil Duron Model For Mobile Duron Model SVID_GATE : LOW Athlon/Duron +5VS SVID[0 4] To Pin PWROK of Socket-462 CPU R917 4.7K D G S 2N7002 C1158 1UF_10V_0603 +CPU_CORE Q114 +VCCP2.5 1 Q112 G S D Q118 2N7002 G S 2N7002 SVID4 D S 1 G 2N7002 VID[4:0] Code to Voltage Definition 7,29 VCC_CORE(V) VID[4:0] VCC_CORE(V) 00000 2.000V 10000 1.275V 00001 1.950V 10001 1.250V 00010 1.900V 10010 1.225V 00011 1.850V 10011 1.200V 00100 1.800V 10100 1.175V 00101 1.750V 10101 1.150V 00110 1.700V 10110 1.125V 00111 1.650V 10111 1.100V 01000 1.600V 11000 1.075V 01001 1.550V 11001 1.050V 01010 1.500V 11010 1.025V 01011 1.450V 11011 1.000V 01100 1.400V 11100 0.975V 01101 1.350V 11101 0.950V 01110 1.300V 11110 0.925V 01111 NO CPU 11111 NO CPU MMBT2222A Q115 C1160 @39PF-0402 PWROK circuit for Socket-462 CPU R921 C1161 @15K 047UF MMBT2222A FOR EMI REQUEST Q111 R919 C1159 @20K 047UF 15K S D 2 Q113 VR_POK 1 VR_POK R920 G 2N7002 VID[4:0] 8P4R-3.9K R966 3.9K +3VS R916 4.7K 10K Q117 SVID1 +VCC_2.5S DETECT CPU TYPE BY EC D @0 7SH08 R918 S 2N7002 SVID3 G SVID0 24 CPU_DECT# Q110 SVID2 R915 S D 2N7002 16,29,35 SPWROFF# Q109 G D SVID_GATE R967 U60 This disables the CPU's VIDs from being passed through during sleep state From VCCA pin of PPGA 462 POWEROK IS EQUAL TO CPUPOWEROK, THEN IT WILL BE DELAYED 20nS TO GENERATE PWDGD FOR SYSTEM Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC SCHEMATIC, M/B LA-736/736B/736C Size Document Number Rev 1F 401168 Date: Monday, September 10, 2001 Sheet 32 of 45 A B C D E SB+ PD1 +12VALWP RB751V PR1 10_1206 TIME/ON5 28 RUN/ON3 MAX1632 1 PC19 PC20 4.7UF_1210_25V PC21 0.1UF_0805_25V PR4 0.015_2512 1W PQ4 FDS6690S 1 P9 + + + PC166 PC24 PC25 PC26 PR123 47UF_D_6.3V 47UF_D_6.3V @1M 6.3V 47UF_D_6.3V 47UF_D_6.3V PC23 @1000PF PR6 100K 2 4.7UF_1210_25V PR132 10K + 10UH_SDT-1205P-100-120 PQ3 SI4800 4.7 @0 PZD1 @RLZ4.3B PT1 P7 P8 ACIN +3VALWP PD7 BYS10-45 PR130 CSH3 CSL3 FB3 SKIP# SHDN# PR3 22_1206 SB+ PD4 EC11FS2 S S S G VL LX3 DL3 PR131 PR5 16,24,34 0.015_2512 PU1 0.1UF_0805_25V 18 16 17 19 20 14 13 12 15 11 10 23 PC18 @1000PF 21 22 DH3 12OUT VDD BST5 DH5 LX5 DL5 PGND CSH5 CSL5 FB5 SEQ REF SYNC RST# D D D D PL3 27 26 24 P5 10UH_SPC_1207P_100 BST3 PC12 470PF_0805_100V PC11 1UF_0805_25V PC14 S S S G 4.7 25 PC6 4.7UF_1206_16V GND PR129 PC7 0.1UF_0805_25V PC4 4.7UF_C_35V V+ S S S G PC13 0.1UF_0805_25V S S S G + PC2 2.2UF_1206_25V 25V PL1 1UH_BLM3216 1 D D D D D D D D 4.7UF_1210_25V 0.1UF_0805_25V PC10 4.7UF_1210_25V PC9 PQ2 SI4800 PQ1 FDS6690S PC8 PD2 RB751V VL PC5 0.1UF_0805_25V PC1 4.7UF_1206_25V P6 D D D D SB+ + PR124 @1M MAINPWON 36 PR125 PC28 + 47UF_D_6.3V PZD2 @RLZ6.2C PD8 RB051L-40 2 PC29 1 +5VALWP PC27 47UF_D_6.3V +5VP VREF PZD3 PR7 47K 5% RLZ3.6B PC31 1000P_0603_50V PR8 120K 5% PC30 047U_0603_16V 4.7UF_1206_16V PR126 VL 3 4 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC A B C D Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Size B Date: Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet E 33 of 45 A B C D ADAPTER CURRENT 2.5A P1 CP: 2.57A P2 E ACIN threshold 15V B+ PQ5 VIN PR12 10K PR9 0.035_2512 PQ7 D D D D S S S G PR11 51K SI4835 S S S G D D D D PC33 @100P 1W SI4435 PQ6 S S S G D D D D VMB SI4435 SB+ 1 PR26 PC43 0.1UF_0805_25V PACIN 47K PR288 S S S G PD11 1SS355 36 OVP# PR239 4.7 909_1% PR243 VCHGREF PR238 4.7 PC178 PC177 PC176 PR240 22_1206 1UF_0805_16V 33 PR245 14 13 ICTL REFIN 11 12 10 ACIN ACOK ICHG PC170 PR235 PR236 26.1K_1% 20K_1% @1M_1% 57.6K_1% TRICKLE 2 2N7002 PC172 PQ17 IINP CCV CCI CCS 1K PR252 26 LX 23 2N7002 2700PF_0603_50V 2N7002 DLO 21 PGND CSIP 20 19 CSIN 18 BATT 17 PC180 0.1UF_0805_25V 0.01UF_0603_50V PC174 PC175 0.01UF_0603_50V 4.7 PR265 PR253 PR254 1 @_2200P PC181 PR246 PR248 249K_1% 200K_1% PQ19 PC182 0.1UF_0805_25V 0.1UF_0805_25V SI2303DS LI/NIMH# 24,36 CV:LI-ION 13.241V NI-MH 17.1V PC186 2N7002 PR247 PR249 120K_1% 200K_1% CC: CC: CC: 0.36A CC: 0.36A 0.1UF_0805_25V PR264 100K PR267 100K PC187 0.22UF_0805_16V NIMH/LI# 36 PQ114 25 FSTCHG 0.1UF_0805_25V PQ15 PQ113 DTC115EK 100K CHGRTCP 2N7002 PR270 10K PR62 22K A 2 PC52 PZD6 RLZ16B 1UF_0805_25V PQ115 10K 2SC2411K PR59 3.9K_1% PR61 PC55 150K 0.1UF_0805_25V PC188 @0.1UF_0805_25V PZD5 RLZ5.1B 2 2 2 +5VP 1 PR60 100K PC51 10UF_1206_10V 2 PR58 47_1206 PZD4 RLZ6.2C PC56 0.1UF_16V 1 51ON# PR271 PQ24 TP0610T 1 200_0805 RTCVREF PR251 VS 23,29 16,24,33 PD18 RLS4148 CHGRTCP ACIN PD16 RB751V 33K_1% PR45 PU6 S-81235SG PACIN P1 2.78A LI-ION FAST 2.0A NI-MH FAST LI-ION TRICKLE NI-MH TRICKLE LI/NIMH# 24,36 100K VMB 4.7UF_1210_25V PC185 PC189 1 PC39 2.7 PR266 1UF_0603_10V DHI 24 PC38 33uF_25V 4.7UF_1210_25V + 4.7UF_1210_25V D D D D 25 22 CSSN BST DLOV PC102 22UH_SPC_1207P_220 1W PC173 PQ16 PQ18 28 16 PC37 PR233 0.22UF_0805_16V MAX1772 CELLS LDO PR255 0.035_2512 PL4 SI4810DY PR231 1.43K_1% PU10 GND PR250 VCTL GND +5VP 100K PQ112 S S S G 20K_1% PC179 0.1UF_0603_16V 15 1.5K_1% 22K_1% PR234 PR232 PR237 20K_1% 24 DCIN CLS 1UF_1206_25V 100K CSSP PQ14 DTC115EK VCHGREF 100K PR230 PC171 REF ACOFF PR242 15K_1% 27 24 P4 P3 PD46 RB751V PR241 95.3K_1% PR244 0.1UF_0805_25V 0.1UF_0805_25V PQ111 SI4800 4.7UF_1210_25V KC FBM-Ll11-322513-201LMAT D D D D PC42 4.7UF_1210_25V 4.7UF_1210_25V PL9 VIN PC41 PR22 47K PQ9 2N7002 PC40 PR18 100K Title PC54 0.22UF_1206_25V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC B C D Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Size B Date: Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet E 34 of 45 PC83 1 4.7UF_1210_25V JOPEN3 D D D D D D D D B+ PL12 KC FBM-Ll11-322513-201LMAT 2 2 2 3MM 0.1UF_0805_25V 1 PR274 20 32 VID2 PR275 19 D2 GND 32 VID3 D3 FB VID4 PR276 PR277 18 32 17 D4 2 D D D D MAX1717 CPU_COREP PL7 S S S G D1 PC90 PC91 220UF_D_4V 220UF_D_4V PC92 PD29 + BYS10-45 PD39 EC31QS04 + + PC96 1000PF_0603_50V 220UF_D_4V PC93 CC REF FBS TON GNDS 11 VGATE 12 B @_2200P PC94 PR107 @_0 PR283 +5V PC95 470P_0603_50V 0.22UF_16V_0805 A/B# PR281 @0 100 PR282 @0 PR106 PR279 PR280 10 ILIM 16 1 B PU9 @SRC-1307_0R6 PQ109 FDS7764A 2 PQ37 FDS7764A VID1 PQ36 FDS7764A 21 13 PR273 DL 14 PL8 HK-RM136-22A0R7 2 23 LX PR226 D D D D DH D0 S S S G TIME 24 1 VCC 22 VID0 32 PR189 120K 32 A 4.7UF_1210_25V 1000PF_0603_50V 2.2 BST SKP/SDN# PC116 V+ PC85 4.7UF_1210_25V PR272 PR228 D D D D PC89 S S S G VR_ON PR227 0.1UF_0805_25V 15 VDD 1 4700PF_0603_50V PC88 2 2 4700PF_0603_50V 1 4,25 PC81 0.22UF_0805_16V PC192 PR224 1M PR222 1M PC190 1 4700PF_0603_50V 4700PF_0603_50V A 4700PF_0603_50V PL6 4.7UF_1210_25V KC FBM-Ll11-322513-201LMAT S S S G PR225 1M PC86 RB751V PD43 S S S G PC191 PC184 PR104 20_0805 PR223 1M 2 PC183 PR221 1M 2 1UF_0603_10V PC84 4.7UF_1210_25V PC82 2 PC80 +5VALW PQ35 IRF7811A PQ34 IRF7811A PD28 @RB751V 1 2 1 @0 COREFB+ +5VALW COREFB- PC97 @10PF 16,29,32 SPWROFF# PR269 PR112 @215K_1% 2 100 PR278 C C JOPEN2 +5VALWP +5VALW +3VALW 3MM JOPEN6 +3VALWP 3MM CPU_COREP +CPU_CORE CUT POWER PLANE JOPEN4 +12VALWP +12VALW 2MM D D Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 35 of 45 A B C D E +5VALWP PR127 15K_1% PF1 5A PCN1 VMB 24,34 LI/NIMH# +5VALWP +5VALWP PR128 1K 1% PD31 3 2 PR63 6.49K 1% Add by CT at 2/25 PR197 @10K @BAS40-04 +5VALWP PR67 1K PR69 + PC153 @10UF_10V_1206 200 PC151 @47UF_D_6.3V PD22 @BAS40-04 3,22 25 SMD +5VALWP VREF G D D - BATT CONN 1000P_0603_50V PC101 0.01UF_0603_50V BATT_TEMP +5VALWP INVPWR S D D PC152 @0.1UF 24 PQ108 @SI3443DV PR199 @100K + PU11 @MAX4490 PR198 @11K PC100 PR64 1K PD20 @BAS40-04 +5VALWP PC150 @100PF SLD SLC PR196 @470 B/I TS PR200 2 PR71 200 PD23 @BAS40-04 3,22 25 SMC VMB Noise immunity for charger OVP on 2/8 by James MODIFY FOOTPRINT BY KENNY 12/23/2K PCN2 PL10 CHC4532U800 PD24 BYS10-45 PR286 @2.2K_0805 VIN PR284 @2M PT2 PC62 0.01UF_0805_50V 1000PF_0603_50V PL11 PC63 PQ116 24,34 LI/NIMH# @0.1UF_0805_25V PR285 PC64 0.01UF_0805_50V PC194 PQ117 @0.1UF_0805_16V @2N7002 @2N7002 PR287 @1M 1000PF_0603_50V PC61 DC JACK 2DC-S315-B01 PC193 VIN @JBT0385-100805-4 34 @1M CHC4532U800 3 VS VMB LI-ON OVP14.3V NI-MH OVP17.8V PR259 22 VL PC163 0.1UF_0805_25V 34 P1 PD25 @1SS355 OVP# PR73 @39K PR261 47K 2.15K_1% 16.9_1% - MAINPWON 33 PR72 1M_0.5% + - PR74 PR75 @1M_0.5% PR76 @1M PR83 @10K 1% PR84 PC66 PC67 PC65 @4.7UF_1206_25V @2.2UF_0805_16V @0.1UF_0603_16V 25V PR85 @1M PQ26 NIMH/LI# 34 @2N7002 PR256 + PQ25 @2N7002 PR87 @100K LM393 PU4A PR258 PR82 @324K_1% PU4B LM393 PR257 RTCVREF 4 PC168 PC167 1000PF_0805_50V 0.22UF_0805_16V PH1 10K_1%_0805 PR262 100K_1% VL CPU thermal protection 100C PR268 100K_1% Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC A B C D SCHEMATIC, M/B LA-736/736B/736C Size B Date: Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet E 36 of 45 N32NN061 / LA-736 Rev0.1 HISTORY LIST (PIR) 01 28/AUG/2000 01 21/AUG/2000 *) PAGE 3: Correct U20.E6 Pin Name from RATIO# to NC,DEL R480 *)PAGE 31:Correct RP67 Value from 10K to 680 Ohm,R905 ~ R909 from 10K to 3.3K *) PAGE 3: Correct U20.Y3 Pin Name from GSERR#/CLKRUN# to GSERR# *)PAGE 32:Correct R913,R914,RP69 Value from 10K to 680 Ohm,By AMD Suggest *) PAGE 1: Correct R419 from 56 Ohm to 1K *)PAGE 32:Correct VID Table *) PAGE 4: CHANGE R493 FROM OPEN TO STUFF 01 29/AUG/2000 *) PAGE 4: Change all pull low strapping resister value from 10K to 2.2K *) PAGE 10: ADD TVXpress and CH7004 Configuration table *)PAGE 6:Correct C685,C719 from 0.1UF to 22UF_1206 *) PAGE 15 :Change U26A location to U17A *)PAGE 7:Add R939, "6 inch" trace "GCLK_1",for AGP Clock tunning by ALI Suggest *) PAGE 16: RTSA# Change pull up +5VS to GND,by BIOS Requested ,Set to 370H *)PAGE 14,ADD H12,H13 For VGA Broad HOLE! *)PAGE 35,ADD PR230 Ohm on COREFB- *) PAGE 16:U25.K1 Add Pull up resister to +5VS 01 30/AUG/2000 *) PAGE 16: U25.L3 , U25.Y8 , U25.W9 ,U25.P5 Add Pull up resister to +3VS *)PAGE 35:DEL PR229,BY Power request *) PAGE 21: Add U31A pin 14 connect to +5VALW and pin connect to GND *)PAGE 3:MOVE R931 TO PAGE 15 (North bridge side) *) PAGE 33~36 :Change all Location to the same LA-732,Power team requested 01 1/SEP/2000 01 22/AUG/2000 *) PAGE 15:Correct RP33,RP34 from 33 to 47 Ohm *)PAGE 3:Change R414,R417 from STUFF to OPEN,By AMD suggestion *) PAGE 21 :Correct RP44,R729,RP45,RP46,RP48,R738 From 33 to 47 Ohm *)PAGE 3,4:Correct Some Resister and Cap to 0402 size *) PAGE 21 :Correct R728,R737 Value from 22 to 82 Ohm *)PAGE 27:Correct C1083 to 0402 size *) PAGE 21 :Correct R741,R744 Value from 33 to Ohm *)PAGE 5:Change R475 from +3VS to +3V *) PAGE 21 :Correct R739 Value from 4.7K to 5.6K Ohm *)PAGE 3:Change R446 from OPEN to STUFF,BY AMD NEW SPEC *) PAGE 21 :Change R724,R734 to OPEN *)PAGE 3:Change R446 from OPEN to STUFF,BY AMD NEW SPEC *)PAGE 22:Correct R755 from 4.7K to 5.6K Ohm 01 24/AUG/2000 *)PAGE 6:ADD R940,C1166 FOR G_RST Ali Suggestion 01 4/SEP/2000 *)PAGE 4: ADD CAP C1162,C1163,C1164 *)PAGE 4:Change Back THERMDA(S7),THERMDC(U7) By AMD Recommand *)PAGE 16:Correct R654.,R668 from 10K to 1K *)PAGE 6,For VDDIO_AGP,ADDPM_AGP Change Name From +3V to +VDDQ 01 25/AUG/2000 *)PAGE 5:Change R502,R503 from OPEN to STUFF,set the S2K BUS read & write forward clock"5/16 T" *)PAGE 8,JP8 Pin62 ~68 Change Name From +3V to +VDDQ *)PAGE 5:Correct R481,R482,R483,R484,R486,R487,R488,R489 to RP70,RP71 *)PAGE 30,Add 1.5V Regulator,JOPEN7 for AGP 4X Reserve *)PAGE 5:Change R927 pull up from +3VS TO +3VALW,Because it it resume power group *)PAGE 6,Del R922,R923,Because it can't suspend the PCI power,By ALI Recommand *)PAGE 5:Change R491 from +3VS to +3VALW *)PAGE 5,Add pull low resister R949 ~ R954 For C/BE#0 ~ C/BE#3,ST0,ST1 By ALI Recommand *)PAGE 14:Change IRQ1 pull up from +3VS TO +3VALW,Because it it resume power group,So add R929 pull up to +5VALW *)PAGE 31,Correct R905~R909 Value From 3.3K to 2.2K *)PAGE 16:Change R683,R684 from STUFF to OPEN *)PAGE 3,Correct Value R423 from 4.7K to 680 Ohm *)PAGE 30:Del outport "+5VS_GATE",because don't used! *)PAGE 3,Correct Value RP2 from 10K to 270 Ohm *)PAGE 19:Add R930 for VCCP *)PAGE 5,Change R475 Pull up from +3V to +VDDQ 01 28/AUG/2000 *)PAGE 7,Change PCLK_1535 Connect with PCLK_NB,Before Damping *)PAGE 3:Correct R419 Value from 1K to 270 Ohm and Change pull up to +CPU_CORE to GND *)PAGE 8,Change AGP PULL UP Resister From +3V to +VDDQ *)PAGE 3:Correct R432 Value from 1K to 680 Ohm and Change pull up to GND to +CPU_CORE *)PAGE 15,ADD U58 ON PCIRST# For LEAKAGE *)PAGE 3:Correct R429 Value from to 270 Ohm *)PAGE 16,Correct R925 ~ R928 & R937,R938 Pull Down to GND *)PAGE 3:Correct R434 Value from 1K to 270 Ohm *)PAGE 19,ADD OUTPORT ON CBRST# *)PAGE 3:Correct R425 ~ R433,RP1 Value from 560 to 680 Ohm *)PAGE 20,CHANGE U29 RESET# FROM DEV_RST# TO CBRST# *)PAGE 3:Correct R453 Value from 1K to 270 Ohm *)PAGE 32,ADD Q117,Q118 For Meet AMD NEW SPEC *)PAGE 3:DEL R435,No request 01 6/SEP/2000 *)PAGE 3:Correct R585 from STUFF to OPEN *)PAGE 5,DELR498,R504,Because Repeat By R511,R909 *)PAGE 3:Correct R586 Value from 0.1UF to 0.047UF *)PAGE 29,ADD R957 For Time Tuning *)PAGE 3,Add R931 on SMI#,AMD suggest no connect! *)PAGE 8,Correct R599 Note(Stuff For TVXPRESS) *)PAGE DEL C624 ~ C631,by AMD Suggestion *)PAGE 6,8 : Correct Net Name From AGPVREF To VREF_GC *)PAGE &PAGE 31 : DEL BPFID[0:3] CIRCUIT *)PAGE 10, ADD R958 ON U22 PIN 30 FOR CH7004 RESERVE *)PAGE 6:Correct Value R524,R525 from 210 to 180,depend on PCB impedance X 3,ALI recommend 01 7/SEP/2000 *)PAGE 6:Add R936 for AGPVREF,NEAR NODE *)PAGE 31,Correct RP67 From 0804 to 8P4R Size *)PAGE 7:ADD R934,R935 Pull Up the U21Pin 1,27 *)PAGE 3,Correct RP2 From 0804 to 8P4R Size *)PAGE 8:Change R577,R575,D14,D15 from STUFF to OPEN,R581 from OPEN to STUFF *)PAGE 14,ADD H14~H18,EP13~EP17 FOR LAYOUT RESERVE *)PAGE 16:ADD R937 for U25.L1 PULL UP TO +5VS *)PAGE 16:ADD R938 for U25.P5 PULL UP TO +3VALW *)PAGE 17:Correct C894,C898 Value from 0.1UF to 47PF 01 5/SEP/2000 Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 37 of 45 N32NN061 / LA-736 Rev0.1 HISTORY LIST (PIR) 01 7/SEP/2000 Fix Battery Only Boot Fail: *)PAGE 5,Correct Footprint R468,R469 From 0805 to 0603 *)PAGE 29,Change R899 From 47K to Ohm,Change C1127 from 0.47UF To OPEN *)PAGE 8,Correct R577 From OPEN to STUFF Fix Boot Beep Loudly : *)PAGE 15,Change R955 and U58 From +3VS to +3V,By ALI Recommand D *)PAGE 27,ADD R970(1K),Change R847 from 10K To 1K *)PAGE 31,Correct Value C1137 ~ C1152 From C0603 To C0402 D 1/DEC/2000 *)PAGE 32,Correct R905~R909 Footprint From 0603 to 0402 Power update schematic for B-TEST! 02 13/SEP/2000 Fix suspen resume problem! *)PAGE 7,Correct L1 From CHB2012U170_0805 To CHB010012800_1206 *)PAGE 15,Change U58 power source from +3VS TO +3V, *)PAGE 29,Correct R957 Value From 22 Ohm to 1K Fix VCC_2.5V drop,Change REGULATOR By AMS1085 *)PAGE 32,Change U56 PIN From PWROKCPU to SPWROFF# *)PAGE 17,ADD R972 on LPTSTB# 02 14/SEP/2000 3/DEC/2000 *)PAGE 33,34,35,36,Change From Power team Schematic by K9-DC-0914-1.DSN Change GPIO For VOLUME CONTROL and ENDIM0,1 (Because original group need enable UART3) *)PAGE 35,Add PR230 On COREFB- *)PAGE 16,unmount R655,R656,R657,and reserve R975,R976 for ENDIM0,1 *)PAGE 7,Del C763~C777 *)PAGE 16,mount R641,R642,R643 and ADD R973,R974 for ENDIM0,1 02 15/SEP/2000 TUNNING PCI CLK *)PAGE 4,Correct C589~C608,C619~C623 From C0402 To C0603,Because the material shortage *)PAGE 15,UNMOUNT R629,C880 *)PAGE 14,Modify the EMI PAD Footprint to "EPIPAD_PS-4 C 02 18/SEP/2000 7/DEC/2000 *)PAGE 14,DEL RP27.6 Signal(PAR),Because M1535 Internal Pull Low For meet ALI IDE interface design notice *)PAGE 16,Change R663 from Ohm to 10K Pull Up +3VALW,By Bios Request 1)PAGE 14 : Change RP32 value from 10K to 4.7K 02 21/SEP/2000 *)PAGE 21 : ADD R977 For SDDREQ pull down 5.6K to GND 02 22/SEP/2000 ADD R978 for SBDIORDY pull high 10K to +5VS *)PAGE 27,Change C1083 from C0402 to C0603 Change R740 value From 1K to 10K *)PAGE 7,MOVE R939 To PAGE ,It Need Closest The JP9 Change R728 value From 33 to 82 Ohm(SBDREQ) *)PAGE 35,ADD RQ115,RP270,RP271 for ACIN Change R743,R730 value From 22 to 82 Ohm(IRQ 14,15) 02 26/SEP/2000 Add One +3V Jump For +VDDQ *)PAGE 33~36,Modify the Power Schematic By K7-DC-0925.DSN *)PAGE 30,Add JOPEN8 For +VDDQ It Modify Some Value 14/DEC/2000 N32NN061 / LA-736 Rev0.2 HISTORY LIST (PIR) RESERVE RESISTER (+3VS) FOR M1535+ FOR A-TEST *)PAGE 15,Add R979,R980 For +3VS,+5VS Option 8/OCT/2000 *)PAGE 21,Add R981,R982 FOR IDERDY Pull Up to +3VS *)PAGE 31,Change RP66 from 8P4R_0804 size to 8P4R FIX System Unstable Tunning : *)PAGE 29,Change C1121 from 0.1UF to 10PF,By Power Good Timing B *)PAGE 3,Change R456,R457 Value from 40.2 Ohm 1% to 35 Ohm 1% *)PAGE 3,Change Q50 from 2CS2412K to 2N7002 *)PAGE 6,Change R524 Value from 180 Ohm1% to 150 Ohm 1% *)PAGE 5,ADD R499,R506,R510,R496 & DEL R494,R500,R503 By ALI Strapping *)PAGE 6,Change R525 Value from 180 Ohm 1% to 120 Ohm 1% 12/OCT/2000 *)PAGE 27,Correct R970 Value from 1K Ohm to Ohm PAGE 24,Modify HPID 01 for LA-736 15/DEC/2000 PAGE 7,ADD C1170 ~ C1175 0.01UF For Clock GN *)Power Modify Schematic! PAGE 14,DEL EP2 Modify Some Value: PAGE 19,Mount R941 and DEL R940,C1166 *)PAGE 3,R417 Mount Ohm,Becaus need connect to gnd 13/0CT/2000 CORRECT C586 From 0.1UF To 0.47UF PAGE 8,DEL R939 *)PAGE 5,Change RP3,RP4,RP5,RP7 Value From 8P4R-2.7K TO 8P4R-8.2K 17/0CT/2000 *)PAGE 6,Correct R515,R517 Value From 4.7 Ohm to CB-1608D-800TT(0603) PAGE 3,Change value R460,R461 from 4.7K to 1K(SMB pull up) Correct R516,R518,R519,R520,R521 Value From 4.7 Ohm to CB-2012D-800TT(0805) PAGE 28,ADD L37,L38 & C1184,C1185(0.1UF For EQ REF Votalge) to Solve the EQ Noise! For PC-133 Stable: PAGE 14,ADD R965,Q121 For Fix Noise Sound When Plug-in headphone *)PAGE 11,Correct RP18,RP19,RP22,RP23 Value From 8P4R-10 to 8P4R-22 PAGE 26,DEL L27,L28,L29 Fix T/P Noise A C Change IRQ14,15 pull down instead pull high to +5VS *)PAGE 18,Chaneg Q63 from 2N7002 to SI2306DS B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC *)PAGE 12,Correct R607,R608,R609,R610 from 10 Ohm to 33 Ohm 19/0CT/2000 A PAGE 27,ADD L39 For U48(+5VAMP) *)PAGE 14,DEL R614,C851 PAGE 31,DEL C1137,C1140,C1139,C1142,C1143,C1146,C1149,C1151,C1150,C1152 *)PAGE 28,Correct C1184,C1185 Value From 0.1UF to 1UF 26/0CT/2000 *)PAGE 32,Correct RP73 Value From 8P4R-680 to 8P4R-2.7K Correct R966 Value From 680 to 2.7K *)PAGE 3,ADD R968,Change Q50 from 2N7002 to MMBT2222A *)PAGE 32,DEL U56,R915,R919,R921 ADD Q111,Q112,Q117,RP73,R966,R967 For Power Now Document Number Rev 1F 401168 Date: Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Size *)PAGE 20,ADD R986 27/0CT/2000 Title Monday, September 10, 2001 Sheet 38 of 45 N32NN061 / LA-736 Rev0.2 HISTORY LIST (PIR) 11/16/NEV Some Requestment: *)PAGE 26,Correct Some Value : *)PAGE 3,Correct 680 Ohm 820 Ohm (R432,R429,R419,R434,RP1) R804 From 22 to 47 Ohm,C1031 Mount 22 PF *)PAGE 7:Change D12,1 From SUSA# to CPU_STP# Change R542 From 33 Ohm To 22 Ohm L27,L28,L29 Need Mount D DEL C1177 ~ C1183 By EMI Requestment *)PAGE 32,Correct R913,R914,RP69 Value from 680 to 2.7K Ohm D *)PAGE 31,Correct RP67 Value From 680 Ohm to 2.7K Ohm,ADD One Regulator Circuit for +VCC_2.5 *)PAGE 9,Change JP10 PIN 1,6,8 From CRTGND to GND By EMI Requestment 11/17/NEV *)PAGE 10:Umount C810 (27PF),mount C809 (47PF) For TV_OUT Quality And Meent EMI Requestment *)PAGE 6,Change R516,R518,R519,R520,R521 Value from 4.7_0805 to CHB2012B800_0805 *)PAGE 26,Correct C1039 From 1UF To 2.2UF,DEL L27,L28 *)PAGE 6,Change R515,R517 Value from 4.7 Ohm to CHB1608U800 *)PAGE 27:ADD Q123,Q124,Q125,Q126,Q127 For POWER ON PO-PO Sound 11/22/NEV *)PAGE 29,C1119 Mount 1UF For EC_HPOWON Stable FOR AGP 4X Function Reserve: FEB/14/2001 *)PAGE 6,Change R524 Pull Up From +3V To +VDDQ FOR MIC QUALITY: *)PAGE 6,Change R936 Connect From VREF_GC to VREF_CG,UNMOUNT 936 ADD L41 : HB1M2012-601JT,C1188 : 470PF *)PAGE 8,Change R578 Connect From VREF_CG To VREF_GC Change SVID to FIX VID (Change L6 Position) *)PAGE 32,Change R967 to R915 (0_0603) 11/24/NEV FOR FIX SUSPEND / RESUME FAIL: *)PAGE 24,Correct R775 Pull Up from +3V to +3VS C *)PAGE 24,Correct R776 Pull Up from +3VS to +3V C *)PAGE 24,DEL R778,R779,D42 Then Connect PCMRST# From U36.106 to U30.1 11/24/NEV MODIFY POWER RB751V FOOTPRINT FROM RB751V TO CH71B 11/27/NEV *)PAGE 23,ADD Q75 FOR FDD LED B-TEST FOR VER0.3 For Fix Boot Need Twice,Change CPURST# From Northbridge to Sorthbridge:: *)Page 5,ADD R984,Page 15,ADD R992 For CPURST# For SUSPEN Stable By ALI Requestment *)Page 5,ADD Straping R985~R991 FOR DETECT CPU TYPE BY EC: *)PAGE 24,35 ADD CPU_DETECT# From U36 pin 94,AND with SPWROFF# for SVID_GATE FOR FIX BC018: B B *)Modify the PCN2 footprint from DJ-305S to DJ-305S-NEW,it will include hole change size! *)Modify Footprint For New Lib FOR FIX MONO_IN NOISE:: *)PAGE 27:Correct R852 value from 33K to 10K *)PAGE 27:DEL R839,Correct R847 from 4.7K to 10K FOR Mic NOISE: *)PAGE 27:Correct R836 Value From to 6.8K For EMI requestment Correct value: *)PAGE 23:Correct CP8,CP9,C10,C11 Value From 33pf to 220 pf *)PAGE 22,Add L40 For EMI request For TV Out Resest Stable: *)PAGE 10:ADD R604 FOR Layout Requestment: *)Page 31,Q98,Q122 Change Footprint to 2SB1188 A *)Page 7,PCLK_1535 Trace Modify From 9533 to 2977 A *)Page 36,Change PCN2 Footprint From DJ-305S To DJ-305S-NEW *)Page 14,Change EP13,EP14,EP15,EP16 Footprint From EMIPAD_PS-4 To EMIPAD_PS-3 *)Page 14,Del H15,H16,H17,H18 Title *)Page 3,Del TP5,TP6,TP7,TP8 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: For Fix +5VALW Drop: *)Page 22,U34 Pin ADD C1187 On "EN_5VCD" Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 39 of 45 N32NN061 / LA-736 Rev0.4 HISTORY LIST (PIR) FOR C3-TEST 1/20/JAN 3/14/MARCH *)PAGE 3,Change C621 from 0.22UF(0603) to 2.2UF (0805) For Assembly.(Thermal Pad) *)Power Team Modify Circuit By Send New Schematic(Jone) Modify For Power Now Function: 3/16/MARCH *)PAGE 24,Change R775 Pull Up From +3VS to +3V D *)PAGE 3,DEL R436,R437,R438(330) By AMD Suggestion! *)PAGE 24,Change R775 PIN1 & D39 PIN From ATFINT# to CPU_DECT# D FOR FIX AUDIO MONO_IN NOISE: *)PAGE 27,DEL R839 2/12/FEB FOR FIX STR ISSUE *)PAGE 5,UNMOUNT R493[AD12],THEN MOUNT R1003 USE OFFSET MODE RESERVE R998 ~ R1008 PULL UP TO +3VS,CPU READ/WRITE USE STAGE FOR FIX S1 HALT ISSUE: *)PAGE 7,UNMOUNT D12 AND Change D12 PIN1 From CPU_STP# To SUSB# FOR FIX BLUE SCREEN CC005: *)PAGE 3,ADD C1189(560PF_0402) ON NMI(NEED NEAR AN3) For FIX TV_OUT Leagage *)PAGE 10:ADD R1010 FOR DVDD And Change From +3VS To +3V ADD R1012 FOR D10 ~ D15 FOR REV Change Pull +3VS To +3V ADD R1009 FOR DACVDD,CLKVDD Change From +3VS To +3V AND Reserve +5VS C C FOR FIX Play CD Audio Volume Too Small: *)PAGE 22,Change R749,R753 Value From 24K TO 33K RESERVE SOME PCI Signal On MINI-PCI: *)PAGE 18:ADD R1014 ~ R1021 FOR OPTION IN FEATURE FOR POWER NOW FUNCTION: *)PAGE 32,MOUNT R967,UNMOUNT R915 (MODIFY BOM) FOR EMI REQUESTMENT: *)PAGE 23,ADD C1190 ~ C1192 *)PAGE 19:ADD PIN 7,8 ON JP24 AND CONNECT TO GND-A,C1087,C1088 CHANGE CONNECT FROM GNDA TO GND FOR MIC TUNNING: *)PAGE 23,ADD R1022,AND RESERVE R1023 FOR LAYOUT MODIFY: *)Change FOOTPRINT 10P8R,16P8R,0402 TO 10P-8R-NEW,16P-8R-NEW,0402-U B B *)PAGE 36,Change PCN2 Flootprint From DJ-305S-new to DJ-305S *)PAGE 29,Change R898 Footprint From R0603 to R0402 *)MODIFY JP32,GND-A AND AGND 2/21/FEB UPDATE FROM 736 A(2.0) VER 0.4(C3-TEST) TO 736B (A2.1) VER0.6 FOR LCL TUNNING: *)PAGE 7: ADD LCL FILTER: ADD L42,L43,L45,L46,L47,L51 & C1193 ~ C1197 ON DICLK#0~3,AICLK# FOR EMI REQUESTMENT: ADD C1198 ~ C1201 ON JP17 PIN15 ~ 18 2/27FEB *)PAGE 7,Change D12.1 FROM SUSB# TO CPU_STP#,AND MOUNT D12 3/1/MARCH *)PAGE 5,ADD R1024,TP5,TP6 ON SUS_STAT# FOR RESERVE A *)PAGE 23,MODIFY MIC GND,R1022 CONNECT TO AGND,R1023 CONNECT TO GND A 3/7/MARCH FIX EARPHONE NOISE: *)PAGE 26:DEL L29, PAGE 27:DEL R996;PAGE 23:DEL R997 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 40 of 45 N32NN061 / LA-736B Rev1.0 HISTORY LIST (PIR) FOR MP 4/10/APRIL *)PAGE 5,Tunning S2K BUS Time:(Clock In Side) Use AD[31 24] "FC" DEL R1004,R1005(10K_0402),ADD R496,R502(2.2_0402) *)PAGE 5,Change RP3,RP4,RP5,RP6,RP7 From 8P4R-8.2K To 8P4R-2.7K D *)PAGE 6,Change R515,R517 From CHB1608U800 To 4.7 Ohm (By EMI Requestment) D *)PAGE 6,Change R516,R519,R520,R521 From CHB2012U800_0805 To 4.7_0805 Ohm (By EMI Requestment) *)PAGE 10,Change TV_OUT Power Source From +3V to +3Vs DEL R1009,R1010(0 Ohm),R1012 (22K),AND R592,R1011(0 Ohm),R600(22 K) *)PAGE 28,For FIX Audio Quality: Change R862,R866,R878,R882 From 22K to 1.5K_1% 4/16/APRIL *)PAGE 5,Tunning S2K BUS Time:(Clock In Side & Clock Out Side) Use AD[31 24] :"75" (By ALI Suggestion) DEL R1008,R991,R496(10K_0402),then ADD R1025,R497,R1004 (By ALI Suggestion) For Fix S4 Resume issue: *)PAGE 26,DEL C1031(22 PF),Change R804 From 47 Ohm to 22 Ohm 4/20/APRIL For Enable Save Power Consumption Function,Ali Suggest Need Pull Low "THERMJ": *)PAGE 16,ADD R1027(4.7K) For FIX MIC Phone Record Noise Issue: C C *)PAGE 27,Change C1077 From Ohm to 1UF,R836 From 1K to Ohm For Fix Wireless Noise Issue: *)PAGE 23,Mount R997 Ohm 5/4/MAY Update Power P.I.R 5/16/MAY Update Power Circuit By Jones send(5/15) B B A A Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 41 of 45 N32NN061 / LA-736C Rev1.0 HISTORY LIST (PIR) C-TEST 5/28/MAY *)PAGE 16:ADD R1027(4.7K) For Enable Clock Trollter (Save Power Comsumption.) Layout: Modify +5VALW,+3VALW Trace,Add Trace By Cut Power Plan D Power Team Modify PCN2 Footprint D ME Team Modify OUTLET Drawing! 5/31/MAY *)PAGE 5,Set Strapping Pin "7C" Clock Tunning: *)PAGE 7:Change R539,R540 From 33 to 22 Ohm *)PAGE 5:Change R472 From to 33 Ohm For PC-133 Tunning: *)PAGE 11,Change RP18 ~ RP23 From 22 to 10 Ohm For Save Power Comsumption While S3: *)PAGE 6,Change R522 From 270_1% to 1.5K_1%; R523 From 180_1% to 1K_1% For PCMCIA Power Solution More Stable: *)PAGE 20: Change C938 ~ C944 From 0.1UF to 1UF For Change Sourth Bridge From M1535 to M1535+: *)PAGE 15:DEL R980,Mount R979 (For IDE Power Solution) C C *)PAGE 21:DEL R978,R740,Mount R981,R982 (FOR IDE IORDY) 8/28/2001 Modify BOM before MP EMI Solution *)PAGE 35: PR226 change from to 2.2 ohm *)PAGE 17: L17,L18,L21,L22 from 800 to 300 ohm KDS crystal issue *)PAGE 26: R808 change from to 390 ohm C1033 change from 33 PF to 12 Improve POP sound when CD player power on PF *)PAGE 27: R833 delete Improve pcmcia modem sound *)PAGE 27: R849 change from 10K to 2.2K B B A A Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: Compal Electronics, inc SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 42 of 45 Version change list (P.I.R List) Item Fixed Issue P1 Power section Reason for change Rev PG# DCIN quiescent current too large while battery existed 0.1 34 Page of Modify List B.Ver# Phase 0.2 EVT1 Connect PR241 to PU10 D D P2 Change Ni-MH changing current to 2A P3 Improve overshot voltage of charger start-up voltage P4 0.1 34 0.1 34 Setting OCP of CPU-Core at 30A 0.1 35 P5 Reduce noise on PU9 0.1 P6 Trace between PF1 and PC1 too small P7 P8 Change PR231 to 26.1K 0.2 EVT1 0.2 EVT1 Remove PR112 Add +5VALW to PU9 Pin#10 0.2 EVT1 35 Change PC80 to 1UF/10V 0.2 EVT1 0.1 36 rework withg big wire remove PL5 and enlarge trace in next ver 0.2 EVT1 Setting OVP point of Ni-MH charging voltage at 18.5V 0.1 36 Change PR74 to 768K 0.2 EVT1 Setting CPU thermal protection point to 100C 0.1 35 Change PR257 to 16.9K 0.2 EVT1 0.1 36 Change PR127 to 15K 0.2 EVT1 34 Change PQ19 to SI2303DY 35 reserve PR280 Add +5VALW to PU9 pin#16 0.2 EVT1 Add PR272 0.2 Change PC172 to 2700PF C C P9 AC018 With adapter connected, system will shut down by remove battery AC019 Use R570.exe to check the charging status, battery cannot be charged Function for selecting cell on PU10 didn't work well P10 Setting input of VID from system chip P11 Add PR272 for testing VR-ON P12 Reverve resistors and capacitors for selecting B set of VID in PU9 P13 reserve resistor to adjust OCP setting point of PU9 0.1A DVT1 B P14 0.1A 35 0.2 35 0.2 35 0.2 35 reserve resistor to have a option for monitoring feedback of CPU voltage 0.2 P16 reserve a resistor to ground PU9 pin11 for COREFB- 0.2 0.2 DVT1 B 0.2 DVT1 Add PR279 set PR279 to 0.2 DVT1 35 Add PR282, PR283 set PR282, PR283 to 0.2 DVT1 35 Add PR281 0.2 DVT1 reserve resistor to have a option of A/B# P15 Add PR273, PR274, PR275, PR276, PR277, PC190, PC191, PC192 set o to all resistor set 4700PF to all capacitors DVT1 Add PR278 set PR278 to A A Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 43 of 45 Version change list (P.I.R List) Item Fixed Issue Power section Reason for change Rev PG# P17 Reduce transition of control signal 0.2 34 P18 Cost down on common choke 0.2 36 0.2 36 0.2 34 0.2 34 0.1A & 0.2 35 D Cost down on CPU thermal protection circuitry P19 P20 C delete redundant resistor Page of Modify List B.Ver# Phase 0.2 DVT1 0.2 DVT1 Add PC187, PC188, PC189 set PC187, PC189 to 1UF D reserve PL10, PL11 use KC FBM-LI11-322523-121AT at PL10, PL11 to replace PT2 delete PQ110, PC169, PD45, PR263, PD49 change the location of PH1 PR256 change to 5.11K PR257 change to 7.32K PR257 connect to VL DVT1 0.2 delete PR163 0.2 DVT1 C P21 Reduce leakage current of battery quiescent on system P22 Improve EMI performance Improve voltage rating 0.2 add PL9 EVT1 0.2 33 0.2 P23 Change PQ112 to SI4810DY DVT1 Change PR129, PR130 to 4.7 35 DVT1 Change PD39 from RB081L-20 to EC31QS04 0.2 DVT1 B B P24 Cost down on CPU_CORE 0.2 P25 Modify Thermal Protection to 85 degree C P26 Improve current rating P27 Change footprint 35 Delete PD28 0.2 DVT1 36 Change PR256 to Change PR258 to 16.9K Change PR257 to 2.15K 0.2 PVT 0.3 36 Change PL11 and PL10 to CHENG-HANNCHC4532U800(1812) 0.2 PVT 0.3 36 Change footprint of PR200 to R0805 0.2 PVT 0.3 A A Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 44 of 45 Version change list (P.I.R List) Item D Fixed Issue Power section Reason for change Rev P28 Enhance OVP function P29 Increase charger OVP design margin for plugging out Ni_MH battery 0.2 Fix OVP function P30 P31 PG# 34 36 0.3 0.4 36 0.4 36 Remove OVP function C P32 P33 0.4 36 Increase design margin P36 Reduce leakage current while plugging out Adapter Modify List B.Ver# change PQ15 from DTC115EK to 2N7002 (P34) change PR83 from 100K to 10K (P36) change PC67 from 1000pF to 0.1uF change PC66 from 1uF to 4.7uF add PC194 0.1uF 0805 add PR287 1M add PR286 2.2K 0805 add PQ117 2N7002 change pin#6 of PU4 connection from VREF to RTCVREF change PR84 from 249K to 374K change PR74 from 768K to 1.1M Delete PQ25 and PQ26 2n7002 Delete PR87 100K +-5% 0603 Delete PR82 324K +-1% 0603 Delete PR73 39K +-5% 0603 Delete PR83 10K +-1% 0603 Delete PR72 and PR74 1M +-0.5% 0603 Delete PC66 4.7UF_1206_25V Delete PC67 0.1UF_0603_16V Delete PD25 1SS355 10.Delete PC65 2.2UF_16V 11.Change PR84 from 249K to 0.2 Phase DVT1 0.3 DVT3 0.3 DVT3 D C 0.3 36 34 Change PQ15 from DTC115EK to 2SC2411K Change PR288 from 10K to B P35 Page of Add PR288 10K Change PR59 from 10K to 3.9K Change PR11 from 150K to 51K Change PR241 from 113K to 95.3K Change PR270 from 100K to 33K Change PC167 from 1U to 1000P 34 P34 DVT3 DVT3 B DVT3 P37 P38 A A Compal Electronics, inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC Date: SCHEMATIC, M/B LA-736/736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 45 of 45 www.s-manuals.com ... Rev 1F 401168 Date: Compal Electronics, inc SCHEMATIC, M/B LA- 736/ 736B/736C Size *)PAGE 20,ADD R986 27/0CT/2000 Title Monday, September 10, 2001 Sheet 38 of 45 N32NN061 / LA- 736 Rev0.2 HISTORY... Pin ADD C1187 On "EN_5VCD" Compal Electronics, inc SCHEMATIC, M/B LA- 736/ 736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 39 of 45 N32NN061 / LA- 736 Rev0.4 HISTORY LIST (PIR)... SCHEMATIC, M/B LA- 736/ 736B/736C Document Number Rev 1F 401168 Monday, September 10, 2001 Sheet 30 of 45 CPU FID ISOLATION +3VS +5VS +VCC_2.5S SUSPEN POWER RP66 8P4R-10K-0402 Place near 1647 R904