COMPAL LA 6843p PWWAE rev1 0 TOSHIBA satellite c660d

A B C D E 1 Compal confidential LC-Marseille 10AD 2 PWWAE LA-6843P Schematics Document Mobile AMD S1G4/ RS880M / SB820M 3 2010-08-16 Rev 1.0 4 Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B Compal Confidential C Thermal Sensor ADM1032ARMZ Model Name : PWWAA Fan Control page page D E AMD S1G4 CPU Memory BUS(DDRIII) Dual Channel uFCPGA-638 Package 1.5V DDRIII 1066/1333MHZ File Name : LA-6843P 200pin DDRIII-SO-DIMM X2 page 9,10 BANK 0, 1, 2, page 5,6,7,8 Hyper Transport Link 2.6GHz 16X16 1 RTL8105E 10/100M RJ45 PCIe port page 24 page 24 AMD CRT page 16 RS880M PCIe 4x LCD Conn 1.5V 2.5GHz(250MB/s) page 17 WLAN PCIe port page 23 page 11,12,13,14,15 LAN PCIe port page 24 A-Link Express II 4X PCI-E IO/B USB Right USB port 0,1 page 23 USB Card Reader USB port page 25 Int Camera SATA port 5V 480MHz 5V 1.5GHz(150MB/s) AMD USB port page 17 SATA port 5V 1.5GHz(150MB/s) SB820M WLAN SATA HDD page 23 SATA ODD page 23 USB USB port page 27 5V 480MHz page 18,19,20,21,22 RTC CKT 3.3V 33 MHz LPC BUS HD Audio 3.3V/1.5V 24MHz HDA Codec ALC259 page 26 Debug Port Power On/Off CKT page 30 ENE KB926 E0 page 29 page 28 Power/B Int MIC CONN page 17 page 30 DC/DC Interface CKT Touch Pad page 30 page 31 Int.KBD page 29 MIC CONN page 27 HP CONN page 27 SPK CONN page 27 EC ROM page 29 Power Circuit DC/DC 4 page 31,32,33,34,35 36,37,38,39 Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 DESIGN CURRENT 0.1A +3VL DESIGN CURRENT 0.1A +5VL DESIGN CURRENT 1A +3VALW DESIGN CURRENT 3.5A +5VALW B+ RT8205EGQW D D SUSP N-CHANNEL SI4800 DESIGN CURRENT 2A +5VS DESIGN CURRENT 330mA +3V_LAN DESIGN CURRENT 1.5A +3VS DESIGN CURRENT 1A +LCD_VDD DESIGN CURRENT 300mA +2.5VS DESIGN CURRENT 2.5A +1.8VS DESIGN CURRENT 0.3A +1.1VALW DESIGN CURRENT 3.5A +1.1VS DESIGN CURRENT 6A +NB_CORE DESIGN CURRENT 18A +CPU_CORE0 DESIGN CURRENT 18A +CPU_CORE1 DESIGN CURRENT 4A +VDDNB DESIGN CURRENT 5A +1.5V DESIGN CURRENT 1A +1.5VS DESIGN CURRENT 1A +0.75VS DESIGN CURRENT 1.5A +1.05VS WOL_EN# P-CHANNEL AO-3413 SUSP N-CHANNEL SI4800 ENVDD P-CHANNEL AO-3413 C C APL5508 PWWAE LC-Marseille AMD SUSP# MP2121DQ POK RT8209BGQW VLDT_EN# N-CHANNEL IRF8113 VLDT_EN# N-CHANNEL IRF8113 VR_ON B ISL6265A B SYSON RT8209BGQW SUSP N-CHANNEL IRF8113 SUSP APL5331KAC VR_ON# A APL5331KAC Compal Secret Data Security Classification 2010-08-25 Issued Date A 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet of 40 A B C D E Voltage Rails Platform O : ON CPU NB S1G4 Danube X : OFF VGA RS880M NA SB Comment SB820M +5VS +3VS power plane +1.8VS +1.5VS State +B +5VALW +3VL +3VALW +5VL +1.1VALW +1.1VS +1.5V +1.05VS +0.75VS +VGA_CORE +RTCVCC +VDDNB +CPU_CORE S0 O O O O S1 O O O O @ : just reserve , no build SB820MR1@ : just reserve for SB820MR1 only R3@ : just reserve for R3 only CONN@ : just reserve for Connector only CAM@ : just reserve for WebCam only BT@ : just reserve for Blue Tooth only 880MR1@: just reserve for 880MR1 only 8105E_VC@: just reserve for 10/100 LAN VC version only 8105E_VB@: just reserve for 10/100 LAN VBversion only +2.5VS BTO (Build-To-Order) Option Table 2 S3 O O O X S5 S4/AC O O X X Function Camera Description S5 S4/ Battery only O X X X S5 S4/AC & Battery don't exist X X X X (C) Explain CAM@ BTO SMBUS Control Table I2C / SMBUS ADDRESSING DEVICE HEX SOURCE ADDRESS DDR SO-DIMM A0 10100000 DDR SO-DIMM A2 10100010 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 DDC_CLK0 EC SM Bus2 address HEX Address Device Smart Battery 16H 0001 011X b EMC1032-1 CPU 98H EC KB926E0 HEX DDC_DATA0 SCL0 Address SDA0 1001 100X b SCL1 EC KB926E0 SDA1 KB926 SODIMM I / II CLK GEN WLAN LCD DDC ROM V KB926 V RS880M I2C_DATA Device CPU THERMAL SENSOR EC_SMB_CK1 I2C_CLK EC SM Bus1 address BATT V RS880M SB820 V V SB820 V 4 Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B C D E +1.1VS 250 mil VLDT CAP C1 10U_0805_10V6K Near CPU Socket C2 10U_0805_10V6K C3 0.22U_0603_16V4Z C4 0.22U_0603_16V4Z C5 180P_0402_50V8J C6 180P_0402_50V8J 1 H_CADIP[0 15] H_CADIN[0 15] H_CADIP[0 15] H_CADOP[0 15] H_CADIN[0 15] H_CADON[0 15] H_CADOP[0 15] H_CADON[0 15] +1.1VS +1.1VS JCPUA VLDT=500mA < From NB > H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15 HT LINK D1 D2 D3 D4 VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 AE2 AE3 AE4 AE5 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15 C7 10U_0805_10V6K < VLDT_A & VLDT_B : HyperTransport I/O ring power > < To NB > H_CLKIP0 H_CLKIN0 H_CLKIP1 H_CLKIN1 J3 J2 J5 K5 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 Y1 W1 Y4 Y3 H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1 H_CTLIP0 H_CTLIN0 H_CTLIP1 H_CTLIN1 N1 P1 P3 P4 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 R2 R3 T5 R5 H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1 FOX_PZ6382A-284S-41F_Champlian CONN@ < FAN Control Circuit : Vout = 1.6 x Vset > +5VS 1A 2 EN_DFAN1 C1120 10U_0805_10V4Z U31 EN VIN VOUT VSET JFAN +FAN1 GND GND GND GND @ C1121 1000P_0402_25V8J +3VS C1119 10U_0805_10V4Z R795 10K_0402_5% GND GND ACES_85204-0300N CONN@ APL5607KI-TRG_SO8 +FAN1 @ C1122 0.01U_0402_25V7K Compal Secret Data Security Classification 2010-08-25 Issued Date FAN_SPEED1 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A +1.5V B C D E < Processor DDR3 Memory Interface > < DDR2 VREF is 0.5 ratio > < Close to CPU > R1 JCPUC DDR_B_D[63 0] 1K_0402_1% < From/To SO_DIMMB > +MCH_REF R2 1 C9 0.1U_0402_16V7K C8 1000P_0402_25V8J 1K_0402_1% +1.05VS +1.05VS JCPUB Place them close to CPU within 1" +1.5V R4 R5 39.2_0402_1% 39.2_0402_1% MEM_MA_RST# DDR_A_ODT0 < To SO_DIMMA > DDR_A_ODT1 < To SO_DIMMA > DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CKE0_DIMMA < To SO_DIMMA > DDR_CKE1_DIMMA DDR_A_CLK0 DDR_A_CLK#0 MEM_P MEM_N DDR_A_CLK1 DDR_A_CLK#1 DDR_A_BS#0 < To SO_DIMMA > DDR_A_BS#1 DDR_A_BS#2 < To SO_DIMMA > DDR_A_RAS# DDR_A_CAS# DDR_A_WE# AF10 AE10 VDDR1 MEM:CMD/CTRL/CLK VDDR5 VDDR2 VDDR6 VDDR3 VDDR7 VDDR4 VDDR8 VDDR9 MEMZP MEMZN VDDR_SENSE W10 AC10 AB10 AA10 A10 Y10 VTT_SENSE MEMVREF W17 +MCH_REF MB_RESET_L B18 MB0_ODT0 MB0_ODT1 MB1_ODT0 W26 W23 Y26 DDR_B_ODT0 DDR_B_ODT1 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 V26 W25 U22 DDR_CS0_DIMMB# DDR_CS1_DIMMB# MB_CKE0 MB_CKE1 J25 H26 DDR_CKE0_DIMMB DDR_CKE1_DIMMB MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 P22 R22 A17 A18 AF18 AF17 R26 R25 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 MEM_MA_RST# H16 MA_RESET_L DDR_A_ODT0 DDR_A_ODT1 T19 V22 U21 V19 MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 DDR_CS0_DIMMA# T20 DDR_CS1_DIMMA# U19 U20 V20 DDR_CKE0_DIMMA J22 DDR_CKE1_DIMMA J20 DDR_A_CLK0 DDR_A_CLK#0 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 MA_CKE0 MA_CKE1 < VTT regulator voltage > MEM_MB_RST# DDR_A_CLK1 DDR_A_CLK#1 N19 N20 E16 F16 Y16 AA16 P19 P20 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24 DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2 R20 R23 J21 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 R24 U26 J26 DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# R19 T22 T24 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L U25 U24 U23 DDR_B_RAS# DDR_B_CAS# DDR_B_WE# < To SO_DIMMA > < To SO_DIMMA > DDR_A_MA[15 0] D10 C10 B10 AD10 MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 PAD T1 MEM_MB_RST# DDR_B_ODT0 DDR_B_ODT1 < To SO_DIMMB > DDR_CS0_DIMMB# DDR_CS1_DIMMB# < To SO_DIMMB > DDR_CKE0_DIMMB DDR_CKE1_DIMMB < To SO_DIMMB > DDR_B_CLK0 DDR_B_CLK#0 < To SO_DIMMB > DDR_B_CLK1 DDR_B_CLK#1 DDR_B_CLK1 DDR_B_CLK#1 DDR_B_MA[15 0] DDR_B_DM[7 0] < To SO_DIMMB > DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2 < To SO_DIMMB > DDR_B_RAS# DDR_B_CAS# DDR_B_WE# < To SO_DIMMB > < To SO_DIMMB > DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7 MEM:DATA DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 A12 B16 A22 E25 AB26 AE22 AC16 AD12 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 < From/To SO_DIMMB > DDR_A_D[63 0] MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 E12 C15 E19 F24 AC24 Y19 AB16 Y13 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DM[7 0] < To SO_DIMMA > DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7 < From/To SO_DIMMA > FOX_PZ6382A-284S-41F_Champlian CONN@ FOX_PZ6382A-284S-41F_Champlian CONN@ < From/To SO_DIMMA > 4 Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B C D E JCPUD +1.5V +2.5VDDA +2.5VS +2.5VDDA CPU_CLKIN_SC_P CPU_CLKIN_SC_N VDDA=300mA L1 FBM_L11_201209_300L_0805 1 C12 C13 +2.5VDDA C14 LDT_RST# H_PWRGD LDT_STOP# + C11 @ 2 150U_B2_6.3VM_R45M 4.7U_0805_10V4Z 3300P_0402_50V7K 0.22U_0603_16V4Z T2 +1.5V +1.5V < 200-MHz PLL Reference Clock > C16 3900P_0402_50V7K +1.1VS CPU_CLKIN_SC_P R15 R16 1K_0402_5% 1K_0402_5% 1 PAD CPU_HTREF0 CPU_HTREF1 CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L R10 Address:100_1100 C15 3900P_0402_50V7K CPU_CLKIN_SC_N Place close to CPU wihtin 1.5" 510_0402_5% CPU_TEST25L R29 1K_0402_5% CPU_TEST12 R30 1K_0402_5% CPU_TEST18 R31 1K_0402_5% CPU_TEST19 R32 1K_0402_5% CPU_TEST20 R33 1K_0402_5% CPU_TEST21 R34 1K_0402_5% CPU_TEST22 R265 1K_0402_5% CPU_TEST23 R35 1K_0402_5% CPU_TEST24 HT_REF0 HT_REF1 F6 E6 PAD PAD VDDNB_FB_H VDDNB_FB_L H6 G6 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L DBREQ_L E10 CPU_DBREQ# TDO AE9 CPU_TDO TEST23 TEST18 TEST19 TEST28_H TEST28_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 C2 AA6 TEST9 TEST6 A3 A5 B3 B5 C1 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 1K_0402_5% R20 D7 E7 F7 C7 TEST7 TEST10 C3 K8 TEST8 C4 TEST29_H TEST29_L C9 C8 RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L +1.5V CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14 300_0402_5% @ R13 0_0402_5% H_PROCHOT# route as differential as short as possible testpoint under package T15 T16 J7 H8 TEST17 TEST16 TEST15 TEST14 TEST25_H TEST25_L AB8 AF7 AE7 AE8 AC8 AF8 CPU_SVD W9 Y9 H10 G9 R19 CPU_PROCHOT# VDDIO_FB_H VDDIO_FB_L CPU_TEST18 CPU_TEST19 R11 +1.5V VDD0_FB_H VDD0_FB_L AD7 0_0402_5% AF6 CPU_THERMTRIP#_R AC7 CPU_PROCHOT# AA8 PAD T3 THERMDC_CPU THERMDA_CPU CPU_TEST23 THERMTRIP_L PROCHOT_L MEMHOT_L W7 W8 DBRDY TMS TCK TRST_L TDI E9 E8 CPU_SVC CPU_SVD 1K_0402_5% < Serial VID Interface clock & data > THERMDC THERMDA VDD1_FB_H VDD1_FB_L R24 R27 R6 P6 CPU_SVC CPU_SVD CPU_SVC PAD PAD PAD PAD T4 T5 T6 T7 R6 10K_0402_5% R7 1K_0402_5% CPU_THERMTRIP#_R Q1 H_THERMTRIP# C R28 SIC SID ALERT_L Y6 AB6 CPU_TEST21 CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27 CPU_TEST25H CPU_TEST27 AF4 AF5 AE6 A6 A4 E 2 510_0402_5% 1K_0402_5% RESET_L PWROK LDTSTOP_L LDTREQ_L SVC SVD M11 W18 B R22 CLKIN_H CLKIN_L G10 AA9 AC9 AD9 AF9 CPU_TEST25H CPU_TEST25L +1.5V A9 A8 VSS RSVD11 CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI 169_0402_1% CLK_CPU_BCLK# VDDA1 VDDA2 B7 A7 F10 C6 CPU_SIC CPU_SID 44.2_0402_1% 44.2_0402_1% 1 CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L CLK_CPU_BCLK R12 R14 F8 F9 < Filtered PLL Supply Voltage > MMBT3904_NL_SOT23-3 CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N R25 80.6_0402_1% H18 H19 AA7 D5 C5 FOX_PZ6382A-284S-41F_Champlian CONN@ +1.5VS R17 300_0402_5% LDT_RST# LDT_RST# C17 < Thermal Sensor > @ 0.01U_0402_25V7K < HDT Connector > U1 +3VS JP2 +1.5VS +1.5V R21 300_0402_5% H_PWRGD +1.5V R40 300_0402_5% R39 R38 R37 R36 1 1 2 2 H_PWRGD +1.5V C19 @ 220_0402_5% 220_0402_5% 220_0402_5% 220_0402_5% CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO 11 13 15 17 19 21 23 10 12 14 16 18 20 22 24 26 C20 VDD SMCLK EC_SMB_CK2 THERMDA_CPU DP SMDATA EC_SMB_DA2 THERMDC_CPU 2200P_0402_50V7K CPU_THERM# DN ALERT# THERM# GND C21 0.1U_0402_16V7K @ +3VS R44 10K_0402_5% R41 EC_SMB_CK2 EC_SMB_DA2 10K_0402_5% @ +3VS EMC1402-1-ACZL-TR_MSOP8 LDT_RST# Address:0100_1100 EMC1402-1 Address:0100_1101 EMC1402-2 0.1U_0402_16V7K SAMTEC_ASP-68200-07 CONN@ 3/30 Change U1 ADM1032 to EMC1402 for cost down +1.5VS 4 R18 300_0402_5% LDT_STOP# LDT_STOP# Compal Secret Data Security Classification C18 2010-08-25 Issued Date @ 0.01U_0402_25V7K 2010-08-25 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A Compal Electronics, Inc B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B C D E JCPUE +CPU_CORE VDD decoupling : +CPU_CORE +CPU_CORE 1 + C90 @ + C25 330U_6.3V_M_R15 + C26 330U_X_2VM_R6M 330U_6.3V_M_R15 330U_X_2VM_R6M +CPU_CORE 1 +CPU_CORE C35 C34 C28 C29 C36 C37 C38 + C96 2 @ 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J Under CPU Socket Under CPU Socket Near CPU Socket + C23 @ + C89 Near CPU Socket + C24 @ 330U_6.3V_M_R15 330U_X_2VM_R6M +CPU_CORE 330U_6.3V_M_R15 330U_X_2VM_R6M +CPU_CORE 1 +CPU_CORE C30 C31 C32 C33 C39 C40 C41 + C95 2 @ 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M Under CPU Socket 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J +VDDNB Under CPU Socket +1.5V VDDIO decoupling : DDR SDRAM I/O ring power +1.5V C44 22U_0805_6.3V6M C45 22U_0805_6.3V6M C46 0.22U_0603_16V4Z C47 0.22U_0603_16V4Z C48 180P_0402_50V8J C50 180P_0402_50V8J Under CPU Socket +1.5V 2 C54 0.22U_0603_16V4Z C51 0.22U_0603_16V4Z C52 0.22U_0603_16V4Z 2 0.01U_0402_25V7K C65 0.01U_0402_25V7K 180PF Qt'y follow the distance between CPU socket and DIMM0 180P_0402_50V8J C68 180P_0402_50V8J C69 180P_0402_50V8J Between CPU Socket and DIMM C56 Co-layout with C75 +1.5V 1 C71 4.7U_0805_10V4Z C72 4.7U_0805_10V4Z C73 4.7U_0805_10V4Z C74 @ 4.7U_0805_10V4Z C75 Between CPU Socket and DIMM +1.05VS + +1.5V C56 + 390U_2.5V_M_R10 C67 330U_D2E_2.5VM_R6M 180P_0402_50V8J VDDR decoupling C57 4.7U_0805_10V4Z C58 4.7U_0805_10V4Z C59 0.22U_0603_16V4Z C60 0.22U_0603_16V4Z C61 1000P_0402_25V8J C62 1000P_0402_25V8J C63 180P_0402_50V8J C1124 Co-layout with C1125 C70 180P_0402_50V8J C78 0.22U_0603_16V4Z C79 0.22U_0603_16V4Z C80 1000P_0402_25V8J 2 C81 1000P_0402_25V8J C82 180P_0402_50V8J C83 180P_0402_50V8J 2 + 390U_2.5V_M_R10 + +1.05VS C1124 C77 4.7U_0805_10V4Z 330U_D2E_2.5VM C1125 C76 4.7U_0805_10V4Z +1.05VS @ Near CPU Socket Right side +1.05VS H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 +1.5V C66 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 +1.5V JCPUF 0.22U_0603_16V4Z Between CPU Socket and DIMM K16 M16 P16 T16 V16 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26 FOX_PZ6382A-284S-41F_Champlian CONN@ +1.5V C64 VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23 C53 Between CPU Socket and DIMM G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 +CPU_CORE Near CPU Socket Left side +VDDNB decoupling : Northbridge power +VDDNB VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 FOX_PZ6382A-284S-41F_Champlian CONN@ C42 22U_0805_6.3V6M C43 22U_0805_6.3V6M Compal Secret Data Security Classification C49 2010-08-25 Issued Date 22U_0805_6.3V6M 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B +1.5V C D E +1.5V JDDRL 1 C10 DDR_A_DM0 DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 DDR_A_DM3 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 DDR_A_D4 DDR_A_D5 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D[0 63] DDR_A_D6 DDR_A_D7 DDR_A_DM[0 7] DDR_A_D[0 63] DDR_A_DM[0 7] DDR_A_D12 DDR_A_D13 DDR_A_MA[0 15] DDR_A_DM1 MEM_MA_RST# DDR_A_MA[0 15] MEM_MA_RST# DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_DM2 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 +1.5V +1.5V DDR_A_DQS#3 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 R310 1K_0402_1% R48 1K_0402_1% DDR_A_D26 DDR_A_D27 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 C85 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 1000P_0402_25V8J C84 0.01U_0402_25V7K 4.7U_0805_10V4Z 1 DDR_A_D0 DDR_A_D1 +VREF_DQ +VREF_DQ DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_CLK0 DDR_A_CLK#0 DDR_A_BS#0 DDR_A_WE# DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_CLK0 DDR_A_CLK#0 DDR_A_MA10 DDR_A_BS#0 DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_CS1_DIMMA# DDR_A_D32 DDR_A_D33 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_D34 DDR_A_D35 DDR_A_D40 DDR_A_D41 DDR_A_DM5 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 DDR_A_D56 DDR_A_D57 DDR_A_DM7 DDR_A_D58 DDR_A_D59 +3VS +0.75VS C91 0.1U_0402_16V4Z 205 206 G2 G1 DDR_A_MA15 DDR_A_MA14 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_CLK1 DDR_A_CLK#1 DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA# DDR_A_ODT0 DDR_A_ODT1 < Close to JDDRH & JDDRL > DDR_A_CLK1 DDR_A_CLK#1 DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA# DDR_A_ODT0 DDR_A_ODT1 +VREF_CA DDR_A_D36 DDR_A_D37 DDR_A_DM4 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 C680 C235 2 C351 +1.5V 0.1U_0402_16V4Z C87 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 2 C88 C640 C641 0.1U_0402_16V4Z DDR_A_DQS#5 DDR_A_DQS5 0.1U_0402_16V4Z C642 0.1U_0402_16V4Z C643 0.1U_0402_16V4Z C644 0.1U_0402_16V4Z C645 0.1U_0402_16V4Z C646 0.1U_0402_16V4Z C647 DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 +0.75VS DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 0.1U_0402_16V4Z C665 C664 0.1U_0402_16V4Z C961 4.7U_0603_6.3V6K SMB_CK_DAT0 SMB_CK_CLK0 +0.75VS TYCO_2-2013289-1 CONN@ Compal Secret Data Security Classification DIMM_A STD H:5.2 mm 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A R315 1K_0402_1% R49 1K_0402_1% DDR_A_MA11 DDR_A_MA7 DDR_A_MA12 DDR_A_MA9 +VREF_CA DDR_CKE1_DIMMA DDR_A_BS#2 DDR_CKE1_DIMMA 0.01U_0402_25V7K DDR_A_BS#2 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 4.7U_0805_10V4Z CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 1000P_0402_25V8J DDR_CKE0_DIMMA DDR_CKE0_DIMMA B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E of 40 A B C +1.5V D E +1.5V JDDRH C92 1000P_0402_25V8J 0.1U_0402_16V4Z 4.7U_0805_10V4Z +VREF_DQ C93 DDR_B_D0 DDR_B_D1 DDR_B_DM0 C682 DDR_B_D2 DDR_B_D3 DDR_B_D8 DDR_B_D9 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_D10 DDR_B_D11 DDR_B_D16 DDR_B_D17 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_D18 DDR_B_D19 DDR_B_D24 DDR_B_D25 DDR_B_DM3 DDR_B_D26 DDR_B_D27 DDR_CKE0_DIMMB DDR_CKE0_DIMMB DDR_B_BS#2 DDR_B_BS#2 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_MA10 DDR_B_BS#0 DDR_B_BS#0 DDR_B_WE# DDR_B_CAS# DDR_B_WE# DDR_B_CAS# DDR_B_MA13 DDR_CS1_DIMMB# DDR_CS1_DIMMB# DDR_B_D40 DDR_B_D41 DDR_B_DM5 DDR_B_D42 DDR_B_D43 DDR_B_D48 DDR_B_D49 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_D50 DDR_B_D51 DDR_B_D56 DDR_B_D57 DDR_B_DM7 DDR_B_D58 DDR_B_D59 +3VS +0.75VS CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 205 G1 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 G2 206 DDR_B_D4 DDR_B_D5 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_D[0 63] DDR_B_D6 DDR_B_D7 DDR_B_D[0 63] DDR_B_DM[0 7] DDR_B_DM[0 7] DDR_B_D12 DDR_B_D13 DDR_B_MA[0 15] DDR_B_MA[0 15] DDR_B_DM1 MEM_MB_RST# MEM_MB_RST# DDR_B_D14 DDR_B_D15 DDR_B_D20 DDR_B_D21 DDR_B_DM2 DDR_B_D22 DDR_B_D23 DDR_B_D28 DDR_B_D29 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_D30 DDR_B_D31 DDR_CKE1_DIMMB DDR_CKE1_DIMMB DDR_B_MA15 DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_CLK1 DDR_B_CLK#1 DDR_B_CLK1 DDR_B_CLK#1 DDR_B_BS#1 DDR_B_RAS# DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB# DDR_B_ODT0 DDR_CS0_DIMMB# DDR_B_ODT0 DDR_B_ODT1 DDR_B_ODT1 +VREF_CA DDR_B_D36 DDR_B_D37 DDR_B_DM4 DDR_B_D38 DDR_B_D39 DDR_B_D44 DDR_B_D45 DDR_B_DQS#5 DDR_B_DQS5 C683 0.1U_0402_16V4Z DDR_B_D34 DDR_B_D35 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 4.7U_0805_10V4Z DDR_B_DQS#4 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS4 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 1000P_0402_25V8J DDR_B_D32 DDR_B_D33 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 C352 C353 DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D46 DDR_B_D47 +1.5V DDR_B_D52 DDR_B_D53 0.1U_0402_16V4Z DDR_B_DM6 C666 0.1U_0402_16V4Z DDR_B_D54 DDR_B_D55 0.1U_0402_16V4Z 2 C667 C668 0.1U_0402_16V4Z C669 0.1U_0402_16V4Z C670 C671 0.1U_0402_16V4Z DDR_B_DQS#7 DDR_B_DQS7 C674 C677 0.1U_0402_16V4Z +0.75VS +1.5V DDR_B_D62 DDR_B_D63 DIMM_B STD H:9.2 mm 0.1U_0402_16V4Z C676 SMB_CK_DAT0 SMB_CK_CLK0 0.1U_0402_16V4Z +0.75VS C675 +1.5V + C925 4.7U_0603_6.3V6K @ C86 330U_X_2VM_R6M + C128 390U_2.5V_M_R10 Place near DIMM2 Compal Secret Data 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 C673 C128 Co-layout with C86 DDR_B_DQS#7 DDR_B_DQS7 Security Classification A C672 DDR_B_D60 DDR_B_D61 LOTES_AAA-DDR-111-K01 CONN@ 0.1U_0402_16V4Z 2 C D SCHEMATICS,MB A6843 Rev B 401982 Sheet Wednesday, September 01, 2010 E 10 of 40 Codec 0.1U_0402_16V4Z 1 CA57 CA2 CA1 10U_0805_10V4Z 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +AVDD CA7 10U_0805_10V4Z 2 MIC1_R_R C INT_MIC_CLK CA21 4.7U_0805_10V4Z CA22 INT_MIC_DATA INT_MIC_DATA INT_MIC_CLK 4.7U_0805_10V4Z RA48 CAM@ FBMA-10-100505-301T CA28 27P_0402_50V8J EC_MUTE# @ EC_MUTE# MONO_IN 100P_0402_50V8J 1 CA12 SENSE_A 2 CA15 2.2U_0603_6.3V4Z +MIC1_VREFO_L B CA47 0.1U_0603_50V7K CA48 0.1U_0603_50V7K CA49 0.1U_0603_50V7K CA50 0.1U_0603_50V7K RA27 Sense Pin Impedance 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0_0603_5% 25 SPK_OUT_R+ SPK_OUT_R- 45 44 21 22 MIC1_L MIC1_R 16 17 MIC2_L MIC2_R HP_OUT_L HP_OUT_R GPIO0/DMIC_DATA GPIO1/DMIC_CLK PD# RESET# 12 PCBEEP 13 SENSE A CA3 1 CA4 CA5 PCI Beep 10 BCLK SDATA_OUT SDATA_IN EAPD 47 SPDIFO 48 MONO_IN 0.1U_0402_16V4Z CA6 place close to chip RA12 10K_0402_5% CA18 0.1U_0402_16V4Z SPKR+ SPKR- RA4 RA5 75_0402_1% 75_0402_1% HP_L HP_R C AZ_SYNC_HD AZ_BITCLK_HD AZ_SDOUT_HD AZ_SDIN0_HD_R RA6 33_0402_5% AZ_SDIN0_HD place close to chip MONO_OUT 20 MIC2_VREFO 29 +MIC2_VREFO 30 28 +MIC1_VREFO_R CA23 10U_0805_10V4Z SENSE B CA13 RA8 47K_0402_5% PCH_SPKR +5VS SPKL+ SPKL- 32 33 SYNC RA7 47K_0402_5% EC_BEEP# 36 CBP MIC1_VREFO_R LDO_CAP 35 CBN VREF 27 AC_VREF AC_JDREF2 RA9 CA14 31 MIC1_VREFO_L JDREF 19 43 42 49 PVSS2 PVSS1 DVSS2 DVSS1 CPVEE 34 AVSS1 AVSS2 26 37 +MIC1_VREFO_R 1 20K_0402_1% 2.2U_0603_6.3V4Z CA17 0.1U_0402_16V4Z +MIC1_VREFO_L @ CA52 1U_0402_6.3V4Z +MIC2_VREFO @ CA51 1U_0402_6.3V4Z @ CA46 1U_0402_6.3V4Z B CA16 10U_0805_10V4Z @ ALC259-GR_QFN48_7X7 place close to chip DGND AGND 0_0603_5% Codec Signals Function 39.2K PORT-I (PIN 32, 33) Headphone out 20K PORT-B (PIN 21, 22) Ext MIC 10K PORT-C (PIN 23, 24) place close to chip NBA_PLUG 5.1K 46 39 SPK_OUT_L+ SPK_OUT_L- LINE2_L LINE2_R MIC_SENSE SENSE A PVDD2 PVDD1 LINE1_L LINE1_R 14 15 18 EC control EC_MUTE# behavior: High-state / low-state EC Beep 0.1U_0402_16V4Z +5VS 1 CA62 @ @ CA58 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z 40 41 RA22 4.7K_0402_5% UA1 23 24 11 AZ_RST_HD# EC_MUTE# RA11 0_0603_5% @ CA63 10U_0805_10V4Z 68 mA DVDD Ext Mic MIC1_R_L Beep sound RA3 CA8 @ 35 mA 0_0603_5% 10U_0805_10V4Z D +PVDD2 CA61 DVDD_IO +3VS place close to chip +3VS_DVDD place close to chip RA1 @ 10U_0805_10V4Z @ RA20 0_0603_5% 1 JA1 JUMP_43X39 +DVDD_IO +5VS CA43 +1.5VS 0.1U_0402_16V4Z 38 RA19 0_0603_5% 0.1U_0402_16V4Z 1 CA44 CA56 AVDD2 AVDD1 +3VS D RA2 0_0603_5% 600 mA +PVDD1 RA10 20K_0402_1% RA21 39.2K_0402_1% SENSE_A (PIN 48) A A SENSE B 39.2K PORT-E (PIN 14, 15) 20K PORT-F (PIN 16, 17) 10K PORT-H (PIN 20) Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Issued Date Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 26 of 40 Speaker Connector D D placement near Audio Codec RA30 0_0603_5% SPK_L1 CA31 @ 10U_0805_10V4Z @DA5 @ DA5 CA33 @ 10U_0805_10V4Z RA34 2 0_0603_5% SPKL- SPKL- CA32 1U_0402_6.3V4Z @ SPKR+ 0_0603_5% JSPK SPK_L1 SPK_L2 SPK_R1 SPK_R2 SPK_L2 C SPKR- SPKR- ACES_85204-0400N CONN@ CA53 100P_0402_50V8J CA54 100P_0402_50V8J 6 +MIC1_VREFO_L C 10 B FOX_JA63331-B39S4-7F CONN@ MIC1_L RA29 2.2K_0402_5% LA101 HP_R_L KC FBM-L11-160808-121LMT 0603 LA121 HP_L_L KC FBM-L11-160808-121LMT 0603 +MIC1_VREFO_R MIC1_R JLINE NBA_PLUG HP_L 1K_0402_5% RA32 RA31 2.2K_0402_5% SPK_R2 HP_R RA33 1K_0402_5% MIC1_R_R CA35 1U_0402_6.3V4Z @ HeadPhone/LINE Out JACK B MIC1_R_L CA36 @ 10U_0805_10V4Z RA24 2 0_0603_5% @DA10 @ DA10 AZ5125-02S.R7G SPK_R1 CA34 @ 10U_0805_10V4Z Ext.MIC/LINE IN JACK RA23 SPKR+ AZ5125-02S.R7G GND GND SPKL+ SPKL+ CA11 @ DA8 @ PJDLC05_SOT23-3 0.1U_0402_16V4Z 7/23 Change JLINE/JEXMIC to FOX_JA6331-B39S4-7F for DFX For EMI Ext.MIC/LINE IN JACK JEXMIC MIC1_L LA8 MIC1_L_R KC FBM-L11-160808-121LMT 0603 LA131 MIC1_L_L KC FBM-L11-160808-121LMT 0603 1 MIC1_R MIC_SENSE GND GND 10 FOX_JA63331-B39S4-7F CONN@ A CA55 100P_0402_50V8J CA59 100P_0402_50V8J DA9 @ PJDLC05_SOT23-3 A CA30 @ 0.1U_0402_16V4Z Compal Secret Data Security Classification For EMI 2010-08-25 Issued Date Deciphered Date 2010-08-25 Title Compal Electronics, Inc SCHEMATICS,MB A6843 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Rev B 401982 Wednesday, September 01, 2010 Sheet 27 of 40 +3VL +3VL 2 C1193 2 0.1U_0402_16V4Z C1194 1 1000P_0402_50V7K U52 CLK_PCI_EC 0.1U_0402_16V4Z D C1188 C1195 1000P_0402_50V7K VCC VCC VCC VCC VCC VCC for EMI request C1192 67 C1191 0.1U_0402_16V4Z R855 @ 10_0402_5% C1196 @ 10P_0402_50V8J GATEA20 GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 CLK_PCI_EC PLT_RST# ECRST# EC_SCI# CLK_PCI_EC PLT_RST# +3VL R859 47K_0402_5% 2 C1197 EC_SCI# +3VS BATT_TEMP/AD0/GPIO38 BATT_OVP/AD1/GPIO39 ADP_I/AD2/GPIO3A Input AD3/GPIO3B AD4/GPIO42 SELIO2#/AD5/GPIO43 63 64 65 66 75 76 DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D IREF/DA2/GPIO3E DA3/GPIO3F 68 70 71 72 PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D TP_CLK/PSCLK3/GPIO4E TP_DATA/PSDAT3/GPIO4F 83 84 85 86 87 88 DA Output PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C GPIO EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A to avoid EC entry ENE test mode EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D 14 15 16 17 18 19 25 28 29 30 31 32 34 36 KSO2 AD SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47 KSO1 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 MISC 77 78 79 80 +3VL 21 23 26 27 EC_BEEP# KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 PS2 Interface BATT_TEMPA R208 100K_0402_5% ADP_V ADP_V EN_DFAN1 IREF CHGVADJ ADP_I C387 0.22U_0603_16V4Z EN_DFAN1 IREF CHGVADJ EC_MUTE# USB_EN# EC_MUTE# USB_EN# TP_CLK TP_DATA +5VS TP_CLK TP_DATA SDICS#/GPXOA00 SDICLK/GPXOA01 SDIDO/GPXOA02 SDIDI/GPXID0 97 98 99 109 VGATE WOL_EN# VLDT_EN LID_SW# SPIDI/RD# SPIDO/WR# SPICLK/GPIO58 SPICS# 119 120 126 128 EC_SI_SPI_SO EC_SO_SPI_SI SPI_CLK SPI_CS# CIR_RX/GPIO40 CIR_RLC_TX/GPIO41 FSTCHG/SELIO#/GPIO50 BATT_CHGI_LED#/GPIO52 CAPS_LED#/GPIO53 BATT_LOW_LED#/GPIO54 SUSP_LED#/GPIO55 SYSON/GPIO56 VR_ON/XCLK32K/GPIO57 AC_IN/GPIO59 73 74 89 90 91 92 93 95 121 127 SM Bus EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04 EC_ON/GPXO05 EC_SWI#/GPXO06 ICH_PWROK/GPXO06 GPO BKOFF#/GPXO08 WL_OFF#/GPXO09 GPXO10 GPXO11 100 101 102 103 104 105 106 107 108 PM_SLP_S4#/GPXID1 ENBKL/GPXID2 GPXID3 GPXID4 GPXID5 GPXID6 GPXID7 110 112 114 115 116 117 118 V18R 124 R861 TP_DATA R863 VGATE WOL_EN# VLDT_EN LID_SW# SPI Device Interface GPIO D ACOFF BATT_TEMPA TP_CLK SPI Flash ROM 100P_0402_50V8J 100P_0402_50V8J EC_BEEP# ACOFF PWM Output EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 KSO[0 17] RP1 INVT_PWM/PWM1/GPIO0F BEEP#/PWM2/GPIO10 FANPWM1/GPIO12 ACOFF/FANPWM2/GPIO13 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 C 47K_0402_5% 47K_0402_5% GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1 LAD0 LPC & KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI[0 7] KSI[0 7] KSO[0 17] +3VL 12 13 37 20 38 ECRST# 0.1U_0402_16V4Z R862 R864 10 BATT_TEMPA C1187 ACIN_D C1189 AVCC 0.1U_0402_16V4Z 22 33 96 111 125 C1190 0.1U_0402_16V4Z 1 4.7K_0402_5% 4.7K_0402_5% C +3VALW FSTCHG BATT_FULL_LED# CAPS_LED# BATT_CHG_LOW_LED# SYSON VR_ON ACIN_D EC_SI_SPI_SO EC_SO_SPI_SI SPI_CLK SPI_CS# LID_SW# 47K_0402_5% SYSON FSTCHG BATT_FULL_LED# CAPS_LED# BATT_CHG_LOW_LED# +3VL R865 R866 4.7K_0402_5% R867 330K_0402_5% D26 ACIN_D SYSON VR_ON ACIN CH751H-40PT_SOD323-2 2.2K_0804_8P4R_5% 7/7 Change WOL_EN from pin 103 to pin 17 EC_INVT_PWM FAN_SPEED1 EC_INVT_PWM FAN_SPEED1 B 7/6 For Power LED PWM function R872 CRY1 2CRY2 E51_TXD E51_RXD ON/OFFBTN# PWR_LED# NUM_LED# E51_TXD E51_RXD ON/OFFBTN# PWR_LED# NUM_LED# GPI 10M_0402_5% @ XCLK1 XCLK0 1 2 7/2 For EC Crystal cost down 32.768KHZ_12.5PF_Q13MC14610002 @ C1206 SB_PWRGD BKOFF# WL_OFF# SUSP# R869 10K_0402_5% VR_ON R462 10K_0402_5% B UMA_ENBKL SUSP# PBTN_OUT# USB_OC#0 SUSP# PBTN_OUT# USB_OC#0 +EC_V18R C448 4.7U_0805_10V4Z KB926QFE0_LQFP128_14X14 +3VALW 18P_0402_50V8J R246 100K_0402_5% 7/27 Change R867 pull up from +3VALW to +3VL C1200 @ 122 123 SB_PWRGD BKOFF# WL_OFF# EC_ID EC_RSMRST# EC_LID_OUT# EC_ON 7/7 Change ED_ID from pin 108 to pin 107 AGND 0_0402_5% 0_0402_5% 0_0402_5% 69 @ R991 @R991 @R992 @ R992 R990 GND GND GND GND GND RTCCLK 18P_0402_50V8J OSC OSC NC NC Y5 @ 2 18P_0402_50V8J C1199 @ 11 24 35 94 113 CRY1 CRY2 EC_RSMRST# EC_LID_OUT# EC_ON R435 100K_0402_5% @ EC_ID H L EC ver KB926D3 KB926E0 PM_SLP_S3# PM_SLP_S5# EC_SMI# PM_SLP_S3# PM_SLP_S5# EC_SMI# 75W_65W WOL_EN EC_ID R874 100K_0402_5% E51_TXD R783 100K_0402_5% PLT_RST# @C1238 @ C1238 A 0.1U_0402_16V4Z Compal Electronics, Inc Compal Secret Data Security Classification For ESD request 2010-08-25 Issued Date Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: R436 100K_0402_5% @ A 7/20 PVT reserve C1199,Y5, C1200 SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 28 of 40 SPI Flash (256KB) LPC Debug Port Please Lid SW place the PAD under DDR DIMM H7 +3VS 7/7 Change U13 from MXIC to WINBOND for EOL +3VALW VSS C1201 W 0.1U_0402_16V4Z HOLD SPI_CS# SPI_CLK SPI_CS# S SPI_CLK C D EC_SO_SPI_SI 2 VDD VOUT PLT_RST# LPC_AD3 C1202 0.1U_0402_16V4Z LPC_AD2 LPC_AD1 LPC_AD0 10 CLK_PCI_SIO SERIRQ LID_SW# C1203 10P_0402_50V8J LPC_FRAME# Q EC_SI_SPI_SO 2 VCC GND U13 20mils U54 APX9132ATI-TRL_SOT23-3 +3VL W25X20BVSNIG SOIC 8P @ DEBUG_PAD R876 22_0402_5% @ SPI_CLK R877 @2 10_0402_5% C1205 8/6 Change U13 footprint to M25P10-AVMN6T_SO8 C1204 22P_0402_50V8J @ @ 10P_0402_50V8J reserve for EMI, close to U13 reserve for EMI KEYBOARD CONN KSI[0 7] KSO[0 17] please close to JKB1 KSI[0 7] KSO16 KSO[0 17] C1207 C1208 KSO2 C1209 KSO1 C1210 KSO0 C1211 KSO4 C1212 KSO3 C1213 KSO5 C1214 KSO14 C1215 KSO6 C1216 KSO7 C1217 KSO13 C1218 KSO8 C1219 KSO9 C1220 KSO10 C1221 KSO11 C1222 KSO12 C1223 KSO15 C1224 KSI7 C1225 KSI2 C1226 KSI3 C1227 KSI4 C1228 KSI0 C1229 KSI5 C1230 KSI6 C1231 KSI1 C1232 CAPS_LED# C1233 NUM_LED# C1234 KSO17 JKB 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 JKB34 KSO16 R881 300_0402_5% +3VS KSO17 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4 CAPS_LED# R882 300_0402_5% NUM_LED# ACES_88170-3400 CONN@ +3VS CAPS_LED# NUM_LED# 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 29 of 40 < Touch / B Connector > +3VL Power Button R883 51_ON# ON/OFFBTN# Q163A 2N7002DW-T/R7_SOT363-6 BTM side Right Switch SW4 R884 10K_0402_5% JPOWER 1 2 3 4 G1 G2 ON/OFFBTN# ON/OFFBTN# For EMI request 2 +5VS TP_CLK TP_DATA TP_SWL TP_SWR Left Switch G7 G8 1 P-TWO_161021-06021_6P-T CONN@ AZ5125-02S.R7G D11 SW1 TP_SWL D JTOUCH SMT1-05-A_4P ACES_85201-0405N CONN@ D12 @ AZ5125-02S.R7G TP_SWR < Power / B Connector > EC_ON SMT1-05-A_4P D C1235 0.1U_0402_25V6 @ 1 2 DEBUG@ 100K_0402_5% SW6 debug phase using SMT1-05-A_4P 7/13 For ESD request Screw Hole Vf=1.9V(typ),2.4V(max) If=20mA(max) H13 H14 H_3P0 @ H_3P0 @ H_3P0 @ H12 H_3P0 @ PWR_LED# BATT_CHG_LOW_LED# R773 510_0402_5% BATT_FULL_LED# YG H2 H_2P7x3P2N @ H3 H_2P7N @ H15 H_1P0N @ C H16 H_5P0N @ H_5P0N @ 1 510_0402_5% YG R774 1 A +5VALW 510_0402_5% H11 H_3P0 @ H1 D67 R768 H10 H_3P0 @ D70 C +5VALW H9 H_3P0 @ 1 H_3P0 @ H_3P0 @ Vf=1.8V(typ),2.0V(max) for amber Vf=1.8V(typ),2.0V(max) for green If=20mA(max) H8 H6 H5 DC IN/ BATT CHARGE POWER/SUSPEND LED HT-110UYG5_YELLOW GREEN HT-210UD5-UYG5_AMBER-YEL GRN CPU H18 H_4P9 @ H19 H_3P3 @ H_3P3 @ 1 H23 H_4P2x4P7 @ H22 H_4P2x4P7 @ H21 H_4P2 @ 7/6 For Power LED PWM function 7/15 Change D67/D70 to 5mA type 7/23 Change R773 from 120 to 510 ohm 7/23 Change Net name from+3VALW to +5VALW MINI CARD WLAN H20 7/23 Change R773 from 120 to 510 ohm 7/23 Change Net name from+3VALW to +5VALW 8/6 Add R774 link to BATT_CHG_LOW_LED# 8/6 Change R773 link to BATT_FULL_LED# PCB Fedical Mark PAD 1 FD3 @ FD4 @ FD2 @ FD1 @ B B ESD reserved +5VS +3VS B+ +3VS +1.1VS ISPD 7/13 Change P/N to DC30100A400 PJP1 @ @ 2 @ C1258 0.1U_0402_16V7K @ C1262 0.1U_0402_16V7K C1263 0.1U_0402_16V7K @ C1261 0.1U_0402_16V7K @ C1260 0.1U_0402_16V7K C1259 0.1U_0402_16V7K C1257 0.1U_0402_16V7K ZZZ DC-IN PCB PCB SKU LA-6843P Rev10 @ U3 U8 NB R3 A Near H5 Near H11 Near H12 Near H8 Near H14 Near H13 PJP1 45@ SB R3 RS880M R3@ Near R972 A SB820M_FCBGA605_A13 R3@ 7/21 Change P/N to SA00003IWB0 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 2010-08-25 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 30 of 40 B C D +1.5V < +1.5V TO +1.5VS > Q5 +5VS Q2 C449 RUNON 2 SI4800BDY_SO8 C462 1U_0402_6.3V4Z C463 10U_0805_10V4Z 4.7U_0805_10V4Z R305 4.7U_0805_10V4Z 1.5VS_ENABLE R285 750K_0402_1% +VSB SUSP C466 R286 2N7002DW-T/R7_SOT363-6 Q34B 10M_0402_5% 0.01U_0402_25V7K SUSP < +1.1VALW TO +1.1VS > +1.1VALW C469 R251 4.7U_0805_10V4Z RUNON 2 +VSB SUSP C476 Q14A 2N7002DW-T/R7_SOT363-6 < +1.1VALW TO +NB_CORE > 0_0402_5% VGATE# R290 330K_0402_5% R300 +VSB 470_0805_5% Q12B 10M_0402_5% 0.01U_0402_25V7K 2 4.7U_0805_10V4Z 4.7U_0805_10V4Z Q14B 2N7002DW-T/R7_SOT363-6 2 0.01U_0402_25V7K 1U_0402_6.3V4Z VLDT_EN# BOOT_ON @ @R47 R47 + C158 @ 390U_2.5V_M_R10 C475 R291 C474 1 0_0402_5% C472 470_0805_5% R287 750K_0402_1% C471 1 1U_0402_6.3V4Z SI4800BDY_SO8 SUSP R46 2 C468 Inrush current = 0A 0_0402_5% BOOT_ON 31 2 S S S G 4.7U_0805_10V4Z D D D D Q6 IRF8113PBF_SO8 Inrush current = 0A BOOT_ON @ @R45 R45 BOOT_ON 2N7002DW-T/R7_SOT363-6 Q12A 2N7002DW-T/R7_SOT363-6 Q3 C470 +1.1VS +3VS +3VALW 2N7002DW-T/R7_SOT363-6 Q11A 2N7002DW-T/R7_SOT363-6 < +3VALW TO +3VS > Q11B 7/8 Change Q5 from FDS6676AS to SI4800DBY 470_0805_5% SI4800BDY_SO8 1U_0402_6.3V4Z C464 470_0805_5% C450 1 4.7U_0805_10V4Z 4 1 S S S G Inrush current = 0A S S S G C452 D D D D R250 Inrush current = 0A D D D D 8 +5VS +5VALW E +1.5VS A < +5VALW TO +5VS > < Inversion of SYSON, SUSP#, VLDT_EN, EC_ON > +1.1VALW +NB_CORE +5VALW Inrush current = 0A +5VALW C481 Q15B 2N7002DW-T/R7_SOT363-6 SYSON Q13B 0.01U_0402_25V7K BOOT_ON Q13A 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 VLDT_EN# Q15A 2N7002DW-T/R7_SOT363-6 SUSP# 2 SUSP EC_ON# VLDT_EN Q16B 2N7002DW-T/R7_SOT363-6 EC_ON VLDT_EN Q16A 2N7002DW-T/R7_SOT363-6 10M_0402_5% SUSP SYSON# 470_0805_5% +VSB R292 330K_0402_5% R293 R815 @ 100K_0402_5% 4.7U_0805_10V4Z R306 R816 100K_0402_5% 100K_0402_5% 2 C480 100K_0402_5% 1 R245 4.7U_0805_10V4Z 1U_0402_6.3V4Z R814 +5VALW C478 C479 +5VALW 1 1 Q7 IRF8113PBF_SO8 3 < Discharge circuit > +5VALW R258 470_0805_5% 470_0805_5% 1 1 SUSP D Q23 G S 2N7002_SOT23-3 EC_ON# S 2N7002_SOT23-3 S 2N7002_SOT23-3 D Q10 G D SUSP D Q17 G SYSON# VR_ON# Q35A 2N7002DW-T/R7_SOT363-6 VR_ON Q22 @ S 2N7002_SOT23-3 G Q35B 2N7002DW-T/R7_SOT363-6 R254 @ 470_0805_5% 470_0805_5% 2 VR_ON# R253 R257 100K_0402_5% VGATE# +1.1VALW R803 +1.8VS 2 R802 100K_0402_5% VGATE +0.75VS +1.5V 1 +5VALW 4 Compal Secret Data Security Classification Issued Date 2010-08-25 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 E Sheet 31 of 40 A B C D PreCHG PQ2 @ BSS84_SOT23-3 VIN @ PR5 1K_1206_5% PC4 100P_0402_50V8J 1 PR4 PR3 100K_0402_5% @ 100K_0402_5% @ @ PR6 1K_1206_5% PR7 @ 100K_0402_5% 1 @ PR8 1K_1206_5% @ PD4 2 +5VALWP 2 RB715F_SOT323-3 PQ5 PQ3 @ DTC115EUA_SC70-3 DTC115EUA_SC70-3 N1 51_ON# VS PC8 0.1U_0603_25V7K 2 PC7 0.22U_0603_25V7K PR12 100K_0402_1% RLS4148_LL34-2 BATT+ 2 PD3 PR10 68_1206_5% PR9 68_1206_5% PQ1 BSS84_SOT23-3 1 PD2 RLS4148_LL34-2 @ ACOFF VIN B+ 2 PC3 1000P_0402_50V7K RLS4148_LL34-2 @ PR2 1K_1206_5% 1 @SINGA_2DW-0005-B03 PC2 100P_0402_50V8J - - 2 PC17 680P_0402_50V7K + PC1 1000P_0402_50V7K + 0_1206_5% VIN 1 SMB3025500YA_2P PL1 DC_IN_S2 7A_24VDC_429007.WRML DC_IN_S1 PJP1 PD1 PF1 DC301001M80 @ PR1 PR15 22K_0402_1% +3VALWP @ PJ1 1 +3VALW +1.1VALWP JUMP_43X118 OCP(min) = 8.33A @ PJ5 @ PJ2 1 +1.1VALW +3VLP JUMP_43X118 @ PJ4 2 1 (5A,200mils, Via NO.= 10) +5VALWP 2 +2.5VSP +1.5VP @ PJ7 +VSB JUMP_43X79 (1.5A,60mils, Via NO.= 3) 1 +2.5VS @ +VDDNBP 2 PJ12 1 +VDDNB JUMP_43X79 (4A,160mils ,Via NO.= 8) PJ11 PJ9 (1A,40mils ,Via NO.= 2) +1.5V OCP(min) = 8.7A @ @ @ JUMP_43X118 JUMP_43X39 +3VL JUMP_43X39 (120mA,40mils, Via NO.= 1) +0.75VSP (9.5A,380mils ,Via NO.= 20) 1 OCP(min) = 18.7A +5VALW OCP(min) = 8.33A +VSBP JUMP_43X118 (5A,200mils, Via NO.= 10) PJ8 PJ3 JUMP_43X39 (16A,640mils, Via NO.= 32) @ (100mA,40mils ,Via NO.= 2) JUMP_43X118 @ +1.8VSP +0.75VS 2 PJ10 1 @ +1.8VS +1.05VSP JUMP_43X79 (2.5A,100mils, Via NO.= 5) 2 PJ13 1 +1.05VS JUMP_43X79 (1.75A,80mils, Via NO.= 4) 4 Precharge detector 15.97V/14.84V FOR ADAPTOR Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 D Sheet 32 of 40 A B C D PH1 under CPU botten side : CPU thermal protection at 95 degree C Recovery at 56 degree C Rset = * Rtmh Rhyst = (Rset* Rtml) / (3*Rtml - Rset) VMB PF2 10A_125V_451010MRL BATT_S1 BATT_P3 BATT_P4 BATT_P5 EC_SMDA EC_SMCA BATT+ Rtmh at 95C = 6.64K, Rtml at 57C = 25.1K Rset = * 6.64K = 19.92K ==> 20K Rhyst = (20K * 25.1K) / (3 * 25.1K - 20K) = 9.078K ==> 9.09K 1 +3VLP PC14 1000P_0402_50V7K 2 GND GND GND GND PC15 0.01U_0402_25V7K 10 11 12 13 PJP2 SUYIN_200045MR009G171ZR VL PR32 1K_0402_1% @ PL2 SMB3025500YA_2P PD6 PJSOT24C_SOT23-3 PD8 1 2 PR31 23.2K_0402_1% PU3 VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 +3VLP PR39 100_0402_1% VS_ON PR33 10.7K_0402_1% PR40 1K_0402_1% 1 G718TM1U_SOT23-8 2 1 BATT_TEMPA EC_SMB_DA1 PH1 100K_0402_1%_NCP15WF104F03RC PR38 100_0402_1% PC16 0.1U_0402_16V4Z PR37 6.49K_0402_1% 2 PJSOT24C_SOT23-3 EC_SMB_CK1 PQ6 BSS84_SOT23-3 PR45 1 PR48 0_0402_5% D POK PC20 0.1U_0603_25V7K @ 22K_0402_1% S PQ7 SSM3K7002FU_SC70-3 G PC22 1U_0402_16V7K PR47 100K_0402_1% VL 2 PR43 100K_0402_1% +VSBP @ PC19 0.22U_0603_25V7K B+ @ 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 D Sheet 33 of 40 B+ @ PJ22 1 CSIN JUMP_43X79 1 2 PR238 100K_0402_1% DCIN 24 ACSET ACPRN 23 EN CSON 22 CELLS CSOP 21 ICOMP CSIN 20 VCOMP CSIP 19 ICM PHASE 18 LX_CHG VREF UGATE 17 DH_CHG CHLIM BOOT 16 PR70 2.2_0603_5% BST_CHG 10 ACLIM VDDP 15 6251VDDP DL_CHG PC32 2200P_0402_25V7K 1 PQ16 DTC115EUA_SC70-3 PC217 1000P_0402_25V8J 2 VDD BATT_ON 0.1U_0603_25V7K ACPRN 20_0603_5% CSON PC30 0.047U_0603_16V7K PR62 20_0603_5% PC34 0.1U_0603_25V7K PR65 D S G PQ18 SSM3K7002FU_SC70-3 CSOP PR63 20_0603_5% 2.2_0603_5% PQ19 AO4466L_SO8 BATT+ PL4 PR67 10UH_MSCDRI-104A-100M-E_4.6A_20% 0.02_1206_1% CHG D S 11 VADJ LGATE 14 12 GND PGND 13 G 75W_65W PQ39 SSM3K7002FU_SC70-3 26251VDD PC48 10U_1206_25V6M PC41 680P_0603_50V7K PC40 10U_1206_25V6M 1 PD14 RB751V-40_SOD323-2 @ PQ21 AO4466L_SO8 1 PR69 4.7_1206_5% 6251aclim PC38 0.1U_0603_25V7K BST_CHGA 2 PR73 120K_0402_1% PR72 24K_0402_1% 6251VREF 2 6251VREF PR75 20K_0402_1% IREF PC37 1U_0402_16V7K PR193 12.4K_0402_1% PR71 154K_0402_1% PC39 10U_1206_25V6M 2 ACPRN PR61 1 PQ22 DTC115EUA_SC70-3 PR66 47K_0402_1% 2 ACOFF ACOFF ADP_I PC42 0.01U_0402_25V7K PR64 6.81K_0402_1% ACSETIN PC29 DCIN 1 PACIN 0.01U_0402_25V7K S 6800P_0402_25V7K PU4 PR68 47K_0402_5% 6251_EN PC33 D PC35 PQ20B DMN66D0LDW-7_SOT363-6 G 2 PQ20A DMN66D0LDW-7_SOT363-6 ACSETIN PR60 100K_0402_1% S PR59 150K_0402_1% G PR227 10_1206_5% PR56 10K_0402_1% PR228 14.3K_0402_1% 1 D FSTCHG 2.2U_0603_6.3V6K PR57 10K_0402_1% PC27 PQ15 DTC115EUA_SC70-3 2 1 6251VDD BATT_ON PR226 191K_0402_1% PD201 RB751V-40_SOD323-2 VIN PR54 47K_0402_1% 1 PC25 5600P_0402_25V7K PR50 200K_0402_1% PR52 200K_0402_1% PC26 0.1U_0603_25V7K PQ13 DTA144EUA_SC70-3 PC28 4.7U_0805_25V6-K PreCHG VIN PC24 4.7U_0805_25V6-K PC23 4.7U_0805_25V6-K 1 CSIP 1 PR49 0.02_1206_1% 1 CHG_B+ P3 4 VIN PQ10 SI4483ADY-T1-GE3_SO8 D PQ8 AO4435_SO8 PC132 10U_1206_25V6M P2 PQ9 AO4435_SO8 C PC130 10U_1206_25V6M B PC31 10U_1206_25V6M A PR74 4.7_0603_5% PC43 4.7U_0805_6.3V6K ISL6251AHAZ-T_QSOP24 6251VDD PR240 47K_0402_1% PR242 10K_0402_1% VIN PR241 10K_0402_1% ACIN PR77 31.6K_0402_1% CHGVADJ VADJ PR76 15.4K_0402_1% @ PR78 309K_0402_1% PACIN @ PR79 10K_0402_1% PQ214 DTC115EUA_SC70-3 CC=0.25A~3.6A ADP_V High Low 17.44V @ PR80 47K_0402_1% CHGVADJ 18.089V @ PC44 1U_0402_16V7K Vcell PR243 14.3K_0402_1% CHGVADJ=(Vcell-4)*9.445 ACPRN 1 Vin Detector 4V 0V IREF=0.9133*Icharge 4.2V 1.882V IREF=0.228V~3.29V 4.35V 3.2935V VCHLIM need over 95mV UMA (UMA) Iin = 2.512 ADP_I Vin = 7.57 ADP_V Iada=0~3.421A(65W) CP=3.15A PR49=0.02, PR72=24k, PR75=20k, PR35=11.5K, 75W_65W=high Iada=0~3.947A(75W) CP=3.63A PR49=0.02, PR72=24k, PR75=20k, PR35=11.5K, 75W_65W=low 4 CP= 92%*Iada Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 D Sheet 34 of 40 PC45 1U_0603_10V6K 2VREF_6182 D D UP6182_B+ PR82 30K_0402_1% PR83 20K_0402_1% PR84 19.1K_0402_1% UP6182_B+ PC47 10U_1206_25V6M Ipeak=8.61A Imax=6.03A F=245K AO4466L_SO8 DRVH1 21 LX_3V 11 LL2 LL1 20 LX_5V LG_3V 12 DRVL1 19 LG_5V PQ27B DMN66D0LDW-7_SOT363-6 AO4712L_SO8 PQ26 TPS51125ARGER_QFN24_4X4 + VCLK 18 VREG5 VIN PR90 4.7_1206_5% PC56 330U_6.3V_M PC58 680P_0603_50V7K Total capacitor 220uF ESR = 15mohm VL PC60 4.7U_0805_10V6K B 2VREF_6182 S 17 16 13 GND DRVL2 +5VALWP DRVH2 PL7 4.7UH_SIL1045R-4R7PF_6.3A_30% 10 PC54 0.1U_0603_25V7K C VL PQ23 D G S PC46 2200P_0402_50V7K ENTRIP1 UG_3V BST_5V PR88 0_0603_5% UG_5V UP6182_B+ 22 EN0 ENTRIP2 B G ENTRIP1 23 VBST1 PC59 1U_0402_6.3V6K ENTRIP1 PQ27A DMN66D0LDW-7_SOT363-6 PGOOD VBST2 PR91 499K_0402_1% 2 B+ Total capacitor 220uF ESR = 15mohm D VFB1 VREF TONSEL VREG3 AO4712L_SO8 PR92 100K_0402_1% 2 VO1 24 PQ25 PC57 680P_0603_50V7K POK + BST_3V 15 PR89 4.7_1206_5% VO2 SKIPSEL PC53 0.1U_0603_25V7K PR87 0_0603_5% AO4466L_SO8 14 PQ24 PL6 4.7UH_SIL1045R-4R7PF_6.3A_30% +3VALWP C VFB2 P PAD ENTRIP2 25 PC55 330U_6.3V_M PR86 150K_0402_1% PU5 PC52 4.7U_0805_10V6K Ipeak = 7.65A Imax = 5.36A F = 305K PC51 10U_1206_25V6M PC50 10U_1206_25V6M PR85 150K_0402_1% ENTRIP2 +3VLP PC49 2200P_0402_50V7K B+ PL3 HCB2012KF-121T50_0805 PR81 13K_0402_1% PC61 0.1U_0603_25V7K 1 PR94 100K_0402_1% VS_ON D S G PR373 200K_0402_1% ACPRN A PC370 2.2U_0603_10V6K PR95 100K_0402_1% PR96 42.2K_0402_1% VS PQ362 SSM3K7002FU_SC70-3 PQ29 DTC115EUA_SC70-3 A EC_ON 2010-08-25 Issued Date DTC115EUA_SC70-3 Compal Electronics, Inc Compal Secret Data Security Classification PQ363 Deciphered Date 2010-08-25 Title SCHEMATICS,MB A6843 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Wednesday, September 01, 2010 Date: Rev B 401982 Sheet 35 of 40 PL151 HCB2012KF-121T50_0805 2 D VDD 10 DL_1.1V DL PGND AGND PC67 4.7U_0603_6.3V6K PGOOD +5VALW PR102 9.1K_0402_1% LX_1.1V G5603RU1U_TQFN14_3P5X3P5 PC69 4.7U_0805_10V6K PR100 4.7_1206_5% 11 +1.1VALWP (+1.1VALW, +1.1VS, NB_CORE) + PC68 680P_0603_50V7K 12 ILIM LX VCC 0.1U_0603_25V7K OUT DH_1.1V 13 14 TP BST DH FB D Ipeak = 16.1A Imax = 11.3A F = 315K PL9 1UH_FDUE1040D-1R0M-P3_21.3A_20% PC65 BST_1.1V PQ31 MDU2653RH_POWERDFN56-8-5 PR99 0_0603_5% 5 15 TON PR101 100_0603_1% 2 EN_SKIP +5VALW PU6 + PQ30 TPCA8030-H_SOP-ADV8-5 @ PC64 1U_0402_16V7K B+ PR98 0_0402_5% POK PC91 2200P_0402_50V7K PC133 10U_1206_25V6M PC63 4.7U_0805_25V6-K 2 PC62 4.7U_0805_25V6-K 1.1V_B+ PR97 255K_0402_1% PC127 68U_25V_M_R0.36 PC66 330U_6.3V_M Total capacitor 550uF ESR = 7.5mohm PR103 4.75K_0402_1% C C PR104 10K_0402_1% PL152 HCB2012KF-121T50_0805 DH_1.5V 12 LX_1.5V VCC ILIM 11 FB VDD 10 PR110 20K_0402_1% PGOOD DL_1.5V G5603RU1U_TQFN14_3P5X3P5 PC79 2200P_0402_50V7K PC72 4.7U_0805_25V6-K PR108 4.7_1206_5% PC78 4.7U_0805_10V6K PQ33 Total capacitor 220uF ESR = 15mohm +5VALW PGND AGND PC76 4.7U_0603_6.3V6K DL 0.1U_0603_25V7K B +1.5VP 13 LX + DH OUT TON PC74 2 BST Ipeak = 9.5A Imax = 6.65A F = 315K PL11 1.8UH_SIL104R-1R8PF_9.5A_30% 14 15 TP BST_1.5V +5VALW AO4466L_SO8 PR107 0_0603_5% PR109 100_0603_1% PU7 @PC73 @ PC73 1U_0402_16V7K EN_SKIP B PQ32 1 B+ SYSON PR105 255K_0402_1% PR106 0_0402_5% PC71 4.7U_0805_25V6-K 1.5V_B+ PC75 330U_6.3V_M PC77 680P_0603_50V7K AO4712L_SO8 PR111 10K_0402_1% 2 PR112 10K_0402_1% A A Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 36 of 40 +1.5V VDDR_SW HIGH 1.05V LOW 0.9V D +3VS +5VALW PJ16 @ JUMP_43X79 PU10 APL5930KAI-TRG_SO8 PR166 2.4K_0402_1% 1 2 FB PC89 22U_0805_6.3V6M @ PC83 0.01U_0402_25V7K PC88 0.01U_0402_25V7K SUSP# +1.8VSP PR165 3K_0402_1% EN POK TP VOUT VOUT 1 PR117 10.5K_0402_1% NC 2 VOUT VCNTL VIN VIN GND NC VREF PR195 0_0402_5% 2 +5VALW PC82 1U_0603_6.3V6M NC GND PC181 1U_0603_6.3V6M +1.05VSP PQ4 S G PR113 6.98K_0402_1% PC86 1U_0402_16V7K @ PC90 1U_0402_16V7K D C VR_ON# PR115 0_0402_5% @ PR153 10K_0402_1% SSM3K7002FU_SC70-3 S PC85 4.7U_0805_6.3V6K PU9 APL5331KAC-TRL_SO8~N VIN VCNTL PQ11 G VDDR_SW @ SSM3K7002FU_SC70-3 D @ PR167 10K_0402_1% @ PR148 12.4K_0402_1% 1 +5VALW PC84 4.7U_0805_6.3V6K 2 PJ15 @ JUMP_43X79 VDDR 1 D PC87 10U_0805_6.3V6M C @ PJ17 JUMP_43X79 OUT JUMP_43X39 NC VREF NC VOUT NC TP +3VALW PR119 1K_0402_1% +2.5VSP PC93 1U_0603_6.3V6M B PR120 1K_0402_1% S PQ34 SSM3K7002FU_SC70-3 @ PC96 1U_0402_16V7K D G +0.75VSP PR121 0_0402_5% 2 SUSP PC81 4.7U_0805_6.3V6K PC94 1U_0402_16V7K GND PC80 1U_0603_10V6K GND IN 2 1 2 B PC92 4.7U_0805_6.3V6K PJ14 2 PU8 APL5508-25DC-TRL_SOT89-3 @ +3VS PU11 APL5331KAC-TRL_SO8~N VIN VCNTL 1 1 2 1 +1.5V PC95 10U_0805_6.3V6M A A Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 37 of 40 B C D E +VDDNB LGATE_NB 29 PGND1 28 LGATE1 11 COMP0 UGATE1 26 UGATE1 12 VW0 BOOT1 25 BOOT1 24 ISN1 PR149 0_0603_5% BOOT1 2 COMP0 PC121 1000P_0402_50V7K PR158 PC125 PR159 6.81K_0402_1% 2 54.9K_0402_1% 1200P_0402_50V7K 1 @ PR161 PC109 4.7U_0805_25V6-K PC129 4.7U_0805_25V6-K 2 COMP1 PC117 680P_0603_50V7K PC118 0.1U_0603_16V7K @PC124 @ PC124 1000P_0402_50V7K @PR162 @ PR162 6.81K_0402_1% @ PC126 54.9K_0402_1% 1200P_0402_50V7K @ PR164 36.5K_0402_1% Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Date: B PR154 4.02K_0402_1% Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A +CPU_CORE PR152 16.5K_0402_1% @ PC123 180P_0402_50V8J @ PR163 36.5K_0402_1% FB_1 @ PR160 1K_0402_5% PR157 1K_0402_5% PQ41 MDU2653RH_POWERDFN56-8-5 VW1 @ PC122 4700P_0402_25V7K 2 PL15 0.36UH_PCMC104T-R36MN1R17_30A_20% PQ40 TPCA8030-H_SOP-ADV8-5 PR151 4.7_1206_5% LGATE1 +1.5V @ PR156 @PR156 255_0402_1% 2 PC116 0.22U_0603_10V7K DIFF_1 PC120 180P_0402_50V8J ISP1 FB_0 PC119 4700P_0402_25V7K TP 49 23 UGATE1 PHASE1 VW0 PR145 4.02K_0402_1% CPU_B+ PR150 1K_0402_1% PC219 1000P_0402_50V7K 2 RTN0 PC113 1U_0603_10V6K VSEN0 ISP1 VW1 22 FB1 21 20 19 VSEN1 18 RTN1 RTN0 17 13 ISP0 ISN0 PC371 330P_0402_25V8J ISN1 PHASE1 ISP1 27 COMP1 PHASE1 VDIFF1 FB0 VSEN0 10 PC112 0.1U_0603_16V7K ISN0 LGATE1 VDIFF0 PC111 680P_0603_50V7K ISP0 OCSET LGATE0 30 PR141 16.5K_0402_1% PC131 4.7U_0805_25V6-K 31 PVCC PC115 4.7U_0805_25V6-K LGATE0 ISL6265CHRTZ-T_TQFN48_6X6 PC114 4.7U_0805_25V6-K RBIAS PQ38 MDU2653RH_POWERDFN56-8-5 ENABLE 32 LGATE0 PGND0 +CPU_CORE SVC PR139 4.7_1206_5% +5VALW PHASE0 UGATE0 33 1 34 PHASE0 UGATE0 SVD PC110 0.22U_0603_10V7K PL14 0.36UH_PCMC104T-R36MN1R17_30A_20% DIFF_0 PC108 4.7U_0805_25V6-K PWROK PQ37 TPCA8030-H_SOP-ADV8-5 PR137 0_0603_5% BOOT0 VSEN0 PR155 255_0402_1% 2 37 UGATE_NB 39 40 38 PHASE_NB LGATE_NB 41 PGND_NB OCSET_NB 43 44 45 42 RTN_NB VSEN_NB FSET_NB BOOT0 PR147 0_0402_5% PR190 10_0402_1% 46 35 CPU_VDD0_RUN_FB_L FB_NB 36 BOOT0 PR146 0_0402_5% COMP_NB BOOT_NB PGOOD ISP0 CPU_VDD0_RUN_FB_H 47 OFS/VFIXEN PC218 2200P_0402_25V7K 1 PR189 10_0402_1% VCC +CPU_CORE PHASE0 1 PR142 0_0402_5% PR144 95.3K_0402_1% Ipeak = 36A Imax = 25.2A F = 300K Total capacitor 1320uF ESR = 1.5mohm 2 VR_ON PR143 21.5K_0402_1% 48 VIN ISL6265_PWROK PR140 0_0402_5%2 PC105 330U_6.3V_M CPU_B+ CPU_VDDNB_RUN_FB_L BOOT_NB 16 CPU_SVC AO4712L_SO8 UGATE0 PU12 15 CPU_SVD PR138 0_0402_5% 2 2 PR133 0_0402_5% ISN0 2 14 H_PWRGD_L PR136 0_0402_5% PC106 680P_0603_50V7K + +VDDNBP UGATE_NB @ PR135 @PR135 105K_0402_1% @ PR192 10_0402_1% PHASE_NB @ PR131 @PR131 105K_0402_1% VGATE H_PWRGD PR125 4.7_1206_5% PHASE_NB PQ36 LGATE_NB 2 PC104 0.22U_0603_10V7K CPU_VDDNB_RUN_FB_H PR129 11K_0402_1% 1 1 @ PR134 10K_0402_1% PR132 105K_0402_1% PR130 0_0402_5% + PL13 4.7UH_SIL1045R-4R7PF_6.3A_30% AO4466L_SO8 PR191 10_0402_1% 2 PC107 0.1U_0603_25V7K + 2 PR127 2_0603_5% +3VS PR124 2.2_0603_1% BOOT_NB PR128 0_0402_5% 2 +5VS PHASE_NB PR126 22K_0402_1% 2 CPU_B+ +3VS + B+ PQ35 PC103 0.1U_0603_16V7K UGATE_NB PC102 1000P_0402_50V7K 1 +5VALW PC100 1000P_0402_50V7K PC128 68U_25V_M_R0.36 PR123 2_0603_5% PC99 68U_25V_M_R0.36 PR122 44.2K_0402_1% PL12 HCB4532KF-800T90_1812 PC98 68U_25V_M_R0.36 PC101 10U_1206_25V6M CPU_B+ PC97 33P_0402_50V8J ISN1 A C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E 38 of 40 PIR (Product Improve Record) PWWAE LA-6843P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 D NO DATE PAGE MODIFICATION LIST PURPOSE 2010/07/20 28 Reserve C1199,Y5,C1200 For design change 2010/07/20 28 Reserve R436 for only KB926E0 For design change 2010/07/20 29 Del R875 For SERIRQ direct connect to H7.7 2010/07/20 29 Del C588/C589/Y4/R368 For design change 2010/07/21 11~15 Change U8 R1 P/N from A12(SA000032WI40) to A13(SA000032WA0) For SB820 A13 version 2010/07/21 30 Change U8 R3 P/N from A12(SA000032WI50) to A13(SA000032WB0) For SB820 A13 version 2010/07/23 18 Change D8 from DAN202U to CHN202UPT For design change 2010/07/23 24 Chagne UL4 from LF-H1201P-2 to LFE8456E-R for use 5mA type For design change 2010/07/23 30 Change R768/R773 from 120 to 510 ohm for use 5mA type For design change Change R768.1 pull up from +3VALW to +5VALW for use 5mA type For design change Change R773.1 pull up from +3VALW to +5VALW for use 5mA type For design change 2010/07/23 27 Change JLINE/JEXMIC to FOX_JA6331-B39S4-7F For DFX request 2010/07/26 23 Reserve DM2 For +3V_WLAN is +3VS 2010/07/26 Add R50 For Intel Rainbow Peak module 2010/07/26 24 Reserve CL39 For EMI request 10 2010/07/27 28 Change R867 pull up from +3VALW to +3VL For design change D REVISION CHANGE: 0.2 TO 1.0 NO DATE PAGE MODIFICATION LIST PURPOSE 2010/08/06 29 Change U13 footprint to M25P10-AVMN6T-SOP For design change 2010/08/06 25 Change Net name form V1_8 to +V1_8 For customer request 2010/08/06 29 Add R774 link to BATT_CHG_LOW_LED# For customer request 2010/08/06 29 Change R773 link to BATT_FULL_LED# For customer request 2010/08/06 30 Reserve SW6 Del SW5 For debug phase 2010/08/09 30 Chagne UL4 from NS681680 to NS681610 For design change 2010/08/09 08 Mount C26/C89,Reserve C24,C90 For design change 2010/08/16 18 Del R42/C94 For EMI request 2010/08/16 18 Reserve CC9/RC7 For EMI request 2010/08/16 24 Add CL3/CL7 link to +3V_LAN For EMI request Reserve CL38 For EMI request Change CL37 from 0.1uF to 120 pF For EMI request Add D13 link to LANGND For EMI request C C B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010-08-25 Deciphered Date 2010-08-25 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A6843 Document Number Rev B 401982 Wednesday, September 01, 2010 Sheet 39 of 40 A B C D E Version Change List ( P I R List ) for Power Circuit Rev NO DATE PAGE MODIFICATION LIST PURPOSE 2010 06 21 Release 2010 07.25 modification list P 33 PC16 change to SE070104Z80 Defore material EOL PVT P 38 PU12 change to SA000022M80 Before material MP schedule will impact PWWAE MP schedule PVT P 33 Remove PD6 , PD8 @ ESD test fail PVT P 34 Add PC132 , remove PC130 , PC131 , PR69 , PC41 @ For EMI fail PVT P 35 Add PC51 , remove PC49 , PC46 , PC57 , PC58 , PR89 , PR90 @ For EMI fail PVT P 36 Add PC79 , PC91 , PC133 , remove PR100 , PR108 , PC68 , PC77 @ For EMI fail PVT P 38 Remove PR125 , PR139 , PR151 , PC106 , PC111 , PC117 @ For EMI fail PVT 2010 08.10 modification list P 37 Change PU9 , PU11 to SA053310110 UP7711 stop using from now on Pre-MP P 38 Add PC218 , PC219 , PC371 For VCORE Ripple Pre-MP P 32 Add PR8 For Precharge rising current Pre-MP P 32 , P 33 PQ1 , PQ2 , PQ6 change to SB900840003 SB906100210 material delivery had problem Pre-MP P 35 Change PU5 to SA000020C80 UPI product stop using Pre-MP 2010 08.16 modification list 2010 08.17 modification list P 34 Change PU4 to SA00001EP80 SA00003TK00 stop using Pre-MP P 38 Remove PR127 @ To solve +1.1VALW noise Pre-MP P 34 Remove PR193 , PQ39 @ For PWWAE MP use 25W CPU Pre-MP 2010 08.23 modification list 4 Compal Secret Data Security Classification 2010-08-25 Issued Date 2010-08-25 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A6843 Rev B 401982 Wednesday, September 01, 2010 Sheet E 40 of 40 ... 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J... 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J 100 P _04 02_50V8J Issued Date Compal. .. C 70 180P _04 02_50V8J C78 0. 22U _06 03_16V4Z C79 0. 22U _06 03_16V4Z C 80 100 0P _04 02_25V8J 2 C81 100 0P _04 02_25V8J C82 180P _04 02_50V8J C83 180P _04 02_50V8J 2 + 390U_2.5V_M_R 10 + +1 .05 VS C1124 C77 4.7U _08 05_10V4Z