Canary2 Block Diagram A B C Mobile CPU CLK GEN Dothan IDT CV125 4, HOST BUS DDR II G792 DDR II CRT CONN LVDS INPUTS 34 3V_S5 1D5V_S0 14 2D5V_S0(LDO) SYSTEM DC/DC ISL6227 13 INPUTS DCBATOUT TVOUT14 1D8V_S3 11,12 APL5331KAC-TR 42 100MHz 1D5V_S0 PCI7411 Line In28 Int MIC In Codec 42 OUTPUTS 1D05V_S0 TVOUT 6,7,8,9,10 DMI I/F OUTPUTS DCBATOUT XGA 45,46,47,48,49, 50,51,52 400/533MHz 400/533 MHz TPS5130 40,41 LCD NVIDIA NV44M Alviso-GM 11,12 RGB 53 PEG SYSTEM DC/DC 5V_S5 CH7307C 533MHz 400/533MHz 400/533 MHz SDVO E 04222-SA DVI CONN TMDS 19 D PWR SW ACLINK PCI BUS ALC655 TSP2220A CARDBUS 1394 0D9V_S0 PCMCIA ONE SLOT 25 MAXIM CHARGER MAX8725+Max 1773 26 27 43 SMATR CARD 28 SD/MS/MMC 1394 CONN (TI) 24,25 28 G1421B LAN 28 10/100/1G RTL8110SBL INT.SPKR DCBATOUT 5V RJ4523 23 3.2A 100mA CPU DC/DC ISL6218CV-T 39 MODEM MDC Card 28 16.8V UP+5V 29 TXFM 22, 23 OUTPUTS CHG_PWR 26 Mini-PCI 802.11A/B/G INPUTS SD/MMC/MS Card Slot in ICH6-M OP AMP Line Out 26 OUTPUTS INPUTS 21 VCC_CORE DCBATOUT LPC BUS 0.844~1.3V 27A PATA 15,16,17,18 Super 31 IO USB CD ROM HDD 20 KBC H8-HD64F2111BVC 87392 30 BIOS ROM 4M BITS PM49F004T-33VC 33 SYSTEM DC/DC LPC FAN5234 DEBUG CONN 33 INPUTS PORT OUTPUTS DCBATOUT NVVDD(1D2V_S0) 21 20 45 DIGITIZER BOM2(NV44+G) 1 21 MINI USB Blue-tooth FIR 31 Touch Pad 32 INT_KB Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 32 Title BLOCK DIAGRAM Port Replicator (124 PIN) AC RJ45-11 IN A SEARIAL PORT CRT PRINTER B PS2 MIC LINE IN LINE TV OUT OUT C DVI Size Document Number Custom PCIeX2 SMBUS Rev Date: Thursday, January 13, 2005 D SA CANARY2 Sheet E of 55 A B Alviso Strapping Signals and Configuration Pin Name page Configuration Strap Description C D CY28411ZC Spread Spectrum Select page SS3 SS2 SS1 Spread Mode E ICH6-M Integrated Pull-up and Pull-down Resistors ICH6-M EDS 14308 0.8V1 Spread Amount% ACZ_BIT_CLK, DPRSLP#, EE_DIN, CFG[2:0] FSB Frequency Select CFG[3:4] Reversed CFG5 DMI x2 Select CFG6 DDR I / DDR II CFG7 CPU Strap CFG[8:11] Reversed CFG[12:13] XOR/ALL Z test straps CFG[14:15] Reversed CFG16 FSB Dynamic ODT 000 = Reserved 001 = FSB533 010 = FSB800 011-111 = Reversed = = = = DMI DMI DDR DDR x2 x4 II I (Default) = Prescott = Dothan (Default) 0.8 Down 1.25 Down 1.75 1 Down 2.5 EE_DOUT, GNT[5]#/GPO[17], ICH6 internal 20K pull-ups GNT[6]#/GPO[16], LDRQ[1]/GPI[41], 0 Center +-0.3 1 Center +-0.5 1 Center +-0.8 1 Center +-1.25 00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled 11 = Normal Operation (Default) LAN_RXD[2:0] ICH6 internal 10K pull-ups ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs SPKR, EE_CS, = Dynamic ODT Disabled = Dynamic ODT Enabled (Default) CPU core VCC Select = 1.05V (Default) = 1.5V CFG19 CPU VTT Select = 1.05V (Default) = 1.2V SDVO Present Down ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR, Reversed Reversed 0 PME#, PWRBTN#, TP[3] CFG17 SDVOCRTL _DATA 0 LAD[3:0]#/FB[3:0]#, LDRQ[0], 1 CFG18 CFG20 USB[7:0][P,N] ICH6 internal 15K pull-downs DD[7], SDDREQ ICH6 internal 11.5K pull-downs LAN_CLK ICH6 internal 100K pull-downs ICH6-M IDE Integrated Series Termination Resistors PCI Routing DD[15:0], DIOW#, DIOR#, DREQ, = No SDVO device present (Default) 1= SDVO device present NOTE: All strap signals are sampled with respect to the leading edge of the Alviso GMCH PWORK In signal IDSEL IRQ REQ/GNT 7411 25 B.F.G MiniPCI 21 E LAN 23 E approximately 33 ohm DDACK#, IORDY, DA[2:0], DCS1#, DCS3#, IDEIRQ 2 BOM2(NV44+G) 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title ITP Size A3 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 Sheet SA of 55 3D3V_S0 DREFSSCLK1 DREFSSCLK#1 PCLK_PCM & PCLK_SIO need equal length 31 PCLK_SIO 29 22 24 30 3D3V_S0 12/27 PCLK_MINI PCLK_LAN PCLK_PCM PCLK_KBC 33 PCLK_FWH 16 CLK_ICHPCI R644 22R2 R641 R636 R639 R650 1 1 2 2 R653 R651 1 33R2 33R2 33R2 33R2 22R2 33R2 56 H/L: 100/96MHz SS_SEL ITP_EN 16 PM_STPPCI# 11,18 SMBC_ICH 11,18 SMBD_ICH VTT_PWRGD# DREFCLK DREFCLK# Q57 DTC124EUA-U1 C685 2 X5 1 22 K C684 SC33P 16 31 CLK_ICH14 CLK14_SIO X-14D31818M-1 R649 R652 R197 CLK_ICH14 & CLK14_SIO need equal length 1 1KR2 SCL SDA 14 15 DOT96 DOT96# 50 49 XTAL_IN XTAL_OUT 52 39 REF IREF 10 VTT_PWRGD#/PD SRN33-2-U2 DREFSSCLK DREFSSCLK# CLK_PCIE_DOCK_1 RN15 CLK_PCIE_DOCK_1# SRN33-2-U2 CLK_PCIE_DOCK1 34 CLK_PCIE_DOCK1# 34 CLK_PCIE_DOCK_2 RN17 CLK_PCIE_DOCK_2# SRN33-2-U2 CLK_PCIE_DOCK2 34 CLK_PCIE_DOCK2# 34 RN19 SRN33-2-U2 CLK_PCIE_PEG 46 CLK_PCIE_PEG# 46 RN20 SRN33-2-U2 CLK_PCIE_ICH 16 CLK_PCIE_ICH# 16 RN18 SRN33-2-U2 CLK_MCH_3GPLL CLK_MCH_3GPLL# LVDS LVDS# 17 18 SRC1 SRC1# SRC2 SRC2# SRC3 SRC3# SRC4 SRC4# SRC5 SRC5# SRC6 SRC6# 19 20 22 23 24 25 26 27 31 30 33 32 CPU2_ITP/SRC7 CPU2_ITP#/SRC7# 36 35 CLK_XDP_CPU1 CLK_XDP_CPU#1 RN16 SRN33-2-U2 CLK_XDP_CPU CLK_XDP_CPU# CPU0 CPU0# CPU1 CPU1# 44 43 41 40 CLK_CPU_BCLK1 CLK_CPU_BCLK#1 CLK_MCH_BCLK1 CLK_MCH_BCLK#1 RN12 SRN33-2-U2 CLK_CPU_BCLK CLK_CPU_BCLK# RN14 SRN33-2-U2 CPU_STOP# FSC/TEST_SEL FSB/TEST_MODE USB48/FSA 54 53 16 12 CFG2 FS_B FS_A CLK_MCH_BCLK CLK_MCH_BCLK# PM_STPCPU# 16,39 VSS_PCI VSS_PCI VDD_SRC VDD_SRC 34 21 51 45 38 13 29 VSS_REF VSS_CPU VSSA VSS48 VSS_SRC VDD_PCI VDD_PCI VDD_REF VDD_CPU VDDA VDD48 VDD_SRC 48 42 37 11 28 CLK_PCIE_PEG1 CLK_PCIE_PEG#1 CLK_PCIE_ICH1 CLK_PCIE_ICH#1 CLK_MCH_3GPLL1 CLK_MCH_3GPLL#1 R164 R182 22R2 22R2 IDTCV125PA EMI capacitor 2 DY R658 Do Not Stuff CLK_ICH14 C691 CLK14_SIO C694 49D9R2F CLK_CPU_BCLK R655 49D9R2F PCLK_FWH C699 R697 49D9R2F CLK_CPU_BCLK# R659 49D9R2F PCLK_PCM C679 CLK_PCIE_ICH R695 49D9R2F CLK_MCH_BCLK R662 49D9R2F PCLK_MINI C688 CLK_PCIE_ICH# R696 49D9R2F CLK_MCH_BCLK# R664 49D9R2F PCLK_KBC C692 FS_A DREFSSCLK# R666 49D9R2F CLK_ICHPCI C690 FS_B DREFSSCLK R663 49D9R2F CLK48_ICH C689 CFG2 FS_B FS_A 0 0 1 1 0 1 0 1 1 1 24 3D3V_APWR_S0 3D3V_48MPWR_S0 R694 FS_C CLK48_ICH 16 CLK48_CARDBUS 3D3V_CLKGEN_S0 CLK_PCIE_PEG# R160 DUMMY-R2 1 DUMMY-R2 R196 46 47 CLK_PCIE_PEG CFG2 R168 R646 Do Not Stuff DUMMY-R2 DUMMY-R2 2 R165 PCI_STOP# RN13 1 ITP_EN SS_SEL 3D3V_CLKGEN_S0 R193 55 R657 10KR2 Hi - Z DY R171 1KR2 PCIF1/SEL100/96# PCIF0/ITP_EN C697 SCD1U16V H R645 10KR2 X OUT (VTT_PWRGD#) H 33R2 33R2 475R2F VTT_PWRGD# SC33P 3D3V_S0 EN (6218_PGOOD) L PCI0 PCI1 PCI2 PCI3 RN11 SRN33-2-U2 22 K IN (3D3V_S0) H H/L : CPU_ITP/SRC7 R634 10KR2 38,39 6218_PGOOD U70 C291 SCD1U16V C303 SCD1U16V C710 SCD1U16V 1 C297 SCD1U16V C687 SCD1U16V C280 SCD1U16V 1 C673 SC10U6D3V5MX 3D3V_CLKGEN_S0 0R3-U C674 SCD1U16V C284 SCD1U16V C696 SC4D7U10V5ZY R633 C294 SCD1U16V 1 0R3-U 3D3V_48MPWR_S0 2 1 C709 SCD1U16V R192 C711 SC4D7U10V5ZY 2 C721 SCD1U16V 0R3-U 1 3D3V_APWR_S0 1 2 3D3V_S0 R698 3D3V_S0 CPU 266M 133M 200M 166M 333M 100M 400M Reserved DREFCLK R656 49D9R2F DREFCLK# R661 49D9R2F CLK_MCH_3GPLL R671 49D9R2F CLK_MCH_3GPLL# R693 49D9R2F CLK_XDP_CPU R667 49D9R2F CLK_XDP_CPU# R669 49D9R2F CLK_PCIE_DOCK1 R668 49D9R2F CLK_PCIE_DOCK1# R670 49D9R2F CLK_PCIE_DOCK2 R672 49D9R2F CLK_PCIE_DOCK2# R692 49D9R2F DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff BOM2(NV44+G) Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Clock Generator - IDT125 Size A3 Document Number Rev SA CANARY2 Date: Thursday, January 13, 2005 Sheet of 55 B C U66A BGA479-SKT-2-U 0R2-0 R629 15 H_INTR 15 H_NMI 15 H_SMI# H_STPCLK_R C6 D1 D4 B4 STPCLK# LINT0 LINT1 SMI# H_DEFER# H_DRDY# H_DBSY# BR0# N4 H_BREQ#0 IERR# INIT# A4 B5 LOCK# J2 R141 56R2J L4 H2 M2 H_INIT# 15 B11 H1 K1 L2 M3 RESET# RS0# RS1# RS2# TRDY# H_LOCK# H_CPURST# H_RS#[2 0] H_RS#0 H_RS#1 H_RS#2 U66B BGA479-SKT-2-U H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_TRDY# K3 K4 HIT# HITM# Place testpoint on H_IERR# with a GND 0.1" away H_IERR# H_HIT# H_HITM# BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# C8 B8 A9 C9 A10 B10 A13 C12 A12 C11 B13 A7 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET# PROCHOT# THERMDA THERMDC B17 B18 A18 CPU_PROCHOT# THERMTRIP# C17 ITP_CLK1 ITP_CLK0 BCLK1 BCLK0 A15 A16 B14 B15 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TPAD28 TP9 TP10 TP8 TP7 TP6 TP5 TP62 TP64 TP63 TP65 TP61 TP66 TPAD28 TP58 H_THERMDA 19 H_THERMDC 19 PM_THRMTRIP-A# R572 0R2-0 CLK_XDP_CPU# CLK_XDP_CPU CLK_CPU_BCLK# CLK_CPU_BCLK H_D#16 H23 H_D#17 G25 H_D#18 L23 H_D#19 M26 H_D#20 H24 H_D#21 F25 H_D#22 G24 H_D#23 J23 H_D#24 M23 H_D#25 J25 H_D#26 L26 H_D#27 N24 H_D#28 M25 H_D#29 H26 H_D#30 N25 H_D#31 K25 H_DSTBN#1 K24 H_DSTBP#1 L24 H_DINV#1 J26 R146 E1 PM_THRMTRIP-I# 15,38 PM_THRMTRIP# should connect to ICH6 and Alviso without T-ing ( No stub) To V-CORE SWITCH R586 CPU_SEL0 1D05V_S0 TP4 A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 C23 C22 D25 0R3-U DUMMY-R2 TPAD28 C16 C14 R487 XDP_TDI 150R2F 1KR2F R605 R607 39D2R3F XDP_TDO R604 54D9R2F H_CPURST# R610 54D9R2F H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2 D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 AE24 AE25 AD20 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3 PSI# BSEL0 BSEL1 TP13 TP11 TP15 TP2 C3 AF7 AC1 E26 TPAD28 TPAD28 TPAD28 TPAD28 GTLREF0 R486 2KR2F AD26 RSVD2 RSVD3 RSVD4 RSVD5 GTLREF0 Layout Note: 0.5" max length 3D3V_S0 150R2F XDP_TCK R603 27D4R2F XDP_TRST# R589 680R3F DPRSTP# DPSLP# DPWR# PWRGOOD SLP# G1 B7 C19 E4 A6 TEST1 TEST2 C5 F23 COMP0 COMP1 COMP2 COMP3 R489 R488 R145 R144 BSEL[1:0] Freq.(MHz) (A Stepping) LL 100 LH 133 H_DSTBN#[3 0] H_DSTBP#[3 0] Layout Note: Comp0, connect with Zo=27.4 ohm, make trace length shorter than 0.5" Comp1, connect with Zo=55 ohm, make trace length shorter than 0.5" 1D05V_S0 1 1 2 2 27D4R2F 54D9R2F 27D4R2F 54D9R2F R147 200R2F H_PWRGD 15,38 H_CPUSLP# 6,15 TEST1 TEST2 DY BSEL[1:0] Freq.(MHz) (B Stepping) LH 100 LL 133 H_DINV#[3 0] H_DPRSLP# 15 H_DPSLP# 15 H_DPWR# XDP_DBRESET# R614 COMP0 COMP1 COMP2 COMP3 P25 P26 AB2 AB1 R33 Do Not Stuff NO STUFF XDP_TMS Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 W25 W24 T24 1 56R2F CPU_PROCHOT# R581 D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# MISC 1D05V_S0 H_D#[63 0] D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# H_STPCLK# A20M# FERR# IGNNE# DEFER# DRDY# DBSY# C2 D3 A3 H_ADS# H_BNR# H_BPRI# 6 H_ADSTB#1 15 H_A20M# 15 H_FERR# 15 H_IGNNE# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB#1 N2 L1 J3 R628 Do Not Stuff NO STUFF AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 AE5 1D05V_S0 ADS# BNR# BPRI# DATA GRP DATA GRP H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 TP14 TPAD28 REQ0# REQ1# REQ2# REQ3# REQ4# E DATA GRP DATA GRP H_REQ#0 R2 H_REQ#1 P3 H_REQ#2 T2 H_REQ#3 P1 H_REQ#4 T1 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB#0 CONTROL H_ADSTB#0 H_REQ#[4 0] P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 U3 ADDR GROUP XTP/ITP SIGNALS H_A#[31 3] HCLK THERM H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 D ADDR GROUP A DY BOM2(NV44+G) Wistron Corporation All place within 2" to CPU 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (1 of 2) Size A3 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 A B C D Sheet E SA of 55 A B C D E VCC_CORE_S0 U66D A2 A5 A8 A11 A14 A17 A20 A23 A26 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 VCC_CORE_S0 U66C BGA479-SKT-2-U VCCQ0 VCCQ1 VID0 VID1 VID2 VID3 VID4 VID5 Place these and dummy 12K7R3F for 1D8V_VCCA_S0 PM_SLP_S3#_ICH 16,34,42 1D05V_S0 DY R472 Do Not Stuff BC8 Do Not Stuff 2 BC9 SC1U10V3ZY H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 DY R492 BC7 SC1U10V3ZY 1D8V_S0 1D5V_VCCA_S0 0R3-U 39 39 39 39 39 39 R454 Do Not Stuff DY 1D5V_VCCA_S0 E2 F2 F3 G3 G4 H4 Do Not Stuff 1D5V_S0 P23 W4 SET OUT DY Do Not Stuff SHDN# GND IN 1 3D3V_S0 R471 DY I max = 120 mA U55 1 R491 DUMMY-R2 0R2-0 D10 CPU_D10 R116 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21 1D5V_VCCA_S0 VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 C31 C30 SC10U10V5ZY F26 B1 N1 AC26 VCCA0 VCCA1 VCCA2 VCCA3 1D5V_VCCA_S0 G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6 SCD01U16V2KX VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 R470 Do Not Stuff DY TC18 Do Not Stuff C167 SCD1U10V2MX-1 C168 SCD1U10V2MX-1 C169 SCD1U10V2MX-1 C114 SCD1U10V2MX-1 C121 SCD1U10V2MX-1 C73 SCD1U10V2MX-1 C74 SCD1U10V2MX-1 C584 SC10U10V5ZY C570 SC10U10V5ZY C571 SC10U10V5ZY C617 SC10U10V5ZY C599 SC10U10V5ZY C594 SC10U10V5ZY C585 SC10U10V5ZY C171 SC10U10V5ZY C85 SC10U10V5ZY C84 SC10U10V5ZY C96 SC10U10V5ZY C103 SC10U10V5ZY C111 SC10U10V5ZY C117 SC10U10V5ZY C145 SCD1U10V2MX-1 C558 SCD1U10V2MX-1 C79 SCD1U10V2MX-1 C76 SCD1U10V2MX-1 C174 SCD1U10V2MX-1 C153 SCD1U10V2MX-1 C557 SCD1U10V2MX-1 C173 SC10U10V5ZY C157 SC10U10V5ZY C70 SC10U10V5ZY C112 SC10U10V5ZY C144 SC10U10V5ZY C100 SC10U10V5ZY C91 SC10U10V5ZY C147 SC10U10V5ZY C593 SC10U10V5ZY C165 SCD1U10V2MX-1 VCC_CORE_S0 C75 SCD1U10V2MX-1 1 VCC_CORE_S0 Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line DY DY VCCSENSE and VSSSENSE lines should be of equal length DY Layout Note: Do Not Stuff Do Not Stuff R139 R136 C98 SCD1U10V2MX-1 TP_VSSSENSE C598 SC10U10V5ZY AF6 C77 SCD1U10V2MX-1 VSSSENSE C616 SC10U10V5ZY TP_VCCSENSE C92 SCD1U10V2MX-1 AE7 C106 SCD1U10V2MX-1 1D05V_S0 VCCSENSE Title CPU (2 of 2) Size A3 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 B 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C DY DY DY DY DY A D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 Wistron Corporation C113 Do Not Stuff C118 Do Not Stuff C108 Do Not Stuff C67 Do Not Stuff 1 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 BOM2(NV44+G) VCC_CORE_S0 C152 Do Not Stuff VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 AA11 AA13 AA15 AA17 AA19 AA21 AA5 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC9 AD10 AD12 AD14 AD16 AD18 AD8 AE11 AE13 AE15 AE17 AE19 AE9 AF10 AF12 AF14 AF16 AF18 AF8 D18 D20 D22 D6 D8 E17 E19 E21 E5 E7 E9 F18 F20 F22 F6 F8 G21 BGA479-SKT-2-U C D Sheet E SA of 55 A B C D E H_XRCOMP R103 U16A 24D9R2F R111 221R3F R107 100R2F H_XSWING SCD1U16V C94 H_YRCOMP R129 24D9R2F 1D05V_S0 R113 54D9R2F H_YSCOMP H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING 1D05V_S0 R114 HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING 1D05V_S0 R591 100R2F H_ADS# H_ADSTB#0 H_ADSTB#1 H_VREF H_BNR# H_BPRI# H_BREQ#0 H_CPURST# R590 200R2F C586 SCD1U16V HCLKINN HCLKINP AB1 AB2 HDBSY# HDEFER# HDINV#0 HDINV#1 HDINV#2 HDINV#3 HDPWR# HDRDY# HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 HEDRDY# HHIT# HHITM# HLOCK# HPCREQ# HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HRS0# HRS1# HRS2# HCPUSLP# HTRDY# C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5 CLK_MCH_BCLK# CLK_MCH_BCLK H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 TP_H_EDRDY# H_DBSY# H_DEFER# H_DINV#[3 0] H_DPWR# H_DRDY# H_DSTBN#[3 0] H_DSTBP#[3 0] 4 TPAD28 TP55 H_HIT# H_HITM# H_LOCK# TP_H_PCREQ# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2 H_CPUSLP#_1 TPAD28 TP3 R612 H_TRDY# H_REQ#[4 0] H_RS#[2 0] 0R2-0 H_CPUSLP# 4,15 DUMMY FOR DOTHAN A STEPPING H_YSWING 221R3F C1 C2 D1 T1 L1 P1 HADS# HADSTB#0 HADSTB#1 HVREF HBNR# HBPRI# HBREQ0# HCPURST# F8 B9 E13 J11 A5 D5 E7 H10 1 1D05V_S0 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_XSCOMP G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13 1 54D9R2F HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# R99 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# 2 1D05V_S0 E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2 H_A#[31 3] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 HOST H_D#[63 0] 71.0GMCH.0XU C119 SCD1U16V R126 100R2F BOM2(NV44+G) Place them near to the chip Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title GMCH (1 of 5) Size A3 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 A B C D Sheet E SA of 55 A B C D E When GM replace to PM SDVOC_CTRLCLK SDVOC_CTRLDATA 53 SDVOC_CTRLCLK 53 SDVOC_CTRLDATA PEG_RXN[15 0] 46 PEG_RXP[15 0] 46 PEG_TXN[15 0] 46 PEG_TXP[15 0] 46 U16B SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 11 M_CLK_DDR#3 11 M_CLK_DDR#4 R621 11,12 11,12 11,12 11,12 M_CS#0 M_CS#1 M_CS#2 M_CS#3 AN16 AM14 AH15 AG16 SM_CS0# SM_CS1# SM_CS2# SM_CS3# AF22 AF16 SM_OCDCOMP0 SM_OCDCOMP1 AP14 AL15 AM11 AN10 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3 AK10 AK11 AF37 AD1 AE27 AE28 AF9 AF10 SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT 2 M_ODT0 M_ODT1 M_ODT2 M_ODT3 M_RCOMPN M_RCOMPP C207 BC4 SMXSLEW SMYSLEW SCD1U16V SC2D2U6D3V3MX-1 SCD1U16V SC2D2U6D3V3MX-1 DDR_VREF MUXING M_CKE0 M_CKE1 M_CKE2 M_CKE3 R620 11,12 11,12 40D2R2F 11,12 11,12 40D2R2F DDR BM_BUSY# EXT_TS0# EXT_TS1# THRMTRIP# PWROK RSTIN# DREF_CLKN DREF_CLKP DREF_SSCLKN DREF_SSCLKP NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 R37 1KR2 R540 10KR2 CFG[2:0] Freq.(MHz) 101 400 001 533 FWH_INIT_Q For B stepping CPU_SEL0 DY Q4 Do Not Stuff 1 R25 Do Not Stuff 4K7R2 M_RCOMPP R50 R53 DUMMY-R2 M_RCOMPN 2 Q3 CHT2222A CFG1 CFG0 R627 80D6R2F CFG2 0ohms LBKLT_CRTL 30 GMCH_BL_ON TP54 TP57 TP56 E25 F25 C23 C22 F23 F22 F26 C33 L_LVBG C31 L_VREFH F28 L_VREFL F27 LCTLA_CLK LCTLB_DATA LDDC_NB_CLK LDDC_NB_DATA PLT_RST1# 16,18,30,31,33,34,46 13 GMCH_LCDVDD_ON DUMMY-R2 LIBG TPAD28 TPAD28 TPAD28 13 GMCH_TXACLK13 GMCH_TXACLK+ B30 B29 C25 C24 LACLKN LACLKP LBCLKN LBCLKP 13 GMCH_TXAOUT013 GMCH_TXAOUT113 GMCH_TXAOUT2- B34 B33 B32 LADATAN0 LADATAN1 LADATAN2 13 GMCH_TXAOUT0+ 13 GMCH_TXAOUT1+ 13 GMCH_TXAOUT2+ A34 A33 B31 LADATAP0 LADATAP1 LADATAP2 DUMMY-R2 DUMMY-R2 CFG20 CFG19 R518 DUMMY-R2 CFG3 C29 D28 C27 R512 DUMMY-R2 CFG4 LBDATAN0 LBDATAN1 LBDATAN2 R510 DUMMY-R2 CFG5 C28 D27 C26 LBDATAP0 LBDATAP1 LBDATAP2 2K2R2 CFG6 R520 DUMMY-R2 CFG7 R519 DUMMY-R2 CFG8 LCTLA_CLK R526 Do Not Stuff R517 DUMMY-R2 CFG9 LCTLB_DATA R544 Do Not Stuff R516 DUMMY-R2 CFG10 LDDC_NB_CLK R543 2K2R2 R514 DUMMY-R2 CFG11 LDDC_NB_DATA R542 2K2R2 R511 DUMMY-R2 CFG12 R506 DUMMY-R2 CFG13 GMCH_BL_ON R553 100KR2 R515 DUMMY-R2 CFG14 LBKLT_CRTL R550 100KR2 R509 DUMMY-R2 CFG15 LIBG R564 1K5R2F R508 DUMMY-R2 CFG16 R507 DUMMY-R2 CFG17 2D5V_S0 DY DY When Low choice lower than 3.5K Ohm For A stepping DY LBKLT_CRTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL CFG18 R525 1 DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET DUMMY R523 R513 R29 330R2 CFG2 R630 80D6R2F R524 PM_EXTTS#1 R51 1D8V_S3 R52 1KR2 10KR2 R541 DUMMY When High 1K Ohm PM_EXTTS#0 DUMMY-R2 2 2D5V_S0 1D05V_S0 2D5V_S0 2D5V_S0 AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37 3D3V_S0 14 GMCH_DDCCLK 14 GMCH_DDCDATA R59 34 GMCH_BLUE 0R2-0 R57 34 GMCH_GREEN 0R2-0 NV44 R58 34 GMCH_RED R35 0R2-0 0R2-0 UMA VSYNC R539 Do Not Stuff 14 GMCH_VSYNC UMA HSYNC R538 Do Not Stuff 14 GMCH_HSYNC R34 UMA CRTIREF R601 Do Not Stuff Do Not Stuff R602 NV44 R562 UMA 0R2-0 R561 0R2-0 1D05V_NB_S0 NV44 Do Not Stuff UMA J23 PM_BMBUSY# 16 J21 PM_EXTTS#0 H22 PM_EXTTS#1 F5 PM_THRMTRIP-A# AD30 VGATE_PWRGD 16,38 AE29 PLT_RST1#_GMCH R626 100R2 A24 DREFCLK# A23 DREFCLK C37 DREFSSCLK# D37 DREFSSCLK 71.0GMCH.0XU C214 BC3 R622 10KR2 11,12 11,12 11,12 11,12 M_OCDCOMP0 M_OCDCOMP1 0ohms DUMMY VGATE_PWRGD E24 E23 E21 D21 C20 B20 A19 B19 H21 G21 J20 0ohms 0ohms 1D05V_NB_S0 AP21 AM21 AH21 AK21 1 Layout Note: Route as short as possible R600 0R2-0 MISC SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5# 11 M_CLK_DDR#0 11 M_CLK_DDR#1 0ohms HSYNC R56 0R2-0 TV AN33 AK1 AE10 AJ33 AF5 AD10 11 M_CLK_DDR3 11 M_CLK_DDR4 0R2-0 NV44 R55 0R2-0 TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC VGA SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5 R573 R54 0R2-0 A15 C16 A17 J18 B15 B16 B17 PCI-EXPRESS GRAPHICS AM33 AL1 AE11 AJ34 AF6 AC10 11 M_CLK_DDR0 11 M_CLK_DDR1 VSYNC SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP LVDS DMITXP0 DMITXP1 DMITXP2 DMITXP3 0R2-0 NV44 Y33 AA37 AB33 AC37 R585 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 1 DMITXN0 DMITXN1 DMITXN2 DMITXN3 34 GMCH_TV_COMP 34 GMCH_TV_LUMA 34 GMCH_TV_CRMA AA33 AB37 AC33 AD37 CLK_MCH_3GPLL# CLK_MCH_3GPLL DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 SDVOC_CTRLDATA H24 SDVOC_CTRLCLK H25 AB29 AC29 TP59 TPAD28 TP60 TPAD28 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3 U16G 16 16 16 16 Y31 AA35 AB31 AC35 Alviso will provide SDVO_CTRLCLK and CTRLDATA pulldowns on-die CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 CFG/RSVD 16 16 16 16 DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3 DMI DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 AA31 AB35 AC31 AD35 PM 16 16 16 16 1D5V_PCIE_S0 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 CLK DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 NC 16 16 16 16 R635 R632 SDVOB_INTP1 C318 SDVOB_STALLP1 C315 UMA Do Not Stuff Do Not Stuff UMA PEG_RXN1 Do Not Stuff UMA PEG_RXN2 Do Not Stuff UMA R637 R631 SDVOB_INTN1 C317 SDVOB_STALLN1 C314 UMA Do Not Stuff Do Not Stuff UMA 24D9R2F R571 D36 D34 EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15 E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 EXP_RXP0 EXP_RXP1 EXP_RXP2 EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15 D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34 PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 EXP_TXN0 EXP_TXN1 EXP_TXN2 EXP_TXN3 EXP_TXN4 EXP_TXN5 EXP_TXN6 EXP_TXN7 EXP_TXN8 EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15 E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36 SDVOB_RN_1 SDVOB_GN_1 SDVOB_BN_1 SDVOB_CLKN_1 TXN4 TXN5 TXN6 TXN7 TXN8 TXN9 TXN10 TXN11 TXN12 TXN13 TXN14 TXN15 C574 C93 C573 C99 C587 C107 C597 C115 C610 C120 C618 C146 C623 C154 C631 C172 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V NV44PEG_TXN0 NV44PEG_TXN1 NV44PEG_TXN2 NV44PEG_TXN3 NV44PEG_TXN4 NV44PEG_TXN5 NV44PEG_TXN6 NV44PEG_TXN7 NV44PEG_TXN8 NV44PEG_TXN9 NV44PEG_TXN10 NV44PEG_TXN11 NV44PEG_TXN12 NV44PEG_TXN13 NV44PEG_TXN14 NV44PEG_TXN15 EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15 D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36 SDVOB_RP_1 SDVOB_GP_1 SDVOB_BP_1 SDVOB_CLKP_1 TXP4 TXP5 TXP6 TXP7 TXP8 TXP9 TXP10 TXP11 TXP12 TXP13 TXP14 TXP15 C565 C87 C564 C97 C581 C101 C592 C109 C600 C116 C609 C136 C625 C148 C632 C166 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V NV44PEG_TXP0 NV44PEG_TXP1 NV44PEG_TXP2 NV44PEG_TXP3 NV44PEG_TXP4 NV44PEG_TXP5 NV44PEG_TXP6 NV44PEG_TXP7 NV44PEG_TXP8 NV44PEG_TXP9 NV44PEG_TXP10 NV44PEG_TXP11 NV44PEG_TXP12 NV44PEG_TXP13 NV44PEG_TXP14 NV44PEG_TXP15 71.0GMCH.0XU PEG_RXP1 Do Not Stuff UMA PEG_RXP2 Do Not Stuff UMA PEG_COMP PEG_COMP EXP_COMPI EXP_ICOMPO Lane Reversal enable SDVOB_RN_1 SDVOB_GN_1 SDVOB_BN_1 SDVOB_CLKN_1 C142 C561 C104 C572 1 1 2 2 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff UMA UMA UMA UMA SDVOB_RP_1 SDVOB_GP_1 SDVOB_BP_1 SDVOB_CLKP_1 C143 C559 C105 C563 1 1 2 2 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff UMA UMA UMA UMA SDVOB_RN 53 SDVOB_GN 53 SDVOB_BN 53 SDVOB_CLKN 53 SDVOB_RP 53 SDVOB_GP 53 SDVOB_BP 53 SDVOB_CLKP 53 BOM2(NV44+G) SDVOB_INTP 53 SDVOB_STALLP 53 SDVOB_INTN 53 SDVOB_STALLN 53 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title GMCH (2 of 5) Place near C916,C917,C896,C897 Size Custom Place near U104 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 A B C D Sheet E SA of 55 A B C D E 4 AG35 AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5 SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63 U16D SA_BS0# SA_BS1# SA_BS2# AK15 AK16 AL21 SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE# AN15 AP16 AF29 AF28 AP15 SA_RCVENIN# SA_RCVENOUT# DDR SYSTEM MEMORY A M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 11 M_B_DQ[63 0] M_A_BS#0 11,12 M_A_BS#1 11,12 M_A_BS#2 11,12 M_A_DM[7 0] 11 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_A_DQS[7 0] 11 M_A_DQS#[7 0] 11 M_A_A[13 0] 11,12 M_A_CAS# 11,12 M_A_RAS# 11,12 TP67 TPAD28 TP69 TPAD28 M_A_WE# 11,12 Place Test PAD Near to Chip as could as possible 71.0GMCH.0XU AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5 SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63 SB_BS0# SB_BS1# SB_BS2# AJ15 AG17 AG21 SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7 AF32 AK34 AK27 AK24 AJ10 AK5 AE7 AB7 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 AF34 AK32 AJ28 AK23 AM10 AH6 AF8 AB4 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7# AF35 AK33 AK28 AJ23 AL10 AH7 AF7 AB5 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE# AH14 AK14 AF15 AF14 AH16 SB_RCVENIN# SB_RCVENOUT# DDR SYSTEM MEMORY B U16C 11 M_A_DQ[63 0] M_B_BS#0 11,12 M_B_BS#1 11,12 M_B_BS#2 11,12 M_B_DM[7 0] 11 M_B_DQS[7 0] 11 M_B_DQS#[7 0] 11 M_B_A[13 0] 11,12 TP70 TP68 M_B_CAS# 11,12 M_B_RAS# 11,12 TPAD28 TPAD28 M_B_WE# 11,12 Place Test PAD Near to Chip ascould as possible 71.0GMCH.0XU BOM2(NV44+G) 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title GMCH (3 of 5) Size A3 Document Number Rev CANARY2 Date: Thursday, January 13, 2005 A B C D Sheet E SA of 55 200MHZ/DDR2 -400/533 320MHZ/DDR2 -400/533 YES NO A R143 1 YES YES YES B L8 IND-D1UH 0R5J-1 L9 IND-D1UH L10 IND-D1UH C47 SC10U10V5ZY C176 SC10U10V5ZY C200 SC10U10V5ZY 1D5V_HMPLL_S0 1D5V_DPLLA_S0 1D5V_DPLLB_S0 C55 SCD1U10V2MX-1 1D5V_HPLL_S0 C170 SCD1U10V2MX-1 C 0R2-0 NV44 C53 SCD1U10V2MX-1 R521 1 Do Not Stuff UMA Layout Notes: VSSA_CRTDAC Route caps within 250mil of Alviso Route FB within 3" of Alviso ohms R30 DY 2D5V_CRTDAC_S0 Do Not Stuff R31 C533 SCD1U10V2MX-1 D 1D05V_NB_S0 2D5V_S0 0R3-U C562 SCD1U10V2MX-1 C49 SCD47U10V3ZY R493 D29 Route VSSA_CRTDAC gnd from GMCH to decoupling cap ground lead and then connect to the gnd plane 1D5V_S0 1KR2 Size A3 C71 DUMMY SC4D7U10V5ZY C621 C208 SCD1U10V2MX-1 VCCP_GMCH_CAP4 2D5V_TXLVDS_S0 SCD1U10V2MX-1 F37 G37 C216 SCD1U10V2MX-1 VCCA_3GBG VSSA_3GBG C644 SC10U10V5ZY C229 SCD1U10V2MX-1 VCCP_GMCH_CAP2 VCCP_GMCH_CAP3 C28 SC4D7U10V5ZY 2D5V_TXLVDS_S0 C650 SCD1U10V2MX-1 1 SSM5818SL 1D05V_S0 C595 1D5V_MPLL_S0 Date: Thursday, January 13, 2005 C195 SC10U10V5ZY C187 SC10U10V5ZY 1 2 R638 SCD22U16V3ZY R588 C46 SC10U10V5ZY 2 C180 SC10U10V5ZY 2D5V_S0 SCD22U16V3ZY 1D05V_NB_S0 C549 SCD01U16V2KX Y29 Y28 Y27 C254 R93 VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2 SCD1U10V2MX-1 C649 SCD1U10V2MX-1 C232 SCD1U10V2MX-1 C255 Note: All VCCSM pins shorted internally 3D3V_TVDACA_S0 SCD47U10V3ZY C239 SCD1U10V2MX-1 VCCP_GMCH_CAP1 R23 Note: All VCCSM pins shorted internally 0R3-U C24 SCD1U10V2MX-1 AE37 W37 U37 R37 N37 L37 J37 2D5V_ALVDS_S0 VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 C44 SC10U10V5ZY AF20 AP19 AF19 AF18 VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3 2D5V_S0 VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2 C553 B28 A28 A27 SCD1U10V2MX-1 2D5V_S0 C54 SCD1U10V2MX-1 1 0R3-U 0R3-U 1 1 0R3-U R533 D C604 SCD1U10V2MX-1 2 2 VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51 C546 0R2-0 VCC_SYNC Do Not UMA Stuff K13 J13 K12 W11 V11 U11 T11 R11 P11 N11 M11 L11 K11 W10 V10 U10 T10 R10 P10 N10 M10 K10 J10 Y9 W9 U9 R9 P9 N9 M9 L9 J9 N8 M8 N7 M7 N6 M6 A6 N5 M5 N4 M4 N3 M3 N2 M2 B2 V1 N1 M1 G1 C SC2D2U6D3V3MX-1 C45 SC10U10V5ZY 1D5V_S0 IND-D1UH 1D5V_S0 1D5V_S0 L7 2 H20 2D5V_TVDAC_S0 GMCH_VCC_SYNC C52 SCD1U10V2MX-1 R534 VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC When GM replace to PM R535 Do Not Stuff UMA F19 E19 G19 3D3V_S0 VCCH_MPLL1 VCCH_MPLL0 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL 3D3V_ATVBG_S0 DUMMY AC2 AC1 B23 C35 AA1 AA2 C544 0R2-0 C545 0R2-0 3D3V_TVDACC_S0 C543 0R2-0 R547 R548 3D3V_TVDACB_S0 1D5V_QTVDAC_S0 1 3D3V_S0 1D5V_DLVDS_S0 1D8V_S3 V1.8_DDR_CAP1 AM37 V1.8_DDR_CAP2 AH37 AP29 V1.8_DDR_CAP5 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 C680 AE20 SC10U10V5ZY AE19 AE18 AE17 AE16 AE15 C681 AE14 SC10U10V5ZY AP13 AN13 AM13 AL13 AK13 C682 AJ13 SC10U10V5ZY AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 V1.8_DDR_CAP6 V1.8_DDR_CAP4 AM1 V1.8_DDR_CAP3 AE1 R545 VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64 2D5V_ALVDS_S0 DY B22 B21 A21 A35 B26 B25 A25 ohms VCCHV0 VCCHV1 VCCHV2 VCCA_LVDS VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 R546 C547 0R2-0 2 UMA Do Not Stuff D19 H17 H18 G18 B 2 C626 SCD1U10V2MX-1 VCCD_TVDAC VCCDQ_TVDAC VCCA_TVBG VSSA_TVBG C542 Do Not Stuff C629 SCD1U10V2MX-1 1D5V_TVDAC_S0 1D5V Route ASSATVBG gnd from GMCH to decoupling cap groung lead and then connect to the gnd plane C596 SCD1U10V2MX-1 F17 E17 D18 C18 F18 E18 C548 SC10U10V5ZY VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 1 1D5V_S0 YES 200MHZ/DDR333 1D05V VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC 1D05_S0 for low speed graphic clock.1D5V_S0 for high speed clock.default use 1D05V_S0 T29 R29 N29 M29 K29 J29 V28 U28 T28 R28 P28 N28 M28 L28 K28 J28 H28 G28 V27 U27 T27 R27 P27 N27 M27 L27 K27 J27 H27 K26 H26 K25 J25 K24 K23 K22 K21 W20 U20 T20 K20 V19 U19 K19 W18 V18 T18 K18 K17 DUMMY ohms Graphic Freq /Memory Freq C541 0R2-0 2 Do Not Stuff UMA Do Not Stuff UMA Do Not Stuff UMA D30 C627 SCD1U10V2MX-1 1 2 1 Do Not Stuff UMA C582 SC10U10V5ZY 2 2 1 Do Not Stuff UMA 2 1 C630 SC10U10V5ZY DUMMY 1 R537 C608 SC10U10V5ZY POWER A 1D5V_DLVDS_S0 E R46 1D5V_DDRDLL_S0 1D5V_S0 0R3-U C676 SC100U6D3V0MX-1 1D5V_PCIE_S0 R138 1 Sheet E 1D5V_S0 0R3-U 1D5V_3GPLL_S0 R625 1D5V_S0 0R3-U 2D5V_3GBG_S0 R565 0R3-U C551 SCD1U10V2MX-1 2D5V_S0 Document Number of U16E 71.0GMCH.0XU Route ASSA3GBG gnd from GMCH to decoupling cap groung lead and then connect to the gnd plane 2 C102 C622 BOM2(NV44+G) Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title GMCH (4 of 5) CANARY2 Rev 55 SA A 71.0GMCH.0XU B C641 SCD1U16V SCD1U10V2MX-1 C658 L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25 V25 W25 L26 M26 N26 P26 R26 T26 U26 V26 W26 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 C665 VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70 VCC_NTTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11 VCC_NCTF10 VCC_NCTF9 VCC_NCTF8 VCC_NCTF7 VCC_NCTF6 VCC_NCTF5 VCC_NCTF4 VCC_NCTF3 VCC_NCTF2 VCC_NCTF1 VCC_NCTF0 SCD1U10V2MX-1 C639 VSS_NCTF68 VSS_NCTF67 VSS_NCTF66 VSS_NCTF65 VSS_NCTF64 VSS_NCTF63 VSS_NCTF62 VSS_NCTF61 VSS_NCTF60 VSS_NCTF59 VSS_NCTF58 VSS_NCTF57 VSS_NCTF56 VSS_NCTF55 VSS_NCTF54 VSS_NCTF53 VSS_NCTF52 VSS_NCTF51 VSS_NCTF50 VSS_NCTF49 VSS_NCTF48 VSS_NCTF47 VSS_NCTF46 VSS_NCTF45 VSS_NCTF44 VSS_NCTF43 VSS_NCTF42 VSS_NCTF41 VSS_NCTF40 VSS_NCTF39 VSS_NCTF38 VSS_NCTF37 VSS_NCTF36 VSS_NCTF35 VSS_NCTF34 VSS_NCTF33 VSS_NCTF32 VSS_NCTF31 VSS_NCTF30 VSS_NCTF29 VSS_NCTF28 VSS_NCTF27 VSS_NCTF26 VSS_NCTF25 VSS_NCTF24 VSS_NCTF23 VSS_NCTF22 VSS_NCTF21 VSS_NCTF20 VSS_NCTF19 VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS_NCTF15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF11 VSS_NCTF10 VSS_NCTF9 VSS_NCTF8 VSS_NCTF7 VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VSS_NCTF0 U16H C640 Y12 AA12 Y13 AA13 L14 M14 N14 P14 R14 T14 U14 V14 W14 Y14 AA14 AB14 L15 M15 N15 P15 R15 T15 U15 V15 W15 Y15 AA15 AB15 L16 M16 N16 P16 R16 T16 U16 V16 W16 Y16 AA16 AB16 R17 Y17 AA17 AB17 AA18 AB18 AA19 AB19 AA20 AB20 R21 Y21 AA21 AB21 Y22 AA22 AB22 Y23 AA23 AB23 Y24 AA24 AB24 Y25 AA25 AB25 Y26 AA26 AB26 VTT_NCTF17 VTT_NCTF16 VTT_NCTF15 VTT_NCTF14 VTT_NCTF13 VTT_NCTF12 VTT_NCTF11 VTT_NCTF10 VTT_NCTF9 VTT_NCTF8 VTT_NCTF7 VTT_NCTF6 VTT_NCTF5 VTT_NCTF4 VTT_NCTF3 VTT_NCTF2 VTT_NCTF1 VTT_NCTF0 SC10U10V5ZY C683 L12 M12 N12 P12 R12 T12 U12 V12 W12 L13 M13 N13 P13 R13 T13 U13 V13 W13 AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26 C635 SCD1U16V C655 SCD1U16V C645 SCD1U16V 71.0GMCH.0XU VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10 VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0 VSS267 VSS266 VSS265 VSS264 VSS263 VSS262 VSS261 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10 VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0 VSS271 VSS270 VSS269 VSS268 VSS260 VSS259 VSS258 VSS257 VSS256 VSS255 VSS254 VSS253 VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196 VSS195 VSS194 VSS193 VSS192 VSS191 VSS190 VSS189 VSS188 VSS187 VSS186 VSS185 VSS184 VSS183 VSS182 VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS175 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169 VSS168 VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSSALVDS U16F Y1 D2 G2 J2 L2 P2 T2 V2 AD2 AE2 AH2 AL2 AN2 A3 C3 AA3 AB3 AC3 AJ3 C4 H4 L4 P4 U4 Y4 AF4 AN4 E5 W5 AL5 AP5 B6 J6 L6 P6 T6 AA6 AC6 AE6 AJ6 G7 V7 AA7 AG7 AK7 AN7 C8 E8 L8 P8 Y8 AL8 A9 H9 K9 T9 V9 AA9 AC9 AE9 AH9 AN9 D10 L10 Y10 AA10 F11 H11 Y11 AA11 AF11 AG11 AJ11 AL11 AN11 B12 D12 J12 A14 B14 F14 J14 K14 AG14 AJ14 AL14 AN14 C15 K15 A16 D16 H16 K16 AL16 C17 G17 AF17 AJ17 AN17 A18 B18 U18 AL18 C19 H19 J19 T19 W19 AG19 AN19 A20 D20 E20 F20 G20 V20 AK20 C21 F21 AF21 AN21 A22 D22 E22 J22 AH22 AL22 H23 AF23 B24 D24 F24 J24 AG24 AJ24 B36 AL24 AN24 A26 E26 G26 J26 B27 E27 G27 W27 AA27 AB27 AF27 AG27 AJ27 AL27 AN27 E28 W28 AA28 AB28 AC28 A29 D29 E29 F29 G29 H29 L29 P29 U29 V29 W29 AA29 AD29 AG29 AJ29 AM29 C30 Y30 AA30 AB30 AC30 AE30 AP30 D31 E31 F31 G31 H31 J31 K31 L31 M31 N31 P31 R31 T31 U31 V31 W31 AD31 AG31 AL31 A32 C32 Y32 AA32 AB32 AC32 AD32 AJ32 AN32 D33 E33 F33 G33 H33 J33 K33 L33 M33 N33 P33 R33 T33 U33 V33 W33 AD33 AF33 AL33 C34 AA34 AB34 AC34 AD34 AH34 AN34 B35 D35 E35 F35 G35 H35 J35 K35 L35 M35 N35 P35 R35 T35 U35 V35 W35 Y35 AE35 C36 AA36 AB36 AC36 AD36 AE36 AF36 AJ36 AL36 AN36 E37 H37 K37 M37 P37 T37 V37 Y37 AG37 A B C C D D E VSS Size A3 Date: Thursday, January 13, 2005 Sheet E 10 1D8V_S3 Place these Hi-Freq decoupling caps near GMCH C636 1D05V_NB_S0 NCTF 1D05V_S0 BOM2(NV44+G) Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Document Number GMCH (5 of 5) CANARY2 of Rev 55 SA A B C D E TI TPS5130 for 5V, 3.3V, 1.5V and 2.5V(LDO) 5V_PWR 5V_S5 G77 (3D3V=>CH1 , 5V=>CH2 , 2D5V =>CH3) GAP-OPEN-PWR G79 DCBATOUT_5130 U41 Aux Power GAP-OPEN-PWR G80 C455 SC10U35V0ZY-U C464 Do Not Stuff GAP-OPEN-PWR G78 C460 SC10U35V0ZY-U 78.10699.4A1 G S S S C925 GAP-OPEN-PWR G69 GAP-OPEN-PWR G70 5V_AUX_S5 I max = 120 mA AO4422 84.04422.037 2.8A(rms) @ 10KHz SET OUT G913C-U BC17 SC1U10V3ZY G S S S 1 SHDN# GND IN R1 G66 R896 22KR3F BC16 SC1U10V3ZY R2 Vout = 1.25*(1+ R1/R2) GAP-OPEN-PWR G64 5V/6A OCP>7.8A 2 GAP-OPEN-PWR G65 5V_PWR L28 5130_OUT2U 5130_LL2 R897 36K5R3F BC15 SC22P50V2JN-1 2 B 3D3V_S5 GAP-OPEN-PWR U47 C465 SC10U35V0ZY-U 78.10699.4A1 C476 Do Not Stuff 3D3V_PWR U90 DY GAP-OPEN-PWR G68 DCBATOUT_5130 3D3V_AUX_S5 5130_OUT1D GAP-OPEN-PWR G72 LP2951ACM SB:ST220U6D3VDM-6 NEC,NT$:8.58 ESR=55mohm Iripple=1.65A 7.3/4.3/2.8 B G71 C933 SC1U50V5ZY *Layout* 15 mil TC20 ST220U6D3VDM-4 S S S G C900 DUMMY-C3 D D D D AO4406 40 5130_OUT2U 40 5130_LL2 OUT INPUT SENSE FB SD 5V/TAP 100mA GND ERROR 1 C935 SCD1U16V Canary2_SA:For Power Team change Capacitance Vendor D D D D U42 3D3V/5A OCP>6.5A 2 SC10U10V5ZY U91 3D3V_PWR L27 5130_OUT1U 5130_LL1 IND-6D8UH-23 40 5130_OUT1D GAP-OPEN-PWR Do Not Stuff 40 5130_OUT1U 40 5130_LL1 DCBATOUT C927 2.8A(rms) @ 10KHz A GAP-OPEN-PWR G81 DY 5V_AUX_S5 AO4422 84.04422.037 D D D D DY A GAP-OPEN-PWR G63 1D5V_PWR IND-6D8UH-23 1D5V_S0 AO4406 84.04406.037 D D D D GAP-OPEN-PWR U48 TC22 ST220U6D3VDM-4 S S S G C932 SCD1U Canary2_SA:For Power Team change Capacitance Vendor C C 5130_OUT2D DCBATOUT_5130 3D3V_PWR 40 5130_OUT2D SB:ST220U6D3VDM-6 NEC,NT$:8.58 ESR=55mohm Iripple=1.65A 7.3/4.3/2.8 C910 G76 3D3V_PWR AO4422 84.04422.037 40 5130_LDOCUR 5130_LDOCUR C438 SC10U35V0ZY-U 78.10699.4A1 D015R2010 U85 AO4422 2.8A(rms) @ 10KHz OCP Sense Resistor (1/2W) GAP-OPEN-PWR G74 C904 SC10U10V5ZY (40mV/12mOhm=3.5A) L25 5130_OUT3U 5130_LL3 1D5V/6A OCP>7.8A 40 5130_LDOGATE C871 DUMMY-C3 Rds(on)=33mOhm TC19 ST220U4VDM-10 Canary2_SA:For Power Team change Capacitance Vendor 5130_OUT3D C912 SCD1U TC21 ST100U6D3VBM-3 BOM2(NV44+G) Canary2_SA:For Power Team change Capacitance Vendor 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title TI TPS5130 5V/3.3V/1.5V,2.5(LDO) Size A3 Document Number Date: Friday, January 14, 2005 A B C D D Wistron Corporation ESR=45mOhm Iripple=1.1A SB:ST220U4VDM-6 SANYO,NT$:8.* ESR=25mohm Iripple=2.4A 7.3/4.3/1.8 S S S G 40 5130_OUT3D 84.04406.037 2D5V/3A OCP=3.5A AO4406 U39 D D D D D 2D5V_PWR 5130_LDOGATE IND-4D7UH-25 2D5V_S0 40 5130_OUT3U 40 5130_LL3 GAP-OPEN-PWR G73 GAP-OPEN-PWR G S S S G S S S 2D5V_PWR 1D5V_PWR GAP-OPEN-PWR G75 R882 2 U38 C437 SC10U35V0ZY-U D D D D D D D D C441 SCD1U 1 DUMMY-C3 Rev CANARY2 Sheet E SA 41 of 55 A B C D E DCBATOUT_5236 5V_S5 U33 2 R309 SCD1U BAW56-1 GAP-OPEN-PWR R310 10R3 GAP-OPEN-PWR R347 G26 IND-4D7UH-25 BOOT1 DY 6227_PG1 Do Not Stuff 15 PG1 ISL6227 5,16,34 PM_SLP_S3#_ICH R752 13 6227_EN2 21 6227_SS217 0R2-0 6227_PG2 0R2-0 16 PH 3D3V_S0 at P.42 6227_BOOT2 UGATE2 PHASE2 24 25 6227_HDRV2 6227_SW2 LGATE2 PGND2 ISEN2 VSEN2 OCSET2 27 26 22 19 18 6227_LDRV2 G29 G30 Do Not Stuff GAP-OPEN-PWR 6227_ISNS1 2KR3F R804 6227_VSEN1 DCBATOUT_5236 PG2/REF GND VOUT2 GAP-OPEN-PWR 23 C822 6227_ISNS2 6227_VSEN2 6227_ILIM2 R746 2KR3F C823 1D05V_S0 1D05V_PWR G25 DY DY U31 1D05V / 4A ,OCP>5.5A C416 Do Not Stuff AO4422 G20 G S S S U74 ISL6227CA R745 140KR3F 1 2 C764 L21 G19 C409 0R5J-1 78.10610.511 0D9V_PWR VIN VREF VCNTL GND GND VOUT NC NC NC GAP-OPEN-PWR 1 GAP-CLOSE-PWR G24 PM_SLP_S3# DY Do Not Stuff GAP-CLOSE-PWR PM_SLP_S3# 16,18,30,36,40 G23 1 2 R308 10KR3F GAP-OPEN-PWR G59 GAP-OPEN-PWR BOM2(NV44+G) G60 1 Wistron Corporation GAP-OPEN-PWR APL5331KAC-TR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C G61 TC12 SE47U6D3VDM Title GAP-OPEN-PWR 1D8V / 1D05V Size A3 Document Number Date: Friday, January 14, 2005 A B GAP-OPEN-PWR G58 GAP-CLOSE-PWR C393 SCD1U16V G17 C390 R314 R311 1KR2F 2 5V_S0 SC1U10V3ZY 1 APL5331_VREF GAP-CLOSE-PWR G21 2 U30 GAP-OPEN-PWR G22 DY R304 0R2-0 G57 R340 2 C408 DUMMY-R2 SC10U6D3V5MX Do Not Stuff 1 DY C397 1D5V_S0 R332 G18 TC13 1K74R3F G S S S 1D05V_NB_S0 R307 Do Not Stuff 1D05V_S0 R305 Do Not Stuff AO4422 DDR_VREF 1 D D D D DY SE150U2D5VDM C765 U32 GAP-OPEN-PWR SCD01U16V2KX 0D9V R297 1KR2F IND-4D7UH-25 1D8V_S3 GAP-OPEN-PWR 1 R801 SCD01U16V2KX 133KR3F SCD01U16V2KX C832 GAP-OPEN-PWR 20 BOOT2 G28 DY Canary2_SA:For Power Team change Capacitance Vendor Do Not Stuff R751 6227_LDRV1 SC10U35V0ZY-U CPUCORE_ON DDR EN2 SOFT2 10 C807 GAP-OPEN-PWR R750 39,40,45,50 CPUCORE_ON LGATE1 PGND1 ISEN1 VOUT1 VSEN1 R336 OCSET1 EN1 SOFT1 DY 11 12 6227_HDRV1 6227_SW1 2 0R2-0 GAP-OPEN-PWR PM_SLP_S4# UGATE1 PHASE1 10KR3F 316,30,34,36 6227_ILIM1 6227_EN1 6227_SS1 R335 D D D D R803 TC15 6227_BOOT1 VCC 1 2 14 VIN 28 10KR3F 2 0R2-0 1 2 5236_VCC R802 AO4406 R346 Do Not Stuff C818 SCD1U S S S G GAP-OPEN-PWR U29 G27 ST220U4VDM-10 C778 SCD01U16V2KX C786 G41 D D D D SCD1U16V GAP-OPEN-PWR GAP-OPEN-PWR C833 SC4D7U10V5ZY 1D8V_S3 L24 0R3-U DCBATOUT_5236 G40 1D8V_PWR 1 G39 1D8V / 6A ,OCP>7.8A 0R3-U 5V_S5 AO4422 G S S S G38 SCD1U C414 16227_BOOT_1 D D D D D11 C402 SCD1U 2 DY C819 GAP-OPEN-PWR C396 6227_BOOT_2 C802 G37 Do Not Stuff DCBATOUT SC10U35V0ZY-U DCBATOUT_5236 C D Rev CANARY2 Sheet E 42 SA of 55 A B C D E MAX1773_PDS 44 AD+ DCBATOUT R455 AD+_TO_SYS 2 C527 SC1U50V5ZY G51 GAP-CLOSE G52 GAP-CLOSE DCBATOUT C470 CHG_PWR-2 ACOK 19 PGND 29 CSIP 18 8725_CSIP CSIN BATT GND 17 16 15 8725_CSIN MAX1909_CCV MAX1909_CCI MAX1909_CCS 13 12 14 C457 C449 1 2 G43 GAP-CLOSE G S S S G42 GAP-CLOSE PGND Do Not Stuff 20 DLO D14 DY MAX1909_DLO C89412/28:Add by power team PKPRES R397 10KR2F-U C443 SCD1U REF V_REF :4.2235V (=2.8V = Cell V( MODE ) = 1.8V = Cell MAX1909_VCTL 11 MAX1909_ICTL 10 MAX1909_MODE PDS SRC DCIN C16 SC10U25V0KX CELL_3S/4S# 1CHG_I_BATB D When V(ICTL)VCELL=VBAT/CELL =VREF+(VVCTL-1.8) /9.52 =4.1998V AD+_TO_SYS SCD1U50V3KX D18 CH521S-30 MAX1909_CSSN CHG_I_BATB 30 SCD1U50V3KX CHARGE_ON# 30 CHG_I_BATB MAX1909_CSSP C471 AD+ CELL_3S/4S# 30 CHARGE_ON# AC_IN Threshold 2.089V Max AC_IN > 2.089V > AC DETECT CELL_3S/4S# Do Not Stuff 2 R412 13KR2F Near MAX1909 Pin DY C468 Near MAX1909 Pin 24 1 AO4407 U54 MAX1909_ACIN C467 SC1U10V3ZY R478 D01R3720F 2 C521 SCD1U50V3KX DUMMY-R2 1 D D D D R416 100KR2F S S S G GAP-CLOSE ISOURCE_MAX = (0.075/R711)*(VCLS/VREF) =3.125A So,Constant Power=19*3.125=59.4W SET CHG OFF Pre-CHG_I = 305mA BATA_CHG_I = (0.075/R722)*(VICTL/3.6) =3.0A BATB_CHG_I = (0.075/R722)*(VICTL/3.6) =2.46A BOM2(NV44+G) Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CHARGER-Max8725 Size A3 Document Number Date: Thursday, January 13, 2005 A B C D Rev CANARY2 Sheet E 43 SA of 55 A B C D E 2 DCBATOUT E B D2 D2 BATA+ C 3 2 1 R496 100KR2 Q48 Q47 PDTA144EU CHT2222A AD_OFF U83 D1 30 AO4407 D1 CHGB S2 DC-JACK75-U CHGA G2 AD+_G D D D D S1 R480 330KR2 U2 S S S G G1 4 SCD47U25V6KX C515 DUMMY-C3 AD+_JK C1 4 DCIN1 CHG_PWR AD+ DOCK_AD+ ADAPTER IN CIRCUIT D1 S10P40 connect to SIO D2 D2 D2 D2 G1 S1 G2 S2 U89 DISA DISB S2 CHG_PWRB G2 D1 D1 CHG_PWRA D1 D1 S1 COMB G1 COMA BATB+ U88 3 5V_AUX_S5 MAIN BATTERY CONNECTOR 2 BATTERY SWITCH BATA+ CHG_PWR BATB+ CHG_PWR 30 BAT_SEL_A/B# D45 MAX1773_PDS 1N4448HWT 12 11 AC_IN# BATA_STAT BATSEL ACDET ACPRES# BATSTAT 14 TCOMP EXTLD PDS MINV GND VDD 15 10KR2 AC_IN# C439 2 R838 100KR2 SC1U50V5ZY R866 R869 2 MAX1773_VDD 15KR3F R379 10KR2 R378 100KR2 DY BATB_CLK_1 BATB_DAT_1 AMP-CON7-4-U1 BOM2(NV44+G) M1773_EXTLD C469 SC1000P50V 12/28 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title AD&BTY CONNECTER & BTY SWITCH 12/29 Size A3 DCBATOUT Document Number Date: Monday, January 17, 2005 A B Wistron Corporation G45 GAP-CLOSE-PWR 2 27R2J 2 27R2J BATB+ C934 SCD1U 3 DY R884 1 R888 BAT2 5V_AUX_S5 1 D47 Do Not Stuff Do Not Stuff 30 MAX1773_VDD M1773_EXTLD D49 Do Not Stuff Do Not Stuff R839 BATB_IN# CHGB DISB COMB MAX1773_PDS 43 16K9R2F 20 19 18 17 16 MAX1773AEUP MAX1773_VDD 30 BATB_SCL 30 BATB_SDA 30 BATB_IN# BATB THMB CHGB DISB COMB 13 10 R857 10KR2 5V_AUX_S5 2ND BATTERY CONNECTOR BATA THMA CHGA DISA COMA R864 100KR2 MAX1773_ACDET 3K3R2 MAX1773_TCOMP C902 12/28 SCD1U50V3KX R865 R381 100KR2F C479 DUMMY-C3 1 AD+ R380 10KR2 1 C481 SC1000P50V C478 SCD1U 2 BATA_IN# CHGA DISA COMA SYN-CON7-S-U SC10U25V0KX U80 BATA+ SC10U25V0KX 2 BATA_CLK_1 BATA_DAT_1 R868 100KR2F 1 5V_AUX_S5 R867 10KR2 C873 2 DY 30 BATA_SCL 30 BATA_SDA 30 BATA_IN# 27R2J 2 27R2J C906 BAT1 DY R427 1 R428 D20 Do Not Stuff Do Not Stuff D21 Do Not Stuff Do Not Stuff Adaptor IN Detection 5V_AUX_S5 3 5V_AUX_S5 C D Rev CANARY2 Sheet E 44 SA of 55 A B C D E NVVDD NVVDD_PWR G8 FAN5234 FOR VGA_Core DCBATOUT DCBATOUT_5234 NV44 NVVDD G7 NV44 NV44 GAP-OPEN-PWR G10 NV44 GAP-OPEN-PWR G9 NV44 GAP-OPEN-PWR G32 NV44 GAP-OPEN-PWR G6 NV44 GAP-OPEN-PWR G11 NV44 GAP-OPEN-PWR G35 NV44 GAP-OPEN-PWR G4 NV44 GAP-OPEN-PWR G5 NV44 GAP-OPEN-PWR GAP-OPEN-PWR G33 4 GAP-OPEN-PWR G34 NV44 DCBATOUT_5234 GAP-OPEN-PWR G31 NV44 D D D D 1 C825 2 C352 SCD1U16V U27 AO4422 SC10U35V0ZY-U C374 SC4D7U10V5ZY NV44 GAP-OPEN-PWR SC10U35V0ZY-U GAP-OPEN-PWR G36 NV44 C405 SCD1U NV44 C824 NV44 5V_S5 NV44 5V_S0 5234_HDRV 5234_LDRV PGOOD G S S S FAN5234MTCX NV44 SCD01U16V2KX NV44 C356 AO4406 C363 SCD1U10V2MX-1 NV44 NV44 R286 10KR2 NV44 2 5V_S0 300KHz U28 S S S G IND-2D2UH-18 TP27 TPAD28 R275 40K2R3F NV44 C348 R272 698R3F NV44 R279 DUMMY-R3 NV44 2 PWM Mode: FPWM (High)=>Fixed PWM Mode FPWM (Low)=>Hysteretic Mode R270 2KR2F NV44 C351 SCD1U NV44 DY 14 10 TC10 Do Not Stuff NV44 HDRV LDRV VSEN VOUT VIN VCC D D D D R287 0R3-U 11 NVVDD_PWR 2 5234_VIN NV44 5234_VSEN NV44 1 5234_ISEN 5234_SW 1D2V Iomax=11A OCP>20A Vishay IHCP-5050 Imax=16A, DCR=8mohm 12.9*13.58*3.5, NTD:11.05 12 13 L18 ISNS SW R271 1K2R3F NV44 SCD01U16V2KX PGND AGND 10KR2 DCBATOUT_5234 FPWM BOOT SS ILIM EN 39,40,42,50 CPUCORE_ON NV44 16 15 5234_SS 5234_ILIM 5234_EN R713 NV44 SCD1U U24 5234_BOOT SSM5818SL R709 DUMMY-R2 NV44 C357 NV44 D35 NV44 TC11 ST330U3VDM NV44 NEC B2 Size 220uF 2.5V ESR=35mohm Iripple=1.558A NTD:6.37 KEMET V Size 330uF 3V ESR=15mohm, Iripple=2.9A NTD:9.5 2 Vo=1.20V, R763=0.698Kohm(R3F) =>Vo(cal.)=1.2141V Rilim=(11.2/Iilim)*((100+Rsense)/Rdson) for NV44M BOM2(NV44+G) 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title FAN5234_VGA_CORE_1D20V or 1D15V Size A3 Document Number Date: Thursday, January 13, 2005 A B C D Rev SA CANARY2 Sheet E 45 of 55 A B OF 14 NV44 C638 NV44 C634 1 PEG_RXP15 PEG_RXN15 NV44 C633 NV44 C628 PEX_TX13 PEX_TX13# PEG_TXN2 AL26 PEG_TXP2 AL27 PEX_RX13 PEX_RX13# SCD1U16V PEG_1_RXP14AK27 SCD1U16V PEG_1_RXN14AJ27 PEX_TX14 PEX_TX14# PEG_TXN1 AM27 PEG_TXP1 AM28 PEX_RX14 PEX_RX14# SCD1U16V PEG_1_RXP15AJ28 AH27 SCD1U16V PEG_1_RXN15 PEX_TX15 PEX_TX15# PEG_TXN0 AL28 PEG_TXP0 AL29 1 1 2 2 2 2 1 2 1 1 2 1 2 2 1 2 1 2 2 1 1 2 SCD1U16V PEG_1_RXP13AH26 SCD1U16V PEG_1_RXN13 AG26 PEX_RX12 PEX_RX12# AF15 AE15 AE16 C262 C282 C256 C258 SC4700P50V2KX SCD1U10V2MX-1SC100P50V2JN SC100P50V2JN NV44 NV44 NV44 NV44 PEG_TXN3 AK25 PEG_TXP3 AK26 PEX_PLLAVDD PEX_PLLDVDD PEX_PLLGND PEX_TX12 PEX_TX12# PEX_RX11 PEX_RX11# SCD1U16V PEG_1_RXP12AJ25 SCD1U16V PEG_1_RXN12 AH25 C267 C201 SC4700P50V2KX SCD1U10V2MX-1 NV44 NV44 PEG_TXN4 AM24 PEG_TXP4 AM25 PEX_TX11 PEX_TX11# C276 C265 C266 C270 SC4700P50V2KX SCD1U10V2MX-1 SCD1U10V2MX-1 SC1U10V3KX NV44 NV44 NV44 NV44 PEX_RX10 PEX_RX10# SCD1U16V PEG_1_RXP11AK24 SCD1U16V PEG_1_RXN11AJ24 2 PEG_TXN5 AL23 PEG_TXP5 AL24 AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10 PEX_TX10 PEX_TX10# 3D3V_S0 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 PEX_PLLAVDD NC#AM8 NC#AM9 NC#B32 NC#J6 AM8 AM9 B32 J6 NVVDD LB5 PEX_PLLAVDD C251 SC470P50V2KX NV44 NV44 PEG_RXP14 PEG_RXN14 NV44 C642 NV44 C637 SCD1U16V PEG_1_RXP10 AG23 SCD1U16V PEG_1_RXN10 AH23 C257 C261 C210 C193 SC2200P50V2KXSCD022U16V2KXSCD1U10V2MX-1 SCD1U10V2MX-1 NV44 NV44 NV44 NV44 BLM18AG151SN1 C250 C244 SC4700P50V2KX SC4D7U6D3V3KX NV44 NV44 BOM2(NV44+G) PEG_RXP13 PEG_RXN13 NV44 C648 NV44 C643 PEX_RX9 PEX_RX9#