Acer aspire 5920 5920g QUANTA ZD1 REV e

5 X'TAL 14.318MHZ P33 CLOCK GENERATOR SELGO: SLG8SP512K05 FSB TVOUT CRT P37 CPU Merom 479 uFCPGA P3,P4 P2 D +1.2V/+1.25V/1.5V/2.5V VCORE(ISL6262A) ZD1(CHAPALA) SYSTEM BLOCK DIAGRAM Thermal Sensor BATTERYCHARGER (ISL6251) 5V/3.3V (ISL6236) P3 P33 667/800 Mhz D P32 DISCHARGE +1.8V / +1.05V P19 TFT LCD Panel NB Crestline PM965 VGA LVDS WXGA WSXGA+ WUXGA Dual Channel DDR2 533/667 MHz PCI-Express 16X Lan P5,P6,P7,P8,P9,P10,P11 X4 DMI interface DVI LVDS VGA/TV out C P24 MXM-NB8P-GS USB6 ( nVidia ) VRAM 256M Mini Card / VRAM 512M WLAN / 3G(TV) P17 SATA0 SATA1 ODD (PATA) PATA P24 Bluetooth USB4 USB 2.0 Azalia P21 PCI-Express SB ICH8M PCIE-2 USB7 C P23 PCIE-4 P29 PCIE-1 PCIE-5 PCIE-6 BROADCOM 1394 +Cardreader Controller Int MIC P27 10/100/1G LAN 5787M P20 B P27 B R5C832/833 LPC Azalia Audio Controller ALC268&888 P26 Audio Amplifier X'TAL 25M X'TAL24.576MHZ P12,P13,P14,P15 X'TAL 32.768KHZ P21 Robson New Card PCI Bus P25 CCD USB5 P22 USB Port x USB0~3 P35,36 P16 P18 HDD (SATA) P37 DDRII SO-DIMM SO-DIMM X'TAL 32.768K P28 Transformer P20 EC (WPC8769LDG) RJ45 P31 P21 IEEE 1394 Port Media Card Reader P28 P28 MIC Jack P27 Line in P27 Fan Header P21,P30 SPI ROM VR P31 P26 Connector BOM MARK A Speaker Phone Jack P27 P27 MDC 1.5 EV@ EXT VGA 要打 Touch Pad P26 CIR P30 A IV@ INT VGA 要打 268@ AUDIO 268 要打 P21 888@ AUDIO 888要打 PROJECT : ZD1 K/B COON Quanta Computer Inc P30 Size Document Number Rev E Block Diagram Date: Wednesday, April 25, 2007 Sheet 1 of 38 Clock Generator Change list: B-test 1.Change U31 P/N to ALPRS365K13 (ICS) +3V +3V +3V +3V_VDD_A R205 BKP1608HS181-T C347 C349 C340 C352 C362 C342 C345 C339 4.7U/10V 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V R435 *10K_4 R443 *10K_4 PCI_CLK_SIO D PCLK_ICH R439 10K_4 +1.25V R220 BKP1608HS181-T D R207 10K_4 +1.25V_VDD U31 +3V_VDD_A C355 C350 C375 C372 C353 C360 C359 C358 PCI_CLK_SIO PCLK_ICH C CLKUSB_48 C: For EMI solution MCH_BSEL1 R206 0_4 R431 16 39 55 VDD_A_REF 61 VDD_A_48 VDD_PCI VDD_48 VDD_PLL3 VDD_SRC VDD_CPU VDD_REF 14M_ICH *30P/50V_4 XTAL length < 500mils C565 B R447 33_4 FSA 10 57 USB_48MHz/FS_A FS_B/TEST_MODE R423 33_4 FSC 62 REF/FS_C/TEST_SEL IV@0X2 DREFCLK_R DREFCLK#_R CPU Clock select CPU_BSEL0 +1.05V CPU_BSEL1 PM_STPCPU# PM_STPPCI# CK_PWRGD CLK_CPU_BCLK_R CLK_CPU_BCLK#_R CLK_MCH_BCLK_R CLK_MCH_BCLK#_R PCIE_CLK_RBS_R PCIE_CLK_RBS#_R CPU_BSEL2 +1.05V 0X2 0X2 0X2 RP45 IV@0X2 SRC_2 SRC_2# SRC_3/CLKREQ_C# SRC_3#/CLKREQ_D# SRC_4 SRC_4# SRC_6 SRC_6# SRC_7/CLKREQ_F# SRC_7#/CLKREQ_E# SRC_9 SRC_9# SRC_10 SRC_10# SRC_11/CLKREQ_H# SRC_11#/CLKREQ_G# 21 22 24 25 27 28 41 40 44 43 30 31 34 35 33 32 CLK_PCIE_SATA_R CLK_PCIE_SATA#_R CLK_PCIE_LAN_R CLK_PCIE_LAN#_R CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R CLK_PCIE_ICH_R CLK_PCIE_ICH#_R PECLK_VGA_R PECLK_VGA#_R CLK_PCIE_NEW_C_R CLK_PCIE_NEW_C#_R CLK_PCIE_3GPLL_R CLK_PCIE_3GPLL#_R CLK_PCIE_TV_R CLK_PCIE_TV#_R RP47 RP49 RP51 RP50 RP48 RP53 RP52 RP36 4 2 4 4 SCL SDA CLK_DREFSSCLK CLK_DREFSSCLK# 0X2 PCLK_DEBUG 2.2K_4 CLKUSB_48 MCH_BSEL2 R424 10K_4 FSC CLK_PCIE_SATA CLK_PCIE_SATA# CLK_PCIE_LAN CLK_PCIE_LAN# CLK_PCIE_MINI1 CLK_PCIE_MINI1# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_MXM CLK_MXM# CLK_PCIE_NEW_C CLK_PCIE_NEW_C# CLK_PCIE_3GPLL CLK_PCIE_3GPLL# CLK_PCIE_TV CLK_PCIE_TV# 0X2 0X2 0X2 EV@0X2 0X2 0X2 0X2 Clock Gen I2C +3V Q27 RHU002N06 PDAT_SMB CG_XOUT Main: ICS9LPRS365BGLFT:ALPRS365K13 SLG8SP512T: AL8SP512K05 R455 0_4 R456 *56_4 R450 *1K_4 R451 0_4 R429 10K_4 10K_4 CGDAT_SMB CGCLK_SMB MCH_BSEL0 B PCLK_SMB MCH_BSEL0 BSEL Frequency Select Table MCH_BSEL1 MCH_BSEL1 FSC FSB FSA Frequency 0 266Mhz 0 133Mhz 1 166Mhz 200Mhz 1 400Mhz R449 *0_4 R454 *1K_4 R425 0_4 1 Reserved R427 *0_4 1 100Mhz R426 *1K_4 0 333Mhz R428 +3V Q28 RHU002N06 ICS9LPRS365BGLFT MCH_BSEL2 MCH_BSEL2 A PROJECT : ZD1 Quanta Computer Inc Size Document Number Rev E CLOCK GENERATOR CK505 W/REGULATOR Date: 10K_4 C CLK_DREFSSCLK_R CLK_DREFSSCLK#_R SRC_0/DOT_96 SRC_0#/DOT_96# R433 MCH_BSEL0 R446 +3V CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# PCIE_CLK_RBS PCIE_CLK_RBS# 48 A +1.05V RP42 RP44 RP46 17 18 64 63 VSS_PCI VSS_48 VSS_I/O VSS_PLL3 VSS_SRC_1 VSS_SRC_2 VSS_SRC_3 VSS_CPU VSS_REF +1.25V_VDD LCDCLK/27M LCDCLK#/27M_SS 13 14 11 15 19 23 29 42 52 58 Y4 14.318MHz 33P/50V_4 54 53 51 50 47 46 XTAL_OUT CPU_0 XTAL_IN CPU_0# PCI_0/CLKREQ_A# CPU_1_MCH PCI_1/CLKREQ_B# CPU_1_MCH# PCI_2 SRC_8/CPU_ITP PCI_3 SRC_8#/CPU_ITP# ^PCI_4/LCDCLK_SEL PCIF_5/ITP_EN NC CG_XIN 33P/50V_4 37 38 56 R430 R432 R434 R436 R440 R444 CGCLK_SMB CGDAT_SMB C563 CPU_STOP# PCI_STOP# CKPWRGD/PD# 59 60 RP43 CLK_DREFCLK CLK_DREFCLK# 12 20 26 36 45 49 CG_XOUT CG_XIN 475_4 SATACLKREQ#_R 33_4 PCI_CLK_7412_R 33_4 PCLK_MINI_R 33_4 PCLK_591_R 33_4 PCI_CLK_SIO_R 33_4 PCLK_ICH_R 14M_ICH C645 VDD_I/O VDD_PLL3_I/O VDD_SRC_I/O_1 VDD_SRC_I/O_2 VDD_SRC_I/O_3 VDD_CPU_I/O SATACLKREQ# PCLK_PCM PCLK_DEBUG PCLK_591 0_4 4.7U/10V 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V Sheet Monday, May 07, 2007 of 38 H_A#[35:17] H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB1# H_A20M# H_FERR# H_IGNNE# A6 A5 C4 A20M# FERR# IGNNE# D5 C6 B4 A3 STPCLK# LINT0 LINT1 SMI# M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10] H_STPCLK_R# A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# H_ADS# H_BNR# H_BPRI# H5 F21 E1 H_DEFER# H_DRDY# H_DBSY# F1 R79 H4 H_LOCK# C1 F3 F4 G3 G2 H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# HIT# HITM# G6 E4 H_HIT# H_HITM# AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET# THERMAL PROCHOT# THERMDA THERMDC THERMTRIP# H CLK BCLK[0] BCLK[1] D21 H_PROCHOT_R# A24 H_THERMDA B25 H_THERMDC C7 PM_THRMTRIP# A22 A21 MBCLK 56.2/F_4 +1.05V H_INIT# LOCK# +3V +3V H_BREQ#0 D20 H_IERR# B3 RESET# RS[0]# RS[1]# RS[2]# TRDY# BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# CPU Thermal monitor Q25 RHU002N06 H1 E2 G5 +3V Q26 RHU002N06 BR0# IERR# INIT# ICH 0_4 H_INTR H_NMI H_SMI# DEFER# DRDY# DBSY# REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 R350 H_STPCLK# K3 H2 K2 J3 L1 ADS# BNR# BPRI# ADDR GROUP C H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# CONTROL H_ADSTB0# H_REQ#[4:0] J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 XDP/ITP SIGNALS D H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 ADDR GROUP CPU(HOST) U22A MBDATA R360 R361 R357 10K_4 10K_4 200 D LM86VCC C517 1U/10V_4 U24 H_THERMDA T8 T2 T3 T6 T4 T5 R362 THERM_ALERT# *0_4 SCLK VCC SDA DXP C518 ALERT# DXN 2200P/50V_4 OVERT# GND H_THERMDC MAX6657 R358 0_4 R355 56.2/F_4 R82 *2.2K_4 ADDRESS: 98H SYS_RST# +3V R363 CPUFAN#_ON *10K_4 Layout Note:Routing 10:10 mils and away from noise source with ground gard +1.05V CPUFAN#_ON H_PROCHOT# Default PU 56ohm if no use Serial R NC, If connect to power side PU 68ohm Serial R 2.2K C CLK_CPU_BCLK CLK_CPU_BCLK# RESERVED H_A#[16:3] PU/PD (ITP700) Thermal Trip +1.05V Merom Ball-out Rev 1a H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_D#[31:16] Layout note: Z=55 ohm H_GTLREF