| Tài liệu tham khảo |
Loại |
Chi tiết |
| [1] T. N. Thinh, “Thuyết minh đề tài - Thiết kế hệ thống nhận dạng virus máy tính tốc độ cao kết hộp giải pháp phần cứng và mềm,” 2013 |
Sách, tạp chí |
| Tiêu đề: |
Thuyết minh đề tài - Thiết kế hệ thống nhận dạng virus máy tính tốc độ cao kết hộp giải pháp phần cứng và mềm |
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| [2] Xilinx Corporation, “Partial Reconfiguration Tutorial - PlanAhead Design Tool (User Guide UG743),” 2012 |
Sách, tạp chí |
| Tiêu đề: |
Partial Reconfiguration Tutorial - PlanAhead Design Tool (User Guide UG743) |
|
| [3] Xilinx Corporation, “Virtex-5 Family Overview (Product Specification DS100),” p. 2, 2009 |
Sách, tạp chí |
| Tiêu đề: |
Virtex-5 Family Overview (Product Specification DS100) |
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| [5] B. B. J. M. J. Y. a. B. B. P. Lysaght, “Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs (Invited Paper),” Proceedings of the IEEE Conference on Field Programmable Logic and Applications (FPL), pp. 1-6, 2006 |
Sách, tạp chí |
| Tiêu đề: |
Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs (Invited Paper),” "Proceedings of the IEEE Conference on Field Programmable Logic and Applications (FPL) |
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| [6] Simon Tam and Martin Kellermann (Xilinx Corporation), “Fast Configuration of PCI Express Technology through Partial Reconfiguration (Application Note XAPP883),” 2010 |
Sách, tạp chí |
| Tiêu đề: |
Fast Configuration of PCI Express Technology through Partial Reconfiguration (Application Note XAPP883) |
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| [7] K. P. a. D. P. Charalampos Vatsolakis, “Enabling Dynamically Reconfigurable Technologies in Mid Range Computers Through PCI Express,” HiPEAC Workshop on Reconfigurable Computing (WRC), 2014 |
Sách, tạp chí |
| Tiêu đề: |
Enabling Dynamically Reconfigurable Technologies in Mid Range Computers Through PCI Express,” "HiPEAC Workshop on Reconfigurable Computing (WRC) |
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| [11] C. G. E. N. S. T. a. G. B. S. Pontarelli, “Exploiting Dynamic Reconfiguration for FPGA Based Network Intrusion Detection Systems,” Proc. IEEE Int', Conf. Field Programmable Logic and Applications (FPL), pp. 10-14, 2010 |
Sách, tạp chí |
| Tiêu đề: |
Exploiting Dynamic Reconfiguration for FPGA Based Network Intrusion Detection Systems,” "Proc. IEEE Int', Conf. Field Programmable Logic and Applications (FPL) |
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| [12] D. U. ,. Y. L. ,. L. G. ,. R. T. Dong Yin, “Customizing virtual networks with partial FPGA reconfiguration,” ACM SIGCOMM Computer Communication Review, tập 41, 2011 |
Sách, tạp chí |
| Tiêu đề: |
Customizing virtual networks with partial FPGA reconfiguration,” "ACM SIGCOMM Computer Communication Review |
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| [13] G. G. J. W. L. a. G. A. Covington, “A packet generator on the NetFPGA platform,” Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 235-238, 2009 |
Sách, tạp chí |
| Tiêu đề: |
A packet generator on the NetFPGA platform,” "Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines |
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| [14] e. a. T. Katashita, “PGA-Based Intrusion Detection System for 10 Gigabit Ethernet,” IEICE Trans. on Information and Systems, pp. 1923-1931, 2007 |
Sách, tạp chí |
| Tiêu đề: |
PGA-Based Intrusion Detection System for 10 Gigabit Ethernet,” "IEICE Trans. on Information and Systems |
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| [15] M. R. a. J. K. A. Salman, “Efficient Hardware Accelerator for IPSec based on Partial Reconfiguration on Xilinx FPGAs,” Reconfigurable Computing and FPGAs (ReConFig), pp. 242-248, 2011 |
Sách, tạp chí |
| Tiêu đề: |
Efficient Hardware Accelerator for IPSec based on Partial Reconfiguration on Xilinx FPGAs,” "Reconfigurable Computing and FPGAs (ReConFig) |
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| [16] S. A. F. Kizheppatt Vipin, “A high speed open source controller for FPGA Partial Reconfiguration,” trong Field-Programmable Technology (FPT), Seoul, 2012 |
Sách, tạp chí |
| Tiêu đề: |
A high speed open source controller for FPGA Partial Reconfiguration,” trong "Field-Programmable Technology (FPT) |
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| [17] A. Traber, “Resource-efficient Dynamic Partial Reconfiguration on FPGAs,” Zurich, 2014 |
Sách, tạp chí |
| Tiêu đề: |
Resource-efficient Dynamic Partial Reconfiguration on FPGAs |
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| [18] D. M. ,. L. T. ,. G. G. ,. O. M. ,. M. D. C. ,. J.-D. L. ,. D. A. ,. C. G. ,. R. L. ,. V. L. B. ,. P. C. ,. B. R. ,. P. G. Philippe Manet, “An evaluation of dynamic partial reconfiguration for signal and image processing in Professional Electronics Applications,” EURASIP Journal on Embedded Systems, pp. 1-11, 2008 |
Sách, tạp chí |
| Tiêu đề: |
An evaluation of dynamic partial reconfiguration for signal and image processing in Professional Electronics Applications,” "EURASIP Journal on Embedded Systems |
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| [19] A. G.-R. C. C. a. A. George, “Design framework for partial run-time FPGA reconfiguration,” 17th IEEE Int'l. Conf. on Field Programmable Logic and Applications (FPL), pp. 1-6, 2007 |
Sách, tạp chí |
| Tiêu đề: |
Design framework for partial run-time FPGA reconfiguration,” "17th IEEE Int'l. Conf. on Field Programmable Logic and Applications (FPL) |
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| [20] A. D. S. H. K. Papadimitriou, “Performance of Partial Reconfiguration in FPGA Systems: A Survey and a Cost Model,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2011 |
Sách, tạp chí |
| Tiêu đề: |
Performance of Partial Reconfiguration in FPGA Systems: A Survey and a Cost Model,” "ACM Transactions on Reconfigurable Technology and Systems (TRETS) |
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| [21] A. J.-B. a. A. Gordon-Ross, “Runtime Temporal Partitioning Assembly to Reduce FPGA Reconfiguration Time,” Proceedings of International Conference onReconfigurable Computing and FPGAs, pp. 374-379, 2009 |
Sách, tạp chí |
| Tiêu đề: |
Runtime Temporal Partitioning Assembly to Reduce FPGA Reconfiguration Time,” "Proceedings of International Conference on "Reconfigurable Computing and FPGAs |
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| [22] S. Y. a. A. Gordon-Ross, “DAPR: Design Automation for Partially Reconfigurable FPGAs,” Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010 |
Sách, tạp chí |
| Tiêu đề: |
DAPR: Design Automation for Partially Reconfigurable FPGAs,” "Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) |
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| [23] D. K. a. J. T. Christian Beckhoff, “Go Ahead: A Partial Reconfiguration Framework,” Field-Programmable Custom Computing Machines (FCCM), pp |
Sách, tạp chí |
| Tiêu đề: |
Go Ahead: A Partial Reconfiguration Framework,” "Field-Programmable Custom Computing Machines (FCCM) |
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