| Tài liệu tham khảo |
Loại |
Chi tiết |
| [1] Sharma, M., Arora, N., “OPTIMA: A nonlinear model parameter extraction program with statistical confidence region algorithms”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 12(7), 982–987,1993 |
Sách, tạp chí |
| Tiêu đề: |
OPTIMA: A nonlinear model parameter extraction program with statistical confidence region algorithms |
|
| [2] .Cheng, B., Dideban, D., Moezi, N., Millar, C., Roy, G., Wang, X., Roy, S., Asenov, “Benchmarking statistical compact modeling strategies for capturing device intrinsic parameter fluctuations in BSIM4 and PSP”, IEEE Design Test of Computers 27(2), 26–35, 2010 |
Sách, tạp chí |
| Tiêu đề: |
Benchmarking statistical compact modeling strategies for capturing device intrinsic parameter fluctuations in BSIM4 and PSP |
|
| [3]. Zhao, W., Liu, F., Agarwal, K., Acharyya, D., Nassif, S., Nowka, K., Cao, Y.,“Rigorous extraction of process variations for 65-nm CMOS design”, IEEE Transactions on Semiconductor Manufacturing 22(1), 196–203, 2009 |
Sách, tạp chí |
| Tiêu đề: |
Rigorous extraction of process variations for 65-nm CMOS design |
|
| [4]. Orshansky, M., Nassif, S., Boning, D., “Design for Manufacturability and Statistical Design”, Springer,2008 |
Sách, tạp chí |
| Tiêu đề: |
Design for Manufacturability and Statistical Design |
|
| [5]. Nassif, S., “Modeling and analysis of manufacturing variations”, IEEE Conference on Custom Integrated Circuits, pp. 223–228, 2001 |
Sách, tạp chí |
| Tiêu đề: |
Modeling and analysis of manufacturing variations |
|
| [6] Y. H. Lam and W. H. Ki, "CMOS Bandgap References With Self-Biased Symmetrically Matched Current–Voltage Mirror and Extension of Sub-1-V Design,"in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 18, no. 6, pp.857-865, June 2010 |
Sách, tạp chí |
| Tiêu đề: |
CMOS Bandgap References With Self-Biased Symmetrically Matched Current–Voltage Mirror and Extension of Sub-1-V Design |
|
| [7] A. Hamouda, R. Arnold, O. Manck and N. E. Bouguechal, "7.72 ppm/°C, ultralow power, high PSRR CMOS bandgap reference voltage," 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, 2013, pp. 364-367 |
Sách, tạp chí |
| Tiêu đề: |
7.72 ppm/°C, ultralow power, high PSRR CMOS bandgap reference voltage |
|
| [10] X. Ming, Y. q. Ma, Z. k. Zhou and B. Zhang, "A High-Precision Compensated CMOS Bandgap Voltage Reference Without Resistors," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 10, pp. 767-771, Oct. 2010 |
Sách, tạp chí |
| Tiêu đề: |
A High-Precision Compensated CMOS Bandgap Voltage Reference Without Resistors |
|
| [12] A. Brokaw, "A simple three-terminal IC bandgap reference," Solid-State Circuits Conference. Digest of Technical Papers. 1974 IEEE International, Philadelphia, PA, USA, 1974, pp. 188-189 |
Sách, tạp chí |
| Tiêu đề: |
A simple three-terminal IC bandgap reference |
|
| [13] Z. K. Zhou et al., "A 1.6-V 25uA 5-ppm/ C Curvature-Compensated Bandgap Reference," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 4, pp. 677-684, April 2012 |
Sách, tạp chí |
| Tiêu đề: |
A 1.6-V 25uA 5-ppm/ C Curvature-Compensated Bandgap Reference |
|
| [15] R. T. Perry, S. H. Lewis, A. P. Brokaw and T. R. Viswanathan, "A 1.4 V Supply CMOS Fractional Bandgap Reference," in IEEE Journal of Solid-State Circuits, vol. 42, no. 10, pp. 2180-2186, Oct. 2007 |
Sách, tạp chí |
| Tiêu đề: |
A 1.4 V Supply CMOS Fractional Bandgap Reference |
|
| [16] G. Rincon-Mora and P. E. Allen, "A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference," in IEEE Journal of Solid-State Circuits, vol. 33, no. 10, pp. 1551-1554, Oct 1998 |
Sách, tạp chí |
| Tiêu đề: |
A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference |
|
| [17] Inyeol Lee, Gyudong Kim and Wonchan Kim, "Exponential curvature-compensated BiCMOS bandgap references," in IEEE Journal of Solid-State Circuits, vol. 29, no. 11, pp. 1396-1403, Nov 1994 |
Sách, tạp chí |
| Tiêu đề: |
Exponential curvature-compensated BiCMOS bandgap references |
|
| [18] Gu Shurong, Wu Xiaobo, Yan Xiaolang, “A High Precision Bandgap Reference Used in PowerManagement Ics”,Engineering Letters, vol 14, pp.45-48, 2006 |
Sách, tạp chí |
| Tiêu đề: |
A High Precision Bandgap Reference Used in PowerManagement Ics”,"Engineering Letters |
|
| [19] Liang – Hung Lu, “Chapter 5: MOS FIELD‐EFFECT TRANSISTORS (MOSFETs)”, Electronics_1 Lecture,2015 |
Sách, tạp chí |
| Tiêu đề: |
Chapter 5: MOS FIELD‐EFFECT TRANSISTORS (MOSFETs)”, "Electronics_1 Lecture |
|
| [20] A. J. Annema, "Low-power bandgap references featuring DTMOSTs," in IEEE Journal of Solid-State Circuits, vol. 34, no. 7, pp. 949-955, Jul 1999 |
Sách, tạp chí |
| Tiêu đề: |
Low-power bandgap references featuring DTMOSTs |
|
| [21] F. Assaderaghi, D. Sinitsky, S. A. Parke, J. Bokor, P. K. Ko and Chenming Hu, "Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI," in IEEE Transactions on Electron Devices, vol. 44, no. 3, pp. 414-422, Mar 1997 |
Sách, tạp chí |
| Tiêu đề: |
Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI |
|
| [22] Manfred Dietrich, Joachim Haase, “Process variations and probabilistic Integrated Circuit Design”, Springer, 2012, ISBN 978-1-4419-6620-9 |
Sách, tạp chí |
| Tiêu đề: |
Process variations and probabilistic Integrated Circuit Design |
|
| [8] Baker, R. Jacob. CMOS Circuit Design, Layout, and Simulation. 3rd. s.l. : Wiley IEEE Press,2004. pp. 627 - 644 |
Khác |
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| [9] Chi-Wah Kok, Wing-Shan Tam. CMOS Voltage References: An Analytical and PracticlePersective. 1st. Singapore : IEEE Express John Wiley, 2013. pp. 49 - 50 |
Khác |
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