The VLSI Handbook Second Edition 4199_C000.fm Page i Tuesday, November 14, 2006 5:30 PM The Electrical Engineering Handbook Series Series Editor Richard C. Dorf University of California, Davis Titles Included in the Series The Handbook of Ad Hoc Wireless Networks, Mohammad Ilyas The Avionics Handbook, Second Edition, Cary R. Spitzer The Biomedical Engineering Handbook , Third Edition, Joseph D. Bronzino The Circuits and Filters Handbook, Second Edition , Wai-Kai Chen The Communications Handbook, Second Edition, Jerry Gibson The Computer Engineering Handbook, Vojin G. Oklobdzija The Control Handbook , William S. Levine The CRC Handbook of Engineering Tables, Richard C. Dorf The Digital Avionics Handbook , Second Edition Cary R. Spitzer The Digital Signal Processing Handbook , Vijay K. Madisetti and Douglas Williams The Electrical Engineering Handbook , Second Edition, Richard C. Dorf The Electric Power Engineering Handbook , Leo L. Grigsby The Electronics Handbook , Second Edition, Jerry C. Whitaker The Engineering Handbook, Third Edition , Richard C. Dorf The Handbook of Formulas and Tables for Signal Processing , Alexander D. Poularikas The Handbook of Nanoscience, Engineering, and Technology, William A. Goddard, III, Donald W. Brenner, Sergey E. Lyshevski, and Gerald J. Iafrate The Handbook of Optical Communication Networks, Mohammad Ilyas and Hussein T. Mouftah The Industrial Electronics Handbook , J. David Irwin The Measurement, Instrumentation, and Sensors Handbook , John G. Webster The Mechanical Systems Design Handbook , Osita D.I. Nwokah and Yidirim Hurmuzlu The Mechatronics Handbook , Robert H. Bishop The Mobile Communications Handbook , Second Edition , Jerry D. Gibson The Ocean Engineering Handbook , Ferial El-Hawary The RF and Microwave Handbook , Mike Golio The Technology Management Handbook , Richard C. Dorf The Transforms and Applications Handbook , Second Edition, Alexander D. Poularikas The VLSI Handbook , Second Edition , Wai-Kai Chen 4199_C000.fm Page ii Tuesday, November 14, 2006 5:30 PM Edited by Wai-Kai Chen University of Illinois Chicago, USA CRC Press is an imprint of the Taylor & Francis Group, an informa business Boca Raton London New York 4199_C000.fm Page iii Tuesday, November 14, 2006 5:30 PM CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2007 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group, an Informa business No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-4199-X (Hardcover) International Standard Book Number-13: 978-0-8493-4199-1 (Hardcover) This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. 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Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe. Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com and the CRC Press Web site at http://www.crcpress.com Library of Congress Cataloging-in-Publication Data The VLSI handbook / edited by Wai-Kai Chen.—2nd ed. p. cm.—(Electrical engineering handbook series; 38) Includes bibliographical references and index. ISBN 0-8493-4199-X 1. Integrated circuits—Very large scale integration. I. Chen, Wai-Kai, 1936- II. Title. III. Series. TK7874.75.V573 2006 621.39´5—dc22 2006050477 4199_C000.fm Page iv Tuesday, November 14, 2006 5:30 PM v Preface We are most gratified to find that the first edition of The VLSI Handbook (2000) was well received and is widely used. Thus, we feel that our original goal of providing in-depth professional-level coverage of VLSI technology was, indeed, worthwhile. Seven years is a short time in terms of development of science and technology; however as this handbook shows, momentous changes have occurred during this period, necessitating not only the updating of many chapters of the handbook, but more startling, the addition and expansion of many topics. Significant examples are low-power electronics and design, testing of digital systems, VLSI signal processing, and design languages and tools to name a few of the more prominent additions. Purpose The VLSI Handbook provides in a single volume a comprehensive reference work covering the broad spectrum of VLSI technology. It is written and developed for practicing electrical engineers in industry, government, and academia. The goal is to provide the most up-to-date information in integrated circuits (IC) technology, devices and their models, circuit simulations, low-power electronics and design, amplifiers, analog and logic circuits, memory, registers and system timing, microprocessor and ASIC, test and testability, design automation, VLSI signal processing, and design languages and tools. The handbook is not an all-encompassing digest of everything taught within an electrical engineering curriculum on VLSI technology. Rather, it is the engineer’s first choice in looking for a solution. Therefore, full references to other sources of contributions are provided. The ideal reader is a BS level engineer with a need for a one-source reference to keep abreast of new techniques and procedures as well as review standard practices. Background The handbook stresses fundamental theory behind professional applications. To do so, it is reinforced with frequent examples. Extensive development of theory and details of proofs have been omitted. The reader is assumed to have a certain degree of sophistication and experience. However, brief reviews of theories, principles, and mathematics of some subject areas are given. These reviews have been done concisely with perception. The handbook is not a textbook replacement, but rather a reinforcement and reminder of material learned as a student. Therefore, important advancement and traditional as well as innovative practices are included. Since most of the professional electrical engineers graduated before powerful personal computers were widely available, many computational and design methods may be new to them. Therefore, computers and software use are thoroughly covered. Not only does the handbook use traditional references to cite sources for the contributions, but it also contains all relevant sources of information and tools that would 4199_C000.fm Page v Tuesday, November 14, 2006 5:30 PM vi Preface assist the engineer in performing his/her job. This may include sources of software, databases, standards, seminars, conferences, etc. Organization Over the years, the fundamentals of VLSI technology have evolved to include a wide range of topics and a broad range of practice. To encompass such a wide range of knowledge, the handbook focuses on the key concepts, models, and equations that enable the electrical engineer to analyze, design, and predict the behavior of very large-scale integrated circuits. While design formulas and tables are listed, emphasis is placed on the key concepts and theories underlying the applications. The information is organized into 13 major sections, which encompass the field of VLSI technology. Each section is divided into chapters, each of which is written by a leading expert in the field to enlighten and refresh knowledge of the mature engineer, and to educate the novice. Each section contains intro- ductory material, leading to the appropriate applications. To help the reader, each article includes two important and useful categories: defining terms and references. Defining terms are key definitions and the first occurrence of each term defined is indicated in italic type in the text. The references provide a list of useful books and articles for further reading and for additional information on the topic. Locating Your Topic Numerous avenues of access to information contained in the handbook are provided. A complete table of contents is presented at the beginning of the book. In addition, an individual table of contents precedes each of the 13 sections. Finally, each chapter begins with its own table of contents. The reader is urged to review these tables of contents to become familiar with the structure, organization, and content of the book. For example, see Section VIII: Microprocessor and ASIC, then Chapter 64: Microprocessor Design Verification, and then Section 64.2: Design Verification Environment. This tree-like structure enables the reader to move up the tree to locate information on the topic of interest. A combined subject and author index has been compiled to provide means of accessing information. It can also be used to locate definitions; the page on which the definition appears for each key defining term is given in this index. The VLSI Handbook is structured to provide answers to most inquiries and to direct inquirer to further sources and references. We trust that it will meet your needs. Acknowledgments The compilation of this book would not have been possible without the dedication and efforts of the section editors, the publishers, and most of all the contributing authors. I wish to thank all of them and also my wife, Shiao-Ling, for her patience and understanding. Wai-Kai Chen Editor-in-Chief 4199_C000.fm Page vi Tuesday, November 14, 2006 5:30 PM vii Editor-in-Chief Wai-Kai Chen is professor and head emeritus of the Department of Electrical Engineering and Computer Science at the University of Illinois at Chicago. He received his BS and MS in electrical engineering from Ohio University, where he was later recognized as a distinguished professor. He earned his PhD in electrical engineering from the University of Illinois at Urbana-Champaign. Professor Chen has extensive experience in education and industry and is very active professionally in the fields of circuits and systems. He has served as visiting professor at Purdue University, University of Hawaii at Manoa, and Chuo University in Tokyo, Japan. He was editor of the IEEE Transactions on Circuits and Systems, Series I and II, pre- sident of the IEEE Circuits and Systems Society, and is the founding editor and editor-in-chief of the Journal of Circuits, Systems and Com- puters . He received the Lester R. Ford Award from the Mathematical Association of America, the Alexander von Humboldt Award from Germany, the JSPS Fellowship Award from Japan Society for the Pro- motion of Science, the National Taipei University of Technology Distinguished Alumnus Award, the Ohio University Alumni Medal of Merit for Distinguished Achievement in Engineering Education, the Senior University Scholar Award and the 2000 Faculty Research Award from University of Illinois at Chicago, and the Distinguished Alumnus Award from the University of Illinois at Urbana-Champaign. He is also the recipient of the Golden Jubilee Medal, the Education Award, the Meritorious Service Award from IEEE Circuits and Systems Society, and the Third Millennium Medal from the IEEE. He has also received more than a dozen honorary professorship awards from major institutions in Taiwan and China. A fellow of the Institute of Electrical and Electronics Engineers and the American Association for the Advancement of Science, Professor Chen is widely known in the profession for his published works which include Applied Graph Theory (North-Holland), Theory and Design of Broadband Matching Networks (Pergamon Press), Active Network and Feedback Amplifier Theory (McGraw-Hill), Linear Networks and Systems (Brooks/Cole), Passive and Active Filters: Theory and Implements (John Wiley), Theory of Nets: Flows in Networks (Wiley-Interscience), The Circuits and Filters Handbook (CRC Press), and The Electrical Engineering Handbook (Elsevier Academic Press). Wai-Kai Chen 4199_C000.fm Page vii Tuesday, November 14, 2006 5:30 PM 4199_C000.fm Page viii Tuesday, November 14, 2006 5:30 PM ix Contributors Ramachandra Achar Department of Electronics Carleton University Ottawa, Ontario, Canada Arshad Ahmed DSP R&D Texas Instruments, Inc. Dallas, Texas Jonathan A. Andrews Department of Electrical and Computer Engineering Virginia Commonwealth University Richmond, Virginia James H. Aylor School of Engineering and Applied Science University of Virginia Charlottesville, Virginia R. Jacob Baker Department of Electrical and Computer Engineering University of Idaho at Boise Boise, Idaho Andrea Baschirotto Department of Innovation Engineering University of Lecce Lecce, Italy Charles R. Baugh C. R. Baugh and Associates Seattle, Washington Magdy Bayoumi The Center for Advanced Computer Studies University of Louisiana Lafayette, Louisiana David Blaauw Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor, Michigan Victor Boyadzhyan Jet Propulsion Laboratory Pasadena, California Alison Burdett Toumaz Technology Ltd. Abingdon, UK Wai-Kai Chen University of Illinois Chicago, Illinois Kuo-Hsing Cheng Tamkang University Tamkang, Taiwan Bi-Shiou Chiou Department of Electronics Engineering National Chiao Tung University Hsinchu, Taiwan John Choma, Jr. Department of Electrical Engineering/Electrophysics University of Southern California Los Angeles, California Amy Hsiu-Fen Chou National Tsing-Hua University Hsinchu, Taiwan Moon Jung Chung Department of Computer Science Michigan State University East Lansing, Michigan David J. Comer Department of Electrical and Computer Engineering Brigham Young University Provo, Utah Donald T. Comer Department of Electrical and Computer Engineering Brigham Young University Provo, Utah Daniel A. Connors Department of Computer Science University of Colorado Boulder, Colorado Donald R. Cottrell Silicon Integration Initiative, Inc. Austin, Texas John D. Cressler School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta, Georgia 4199_C000.fm Page ix Tuesday, November 14, 2006 5:30 PM [...]... contrast, the design of the epilayer constitutes a fundamental topic in bipolar process optimization To first-order, the collector doping in the epilayer is determined by the operation point (more specifically, the collector current density) of the component (see Figure 1.3) A normal condition is to have the operation point corresponding to maximum fT, which typically means a collector current density of the. .. plotted for a 10-year period In addition to the reduced dimensions, the introduction of SiGe epitaxy for the base region has further pushed the performance limits SiGe bipolars are now considered a mature technology and is mainly offered as a high-speed complement to the low-power MOS in the so-called BiCMOS technology By adding a small amount of carbon to the SiGe epitaxial base, better profile control... noise immunity, leading to the introduction of the corner frequency and noise figure as figures of merit for low-frequency and high-frequency noise properties, respectively [18] 1.2.2 Process Optimization The optimization of the bipolar process is divided between the intrinsic and extrinsic device design This corresponds to the vertical impurity profile and the horizontal layout of the transistor, respectively... 1.2.3 Vertical Structure The engineering of the vertical structure involves the design of the collector, base, and emitter impurity profiles In this respect, fT is an adequate parameter to optimize For a modern bipolar transistor with suppressed parasitics, the maximum fT is usually determined by the forward transit time of minority carriers through the intrinsic component The most important fT trade-off... 1-21 1.1 Introduction The development of a bipolar technology for integrated circuits (ICs) went hand in hand with the steady improvement in semiconductor materials and discrete components during the 1950s and 1960s Consequently, silicon bipolar technology formed the basis for the IC market during the 1970s As circuit dimensions shrink, the MOSFET (or MOS) has gradually taken over as the major technological... doping concentration, however, may be a concern for both CBC and BVCEO The latter value will therefore often set a higher limit on the collector doping value The SIC technology provides a simple way of creating a high-BVCEO device by masking the implantation The reduced collector doping in the SIC-free device will also reduce the pinch-base resistance and CBC, which is in favor of high fmax [3] ©... example in Figure 1.2, where the device cross section is also included It is clear that the vertical profile and horizontal layout are primarily dictated by the given process and lithography constraints, respectively Figure 1.3 shows a simple flowchart of the bipolar design procedure Starting from the specified DC parameters at a given bias point, the doping profiles can be derived The horizontal layout must... derived The horizontal layout must be adjusted for minimization of the parasitics A (speed) figure of merit can then be calculated An implicit relation is thus obtained between the figure of merit and the processing parameters [11, 19] In practice, © 2006 by CRC Press LLC 4199_C001.fm Page 6 Monday, October 23, 2006 5:57 PM 1-6 The VLSI Handbook (a) E B C Metal (b) E B C Oxide p nϩ nϩ nϪepi nϩ pϪ Doping... (LOCOS) isolation technology is replaced by shallow and deep trenches to increase the packing density, and also to optimize the process flow by getting a more planar structure As seen in the table, the epitaxial SiGe base markedly improves the device performance at the same technology node Apart from high-speed performance, the bipolar transistor is recognized by its excellent analog properties which feature... resulting in the power-delay product as a figure of merit [13] In the analog bipolar process, the DC properties of the transistor are of utmost importance This involves minimum values on common-emitter current gain (β), Gummel plot linearity (βmax/β) breakdown voltage (BVCEO), and early voltage (VA) The product β × VA is often introduced as a figure of merit for the device DC characteristics [14] Rather than . the Series The Handbook of Ad Hoc Wireless Networks, Mohammad Ilyas The Avionics Handbook, Second Edition, Cary R. Spitzer The Biomedical Engineering Handbook. Golio The Technology Management Handbook , Richard C. Dorf The Transforms and Applications Handbook , Second Edition, Alexander D. Poularikas The VLSI Handbook