The architecture of computer hardware and systems software an information technology approach suplement 2

SUPPLEMENTARY CHAPTER Instruction Addressing Modes The Architecture of Computer Hardware and Systems Software: An Information Technology Approach 3rd Edition, Irv Englander John Wiley and Sons 2003 Little Man Computer  Direct, absolute addressing  Direct: data is reached directly from the address in the instruction  Absolute: address in the instruction field is the actual memory location being addressed Supplementary Chapter Instruction Addressing S2-2 Additional Addressing Modes  Programmer-accessible registers  Provide faster execution with register-based instructions  Alternatives to absolute addressing  Allow larger range of addressable memory  While using a reasonable number of bits for the address field  Alternatives to direct addressing  Facilitate writing certain types of programs  Example: loops that use index to address different entries in a table or array Supplementary Chapter Instruction Addressing S2-3 Register Addressing  Does not require a memory access  Faster execution  Implemented directly as part of the CPU  RISC machine instruction set: made up almost entirely of register operation instructions Supplementary Chapter Instruction Addressing S2-4 Register Addressing Fetch-Execute Cycle for Register-to-Register Move PC -> MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR contents(IR[add1]) -> contents(IR[add2]) Move contents of source register to destination register PC + -> PC Program Counter incremented* *Done in parallel with move; only time units required Supplementary Chapter Instruction Addressing S2-5 Additional Addressing Modes  Programmer-accessible registers  Provide faster execution with register-based instructions  Alternative to absolute addressing  Allow larger range of addressable memory  While using a reasonable number of bits for the address field  Alternative to direct addressing  Facilitate writing certain types of programs  Example: loops that use index to address different entries in a table or array Supplementary Chapter Instruction Addressing S2-6 Active Area of Memory  Code executes in a small area of memory that changes as program proceeds  Well-written code Fig S2.2  Small modular subroutines and procedures  Local variables  Conditional branches Supplementary Chapter Instruction Addressing S2-7 Alternatives to Absolute Addressing  Base register addressing  Relative addressing  Both provide starting address and an offset or displacement from the starting point  Starting address in register or program counter  Offset: address in the instruction  Programming advantage: relocatability Supplementary Chapter Instruction Addressing S2-8 Base Register Addressing  Base register set to initial address  Hardware design: special, separate register or general-purpose registers  Generally large to provide large memory space, frequently gigabytes  Final address: contents of instruction address field added to the base address Supplementary Chapter Instruction Addressing S2-9 IBM zSystem  Base register address creation Base Register 1375 1375 + 20 Instruction 20 = 1395 actual location (absolute address in memory) Supplementary Chapter Instruction Addressing S2-10 Indirect Addressing  Address field of the instruction contains the address of the data  Similar to pointers in Pascal or C  Frequently used with subscripted data in a table Memory address Data Table Subscript 77 136 TABLE(1) 78 554 TABLE(2) 79 302 TABLE(3) : Supplementary Chapter Instruction Addressing S2-23 Little Man Indirect Addressing a The Little Man reads in instruction b ,,, he finds the address of the data Supplementary Chapter Instruction Addressing S2-24 Little Man Indirect Addressing c … from that address he retrieves the data d … with a different address in location 45, he retrieves different data (note: In this step the address of the data has been incremented) Supplementary Chapter Instruction Addressing S2-25 Incrementing  Treat the instruction as data  Modify the address field  Pure code: does not modify itself during execution  Incrementing does not modify the instruction  Address stored in a separate data region  Advantage: program can be stored in ROM Supplementary Chapter Instruction Addressing S2-26 Mailbox Instruction Comments 00 LOAD 90 /this actually loads "ADD 60" Totalizer Loop 01 STORE 07 / into mailbox 07 02 LOAD 91 /initialize the totalizer with 03 STORE 99 04 LOAD 92 05 STORE 98 06 LOAD 99 07 08 STORE 99 /and store the new total 09 LOAD 07 /modify the instruction in 07 10 ADD 93 / by adding as though the 11 STORE 07 / instruction were data 12 LOAD 98 13 SUB 93 14 STORE 98 15 BRP 06 /loop back if not done 16 LOAD 99 /done 17 OUT 18 HALT 90 ADD 91 92 19 93 Direct Addressing Instruction in location 07 treated as data, incremented, and replaced to its original location /initialize the counter to 19 /load the total /[ADD 60, ADD 61, etc.] /decrement the counter /output the result 60 /initial data for location 07 98 /used to hold the current count 99 /used to hold the current total Totalizer Loop with Indirect Addressing Asterisk used to indicate indirect instruction Mailbox Instruction Comments 00 LOAD 90 /this time just the initial 01 STORE 97 / address is saved 02 LOAD 91 /as 03 STORE 99 04 LOAD 92 05 STORE 98 06 LOAD 99 /…before 07 ADD * 97 /this is the indirect instruction 08 STORE 99 09 LOAD 97 /modify the address in 97 (this is direct) 10 ADD 93 / by adding to it … 11 STORE 97 12 LOAD 98 13 SUB 93 14 STORE 98 15 BRP 06 16 LOAD 99 17 OUT 18 HALT 90 60 91 92 19 93 /… /as… /… /before /now this is the initial address 97 /used to hold the address of the data 98 /used to hold the current count 99 /used to hold the current total Register Indirect Addressing  Also called register deferred addressing  Address pointed is stored in a generalpurpose register  Advantage: efficient  instruction to load pointer address in register  Data accessed in the same number of fetchexecute instructions as direct addressing  Small address field required (3 or bits)  Excellent for addressing large memory space with small instruction word Supplementary Chapter Instruction Addressing S2-29 Register Indirect Addressing Dual Duty  Autoincrementing/autodecrementing  Direct implementation of C’s “++” and “- -”  Instruction  Performs normal function like LOAD or ADD  Plus increments or decrements register each time instruction executed  Advantage: simplifies writing program loops  Replaces steps 7,9,10, 11 on Slide #28 Supplementary Chapter Instruction Addressing S2-30 Register Indirect Addressing Obtaining Data Supplementary Chapter Instruction Addressing S2-31 Motorola 68000 CPU MOVE Supplementary Chapter Instruction Addressing S2-32 Indexed Addressing  Use address in the instruction like direct addressing  But modify address by adding value from another register  General purpose or special index register Supplementary Chapter Instruction Addressing S2-33 Indexed vs Base Offset  Both offset address by amount stored in another register  Base offset: primarily to expand addressing range for a given address field size  Value of base address likely to be large and rarely changed during execution  Index register: primarily a table offset for subscripting  Value in index register most like small and frequently changing  Autoindexing: similar to autoincrementing Supplementary Chapter Instruction Addressing S2-34 Index Register: Modifying an Address Supplementary Chapter Instruction Addressing S2-35 Using Both Base Offset and Indexed Addressing Supplementary Chapter Instruction Addressing S2-36 Totalizer Loop with Indexed Addressing Mailbox Instruction Comments 00 LDA 91 /total is kept in A This sets A to (not indexed) 01 LDX 92 /initialize the counter to 19 02 ADD @ 60 /ADD 79, ADD 78, etc as X is decremented 03 DEC X 04 BRPX 02 /test if done (when X decrements from to -1) 05 OUT 06 HALT 91 92 19 /Decrement the index–19, 18, etc /done; output the result from A Note: Supplementary Chapter Instruction Addressing @ symbol indicates indexed instruction LDX: LOAD register X is the indexed register (offset and counter) LDA: LOAD accumulator S2-37 ... MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR IR[Address] + PC -> MAR Address portion of the instruction added to the PC and loaded into the MAR... Addressing S2 -23 Little Man Indirect Addressing a The Little Man reads in instruction b ,,, he finds the address of the data Supplementary Chapter Instruction Addressing S2 -24 Little Man Indirect... address field 05 (the number 05) S2 -21 Immediate Addressing  Modified LMC Example PC -> MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR IR[Address]->