Chương 04 Processor Design

1 CHƯƠNG PROCESSOR DESIGN Basic definitions Processor controls overall system operations supervising keyboards, monitors, disks, tapes and other Input/Output devices ASIC (Application Specification Integrated Circuit) is a coprocessor that executes one or more specific tasks much faster than the processor itself For this reason, such ASICs are called accelerators, since the processor offloads computationally intensive tasks to them ASIP (Application Specification Instruction Processor) is a processor that possesses specific instructions that will allow some applications to execute much faster than on an ordinary processor Basic computer architecture Instruction set An instruction is a string of bits grouped into a number of different fields, such as  Instruction sets  Instruction types  Addressing modes  Instruction cycle  Processor design flow A typical instruction, such as, a=b+c, where a, b, and c are stored in memory at location A, B, and C can be expressed in assembly language format,  Add A, B, C or, register-transfer format  Mem[A] [...]... concepts:  Instruction sets  Instruction types  Addressing modes  Instruction cycle  Processor design flow Including  instruction set design,  instruction set flowcharts,  component allocation,  ASM charts, and  processor architecture We have demonstrated processor design:  16-bit CISC design  16-bit RISC design o with data-forwarding, o branch prediction ... Status ) Control unit AR, DR  needed to shorten clock period 24 Processor ASM chart (scheduled IS chart) IR: thanh ghi lệnh RF: register file PC: program counter AR: thanh ghi địa chỉ DR: thanh ghi địa chỉ Status: thanh ghi trạng thái 25 Processor ASM chart (scheduled IS chart) 26 Processor schematic Schematic is obtained by connecting the processor components according to the ASM chart, that is, by... chế độ toán hạng:  Địa chỉ trực tiếp  Địa chỉ gián tiếp 14 Instruction cycle IR = Instruction Register PC = Program Counter Memory stores all instructions and data 15 Processor design flow 16 Instruction-set design Program size vs processor size Complex Instruction-set powerful instructions -> shorter programs powerful instructions -> complex datapath, control unit complex instructions -> several... datapath, control unit simple instructions -> single clock cycle simple datapath -> shorter clock period simple instructions -> excellent pipeline 17 Example Design an instruction set of a 16-bit processor 18 Complex instruction-set for a 16-bit processor a) Register instructions: arithmetic, logic, move and shift Op Dest, Src1, Src2 RF (Dest) RF(Src1) Op RF(Src2) b) Memory instructions: load and store... status [Dest]  1 status [Dest]  0 20 CISC Design Flowchart IS A behavioral description of that processor Execute cycles of all instructions Not architectural detail Exist: memory, register file, program counter, instruction register, a status register 21 Instruction-set flowchart 22 Instruction-set flowchart 23 Component allocation for the 16-bit processor Components: 64K x 16 Memory 8 x 6... operation execution  Share operand fetch and address fetch  Share operand execution and effective address computation  Thus, instruction cycle reduced to 4 steps 28 Reduced instruction-set for a 32-bit processor a) Register Instructions: arithmetic, logic, move and shift Name Op Dest, Src1, Src2 Op Dest, Src1, Src2 Move Dest, Src1 Shift Dest, Src1, Constant b) Memory instructions: load and store Name... (Dest)