Advanced contact engineering for silicon, germanium and germanium tin devices

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Advanced contact engineering for silicon, germanium and germanium tin devices

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ADVANCED CONTACT ENGINEERING FOR SILICON, GERMANIUM, GERMANIUM-TIN DEVICES TONG YI NATIONAL UNIVERSITY OF SINGAPORE 2014 ADVANCED CONTACT ENGINEERING FOR SILICON, GERMANIUM, GERMANIUM-TIN DEVICES TONG YI (M. Eng.), NUS A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2014 Declaration I hereby declare that the thesis is my original work and it has been written by me in its entirety. I have duly acknowledged all the sources of information which have been used in the thesis. This thesis has also not been submitted for any degree in any university previously. TONG YI 20 July, 2014 i Acknowledgements First and foremost, I would like to express my appreciation to my research advisor, Professor Yeo Yee Chia for his patient guidance throughout my Ph.D candidature at National University of Singapore. His knowledge and innovation in the field of semiconductor devices and nanotechnology has been truly inspirational. I am thankful to him for sharing his knowledge and experiences, and have benefitted immensely from the regular discussions with him. I would like to thank Dr. Chua Lye Hing and Dr. Todd Henry for their valuable discussion and suggestion throughout the collaboration during the course of my research. Special thanks to Professor Teo Kie Leong and Associate Professor Daniel Chua who have provided many useful discussions for my Ph.D qualification exam. I am also grateful to Dr. Deng Jie, Mr. Chum Chan Choy, Mr. Lin Poh Chong, Ms. Lai Mei Ying, and Ms. Teo Siew Lang for their great help while I was doing device fabrication and measurement in Institute of Materials Research and Engineering. I would also like to acknowledge the efforts of the technical staffs in Silicon Nano Device Laboratory (SNDL) specifically O Yan Wai Linn, Patrick Tang, Dr. Sandipan Chakraborty, Yu Yi, Lee Weng Fook, Hoe Yeow Liang, Htike Aung, Kyaw Kyaw Oo, Yong Yu Fu, Lau Boon Teck, Sun Zhiqiang in providing technical and administrative support for my research work. I am also grateful for the friendship and discussions from the many outstanding researchers and graduate students of SNDL. Many thanks to Annie, ii Ashvini, Cheng Ran, Chunlei, Dong Yuan, Du Fang, Eugene, Genquan, Gong Xiao, Guo Cheng, Han Han, Huaxin, Ivana, Ji Dong, Kain Lu, Kian Hui, Lanxiang, Lei Dian, Lingzi, Liu Bin, Maruf, Pannir, Pengfei, Phyllis, Sachin, Samuel, Shao-Ming, Sujith, Sun Lu, Tong Xin, Vijay, Wang Wei, Wenjuan, Xingui, Xinke, Xu Xin, Yang Yue, Yinjie, Yu Pu, Zhou Qian, Zhu Zhu, and many others. I‘m grateful that our paths have crossed and I wish all of you a continuous success in future. Last but not least, my deepest thanks and profound gratitude go to my beloved family for their continuous encouragements and support. I would like to thank my parents Tong Xiao Ping and You Jin Song, for giving birth to me at the first place and supporting me spiritually throughout my life. To my sisters Cong Cong, Ding Xiao Sui, and Yu Ke Xin, thank you for your encouragement throughout this journey. I am grateful to my mother-in-law and father-in-law for all of the sacrifices that you‘ve made on my behalf. Words can not express how grateful I am to my beloved wife, Peng Na, throughout my candidature. Thank you for your love and understanding. To my beloved son Tong Hao Ze, I would like to express my thanks for being such a good boy always cheering me up. This thesis is dedicated to them. iii Table of Contents Declaration …………………………………………………………….i Acknowledgements ii Table of Contents iv Summary ………………………………………………………… viii List of Tables x List of Figures . xi List of Symbols . xxii List of Abbreviations xxiv Chapter Introduction 1.1 Challenges to CMOS Scaling: A Background 1.2 Metal-Semiconductor Contacts . 1.2.1 Metal-Silicon Contacts . 1.2.2 Metal-Germanium Contacts . 1.3 Development of Advanced Contact Engineering Techniques 1.3.1 Dopant Segregation Technique 1.3.2 Insertion of Interfacial Layer between Metal and Semiconductor 12 1.3.3 Epitaxial Metal and Semiconductor Interface . 15 1.3.4 Technology Requirements for Specific Contact Resistivity 15 1.3.5 Specific Contact Resistivity Reduction for Si and Ge Contacts . 17 1.3.6 Specific Contact Resistivity Extraction 20 1.3.7 Four Terminals Cross Bridge Kelvin Structure . 22 1.4 Objectives of Research . 25 1.5 Thesis Outline and Original Contributions 26 iv Chapter Cold Silicon Pre-amorphization Implant and Pre- silicide Sulfur Implant for Advanced Nickel Silicide Contacts 2.1 Background . 29 2.2 Device Fabrication 31 2.3 Results and Discussion . 33 2.3.1 Benefits Of Cold Si Pre-amorphization Implant On Nickel Silicide Formation . 33 2.3.2 Electrical Characterization Of Diodes With Cold Silicon PreAmorphization Implant and Sulfur Implant 38 2.3.3 Mechanism For The Effective Schottky Barrier Height Modulation In Nickel Silicide Contacts 41 2.4 Summary . 51 Chapter Selenium Segregation for Effective Schottky Barrier Height Reduction in NiGe/n-Ge Contacts 3.1 Background . 52 3.2 Device Fabrication 53 3.3 Results and Discussion . 56 3.3.1 Electrical Characteristics of Schottky Diodes . 56 3.3.2 Physical Characterization Of Ge Samples With Selenium Or Sulfur Implant 58 3.3.3 Proposed Mechanism For Reducing The Effective Schottky Barrier Height of Nickel Monogermanide Contacts with Se or S Segregaion 65 3.4 Summary . 68 Chapter Low Specific Contact Resistivity Nickel Monogermanide Contacts on N-type Germanium using a New High Temperature Phosphorus and Sulfur Co-Implant Technique 4.1 Background . 69 4.2 Benefits of High Temperature Implantation in Ge . 71 4.3 Device Fabrication 77 v 4.4 Electrical Characteristics . 80 4.5 Mechanism of ρc Reduction by HT P+ and S+ Co-Implantation . 84 4.6 Effect of Metal Thickness on the Accuracy of the Extraction of the Specific Contact Resistivity 89 4.7 Failed Experiment of Ge FinFET Fabrication . 94 4.8 Summary . 99 Chapter xSnx Ni(Ge1-xSnx) Ohmic Contact Formation on N-type Ge1- using Selenium or Sulfur Implant and Segregation 5.1 Background . 100 5.2 Device Fabrication 102 5.3 Results and Discussion . 104 5.3.1 Material Characterization Of Blanket Samples Of Nickel Stanogermanide Films With Selenium Or Sulfur Implant 104 5.3.2 Electrical Characterization Of Diodes With Selenium Or Sulfur Implant 105 5.3.3 Mechanisms For Reduction Of The Effective Schottky Barrier Height In Selenium Or Sulfur Implanted Nickel Germanium Tin Contacts . 110 5.4 Summary . 118 Chapter Conclusion and Future Work 6.1 Conclusion . 119 6.2 Contributions of This Thesis 120 6.2.1 Cold Silicon Pre-amorphization Implant and Pre-silicide Sulfur Implant for Advanced Nickel Silicide Contacts 120 6.2.2 Selenium Segregation for Effective Schottky Barrier Height Reduction in NiGe/n-Ge Contacts 120 6.2.3 Low Specific Contact Resistivity Nickel Monogermanide Contacts on N-type Germanium using a New High Temperature Phosphorus and Sulfur Co-Implant Technique 121 vi Implant," in 10th International Conference on Solid-State and IntegratedCircuit Technology, Shanghai, China, pp. 1021 - 1023, Nov. - 4, 2010. [89] Y. Tong, Q. Zhou, L. H. Chua, T. Thanigaivelan, T. Henry, and Y. C. Yeo, "Impact of a germanium and carbon preamorphization implant on the electrical characteristics of NiSi/Si contacts with a presilicide sulfur implant," IEEE Electron Device Lett., vol. 32, no. 12, pp. 1734 - 1736, Dec. 2011. [90] Y. Tong, B. Liu, P. S. Y. Lim, and Y. C. Yeo, "Selenium segregation for effective Schottky barrier height reduction in NiGe/n-Ge contacts," IEEE Electron Device Lett., vol. 33, no. 6, pp. 773 - 775, Jun. 2012. [91] J. Luo, Z. J. Qiu, D. W. Zhang, P. E. Hellstrom, M. Ostling, and S. L. Zhang, "Effects of carbon on Schottky barrier heights of NiSi modified by dopant segregation," IEEE Electron Device Lett., vol. 30, no. 6, pp. 608 - 610, Jun. 2009. [92] I. Ok, C. D. Young, W. Y. Loh, T. Ngai, S. Lian, J. Oh, M. P. Rodgers, S. Bennett, H. O. Stamper, D. L. Franca, S. Lin, K. Akarvardar, C. Smith, C. Hobbs, P. Kirsch, and R. Jammy, ―Enhanced performance in SOI FinFETs with low series resistance by aluminum implant as a solution beyond 22 nm node,‖ in Symp. on VLSI Tech. 2010, pp. 17-18. [93] X. Guo, Y. Tang, Y. L. Jiang, X. P. Qu, G. P. Ru, D. W. Zhang, D. Deduytsche, and C. Detavernier, ―Study of Schottky barrier height modulation for NiSi/Si contact with an antimony interlayer,‖ Microelectron. Eng., 106, 121, 2013. [94] M. Mueller, Q. T. Zhao, C. Urban, C. Sandow, D. Buca, S. Lenk, S. Este´vez, and S. Mantl, ―Schottky-barrier height tuning of NiGe/n-Ge contacts using As and P segregation,‖ Mater. Sci. Eng., B 154–155, pp. 168–171, 2008. [95] R. H. Williams, V. Montgomery, R. R. Varma, and A. McKinley, ―The influence of interfacial layers on the nature of gold contacts to silicon and indium phosphide,‖ J. Phys. D 10, pp. L253–L256, 1977. [96] F. Hasegawa, M. Onomura, C. Mogi, and Y. Nannichi, ―Reduction of Schottky barrier heights by surface oxidation of GaAs and its influence on DLTS signals for the midgap level EL2,‖ Solid-State Electron., 31, pp. 223– 228, 1988. [97] M. A. Sobolewski and C. R. Helms, ―Properties of ultrathin thermal nitrides in silicon Schottky barrier structures,‖ Appl. Phys. Lett., 54, pp. 638–640, 1989. 134 [98] K. Hattori and Y. Torii, ―A new method to fabricate Au/n-type InP Schottky contacts with an interfacial layer,‖ Solid-State Electron., 34, pp. 527–531, 1991. [99] J. Nakamura, H. Niu, and S. Kishino, ―Barrier Height of InP Schottky Diodes Prepared by Means of UV Oxidation,‖ Jpn. J. Appl. Phys., Part 32, pp. 699–703, 1993. [100] H. Sawatari and O. Oda, ―Schottky diodes on n‐type InP with CdOx interfacial layers grown by the adsorption and oxidation method,‖ J. Appl. Phys., 72, pp. 5004–5006, 1992. [101] C. J. Huang, ―Enhancement of metal–semiconductor barrier height with superthin silicon dioxide films deposited on gallium arsenide by liquid phase deposition,‖ J. Appl. Phys., 89, pp. 6501–6505, 2001. [102] R. Wang, M. Xu, P. D. Ye, and R. Huang, ―Schottky-barrier height modulation of metal/In 0.53 Ga 0.47 As interfaces by insertion of atomiclayer deposited ultrathin Al2O3,‖ J. Vac. Sci. Technol. B, 29, 041206 2011. [103] D. Connelly, C. Faulkner, P. A. Clifton, and D. E. Grupp, ―Fermi-level depinning for low-barrier Schottky source/drain transistors,‖ Appl. Phys. Lett., 88, 012105, 2006. [104] B. E. Coss, W. Y. Loh, R. M. Wallace, J. Kim, P. Majhi, and R. Jammy, ―Near band edge Schottky barrier height modulation using high-κ dielectric dipole tuning mechanism,‖ Appl. Phys. Lett., 95, 222105, 2009. [105] M. Biber, C. Termirci, and A. Turut, ―Barrier height enhancement in theAu/n-GaAs Schottky diodes with anodization process,‖ J. Vac. Sci. Technol. B, 20, pp. 10–13, 2002. [106] M. Kobayashi, A. Kinoshita, K. Saraswat, H. S. P. Wong, and Y. Nishi, ―Fermi level depinning in metal/Ge Schottky junction for metal source/drain Ge metal-oxide-semiconductor field-effect-transistor application,‖ J. Appl. Phys., 105, 023702, 2009. [107] Y. Zhou, M. Ogawa, X. Han, and K. L. Wang, ―Alleviation of Fermi-level pinning effect on metal/germanium interface by insertion of an ultrathin aluminum oxide,‖ Appl. Phys. Lett., 93, 202105, 2008. [108] Z. Wu, W. Huang, C. Li, H. Lai, and S. Chen, ―Modulation of Schottky Barrier Height of Metal/TaN/n-Ge Junctions by Varying TaN Thickness,‖ IEEE Trans. Electron Devices, 59, pp. 1328–1331, 2012. [109] T. Nishimura, K. Kita, and A. Toriumi, ―A significant shift of Schottky barrier heights at strongly pinned metal/germanium interface by inserting an ultra-thin insulating film,‖ Appl. Phys. Express, vol. 1, 051406, 2008. 135 [110] J.-Y. J. Lin, A. M. Roy, A. Nainani, Y. Sun, and K. C. Saraswat, ―Increase in current density for metal contacts to n-germanium by inserting TiO2 interfacial layer to reduce Schottky barrier height,‖ Appl. Phys. Lett., vol. 98, 092113, 2011. [111] K. Martens, R. Rooyackers, A. Firrincieli, B. Vincent, R. Loo, B. De Jaeger, M. Meuris, P. Favia, H. Bender, B. Douhard, W. Vandervorst, E. Simoen, M. Jurczak, D. J. Wouters, and J. A. Kittl, ―Contact resistivity and Fermi-level pinning in n-type Ge contacts with epitaxial Si-passivation,‖ Appl. Phys. Lett., vol. 98, 013504, 2011. [112] R. R. Lieten, S. Degroote, M. Kuijk, and G. Borghs, ―Ohmic contact formation on n-type Ge,‖ Appl. Phys. Lett., vol. 92, 022106, 2008. [113] Y. Zhou, W. Han, Y. Wang, F. Xiu, J. Zou, R. K. Kawakami, and K. L. Wang, ―Investigating the origin of Fermi level pinning in Ge Schottky junctions using epitaxially grown ultrathin MgO films,‖ Appl. Phys. Lett., 96, 102103, 2010. [114] R. T. Tung, J. M. Gibson, and J. M. Poate, ―Formation of Ultrathin SingleCrystal Silicide Films on Si: Surface and Interfacial Stabilization of Si-NiSi2 Epitaxial Structures,‖ Phys. Rev. Lett., 50, pp. 429–432, 1983. [115] R. T. Tung, J. M. Gibson, and J. M. Poate, ―Growth of single crystal epitaxial silicides on silicon by the use of template layers,‖ Appl. Phys. Lett., 42, pp. 888–890, 1983. [116] J. P. Sullivan, R. T. Tung, and F. Schrey, ―Control of interfacial morphology: NiSi2/Si(100),‖ J. Appl. Phys., 72, 478, 1992. [117] A. Firrincieli, K. Martens, R. Rooyackers, B. Vincent, E. Rosseel, E. Simoen, J. Geypen, H. Bender, C. Claeys, and J. A. Kittl, "Study of ohmic contacts to n-type Ge: snowplow and laser activation," Appl. Phys. Lett., vol. 99, no. 24, pp. 242104 - 242104-3, Dec. 2011. [118] P. S. Y. Lim, D. Z. Chi, Q. Zhou, and Y.-C. Yeo, "NiSi2 formation through annealing of nickel and dysprosium stack on Si(100), and impact on effective Schottky barrier height," J. Appl. Phys., vol. 113, no. 1, 013712, Jan. 2013. [119] R. T. Tung, ―Schottky barrier height—do we really understand what we measure?,‖ J. Vac. Sci. Technol. B, 11, pp. 1546–1552, 1993. [120] P. S. Y. Lim, D. Z. Chi, P. C. Lim, X. C. Wang, T. K. Chan, T. Osipowicz, and Y.-C. Yeo, "Formation of epitaxial metastable NiGe2 thin film on Ge(100) by pulsed excimer laser anneal," Appl. Phys. Lett., vol. 97, no. 18, 182104, Nov. 2010. 136 [121] P. S. Y. Lim, D. Z. Chi, X. C. Wang, and Y.-C. Yeo, "Fermi-level depinning at the metal-germanium interface by the formation of epitaxial nickel digermanide NiGe2 using pulsed laser anneal," Appl. Phys. Lett., vol. 101, 172103, Oct. 2012. [122] M. Shayesteh, K. Huet, I. Toqué-Tresonne, R. Negru, C. L. M. Daunt, N. Kelly, D. O‘Connell, R. Yu, V. Djara, P. B. Carolan, N. Petkov, and R. Duffy, ―Atomically Flat Low-Resistive Germanide Contacts Formed by Laser Thermal Anneal,‖ IEEE Trans. on Electron Devices, vol. 60, no. 7, pp. 2178-2185, July 2013. [123] S. E. Thompson, R. S. Chau, T. Ghani, K. Mistry, S. Tyagi, and M. T. Bohr, ―In search of ―forever,‖ continued transistor scaling one new material at a time,‖ IEEE Trans. Semiconductor Manufacturing, vol. 18, pp. 26, 2005. [124] S. D. Kim, C. M. Park, and J. C. S. Woo, ―Advanced model and analysis of series resistance for CMOS scaling into nanometer regime – Part II: Quantitative analysis,‖ IEEE Trans. on Electron Devices, vol. 30, pp. 467 − 472, 2002. [125] A. Y. C. Yu, ―Electron tunneling and contact resistance of metal-silicon contact barriers,‖ Solid-State Electronics, vol. 13, issue 2, pp. 239 – 247, Feb.1970. [126] C. M. Osburn and K. R. Bellur, ―Low parasitic resistance contacts for scaled ULSI devices,‖ Thin Solid Films, vol. 332, pp. 428-436, 1998. [127] N. Stavitski, M. J. H. van Dal, A. Lauwers, C. Vrancken, A. Y. Kovalgin, and R. A. M. Wolters, ―Systematic TLM Measurements of NiSi and PtSi Specific Contact Resistance to n- and p-Type Si in a Broad Doping Range,‖ IEEE Electron Device Lett., vol. 29, no. 4, pp. 378-381, Apr. 2008. [128] K.-W. Ang, K. Majumdar, K. Matthews, C. D. Young, C. Kenney, C. Hobbs, P. D. Kirsch, R. Jammy, R. D. Clark, S. Consiglio, K. Tapily, Y. Trickett, G. Nakamura, C. S. Wajda, G. J. Leusink, M. Rodgers, and S. C. Gausepohl, ―Effective Schottky barrier height modulation using dielectric dipoles for source/drain specific contact resistivity improvement,‖ in Proc. IEEE IEDM, pp. 439-442, Dec. 2012. [129] L. Knoll, Q. T. Zhao, S. Habicht, C. Urban, B. Ghyselen, and S. Mantl, ―Ultrathin Ni Silicides With Low Contact Resistance on Strained and Unstrained Silicon,‖ IEEE Electron Device Lett., vol. 31, no. 4, pp. 350-352, Apr. 2010. [130] K. Ohuchi, C. Lavoie, C. Murray, C. D‘Emic, I. Lauer, J. O. Chu, B. Yang, P. Besser, L. Gignac, J. Bruley, G. U. Singco, F. Pagette, A. W. Topol, M. J. Rooks, J. J. Bucchignano,V. Narayanan, M. Khare, M. Takayanagi, K. 137 Ishimaru, D. Park, G. Shahidi, and Paul Solomon, ―Extendibility of NiPt Silicide Contacts for CMOS Technology Demonstrated to the 22-nm Node,‖ in Proc. IEEE IEDM, pp. 1029-1031, Dec. 2007. [131] K. Majumdar, S. Vivekanand, C. Huffman, K. Matthews, T. Ngai, C. H. Chen, R. H. Baek, W. Y. Loh, M. Rodgers, H. Stamper, S. Gausepohl, C. Y. Kang, C. Hobbs, and P. D. Kirsch, ―STLM: A Sidewall TLM Structure for Accurate Extraction of Ultralow Specific Contact Resistivity,‖ IEEE Electron Device Lett., vol. 34, no. 9, pp. 1082-1084, Sept. 2013. [132] S. S. Cohen, P. A. Piacente, G. Gildenblat, and D. M. Brown, ―Platinum Silicide Ohmic Contacts to Shallow Junctions in Silicon,‖ J. Appl. Phys., vol. 53, pp. 8856-8862, 1982. [133] S. Swirhun, K. C. Saraswat, and R. M. Swanson, ―Contact Resistance of LPCVD-W/Al and PtSi/W/Al Metallization,‖ IEEE Electron Device Lett., vol. 5, pp. 209-211, 1984. [134] H. Miyoshi, T. Ueno, K. Akiyama, Y. Hirota, and T. Kaitsuka, ―In-situ Contact Formation for Ultra-low Contact Resistance NiGe Using Carrier Activation Enhancement (CAE) Techniques for Ge CMOS,‖ Symp. VLSI Techno. Tech. Dig., 2014, pp. 180-181. [135] S. Gupta, P. P. Manik, R. K. Mishra, A. Nainani, M. C. Abraham, and S. Lodha, ―Contact resistivity reduction through interfacial layer doping in metal-interfacial layersemiconductor contacts,‖ Journal of Appl. Phys., 113, 234505, 2013. [136] J. Oh, J. Huang, Y.-T. Chen, I. Ok, K. Jeon, S.-H. Lee, B. Sassman, W.-Y. Loh, H.-D. Lee, D.-H. Ko, P. D. Kirsch, and R. Jammy, ―High Specific Contact Resistance of Ohmic Contacts to n-Ge Source/Drain and Low Transport Characteristics of Ge nMOSFETs,‖ 2010 International Conference on Solid State Devices and Materials, p-3-20. [137] H. Miyoshi, T. Ueno, Y. Hirota, J. Yamanaka, K. Arimoto, K. Nakagawa, and T. Kaitsuka, ―Low NiGe Contact Resistances by Carrier Activation Enhancement (CAE) Techniques for Ge CMOSFETs,‖ 2013 International Conference on Solid State Devices and Materials, pp. 598-599. [138] Z. Li, X. An, Q. Yun, M. Lin, M. Li, M. Li, X. Zhang, and R. Huang, ―Low Specific Contact Resistivity to n-Ge and Well-Behaved Ge n+/p Diode Achieved by Multiple Implantation and Multiple Annealing Technique,‖ IEEE Electron Device Lett., vol. 34, no. 9, Sept. 2013. [139] K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C. H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hatttendorf, J. He, J. Hicks, R. 138 Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pei, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Schifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P. Vandervoorn, S. Williams, and K. Zawadzki, ―A 45 nm logic technology with high-k plus metal gate transistors, strained silicon, Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging,‖ IEEE International Electron Device Meeting Tech. Dig., pp. 247–250, 2007. [140] H. S. Wong, L. Chan, G. Samudra, and Y. C. Yeo, ―Effective Schottky barrier height reduction using sulfur or selenium at the NiSi/n-Si(100) interface for low resistance contacts,‖ IEEE Electron Device Lett., vol. 28, pp. 1102–1104, Dec. 2007. [141] P.-S. Chen, T. E. Hsieh, and C. -H. Chu, ―Removal of end-of-range defects in Ge+-pre-amorphized Si by carbon ion implantation,‖ J. Appl. Phys., vol. 85, no. 6, pp. 3114–3119, 033526, Mar. 1999. [142] M. H. Clark, K. S. Jones, T. E. Haynes, C. J. Barbour, K. G. Minor, and E. Andideh, ―Effects of amorphizing species‘ ion mass on the end-of-range damage formation in silicon,‖ Appl. Phys. Lett., vol. 80, no. 22, 4163, 2002 [143] B.-Y. Tsui, C.-M. Hsieh, Y.-R. Hung, Y. Yang, R. Shen, S. Cheng, and T. Lin, ―Improvement of the thermal stability of NiSi by germanium ion implantation,‖ J. Electrochem. Soc., vol. 157, no. 2, pp. H137–H143, 2010. [144] C. Ortolland, M. Togo, E. Rosseel, S. Mertens, J. Kittl, P. P. Absil, A. Lauwers, and T. Hoffmann, ―New carbon-based thermal stability improvement technique for NiPtSi used in CMOS technology,‖ Microelectronic Engineering, vol. 88, issue 5, pp. 578–582, May 2011. [145] F. A. Khaja, B. Colombeau, T. Thanigaivelan, D. Ramappa, and T. Henry, ―Physical understanding of cryogenic implant benefits for electrical junction stability,‖ Appl. Phys. Lett., vol. 100, 112102, 2012. [146] C. L. Yang, C. I. Li, G. P. Lin, R. Liu, B. C. Hsu, M. Chan, J. Y. Wu, B. Colombeau, B. N. Guo, H. J. Gossmann, T. Wu, W. Feng, H. L. Sun, and S. Lu, ―Benefits of cryo-implantation for 28 nm NMOS advanced junction formation,‖ Semicond. Sci. Technol., vol.27, 045003, 2012. [147] A. Ozcan, D. Wall, J. Jordan-Sweet, and C. Lavoie, ―Effects of temperature dependent pre-amorphization implantation on NiPt silicide formation and thermal stability on Si(100),‖ Appl. Phys. Lett., vol. 102, 172107, 2013. [148] C. Lavoie, F. M. d‘Heurle, C. Detavernier and C. Cabral, Jr., ―Towards implementation of a nickel silicide process for CMOS technologies,‖ Microelectronic Engineering, vol. 70, no. 2–4, pp. 144–157, Nov. 2003. 139 [149] R. T. P. Lee, L.-T. Yang, T.-Y. Liow, K.-M. Tan, A. E.-J. Lim, K.-W. Ang, D. M. Y. Lai, K. M. Hoe, G.-Q. Lo, G. S. Samudra, D. Z. Chi, and Y.-C. Yeo, ―Nickel-silicide:carbon contact technology for n-channel MOSFETs with silicon-carbon source/drain,‖ IEEE Electron Device Lett., vol. 29, no. 1, pp. 89–92, Jan. 2008. [150] S. W. Lee, S. H. Huang, S. L. Cheng, P. S. Chen, and W. W. Wu, ―Ni silicide formation on epitaxial Si1-yCy/(001) layers,‖ Thin Solid Films, vol. 518, pp. 7394–7397, 2010. [151] J. A. V. d. Berg, D. G. Armour, S. Zhang, S. Whelan, H. Ohno, T.-S. Wang, A. G. Cullis, E. H. J. Collart, R. D. Goldberg, P. Bailey, and T. C. Q. Noakes, ―Characterization by medium energy ion scattering of damage and dopant profiles produced by ultrashallow B and As implants into Si at different temperatures,‖ J. Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol. 20, pp. 974–983, 2002. [152] M. Kase, Y. Kikuchi, M. Kimura, H. Mori, and R. B. Liebert, ―Defects produced in Si p+ n diodes by B+ implantation at liquid nitrogen temperature or -60 °C,‖ J. Appl. Phys., vol. 75, pp. 3358–3364, 1994. [153] D. Connelly and P. Clifton, ―Comments on ‗Effective modulation of Ni silicide Schottky barrier height using chlorine ion implantation and segregation‘,‖ IEEE Electron Device Lett., vol. 31, pp. 417–418, May 2010. [154] J. Osvald, ―Comment on ‗Negative Schottky barrier between titanium and ntype Si(001) for low-resistance ohmic contacts‘,‖ Solid-State Electronics, vol. 48, pp. 2347–2349, Dec. 2004. [155] M. Tao and J. Zhu, ―Response to Comment on ‗Negative Schottky barrier between titanium and n-type Si(001) for low-resistance ohmic contacts‘,‖ Solid-State Electronics, vol. 48, pp. 2351–2352, Dec. 2004. [156] D. K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. (John Wiley & Sons, New York, 2006). [157] S. M. Sze, Physics of Semiconductor Devices, 2nd ed. (Wiley, New York, 1981). [158] Y. Mo, M. Z. Bazant, and E. Kaxiras, ―Sulfur point defects in crystalline and amorphous silicon,‖ Phys. Rev. B, vol. 70, 205210, Nov. 2004. [159] H. Overhof, M. Scheffler, and C. M. Weinert, ―Formation energies, electronic-structure, and hyperfine fields of chalcogen point-defects and defect pairs in silicon,‖ Phys. Rev. B, vol. 43, pp. 12494-12506, May 1991. [160] H. G. Grimmeiss, E. Janzen, and B. Skarstam, ―Deep sulfur-related centers in silicon,‖ J. Appl. Phys., vol. 51, pp. 4212–4217, 1980. 140 [161] J. Coutinho, V. J. B. Torres, R. Jones, and P. R. Briddon, ―Electrical activity of chalcogen-hydrogen defects in silicon,‖ Phys. Rev. B, vol. 67, 035205, Jan. 2003. [162] H. G. Grimmeiss and E. Janzen, in Handbook on Semiconductors, edited by T. S. Moss and S. Mahajan, (Elsevier, Amsterdam, 1994). [163] E. Janzén, R. Stedman, G. Grossmann, and H. G. Grimmeiss, ―Highresolution studies of sulfur- and selenium-related donor centers in silicon,‖ Phys. Rev. B, vol. 29, pp. 1907–1918, 1984. [164] M. Tabbal, T. Kim, J. M. Warrender, M. J. Aziz, B. L. Cardozo, and R. S. Goldman, ―Formation of single crystal sulfur supersaturated silicon based junctions by pulsed laser melting,‖ J. Vacuum Science & Technology B, vol. 25, pp. 1847–1852, Nov. 2007. [165] K. Sanchez, I. Aguilera, P. Palacios, and P. Wahnon, ―Formation of a reliable intermediate band in Si heavily coimplanted with chalcogens (S, Se, Te) and group III elements (B, Al),‖ Phys. Rev. B, vol. 82, Oct. 2010. [166] S. M. Sze and J. C. Irvin, ―Resistivity, mobility and impurity levels in GaAs, Ge, and Si at 300 degrees K,‖ Solid-State Electronics, vol. 11, pp. 599–602, 1968. [167] Medici Version A-2007.12, Dec. 2007. [168] K. Matsuzawa, K. Uchida, and A. Nishiyama, ―A unified simulation of Schottky and ohmic contacts,‖ IEEE Trans. Electron Devices, vol. 47, pp. 103–108, Jan. 2000. [169] M. Ieong, P. M. Solomon, S. E. Laux, H. S. P. Wong, and D. Chidambarrao, ―Comparison of raised and Schottky source/drain MOSFETs using a novel tunneling contact model,‖ IEEE International Electron Device Meeting Tech. Dig., pp. 733–736, 1998. [170] K. Ikeda, Y. Yamashita, and N. Sugiyama, ―Modulation of NiGe/Ge Schottky barrier height by sulfur segregation during Ni germanidation,‖ Appl. Phys. Lett., vol. 88, 152115, 2006. [171] M. Kobayashi, A. Kinoshita, K. Saraswat, H.-S. P. Wong and Y. Nishi, ―Fermi-Level depinning in metal/Ge Schottky junction and its application to metal source/drain Ge NMOSFET,‖ VLSI Symp. Tech. Dig., pp. 54–55, 2008. [172] G. A. M. Hurkx, D. B. M. Klaassen, and M. P. G. Knuvers, ―A new recombination model for device simulation including tunnelling,‖ IEEE Trans. Electron Devices, vol. 39, no. 2, pp. 331–338, 1992. 141 [173] S.-M. Koh, G. S. Samudra, and Y.-C. Yeo, ―Contact Technology for Strained nFinFETs With Silicon–Carbon Source/Drain Stressors Featuring Sulfur Implant and Segregation,‖ IEEE Trans. Electron Devices, vol. 59, pp. 1046-1055, Apr. 2012. [174] M. Jamil, J. Mantey, E. U. Onyegam, G. D. Carpenter, E. Tutuc, and S. K. Banerjee, ―High-Performance Ge nMOSFETs with n+-p junctions formed by ‗spin-on dopant‘,‖ IEEE Electron Device Lett., vol. 32, no. 9, pp. 1203 1205, Sept. 2011. [175] L. Hutin, C. Le Royer, C. Tabone, V. Delaye, F. Nemouchi, F. Aussenac, L. Clavelier, and M. Vinet, ―Schottky barrier height extraction in ohmic regime: Contacts on fully processed GeOI substrates,‖ J. Electrochem. Soc., 156, H522 - H527, 2009. [176] M. Koike, Y. Kamata, T. Ino, D. Hagishima, K. Tatsumura, M. Koyama, and A. Nishiyama, ―Diffusion and activation of n-type dopants in germanium,‖ J. Appl. Phys., 104, 023523, 2008. [177] P. Paramahans, S. Gupta, R. K. Mishra, N. Agarwal, A. Nainani, Y. Huang, M.C. Abraham, S. Kapadia, U. Ganguly, and S. Lodha, ―ZnO: an attractive option for n-type metal-interfacial layer-semiconductor (Si, Ge, SiC) contacts,‖ in Symp. on VLSI Tech. 2012, pp. 83–84. [178] M. Shayesteh, C. LL. M. Daunt, D. O‘Connell, V. Djara, M. White, B. Long, and R. Duffy, ―NiGe contacts and junction architectures for P and As doped germanium devices,‖ IEEE Trans. on Electron Devices, vol. 58, no. 11, pp.3801-3807, Nov. 2011. [179] M. Shayesteh, K. Huet, I. Toqué-Tresonne, R. Negru, C. L. M. Daunt, N. Kelly, D. O‘Connell, R. Yu, V. Djara, P. B. Carolan, N. Petkov, and R. Duffy, ―Atomically Flat Low-Resistive Germanide Contacts Formed by Laser Thermal Anneal Maryam,‖ IEEE Trans. on Electron Devices, vol. 60, no. 7, pp. 2178-2185, July 2013. [180] C. Wang, C. Li, S. Huang, W. Lu, G. Yan, G. Lin, J. Wei, W. Huang, H. Lai, and S. Chen, ―Low Specific Contact Resistivity to n-Ge and Well-Behaved Ge n+/p Diode Achieved by Implantation and Excimer Laser Annealing,‖ Appl. Phys. Express, 6, 106501, 2013. [181] K. Gallacher, P. Velha, D. J. Paul, I. MacLaren, M. Myronov, and D. R. Leadley, ―Ohmic contacts to n-type germanium with low specific contact resistivity,‖ Appl. Phys. Lett., 100, 022113, 2012. [182] K. Sawano, Y. Hoshi, K. Kasahara, K. Yamane, K. Hamaya, M. Miyao, and Y. Shiraki, ―Ultrashallow ohmic contacts for n-type Ge by Sb delta-doping,‖ Appl. Phys. Lett., 97, 162108, 2010. 142 [183] J. Kim, S. W. Bedell, S. L. Maurer, R. Loesing, and D. K. Sadana, ―Activation of Implanted n-Type Dopants in Ge Over the Active Concentration of Å 1020 cm−3 Using Coimplantation of Sb and P,‖ Electrochem. and Solid-State Lett., 13, H12-H15, 2010. [184] M. Togo, Y. Sasaki, G. Zschätzsch, G. Boccardi, R. Ritzenthaler, J. W. Lee, F. Khaja, B. Colombeau, L. Godet, P. Martin, S. Brus, S. E. Altamirano, G. Mannaert, H. Dekkers, G. Hellings, N. Horiguchi, W. Vandervorst, and A. Thean, ―Heated Implantation with Amorphous Carbon CMOS Mask for Scaled FinFETs,” in Symp. on VLSI Tech. 2013, T196 - T197. [185] V. R. D'Costa, C. S. Cook, A. G. Birdwell, C. L. Littler, M. Canonico, S. Zollner, J. Kouvetakis, and J. Menendez, "Optical critical points of thin-film Ge1-ySny alloys: A comparative Ge1-ySny/Ge1-xSix study," Phys. Rev. B, vol. 73, pp. 125207, Mar. 2006. [186] M.A. Razali, A.J. Smith, C. Jeynes, and R.M. Gwilliam, ―TemperatureDependant Study Of Phosphorus Ion Implantation In Germanium,‖ AIP Conf. Proc., 1496, pp. 193-196, 2012. [187] S. M. Sze and J. C. Irvin, "Resistivity mobility and impurity levels in GaAs Ge and Si at 300 ºK," Solid-State Electronics, vol. 11, no. 6, pp. 599 - 602, Jun. 1968. [188] Y. Tong, G. Han, B. Liu, Y. Yang, L. Wang, W. Wang, and Y.-C. Yeo, "Ni(Ge1-xSnx) ohmic contact formation on n-type Ge1-xSnx using selenium or sulfur implant and segregation," IEEE Trans. on Electron Devices, vol. 60, no. 2, pp. 746 - 752, Feb. 2013. [189] A. M. Noori, M. Balseanu, P. Boelen, A. Cockburn, S. Demuynck, S. Felch, S. Gandikota, A. J. Gelatos, A. Khandelwal, J. A. Kittl, A. Lauwers, W. C. Lee, J. X. Lei, T. Mandrekar, R. Schreutelkamp, K. Shah, S. E. Thompson, P. Verheyen, C. Y. Wang, L. Q. Xia, and R. Arghavani, "Manufacturable processes for ≤ 32-nm-node CMOS enhancement by synchronous optimization of strain-engineered channel and external parasitic resistances," IEEE Trans. on Electron Devices, vol. 55, no. 5, pp. 1259 - 1264, May 2008. [190] S. J. Su, W. Wang, B. W. Cheng, G. Z. Zhang, W. X. Hu, C. L. Xue, Y. H. Zuo, and Q. M. Wang, "Epitaxial growth and thermal stability of Ge1-xSnx alloys on Ge-buffered Si(001) substrates," J. of Cryst.l Growth, vol. 317, no. 1, pp. 43 - 46, Feb. 2011. [191] L. Wang, G. Han, S. Su, Q. Zhou, Y. Yang, P. Guo, W. Wang, Y. Tong, P. S. Y. Lim, C. Xue, Q. Wang, B. Cheng, and Y. -C. Yeo, "Metal stanogermanide contacts with enhanced thermal stability for high mobility germanium-tin field-effect transistor," in International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 23 - 25, 2012. 143 [192] D. K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. (John Wiley & Sons, New York, 2006). [193] S. M. Sze, Physics of Semiconductor Devices, 2nd ed. (Wiley, New York, 1981). [194] Medici Version A-2007.12, Dec. 2007. [195] K. L. Low, Y. Yang, G. Han, W. Fan, and Y.-C. Yeo, "Electronic band structure and effective mass parameters of GeSn alloys", J. Appl. Phys., in press. [196] J. Menendez and J. Kouvetakis, "Type-I Ge/Ge1-x-ySixSny strained-layer heterostructures with a direct Ge bandgap," Appl. Phys. Lett., vol. 85, no. 7, pp. 1175 - 1177, Aug. 2004. [197] Y. Tong, Q. Zhou, K. L. Low, L. X. Wang, L. H. Chua, T. Thanigaivelan, T. Henry, and Y. C. Yeo, ―Cold Silicon Pre-amorphization Implant and Presilicide Sulfur Implant for Advanced Nickel Silicide Contacts,‖ IEEE Trans. Electron Devices, conditionally accepted. [198] Y. Tong, B. Liu, P. S. Y. Lim, Q. Zhou, and Y.-C. Yeo, "Novel selenium implant and segregation for reduction of effective Schottky barrier height in NiGe/n-Ge contacts," International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 23-25, 2012. [199] Y. Tong, X. Gong, L. X. Wang, Q. Zhou, V. Richard D‘Costa, L. H. Chua, W. Zou, C. Hatem, C. Chan, T. Henry, and Y.-C. Yeo, ―Low Specific Contact Resistivity Nickel Monogermanide Contacts on N-type Germanium using a New High Temperature Phosphorus and Sulfur Co-Implant Technique,‖ IEEE Trans. Electron Devices, to be submitted. [200] Y. Tong, S. Su, B. Liu, L. Wang, P. S. Y. Lim, W. Wang, K. L. Low, G. Zhang, C. Xue, B. Cheng, G. Han, and Y.-C. Yeo, "Nickel stanogermanide ohmic contact on n-type germanium-tin (Ge1-xSnx) using Se and S implant and segregation," International Conference on Solid-State Devices and Materials, Kyoto, Japan, Sep. 25 - 27, 2012, pp. 755 - 756. [201] S. R. McKibbin, C. M. Polley, G. Scappucci, J. G. Keizer, and M. Y. Simmons, ―Low resistivity, super-saturation phosphorus-in-silicon monolayer doping,‖ Appl. Phys. Lett., vol. 104, 123502, Mar. 2014. [202] B.-Y. Tsui and H.-T. Tseng, ―Evaluation of ultra-low specific contact resistance extraction by cross-bridge Kelvin resistor structure and transmission line method structure,‖ International Conference of Microelectronic Test Structures (ICMTS), pp. 58-63, 2014. 144 145 Appendix List of Publications Publications Related to This Thesis Work [1] Y. Tong, Q. Zhou, L. H. Chua, T. Thanigaivelan, T. Henry, and Y. C. Yeo, "Impact of a germanium and carbon preamorphization implant on the electrical characteristics of NiSi/Si contacts with a presilicide sulfur implant," IEEE Electron Device Lett., vol. 32, no. 12, pp. 1734 - 1736, Dec. 2011. [2] Y. Tong, Q. Zhou, K. L. Low, L. X. Wang, L. H. Chua, T. Thanigaivelan, T. Henry, and Y. C. Yeo, ―Cold Silicon Pre-amorphization Implant and Presilicide Sulfur Implant for Advanced Nickel Silicide Contacts,‖ IEEE Trans. Electron Devices, accepted. [3] Y. Tong, B. Liu, P. S. Y. Lim, and Y. C. Yeo, "Selenium segregation for effective Schottky barrier height reduction in NiGe/n-Ge contacts," IEEE Electron Device Lett., vol. 33, no. 6, pp. 773 - 775, Jun. 2012. [4] Y. Tong, B. Liu, P. S. Y. Lim, Q. Zhou, and Y.-C. Yeo, "Novel selenium implant and segregation for reduction of effective Schottky barrier height in NiGe/n-Ge contacts," International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 23-25, 2012. [5] Y. Tong, X. Gong, L. X. Wang, Q. Zhou, V. Richard D‘Costa, L. H. Chua, W. Zou, C. Hatem, C. Chan, T. Henry, and Y.-C. Yeo, ―Low Specific Contact Resistivity Nickel Monogermanide Contacts on N-type Germanium using a 146 New High Temperature Phosphorus and Sulfur Co-Implant Technique,‖ IEEE Trans. Electron Devices, to be submitted. [6] Y. Tong, G. Han, B. Liu, Y. Yang, L. Wang, W. Wang, and Y.-C. Yeo, "Ni(Ge1-xSnx) ohmic contact formation on n-type Ge1-xSnx using selenium or sulfur implant and segregation," IEEE Trans. Electron Devices, vol. 60, no. 2, pp. 746 - 752, Feb. 2013. [7] Y. Tong, S. Su, B. Liu, L. Wang, P. S. Y. Lim, W. Wang, K. L. Low, G. Zhang, C. Xue, B. Cheng, G. Han, and Y.-C. Yeo, "Nickel stanogermanide ohmic contact on n-type germanium-tin (Ge1-xSnx) using Se and S implant and segregation," International Conference on Solid-State Devices and Materials, Kyoto, Japan, pp. 755 – 756, Sep. 25 - 27, 2012. [8] Y. Tong, S.-M. Koh, Q. Zhou, A. Y. Du, and Y.-C. Yeo, "Schottky barrier tuning at NiSi/Si interface using pre-silicide aluminum and sulfur coImplant," 10th International Conference on Solid-State and Integrated-Circuit Technology, Shanghai, China, Nov. - 4, 2010. Other Co-authored Publications [9] Q. Zhou, S.-M. Koh, Y. Tong, T. Henry, Y. Erokhin, and Y.-C. Yeo, "Siliconcarbon source and drain stressors: Carbon profile design by ion implantation," J. Electrochemical Society, vol. 159, no. 4, pp. H425 - H432, Apr. 2012. [10] L. Wang, G. Han, S. Su, Q. Zhou, Y. Yang, P. Guo, W. Wang, Y. Tong, P. S. Y. Lim, B. Liu, E. Y.-J. Kong, C. Xue, Q. Wang, B. Cheng, and Y.-C. Yeo, "Thermally stable nickel-platinum stanogermanide contacts for germanium-tin 147 channel MOSFETs," Electrochemical and Solid-State Letters, vol. 15, no. 6, pp. H179 - H181, Mar. 2012. [11] B. Liu, X. Gong, G. Han, P. S. Y. Lim, Y. Tong, Q. Zhou, Y. Yang, N. Daval, C. Veytizou, D. Delprat, B.-Y. Nguyen, and Y.-C. Yeo, "High performance germanium Ω-Gate MuGFET with Schottky-barrier nickel germanide source/drain and low temperature disilane passivated gate stack," IEEE Electron Device Letters, vol. 33, no. 10, pp. 1336 - 1338, Oct. 2012. [12] L. Wang, S. Su, W. Wang, Y. Yang, Y. Tong, B. Liu, P. Guo, X. Gong, G. Zhang, C. Xue, B. Cheng, G. Han, and Y.-C. Yeo, "Germanium-tin n+/p junction formed using phosphorus ion implant and 400 °C rapid thermal anneal," IEEE Electron Device Letters, vol. 33, no. 11, pp. 1529 - 1531, Nov. 2012. [13] S.-M. Koh, M. Sinha, Y. Tong, H.-C. Chin, W.-W. Fang, X. Zhang, C.-M. Ng, G. Samudra, and Y.-C. Yeo, "Sulfur implant for reducing nickel silicide contact resistance in FinFETs with silicon-carbon source/drain," International Semiconductor Device Research Symposium, College Park MD, USA, Dec. 911, 2009. [14] Y. Ding, R. Cheng, S.-M. Koh, B. Liu, A. Gyanathan, Q. Zhou, Y. Tong, P. S.-Y. Lim, G. Han, and Y.-C. Yeo, "A new Ge2Sb2Te5 (GST) liner stressor featuring stress enhancement due to amorphous-crystalline phase change for sub-20 nm p-channel FinFETs," IEEE International Electron Device Meeting 2011, Washington, DC, USA, Dec. - 7, 2011, pp. 833 - 836. 148 [15] L. Wang, G. Han, S. Su, Q. Zhou, Y. Yang, P. Guo, W. Wang, Y. Tong, P. S. Y. Lim, C. Xue, Q. Wang, B. Cheng, and Y.-C. Yeo, "Metal stanogermanide contacts with enhanced thermal stability for high mobility germanium-tin field-effect transistor," International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 23-25, 2012. [16] B. Liu, X. Gong, G. Han, P. S. Y. Lim, Y. Tong, Q. Zhou, Y. Yang, N. Daval, M. Pulido, D. Delprat, B.-Y. Nguyen, and Y.-C. Yeo, "High performance Ωgate Ge FinFET featuring low temperature Si2H6 passivation and implantless Schottky-barrier NiGe metallic source/drain," 2012 Silicon Nanoelectronics Workshop (SNW), Honolulu HI, USA, June 10-11, 2012. [17] Y. Ding, X. Tong, Q. Zhou, B. Liu, A. Gyanathan, Y. Tong, and Y.-C. Yeo, "A new expandible ZnS-SiO2 liner stressor for n-channel FinFETs," Symp. on VLSI Tech. 2013, Kyoto, Japan, Jun. 11 - 13, 2013, pp. T34 - T35. [18] Y.-C. Yeo, X. Gong, P. Guo, Y. Yang, L. Wang, Y. Tong, K. L. Low, C. Zhan, R. Cheng, B. Liu, W. Wang, Q. Zhou, X. Xu, and Y. Dong, "Application of germanium-tin (GeSn) in field-effect transistors," IEEE Nanotechnology Materials and Devices Conference (NMDC), Taiwan, Taiwan, Oct. - 9, 2013. 149 [...]... channel and source/drain to increase the saturation velocity Germanium and germanium- tin are possible candidates due to their high carrier mobility This thesis documents work performed on contact engineering for Si, Ge, and GeSn devices Low contact resistance is needed for advanced Si based devices and also new generation of Ge or GeSn based devices Contact resistivity at the interface between metal and. .. Ni(Ge1-xSnx) Ohmic Contact Formation on N-type Ge1-xSnx using Selenium or Sulfur Implant and Segregation 121 6.3 Future Directions 122 6.3.1 Laser Annealing for Achieving Dopant Segregation for Ge and GeSn Contacts 122 6.3.2 Co-implantation of Chalcogens For Ge And GeSn Contacts 123 6.3.3 Monolayer Doping Technique For Ge And GeSn Contacts 123 6.3.4 Physics And Chemistry... height and increases the hole Schottky barrier height [109] 14 Fig 1.9 Measured contact resistance against the thickness of insertion SiN layer for Al/n-Si and Al/n-Ge contacts [106] Optimum thicknesses of SiN were found to be 1 nm and 2 nm for Al/n-Si and Al/n-Ge contacts, respectively 14 Fig 1.10 Benchmarking of the specific contact resistivity of (a) n-type Si and Ge contacts and. .. damage and single crystalline Ge is achieved after implantation The contact resistivity of metal and ntype Ge contact is high due to Fermi level pinning High temperature phosphorus (P) and S co-implant is developed for reduction of electron Schottky barrier height of NiGe/n-Ge contacts Finally, Se and S segregation are developed for reduction of electron Schottky barrier height of GeSn contacts for future... occurs at ~650 ° C for the control sample A delay of the agglomeration is clearly observed for the sample that received the cold Si PAI and S implant 38 Fig 2.5 (a) Room temperature current-voltage characteristics of NiSi/n-Si contact devices formed with and without the cold Si PAI and S implant (b) Arrhenius plot of NiSi/n-Si contact with the cold Si PAI and S implant The data fitting was only done... Boltzmann‘s constant, q is the electronic charge, and V is the voltage across the metal-semiconductor interface It is obvious that lower ΦB is needed to achieve higher J for high performance devices Good ohmic contacts are needed for not only the traditional Si devices but also for the devices with new materials for next generation of technology, e.g Ge, GeSn, and III-V materials Based on the requirements... Field-Effect Transistor FLP Fermi level pinning Ge Germanium Ge3N4 Germanium nitride GeOx Germanium oxide GeSn Germanium- tin Ge1-xSnx Germanium- tin H2O2 Hydrogen peroxide H2SO4 Sulfuric acid HRXRD High resolution X-ray diffraction HT High temperature ICP LPCVD Inductively coupled plasma Institute of Materials Research and Engineering International Technology Roadmap for Semiconductors Low pressure chemical vapour... NiSi and n-Si interface, the profile of modeled S traps (solid line), and the profile of ionized S (dash line) are shown 45 Fig 2.8 Simulated energy band diagram across the NiSi and n-Si interface for the samples with and without S traps Ef, Ec, and Ev are the Fermi energy level, conduction, and valence band edge, respectively 46 Fig 2.9 (a) Simulated I-V characteristics of NiSi/n-Si contacts... of NiGe/n-Ge contact devices formed with pre-germanide Se or S implant The contact has an area of 100 × 100 μm2 ΦBn was extracted using activation energy method The extracted ΦBn of the samples with Se and S implants are 0.13 and 0.1 eV, respectively The rectifying xiv behaviour for the control sample indicates strong Fermi level pinning near the valence band edge of n-Ge ΦBn is 0.61 eV for the control... (square) and modeled (line) ellipsometric angles from infrared ellipsometry to determine an average active carrier concentration (ND) for high temperature P+ and S+ co-implant sample Extracted ND is 2.6 × 1019 cm-3 88 Fig 4.16 (a) Energy band diagram of a typical metal/n-Ge contact showing two major reasons for high contact resistivity, i.e Fermi Level Pinning near valence band edge and low . ADVANCED CONTACT ENGINEERING FOR SILICON, GERMANIUM, GERMANIUM- TIN DEVICES TONG YI NATIONAL UNIVERSITY OF SINGAPORE 2014 ADVANCED CONTACT ENGINEERING. performed on contact engineering for Si, Ge, and GeSn devices. Low contact resistance is needed for advanced Si based devices and also new generation of Ge or GeSn based devices. Contact resistivity. 1 nm and 2 nm for Al/n-Si and Al/n-Ge contacts, respectively. 14 Fig. 1.10. Benchmarking of the specific contact resistivity of (a) n-type Si and Ge contacts and (b) p-type Si and Ge contacts

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