Schottky barrier engineering for contacts in advanced CMOS technology

SCHOTTKY BARRIER ENGINEERING FOR CONTACTS IN ADVANCED CMOS TECHNOLOGY PHYLLIS LIM SHI YA NATIONAL UNIVERSITY OF SINGAPORE 2012 SCHOTTKY BARRIER ENGINEERING FOR CONTACTS IN ADVANCED CMOS TECHNOLOGY PHYLLIS LIM SHI YA (B. ENG. (HONS.)), NATIONAL UNIVERSITY OF SINGAPORE A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY NUS GRADUATE SCHOOL FOR INTEGRATIVE SCIENCES AND ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2012 i Acknowledgements First and foremost, I would like express my gratitude to my supervisors, Dr. Yeo Yee-Chia and Dr. Chi Dongzhi. Dr. Yeo encouraged me to pursue a higher degree in the field of nanoelectronics and gave me many opportunities to travel and learn from many outstanding researchers around the world. He has been a wonderful supervisor and I am truly thankful for the support that he has given me all these years. I have also benefited immensely from the technical guidance given by Dr. Chi. Dr. Chi’s attitude towards research and his in-depth knowledge impresses me. He has been an inspiration to me and I am very grateful for all the valuable insights that he has given me for my research work. I would also like to thank Dr. Wang Xin Cai for allowing me to use the laser system at Singapore Institute of Manufacturing Technology (SIMTech), Prof. Osipowicz for performing Rutherford backscattering spectroscopy of my samples, and Dr. Wang Shijie for the first-principles simulation of the atomic structure. In addition, I would like to acknowledge the support of the following friends and staff at the Silicon Nano-Device Laboratory (SNDL), Institute of Materials Research and Engineering (IMRE) and Institute of Microelectronics (IME): Rinus, Pengfei, Samuel, Zhou Qian, Ivana, Wenjuan, Cheng Ran, Yang Yue, Tong Yi, Yinjie, Liu Bin, Lanxiang, Gong Xiao, Xingui, Chunlei, Eugene, Shao Ming, Guo Cheng, Yida, Weijie, Poh Chong, Patrick, Doreen and many others. They have made this journey bearable and enjoyable. Last but not least, I would like to thank my family and Yoke King, my love, for their support, care and concern during this memorable phase of my life. ii Table of Contents Declaration i Acknowledgements . ii Table of Contents . iii Summary vii List of Tables ix List of Figures x List of Symbols xxii Chapter Introduction 1.1 Background: CMOS technology trends 1.2 Source/drain series resistance as a performance limiter . 1.3 Concept of Schottky barrier and effective Schottky barrier height . 1.3.1 Metal-induced gap states (MIGS) and interface states . 10 1.3.2 Interfacial dipole . 11 1.4 Carrier transport across the MS interface . 12 1.5 The importance of nickel silicide in CMOS technology 14 1.6 Modulation of Schottky barrier height 16 1.6.1 S/D material engineering 16 1.6.2 Dopant segregation engineering . 17 1.6.3 Interface engineering 18 1.7 Objectives of research . 19 1.8 Thesis organization . 20 1.9 References . 22 Chapter Schottky Barrier Height Lowering of Nickel Silicide (NiSi:C) on Silicon-Carbon (Si:C) Films with Different Substitutional Carbon Concentration 2.1 Introduction . 32 2.2 Experimental details 35 2.3 Material characterization of Si1-yCy films . 38 iii 2.4 Material and electrical characterization of NiSi:C films on Si:C . 40 2.5 Electrical characterization of NiSi:C/Si:C contact devices 44 2.6 Summary . 50 2.7 References . 52 Chapter Schottky Barrier Height Lowering of Nickel Silicide on Silicon (100) using Pre-silicide Ammonium Sulfide Treatment 3.1 Introduction . 57 3.2 Experimental details 59 3.3 Material and electrical characterization of blanket samples of nickel silicide films after ammonium sulfide treatment 61 3.4 Electrical characterization of the ammonium sulfide treated contact devices 66 3.5 Discussion on the carrier transport of the ammonium sulfide treated NiSi/Si(100) junctions 73 3.6 Summary . 77 3.7 References . 78 Chapter Schottky Barrier Height Lowering of Nickel Disilicide NiSi2 on Silicon by Silicidation of Dual Layer Nickel and Dysprosium Film Stack 4.1 Introduction . 82 4.2 Experimental details 84 4.3 Electrical characterization of contact devices formed by annealing nickeldysprosium film stack on Si(100) . 87 4.4 Material characterization of contact devices and blanket samples formed by annealing nickel-dysprosium film stack on Si(100) . 94 4.5 Discussion on the formation mechanism of nickel disilicide NiSi2 and nickel mono-silicide NiSi phases from kinetic and thermodynamic aspects of the reaction 102 4.6 Discussion on the effect of pyramidal NiSi2 on the effective electron Schottky barrier height . 106 4.7 FinFETs fabrication and electrical characterization . 110 4.8 Summary . 117 iv 4.9 References . 118 Chapter Schottky Barrier Height Lowering of Epitaxial Metastable Nickel Digermanide NiGe2 on Ge(100) using Pulsed Laser Anneal 5.1 Introduction . 124 5.2 Experimental details 126 5.3 Electrical and material characterization of blanket samples of NiGex films formed by laser and rapid thermal anneal . 128 5.4 Electrical characterization of contact devices that received laser and rapid thermal anneal 138 5.5 Discussion on the formation mechanism of NiGe2 from both kinetic and thermodynamic aspects of the reaction . 143 Discussion on the effect of epitaxial NiGe2 on the effective electron Schottky 5.6 barrier height . 147 5.7 Summary . 149 5.8 References . 150 Chapter Conclusion and Future Directions 6.1 Conclusion 154 6.2 Contributions of this Thesis 156 6.2.1 Schottky Barrier Height Lowering of Nickel Silicide on Silicon-carbon Films with Different Substitutional Carbon Concentration 156 6.2.2 Schottky Barrier Height Lowering of Nickel Silicide on Si(100) using Presilicide Ammonium Sulfide Treatment . 156 6.2.3 Schottky Barrier Height Lowering of Nickel Disilicide on Si by Silicidation of Dual Layer Nickel and Dysprosium Film Stack . 157 6.2.4 Schottky Barrier Height Lowering of Epitaxial Nickel Digermanide NiGe2 on Ge(100) using Pulsed Laser Anneal 158 6.3 Future Directions 159 A. Employing Selenium-containing Chemical Solutions for Contact Engineering in Si Devices . 159 v B. Comprehensive Study to determine the Local Density of States (LDOS) of the NiGe2/Ge System using First-principles Calculations 159 C. 6.4 Contact Engineering for III-V Devices using Laser Anneal . 160 References . 161 Appendix A: List of Publications . 163 vi Summary High parasitic source/drain (S/D) series resistance is a bottleneck for achieving high drive current for complementary metal-oxide-semiconductor (CMOS) field-effect transistors (FETs) at 22 nm technology node and beyond. A major contribution of the S/D series resistance is the contact resistance Rc at the metal/semiconductor interface. Reducing the effective Schottky barrier height ΦBeff at this interface would reduce Rc. In this thesis, four different contact engineering techniques were explored to modulate the effective electron Schottky barrier height ΦBn,eff of silicide or germanide on silicon (Si), silicon-carbon (Si:C), and germanium (Ge) S/D materials. They were (1) ammonium sulfide (NH4)2S chemical treatment of Si before nickel (Ni) silicide contact formation, (2) deposition of a layer of dysprosium (Dy) on Si before Ni silicide contact formation, (3) Ni silicide contact formation on Si:C films with different substitutional carbon concentration, and (4) laser anneal of Ni on Ge. Ni mono-silicide (NiSi) formation after ammonium sulfide (NH4)2S treatment of Si introduced sulfur (S) donor-like traps at the NiSi/Si junction. The reduction in ΦBn,eff is attributed to the image-force barrier lowering effect induced by S donor-like traps, and the carrier transport mechanisms associated with trap-assisted tunneling, and generation of electron-hole pairs across the junction. Deposition of a Dy layer on Si followed by Ni silicidation formed Ni disilicide (NiSi2) inverted pyramids. The ΦBn,eff lowering effect is attributed to the high electric field at the tip of the inverted pyramid that increases the tunneling probability of the vii electrons, and results in thermionic-field emission (TFE) being the dominant carrier transport mechanism at the NiSi2/Si interface. Nickel silicide (NiSi:C) formed on Si:C showed an increasing reduction in ΦBn,eff with an increasing substitutional carbon concentration content in the Si:C films. The ΦBn,eff lowering effect is attributed to the increase in electron affinity, arising from a decrease in the energy level of the conduction band edge, caused by strain and the intrinsic chemical effect of carbon in the epitaxial Si:C films grown on Si. Lastly, the lowering of ΦBn,eff by the formation of epitaxial Ni digermanide (NiGe2) on Ge (100) using pulsed laser anneal is attributed to the reduction in the density of interface states induced by dangling bonds. This thesis research provides potential contact technology options for advanced CMOS devices in sub-20 technology nodes. viii 5.8 References [5.1] K. Saraswat, C. O. Chui, T. Krishnamohan, D. Kim, A. Nayfeh, and A. Pethe, “High performance germanium MOSFETs,” Materials Science and Engineering B, vol. 135, no. 3, pp. 242-249, 2006. [5.2] H. Shang, K.-L. Lee, P. Kozlowski, C. D’Emic, I. Babich, E. Sikorski, M. Leong, H.-S. P. Wong, K. Guarini, and W. Haensch, “Self-aligned n-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate,” IEEE Electron Device Letters, vol. 25, no. 3, pp. 135-137, 2004. [5.3] Q. Zhang, J. Huang, N. Wu, G. Chen, M. Hong, L. K. Bera, and C. X. Zhu, “Drive-Current Enhancement in Ge n-Channel MOSFET using laser annealing for source/drain activation,” IEEE Electron Device Letters, vol. 27, no. 9, pp. 728730, 2006. [5.4] C. Claeys, E. Simoen, K. Opsomer, D. P. Brunco, and M. Meuris, “Defect engineering aspects of advanced Ge process modules,” Materials Science and Engineering B, vol. 154-155, pp. 49-55, 2008. [5.5] P. Zimmerman, G. Nicholas, B. De-Jaeger, B. Kaczer, A. Stesmans, L.-Å Ragnarsson, D. P. Brunco, F. E. Leys, M. Caymax, G. Winderickx, K. Opsomer, M. Meuris, and M. M. Heyns, “High performance Ge pMOS devices using a Sicompatible process flow,” International Electron Device Meeting Tech. Dig., pp. 655-658, 2006. [5.6] C. O. Chui, H. Kim, P. McIntyre, and K. C. Saraswat, “A germanium NMOSFET process integrating metal gate and improved Hi-κ dielectrics,” International Electron Device Meeting Tech. Dig., pp. 437, 2003. 150 [5.7] S. J. Wang, S. J. Lee, F. Gao, N. Wu, C. X. Zhu, J. S. Pan, L. J. Tang, and D. L. Kwong, “Germanium p- & n-MOSFETs fabricated with novel surface passivation (plasma-PH3 and thin AlN) and TaN/HfO2 gate stack,” International Electron Device Meeting Tech. Dig., pp. 307-310, 2004. [5.8] D. Kuzum, A. J. Pethe, T. Krishnamohan, Y. Oshima, Y. Sun, J. P. McVittie, P. A. Pianetta, P. C. McIntyre, and K. C. Saraswat, “Interface-engineered Ge (100) and (111), N- and P-FETs with high mobility,” International Electron Device Meeting Tech. Dig., pp. 723-726, 2007. [5.9] T. Takahashi, T. Nishimura, L. Chen, S. Sakata, K. Kita, and A. Toriumi, “Proof of Ge-interfacing concepts for metal/high-k/Ge CMOS Ge-intimate material selection and interface conscious process flow,” International Electron Device Meeting Tech. Dig., pp. 697, 2007. [5.10] T. Nishimura, K. Kita, and A. Toriumi, “ Evidence for strong Fermi-level pinning due to metal-induced gap states at metal/germanium interface,” Applied Physics Letters, vol. 91, no. 12, 123123, 2007. [5.11] S. L. Zhang and M. O¨stling, “Metal silicides in CMOS technology: Past, present, and future trends,” Critical Review in Solid State and Material Sciences, vol. 28, no.1, pp. 1-129, 2003. [5.12] J. Y. Spann, R. A. Anderson, T. J. Thornton, G. Harris, S. G. Thomas, and C. Tracy, “Characterization of nickel germanide thin films for use as contacts to pchannel germanium,” IEEE Electron Device Letters, vol. 26, no. 3, pp. 151-153, 2005. 151 [5.13] S. Zhu and A. Nakajima, “Annealing temperature dependence on nickelgermanium Solid-State Reaction,” Japanese Journal of Applied Physics, vol. 44, no. 24, pp. L753-L755, 2005. [5.14] M. Mueller, Q. T. Zhao, C. Urban, C. Sandow, D. Buca, S. Lenk, S. Estévez, and S. Mantl, “Schottky-barrier height tuning of NiGe/n-Ge contacts using As and P segregation,” Material Science and Engineering B, vol. 154-155, pp. 168-171, 2008. [5.15] K. Ikeda, Y. Yamashita, N. Sugiyama, N. Taoka, and S. Takagi, “Modulation of NiGe/Ge Schottky barrier height by sulfur segregation during Ni germanidation,” Applied Physics Letters, vol. 88, no. 15, 152115, 2006. [5.16] Y. Tong, B. Liu, P. S. Y. Lim, Q. Zhou, and Y.-C. Yeo, “Novel selenium implant and segregation for reduction of effective Schottky barrier height in NiGe/n-Ge contacts,” International Symposium on VLSI Technology, Systems and Applications, 2012. [5.17] H. Takizawa, K. Uheda, and T. Endo, “NiGe2: A new intermetallic compound synthesized under high-pressure,” Journal of Alloys and Compounds, vol. 305, no.1-2, pp. 306-310, 2000. [5.18] SIMNRA software package from M. Mayer, Max-Planck-Institut für Plasmaphysik, Boltzmannstr. 2, D-85748, Garching, Germany. [5.19] D. K. Schroder, Semiconductor Material and Device Characterization. Third edition, Wiley & Sons, New York, 2006. [5.20] COMSOL Multiphysics 3.3, COMSOL, Inc., New England Executive Park, Burlington, MA 01803, USA. 152 [5.21] K. Y. Lee, S. L. Liew, S. J. Chua, D. Z. Chi, H. P. Sun, and X. Q. Pan, “Formation and morphology evolution of nickel germanides on Ge (100) under rapid thermal annealing,” Material Research Society Symposia Proceedings, vol. 810, pp. 55, 2004. [5.22] V. Heine, “Theory of surface states,” Physical Review, vol. 138, no. 6A, pp. A 1689-1696, 1965. [5.23] W. E. Spicer, I. Lindau, P. Skeath, and C. Y. Su, “Unified defect model and beyond,” Journal of Vacuum Science and Technology, vol. 17, no. 5, pp. 10171027, 1980. [5.24] K. Kasahara, S. Yamada, K. Sawano, M. Miyao, and K. Hamaya, “ Mechanism of Fermi level pinning at metal/germanium interfaces,” Physical Review B, vol. 84, 205301, 2011. [5.25] K. Yamane, K. Hamaya, Y. Ando, Y. Enomoto, K. Yamamoto, T. Sadoh, and M. Miyao, “Effect of atomically controlled interfaces on Fermi-level pinning at metal/Ge interfaces,” Applied Physics Letters, vol. 96, no. 16, 162104, 2010. 153 Chapter Conclusion and Future Directions 6.1 Conclusion Continuous scaling of complementary metal-oxide-semiconductor (CMOS) field- effect transistors (FETs) for better speed performance currently faces significant challenges. High parasitic source/drain (S/D) series resistance RSD is a bottleneck for achieving high drive current in CMOS devices at 22 nm technology node and beyond [6.1]. A major contribution of the S/D series resistance is the contact resistance Rc at the metal/semiconductor interface [6.2]-[6.3]. Reducing the effective Schottky barrier height ΦBeff at this interface would reduce Rc. In this thesis, four different contact engineering techniques were explored to modulate the effective electron Schottky barrier height ΦBn,eff of silicide and germanide on silicon (Si), silicon-carbon (Si:C), and germanium (Ge) S/D materials. They were (1) nickel silicide contact formation on Si:C substrates with different substitutional carbon concentration, (2) ammonium sulfide chemical treatment of Si before nickel silicide contact formation, (3) deposition of a layer of dysprosium on Si before nickel silicide contact formation, and (4) excimer laser anneal of nickel on Ge. Both electrical and material characterization were performed to study the effectiveness of the abovementioned techniques to lower the ΦBn,eff at the silicide/Si and germanide/Ge 154 interfaces. The main contributions of this thesis are listed in Table 6.1 and summarized in the following sub-sections. Table 6.1. A summary of the effective electron Schottky barrier height ΦBn,eff reduction achieved with the four different Schottky barrier engineering techniques demonstrated in this thesis. Schottky barrier engineering techniques A. On Si1-yCy(100) 1. NiSi:C (Csub = %) 2. NiSi:C (Csub = 0.5 %) 3. NiSi:C (Csub = %) 4. NiSi:C (Csub = 1.5 %) B. On Si(100) 1. NiSi 2. NiSi with (NH4)2S chemical treatment for one hour at 25 °C C. On Si(100) 1. NiSi2 2. NiSi2 formed by silicidation of Ni-Dy film stack D. On Ge(100) 1. NiGe 2. NiGe2 ФBn,eff (eV) ФBn,eff reduction (%) 0.72 0.68 0.60 0.52 5.6 % 17 % 29 % 0.68 0.42 37 % 0.65 [6.4] 0.13 80 % 0.60 0.37 38 % 155 6.2 Contributions of this Thesis 6.2.1 Schottky Barrier Height Lowering of Nickel Silicide on Silicon-carbon Films with Different Substitutional Carbon Concentration This Chapter discussed the modulation of ΦBn,eff of nickel silicide NiSi:C on epitaxial silicon-carbon Si:C films with different substitutional carbon concentration Csub. Si:C films with Csub of 0.5 %, %, and 1.5 % were used. The ΦBn,eff of NiSi:C/Si:C was found to decrease with an increasing Csub. When NiSi:C was formed on Si:C with the highest Csub (1.5 %), a substantial modulation of 0.2 eV was observed and an ΦBn,eff of 0.52 eV was achieved. The lowering of ΦBn,eff is attributed to the decrease in the energy level of the conduction band edge of strained Si:C. The strain in Si:C causes an energy split between the Δxy valley and Δz valley and reduces the Δz valley energy. This results in an increase in electron affinity and consequently a decrease in ΦBn,eff. In addition, there was also enhanced thermal stability in the NiSi:C films formed on Si:C with increasing Csub. Low values of sheet resistance were observed even for high silicidation temperatures up to 850 °C. This is attributed to the segregation of carbon atoms at the grain boundaries of the polycrystalline NiSi:C film that retards grain growth and agglomeration. The results of this study are useful for the integration of NiSi:C contacts in strained n-MOSFETs using silicon-carbon source/drain stressors. 6.2.2 Schottky Barrier Height Lowering of Nickel Silicide on Si(100) using Presilicide Ammonium Sulfide Treatment This Chapter discussed the modulation of ΦBn,eff of nickel mono-silicide NiSi on Si(100) using pre-silicide ammonium sulfide (NH4)2S treatment. The solid-state 156 silicidation reaction of Ni and Si at an annealing temperature of 450 °C after (NH4)2S treatment formed low resistivity NiSi phase that is polycrystalline in nature and introduced sulfur (S) donor-like traps at the NiSi/Si junction. This was confirmed by Xray diffraction (XRD) and secondary ion mass spectrometry (SIMS) analysis, respectively. The sulfur donor-like traps with trap energy level at 0.275 eV below the Si conduction band and located at the NiSi/Si junction led to the lowering of ΦBn,eff by 0.26 eV, and resulted in an ΦBn,eff of 0.42 eV. Owing to the different physical locations of sulfur donor-like traps at the NiSi/Si interface, and in the depletion region, processes such as trap-assisted tunneling and generation of electron-hole pairs can participate in the carrier transport across the junction and cause a reduction in the ΦBn,eff. This study provides an alternative method for lowering the ΦBn,eff at the NiSi/Si interface for silicon n-MOSFETs. 6.2.3 Schottky Barrier Height Lowering of Nickel Disilicide on Si by Silicidation of Dual Layer Nickel and Dysprosium Film Stack This Chapter discussed the modulation of ΦBn,eff of nickel disilicide NiSi2 on Si by silicidation of a dual layer nickel-dysprosium (Ni-Dy) film stack. The formation mechanism of NiSi2 was elucidated and explained from both the thermodynamic and kinetic aspects of the solid-state reaction. Due to the formation of inverted NiSi2 pyramids, substantial lowering of the ΦBn,eff at the silicide/Si interface was achieved. The high electric field at the tip of the inverted NiSi2 pyramids increases the tunneling probability of electrons, and results in thermionic-field emission (TFE) being the dominant carrier transport mechanism at the NiSi2/Si interface. This contributes 157 significantly to the increase in reverse bias current and reduces the ΦBn,eff. An analytical expression for the localized electric field was derived and calculated to be as high as ~ 1.9 × 106 V/cm based on our experimental result. In addition, double-gate n-channel FinFETs with NiSi2 contacts also showed an enhancement in drive current and reduction in series resistance over control FinFETs with NiSi contacts. This implies that using Dy interlayer to form NiSi2 contacts can be promising for advanced technology nodes, where parasitic source/drain series resistance become a dominant factor in MOSFETs with short gate lengths. 6.2.4 Schottky Barrier Height Lowering of Epitaxial Nickel Digermanide NiGe2 on Ge(100) using Pulsed Laser Anneal This Chapter discussed the modulation of ΦBn,eff of nickel digermanide NiGe2 (a metastable phase that is not expected in the Ni-Ge binary system) on Ge(100). NiGe2 is formed by pulsed excimer laser anneal of nickel on Ge(100) at a laser fluence of 300 mJ/cm2. The formation mechanism of NiGe2 was elucidated and explained in terms of the ability of the orthorhombic structure NiGe2 to construct epitaxially on Ge(100) due to the reduced interfacial energy at NiGe2/Ge(100) interface, and the kinetic aspects of the laser annealing reaction associated with phase transformation and film agglomeration. In addition, a reduced ΦBn,eff of 0.37 eV was achieved at the NiiGe2/Ge(100) interface. The ΦBn,eff lowering effect is attributed to the reduction in the density of interface states induced by dangling bonds. The results of this study provide an alternative method of lowering the ΦBn,eff at the metal/Ge interface for germanium n-MOSFETs. 158 6.3 Future Directions A. Employing Selenium-containing Chemical Solutions for Contact Engineering in Si Devices In Chapter 3, sulfur (S) containing ammonium sulfide (NH4)2S chemical solution was used to treat the silicon surface before nickel silicide contact formation. The sulfur donor-like traps with trap energy level at 0.275 eV below the Si conduction band, and located at the NiSi/Si junction, led to a reduction of the ΦBn,eff. Further exploration of other chemical solutions that contain chalcogens, for example SeS2:CS2 solution [6.5], can be employed to study its effect on ΦBn,eff at the metal/Si interface. Similar to sulfur donor-like traps, the trap energy level of Se is 0.31 eV [6.6] below the Si conduction band, and may possibly reduce the ΦBn,eff at the metal/Si interface. B. Comprehensive Study to determine the Local Density of States (LDOS) of the NiGe2/Ge System using First-principles Calculations Fermi-level pinning at the metal/Ge interface is a technological roadblock for achieving high performance n-channel MOSFETs. In Chapter 5, a relatively low ΦBn,eff of 0.37 eV at the NiGe2/Ge(100) interface was experimentally achieved and is attributed to the reduction in the density of interface states induced by dangling bonds. Further exploration in this area can be a comprehensive study to determine the local density of states (LDOS) of the NiGe2/Ge system using first-principles calculations. 159 C. Contact Engineering for III-V Devices using Laser Anneal III-V compound semiconductors are attractive alternative channel materials to replace Si for high performance n-MOSFETs as they have higher electron mobility and lower electron effective mass. Self-aligned NiInxGa1-xAs alloy contacts for n-channel InxGa1-xAs MOSFETs were demonstrated using rapid thermal anneal at 250 °C for minute [6.7]-[6.8]. Further exploration in this area can be conducted by forming selfaligned contacts for III-V MOSFETs using laser anneal. 160 6.4 References [6.1] A. M. Noori, M. Balseanu, P. Boelen, A. Cockburn, S. Demuynck, S. Felch, S. Gandikota, A. J. Gelatos, A. Khandelwal, J. A. Kittl, A. Lauwers, W. C. Lee, J. X. Lei, T. Mandrekar, R. Schreutelkamp, K. Shah, S. E. Thompson, P. Verheyen, C. Y. Wang, L. Q. Xia, and R. Arghavani, “Manufacturable processes for [...]... of n-channel FinFETs with gate lengths LG of 40 nm and effective fin widths Weff of 80 nm NiSi contacts were formed for the control FinFETs and NiSi2 contacts were formed for the phase-engineered FinFETs 112 Fig 4.20 N-channel FinFETs with NiSi and NiSi2 contacts show comparable subthreshold swing SS for different gate lengths 113 Fig 4.21 N-channel FinFETs with NiSi and NiSi2 contacts show... percentage enhancement in IDSAT increases, and this implies that using Dy interlayer to form NiSi2 contacts can be promising for advanced technology nodes, where parasitic source/drain series resistance become a limiting factor [4.1] 115 xviii Fig 4.24 The parasitic series resistance RSD extracted at zero gate length shows a drop for n-channel FinFETs with NiSi2 contacts formed using Ni (5 nm)/... germanide films formed by RTA at 350 °C for 30 s and 10-pulses LA at a fluence of 300 mJ/cm2 per pulse In (a), rings of uniformly distributed intensity indicate a polycrystalline NiGe film formed by RTA In contrast, high intensity and well defined spots in (b) indicate an epitaxial film formed using LA 135 Fig 5.9 X-ray diffraction (XRD) phase analysis of nickel germanide films formed by RTA... electronegativities for the metal and the semiconductor respectively, and S is a fitting parameter called the slope parameter or pinning factor For strongly-pinned interfaces, ΦB is independent of the metal work function and S = 0 For depinned interfaces, ΦB is dependent on the metal work function and S = 1 Fermi level pinning can also be due to extrinsic mechanisms such as interfacial states arising from defects,... defects, dangling bonds or structural disorder The interface formation process causes disorder of bonds near the interface and produces an interface state continuum as a result of incomplete separation of bonding and anti-bonding states [1.28] 1.3.2 Interfacial dipole Another cause for Fermi level pinning is due to the chemical bonding needed to achieve thermodynamic equilibrium at the MS interfaces [1.29],... an ideal metal-semiconductor (MS) Schottky contact (a) before and (b) after contact formation 9 However, experimentally, the Schottky barrier height is not simply related to the work function and the electron affinity The Schottky barrier height is strongly influenced by Fermi level pinning caused by metal-induced gap states (MIGS), or interfacial states such as dangling bonds, structural disorder, dipoles... shows the levels where different metals are pinned to when in contact with Si and Ge Fig 1.5 The work functions of metals calculated from the vacuum level and the pinning levels of different types of metal when in contact with Ge and Si [1.21] 8 1.3 Concept of Schottky barrier and effective Schottky barrier height A Schottky barrier is formed when a metal contacts a semiconductor and their Fermi levels... stack over control FinFETs with NiSi contacts formed using 5 nm Ni 116 Fig 5.1 Schematics showing the process of forming NiGe/n-Ge(100) and NiGe2/nGe(100) contact devices with rapid thermal annealing (RTA) and laser annealing (LA), respectively A 15 nm thick Ni film was deposited and annealing was performed Nickel mono-germanide (NiGe) was formed with RTA at 350 °C for 30 s and nickel... In the year 1965, Gordon Moore predicted that the number of MOSFETs on a chip will double about every two years [1.3] For nearly five decades, the semiconductor industry has kept up with the pace of device scaling predicted by Moore Device scaling has enhanced the performance and packing density of MOSFETs in ICs However, sustaining the historical scalingdriven performance improvement to meet the International... oxynitride, formed by introducing nitrogen into SiO2, helps to increase the dielectric constant and alleviates the boron penetration problem [1.5]-[1.6] Development of high-κ gate dielectrics, including hafnium dioxide (HfO2) and hafnium-based oxides, to meet the scaling requirements of ITRS has also progressed rapidly In year 2007, Intel introduced hafnium-based dielectric in logic transistors at the 45 nm technology . SCHOTTKY BARRIER ENGINEERING FOR CONTACTS IN ADVANCED CMOS TECHNOLOGY PHYLLIS LIM SHI YA NATIONAL UNIVERSITY OF SINGAPORE 2012 SCHOTTKY BARRIER ENGINEERING. technology 14 1.6 Modulation of Schottky barrier height 16 1.6.1 S/D material engineering 16 1.6.2 Dopant segregation engineering 17 1.6.3 Interface engineering 18 1.7 Objectives of research. system at Singapore Institute of Manufacturing Technology (SIMTech), Prof. Osipowicz for performing Rutherford backscattering spectroscopy of my samples, and Dr. Wang Shijie for the first-principles