Chapter 4_Combinational Logic Circuits

1 Lecture: DIGITAL SYSTEMS Chapter 4: Combinational Logic Circuits Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 2 Nguyen Thanh Hai, PhD 4.1 Sum of Products Form 4.2 Algebraic Simplification 4.3 Designing Combinational Logic Circuits 4.4 Karnaugh Map Method 4.5 Exclusive-OR and Exclusive NOR Circuits 4.6 Enable/Disable Circuits 4.7 Basic Characteristics of Digital ICs Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 3 Nguyen Thanh Hai, PhD 4.1 Sum-of-Products Form 1. ABC+ABC 2. AB+ABC+CD+D 3. AB+CD+EF+GK+HL -Two or more AND terms and ORed together -Each AND term containing one or more variables but no complemented sign covers more than one variable in a term. Example 4.1: TDMNor ABC Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 4 Nguyen Thanh Hai, PhD Product of Sums 1. (A+B+C)(A+C) 2. (A+B)(C+D)F 3. (A+C)(B+D)(B+C)(A+D+E) -Two or more OR terms and ANDed together. -Each OR term containing one or more variables However, we can use Demorgan’s theorem to convert between POS and SOP. Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 5 Nguyen Thanh Hai, PhD Product of Sums Complement of SOP = POS complement of POS = SOP PQ QP += P.Q PQ =+ (POS) Sums ofProduct D)B)(C(A = + + (SOP) Products of SumD.CB.A D)(CB)(AD)B)(C(A =+= +++=++ Demorgan’s theorem Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 6 Nguyen Thanh Hai, PhD Review questions a. AB+CD+E b. AB(C+D) c. (A+B)(C+D+F) 1. Which of the following expression is in SOP or POS form d. MN+PQ a. SOP b. POS c. POS d. Not POS and SOP Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 7 Nguyen Thanh Hai, PhD 4.2 Algebraic Simplification z=ABC+AB (AC) A(C+B) ⋅ = Example 4.2 Simplify the logic circuit shown in the following figure z=ABC+AB(AC) A B C Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 8 Nguyen Thanh Hai, PhD z=ABC+ABC+ACB Example 4.3 Simplify the expression Solution Method 1: Method 2: add an extra term And from Eq. (*) z=A(B+C) z=A(B+C) ABC (*) 4.2 Algebraic Simplification Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 9 Nguyen Thanh Hai, PhD 4.3 Designing Combinational Logic Circuits Input Output A B Y 0 0 0 0 1 1 1 0 0 1 1 0 A B A B A Y = Truth table Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 10 Nguyen Thanh Hai, PhD Input Output A B Y 0 0 0 0 1 1 1 0 1 1 1 0 A B A A B B B A B A Y + = B A B A 4.3 Designing Combinational Logic Circuits Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 11 Nguyen Thanh Hai, PhD Input Output A B C B 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Truth table Example 4.4: Design a logic circuit that has three inputs, A, B and C, and whose output will be HIGH only when a majority of the input is HIGH BCA CBA CAB ABC 1. Truth table 2. AND for each case 3. Sum-of-product expression 4. Simplify the expression 5. Implement the circuit Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 12 Nguyen Thanh Hai, PhD Review questions 1. Write sum-of-products expression for a circuit with four inputs and an output that is to be HIGH only when input A is LOW at the same time that exactly two other inputs are LOW. 2. Implement the expression of question 1 using all four-input NAND gates. How many are required? Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 13 Nguyen Thanh Hai, PhD 4.4 Karnaugh Map Method A B Y 0 0 1 0 1 0 1 0 0 1 1 1 B A ⋅ AB { } ABBAx += 1 0 0 1 0 2 1 3 B B A A Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 14 Nguyen Thanh Hai, PhD A B C Y 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 0 CBA CBA CBA CAB           ++ += ABCCBA CBACBAX 1 1 1 0 1 0 0 0 B A B A AB B A C C 0 1 3 2 5 4 7 6 0 1 2 3 6 7 4 5 4.4 Karnaugh Map Method Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 15 Nguyen Thanh Hai, PhD 0 0 1 0 1 0 0 0 B A B A AB B A C C 1 0 0 0 0 0 1 0 B A B A AB B A C C 0 0 1 1 0 0 0 0 B A B A AB B A C C 0 1 0 1 0 1 0 1 B A B A AB B A C C CB CABCBAX = += CB CBACBAX = += BA BCACBAX = += CCBAABC BCACBAX =++ += K_Looping Groups of Two 0 1 2 3 6 7 4 5 Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 16 Nguyen Thanh Hai, PhD K_Looping Groups of Four 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 A B A B BA B A CD CDX = CD DC CD 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 CAX = 0 1 4 5 12 13 8 9 3 2 7 6 15 14 11 10 CD CD DC CD A B A B BA B A Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 17 Nguyen Thanh Hai, PhD K_Looping Groups of Four 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 D A X = 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 CAX = CD CD DC CD CD CD DC CD A B A B BA B A A B A B BA B A Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 18 Nguyen Thanh Hai, PhD K_Looping Groups of Eight 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 1 0 0 1 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 Have a look more steps at P.127 A B A B BA B A A B A B BA B A A B A B BA B A A B A B BA B A CD CD DC CD CD CD DC CD CD CD DC CD CD CD DC CD CX = B X = A X = CX = Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 19 Nguyen Thanh Hai, PhD Example 4.5: 0 0 0 1 0 3 1 2 0 4 1 5 1 7 0 6 0 12 1 13 1 15 0 14 0 8 0 9 1 11 0 10 Have a look more, steps in P.128 0 0 0 1 1 3 0 2 1 4 1 5 1 7 1 6 1 12 1 13 0 15 0 14 0 8 0 9 0 11 0 10 CD CD DC CD CD CD DC CD A B A B BA B A A B A B BA B A { { )15,11( )15,13,7,5( )2( Loop Loop Loop ABDACDCBAX ++= 43421 { { )7,6,5,4()13,12,5,4( )7,3( LoopLoop Loop DCBCDABX ++= 321 Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 20 Nguyen Thanh Hai, PhD Example 4.6: Have a look more steps and examples at P.129 0 0 1 1 0 3 0 2 0 4 1 5 1 7 1 6 1 12 1 13 1 15 0 14 0 8 0 9 1 11 0 10 0 0 1 1 0 3 0 2 0 4 1 5 1 7 1 6 0 12 0 13 0 15 1 14 1 8 1 9 0 11 1 10 CD CD DC CD CD CD DC CD A B A B BA B A A B A B BA B A { )15,11( )13,12()7,6( )5,1( Loop LoopLoop Loop ABDCDBDBCDBAX +++= 321321 321 321 321321 321 )14,10( )9,8()7,6( )5,1( Loop LoopLoop Loop BDADCBDBCDBAX +++= [...]... Electrical & Electronic Engineering Combinational Logic Circuits Example 4.7: 23 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Example 4.7: 24 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Review questions 1 Use K mapping to obtain... Electronic Engineering Combinational Logic Circuits 4.6 Enable/Disable Circuits A Y=A B=1 A Enable A Disable Y=A B=1 Y =0 B=0 A Y=1 B=0 Enable Nguyen Thanh Hai, PhD Disable Take a look more information at P.141 and Examples at P 142-143 26 University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Design of Integrated Circuits Design steps: 1 Based on... Faculty of Electrical & Electronic Engineering Combinational Logic Circuits 4.7 Basic Characteristics of Digital ICs CMOS logic Family ICs 36 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits TTL 4.7 Basic Characteristics of Digital ICs 5.0VL Power and Ground Logic 1 -Power supply: dc power and ground 2.0VL -Power supply... 0.8VL Indeterminate Logic 0 0VL Logic- Level Voltage Ranges CMOS 3 − 18V -TTL family: Vcc=+5V -CMOS family: VDD from +3V to +18V Often use +5V when connecting to TTL family -Figures show voltage ranges Logic 1 3.5VL Indeterminate 1.5VL More examples Logic 0 0VL 37 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Example... University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Review questions 1 Design a logic circuit with three inputs A, B, C and an output that goes LOW only when A is HIGH while B and C are different 2 Which logic gates produce a 1 output in the disable state? 3 Which logic gates pass the inverse of the input signal when they are enabled 30 Nguyen Thanh... PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits 4.7 Basic Characteristics of Digital ICs TTL logic Family ICs 33 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits 4.7 Basic Characteristics of Digital ICs CMOS Family -Unipolar digital ICs: using CMOS (Nchannel... & Electronic Engineering Combinational Logic Circuits Note: to be able to represent the various way Y A B A 0 A 1 Y = ∑ BA (1,3) = B A + BA 1 B 0 0 1 1 B1 2 3 -Similar for many inputs -Write mathematic expressions for the above K-maps 21 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits C “Don’t Care” Conditions A 0 0... University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Example 4.9: Write the output expression and truth table of the below circuit Y4=? 39 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits Example 4.11: There is the following expression: Y = CA + (C + B ).(C ⊕ A) a Draw... University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits -Take a look Examples from pages - Answer Review questions at papge - Homework 41 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits The End 42 Nguyen Thanh Hai, PhD ... enabled 30 Nguyen Thanh Hai, PhD University of Technical Education Faculty of Electrical & Electronic Engineering Combinational Logic Circuits 4.7 Basic Characteristics of Digital ICs TTL Family -Bipolar ICs: using bipolar junction transistor (NPN and PNP) -TTL: transistor-transistor logic -Standard series: 74xxxxx -TTL has several subfamilies or series to describe different functions such as gate type, . PhD 4. 1 Sum of Products Form 4. 2 Algebraic Simplification 4. 3 Designing Combinational Logic Circuits 4. 4 Karnaugh Map Method 4. 5 Exclusive-OR and Exclusive NOR Circuits 4. 6 Enable/Disable Circuits 4. 7. Example IC Standard TTL 74 740 4 (Hex INVERTER) Schottky TTL 74S 74S 04 (Hex INVERTER) Low-power Schottky TTL 74LS 74LS 04 (Hex INVERTER) Advanced Schottky TTL 74AS 74AS 04 (Hex INVERTER) Advanced. care”    0 1 2 3 6 7 4 5 Combinational Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 23 Nguyen Thanh Hai, PhD Example 4. 7: Combinational Logic Circuits University