Tài liệu How semiconductors are made doc

How semiconductors are made Minhhuan4_9@yahoo.com Outline  Part 1: Mask design creation  Part 2: Front end Processing  Part 3: Back end processing Design/mask creation  Circuit design  Photomask creation Logic Circuit Design / Layout Design  Based on the development plan, the IC's function and performance are first decided, and the logic circuit is designed. During logic circuit design, a logic circuit diagram is drawn to determine the electronic circuit required for the requested function. Once the logic circuit diagram is complete, simulations are performed multiple times to test the circuit’s operation. If there is no issue with the operation, the actual layout pattern for the devices and the interconnects is designed by computer-aided design(CAD), and a mask pattern is drawn. Logic Circuit Design / Layout Design Photomask Creation  After design of the logic circuit and the layout, a photomask is required to transcribe the design onto the wafer for use during front-end processing. The photomask is a copy of the circuit pattern, drawn on a glass plate coated with a metallic film. The glass plate lets light pass, but the metallic film does not. A state-of-the-art mask drawing system is used for the pattern exposure of the photomask. Due to increasingly high integration and miniaturization of the pattern, the size of the photomask is usually magnified four to ten times the actual size, depending on the irradiation equipment. Photomask creation [...]... films and metallic films using the resist pattern as a mask Etching with liquid chemicals is called "wet etching" and etching with gas is called "dry etching" The oxide films are etched with chemicals (HF acid), and the metallic films are etched with plasma Etching Photoresist Stripping  The photoresist remaining on the wafer surface is no longer necessary after etching is complete Ashing by oxygen plasma... Usually ion implantation today • But regions are still called diffusion N-diffusion, Cont’d  Strip off oxide to complete patterning step P-Diffusion • Similar set of steps form p+ diffusion regions for pMOS source and drain and substrate contact Contacts Now we need to wire together the devices • Cover chip with thick field oxide • Etch oxide where contact cuts are needed Metallization - Sputter on aluminum... the "design / mask creation" step is placed over the photoresist-coated wafer, which is then irradiated to have the circuit diagram transcribed(sao chép) onto it The positions of the wafer and the mask are adjusted, and then an irradiation device called the "stepper" is used to irradiate the wafer through the mask with ultraviolet (UV) light Where unmasked, the wafer is exposed to the UV light, and the... patterning, the wafer is placed in a hightemperature furnace to make the silicon react with oxygen or water vapor, and to develop oxide films on the wafer surface (thermal oxidation) These oxide films are used for the insulation of transistor gates and for the insulation of interconnect layers To develop nitride films and polysilicon films, the chemical vapor deposition (CVD) method is used, in which... performed to remove the residual photoresist The wafer is also rinsed with an acidic solution to remove any impurities, such as metals and organic matters The steps from deposition to photoresist stripping are repeated multiple times to form a complex circuit pattern on the wafer Photoresist Stripping n-Well • n-well formed with diffusion or ion implant • Diffusion – Place wafer in furnace with arsenic... until As atoms diffuse into exposed Si • Ion Implantation – Blast wafer with beam of As ions – Ions blocked by SiO2, only enter exposed Si Strip Oxide Strip off the remaining oxide using HF • Back to bare wafer with n-well • Subsequent steps involve similar series of steps Polysilicon       Deposit very thin layer of gate oxide – < 20 Å (6-7 atomic layers) • Chemical Vapor Deposition (CVD) of... gaseous reactant is introduced to the silicon substrate, and chemical reaction with the substrate surface is prompted by high temperature or plasma The metallic layers used in the wiring of the circuit are also formed by CVD, spattering (PVD: physical vapor deposition), or other plating methods Film oxide  At 900-1200 C with H2O or O2 in oxidation furnace Si + O2 → SiO2 Si + 2 H 2 O → SiO2 + 2 H 2 . How semiconductors are made Minhhuan4_9@yahoo.com Outline  Part 1: Mask design creation  Part. and individual wafer discs are sliced off. The wafers are generally available in diameters of 150 mm, 200 mm, or 300 mm, and are mirror-polished and rinsed