Thông tin tài liệu
University of Technology 1
Microprocessor System Design
BÙI QUỐC BẢO
(buiquocbao@hcmut.edu.vn)
University of Technology 2
Outline
•
Address decoding
•
Chip select
•
Memory configurations
University of Technology 3
MEMORY INTERFACE
When Memory is selected?
MEMORY
D7 - D0
A19 - A0
RD
WR
Simplified
Drawing of
8088 Minimum
Mode
D7 - D0
A19 - A0
MEMR
MEMW
cs
University of Technology 4
Minimum Mode
MEMORY
D7 - D0
A19 - A0
RD
WR
Simplified
Drawing of
8088 Minimum
Mode
D7 - D0
A19 - A0
MEMR
MEMW
CS
2
20
bytes or 1MB
University of Technology 5
What are the memory locations of a
1MB (2
20
bytes) Memory?
A19 to
A0
(HEX)
AAAA
1111
9876
AAAA
1111
5432
AAAA
1198
1000
AAAA
7654
AAAA
3210
00000 0000 0000 0000 0000 0000
FFFFF 1111 1111 1111 1111 1111
Example: 34FD0
0011 0100 11111 1101 0000
University of Technology 6
Interfacing a 1MB Memory to the 8088 Microprocessor
2300000
00001
10000
10001
10002
10003
10004
10005
10006
10007
10008
95
:
:
45
98
27
39
42
88
07
F4
8A
:
:
20020
20021
20022
20023
FFFFD
FFFFE
FFFFF
29
12
7D
13
19
25
36
:
:
:
:
:
:
:
:
A19
A0
:
D7
D0
:
RD
WR
A19
A0
:
D7
D0
:
MEMR
MEMW
XXXX
BP
ES
DS
SS
CX
BX
AX
XXXX
XXXX
XXXX
2000
0000
0023
3F1C
FCA1
SP
DX
XXXX
CS
SI
XXXX
XXXXIP
XXXXDI
CS
University of Technology 7
Instead of Interfacing 1MB, what will happen if
you interface a 512KB Memory?
University of Technology 8
What are the memory locations of a
512KB (2
19
bytes) Memory?
A18 to
A0
(HEX)
AAAA
1111
9876
AAAA
1111
5432
AAAA
1198
1000
AAAA
7654
AAAA
3210
00000 0000 0000 0000 0000 0000
7FFFF 0111 1111 1111 1111 1111
University of Technology 9
Interfacing a 512KB Memory to the 8088 Microprocessor
A18
A0
:
D7
D0
:
MEMR
MEMWXXXX
BP
ES
DS
SS
CX
BX
AX
XXXX
XXXX
XXXX
2000
0000
0023
3F1C
FCA1
SP
DX
XXXX
CS
SI
XXXX
XXXXIP
XXXXDI
2300000
00001 95
:
:
20020
20021
20022
20023
7FFFD
7FFFE
7FFFF
29
12
7D
13
19
25
36
:
:
:
:
:
:
A18
A0
:
D7
D0
:
RD
WR
CS
A19
What do we do with A19?
University of Technology 10
What if you want to read physical address A0023?
A18
A0
:
D7
D0
:
MEMR
MEMWXXXX
BP
ES
DS
SS
CX
BX
AX
XXXX
XXXX
XXXX
A000
0000
0023
3F1C
FCA1
SP
DX
XXXX
CS
SI
XXXX
XXXXIP
XXXXDI
2300000
00001 95
:
:
20020
20021
20022
20023
7FFFD
7FFFE
7FFFF
29
12
7D
13
19
25
36
:
:
:
:
:
:
A18
A0
:
D7
D0
:
RD
WR
CS
A19
[...]... to the 8088 Microprocessor A19 A18 : A18 : A0 A0 D7 : D7 : D0 D0 MEMR 8088 Minimum Mode RD MEMW 512KB #2 WR CS A18 : A0 D7 : D0 512KB #1 RD WR CS University of Technology 30 Interfacing one 512K Memory Chips to the 8088 Microprocessor A19 A18 : A18 : A0 A0 D7 : D7 : D0 D0 MEMR 8088 Minimum Mode RD MEMW 512KB WR CS University of Technology 31 Interfacing one 512K Memory Chips to the 8088 Microprocessor. .. 95 23 7FFFF 7FFFE 7FFFD 12 98 2C : 33 45 92 A3 : D4 97 : 20023 20022 20021 20020 : 00001 00000 University of Technology 13 Interfacing two 512KB Memory to the 8088 Microprocessor • Problem: đụng độ bus (bus conflict) Hai RAM sẽ xuất dữ liệu cùng lúc khi VXL thực hiện lệnh đọc bộ nhớ • Solution: dùng A19 làm bộ phân xử bus (bus arbiter), trong trường hợp này có thể gọi là bộ giải mã địa chỉ (address... so even if the 8088 microprocessor outputs a logic “1”, the memory cannot “see” this University of Technology 11 What if you want to read physical address 20023? A18 to A0 (HEX) AAAA 1111 9876 AAAA 1111 5432 AAAA 1198 1000 AAAA 7654 AAAA 3210 20023 0010 0000 0000 0010 0011 For memory it is the same as previous one University of Technology 12 Interfacing two 512KB Memory to the 8088 Microprocessor AX... 8088 Minimum Mode RD MEMW 512KB WR CS University of Technology 32 Interfacing one 512K Memory Chips to the 8088 Microprocessor (version 3) A19 A18 : A18 : A0 A0 D7 : D7 : D0 D0 MEMR 8088 Minimum Mode RD MEMW 512KB WR CS University of Technology 33 Interfacing four 256K Memory Chips to the 8088 Microprocessor A17 : A0 D7 : D0 RD WR A19 A18 CS A17 A17 : A0 D7 : D0 MEMR MEMW 8088 Minimum Mode 256KB #4 :... 00001 95 CS 00000 23 7FFFF 7FFFE 7FFFD 12 98 2C : 33 A18 : A0 D7 : D0 RD WR CS : 20023 20022 20021 20020 : 00001 00000 45 92 A3 : D4 97 University of Technology 17 Interfacing two 512KB Memory to the 8088 Microprocessor AX 3F1C A19 BX CX 0023 0000 A18 DX FCA1 A0 A0 D7 D7 CS XXXX SS DS XXXX 2000 ES XXXX BP SP XXXX XXXX SI DI XXXX XXXX IP XXXX 7FFFF : : D0 MEMR MEMW A18 : : D0 RD WR CS A18 : A0 D7 : D0 RD... 7D 20021 20020 12 29 : 00001 00000 7FFFF 7FFFE 7FFFD : 20023 20022 20021 20020 : 00001 00000 : 95 23 12 98 2C : 33 45 92 A3 : D4 97 University of Technology 18 Interfacing two 512KB Memory to the 8088 Microprocessor AX 3F1C A19 A19 BX 0023 A18 A18 CX DX 0000 FCA1 : A0 CS XXXX SS XXXX DS ES 2000 XXXX XXXX XXXX SI DI XXXX XXXX IP XXXX 36 A18 7FFFE 25 : A0 : A0 7FFFD 19 : D7 : D7 : D7 : D0 D0 D0 MEMR RD... University of Technology 24 Full Decoding A19 to A0 (HEX) AAAA 1111 9876 AAAA 1111 5432 AAAA 1198 1000 AAAA 7654 AAAA 3210 00000 0000 0000 0000 0000 0000 7FFFF 0111 1111 1111 1111 1111 Therefore if the microprocessor outputs an address between 00000 to 7FFFF, whose A19 is a logic “0”, the memory chip will not be selected University of Technology 25 Partial Decoding AX BX 3F1C 0023 CX 0000 DX FCA1 CS... thể gọi là bộ giải mã địa chỉ (address decoder) • Khi A19 = 0, bộ nhớ thấp hơn được cho phép, bộ nhớ cao bị cấm Tương tự khi A19 = 1 University of Technology 14 Interfacing two 512KB Memory to the 8088 Microprocessor AX 3F1C A19 BX 0023 A18 CX 0000 : DX FCA1 A0 A0 D7 D7 CS XXXX SS XXXX DS 2000 ES XXXX : 7FFFF 36 A18 7FFFE 25 : 7FFFD 19 : : 20023 13 20022 7D 20021 12 20020 29 : SP XXXX : : WR 00001 95... AAAA 3210 00000 0000 0000 0000 0000 0000 7FFFF 0111 1111 1111 1111 1111 80000 1000 0000 0000 0000 0000 FFFFF 1111 1111 1111 1111 1111 University of Technology 16 Interfacing two 512KB Memory to the 8088 Microprocessor AX BX 3F1C 0023 A19 A18 CX 0000 : DX FCA1 A0 A0 CS XXXX SS XXXX D7 : D7 : DS ES 2000 XXXX D0 D0 XXXX XXXX SI DI XXXX XXXX IP XXXX 36 25 : MEMR MEMW BP SP A18 7FFFF 7FFFE 7FFFD 19 : 20023... 8088 Minimum Mode 256KB #4 : A0 D7 : D0 RD WR 256KB #3 CS A17 : A0 D7 : D0 RD WR 256KB #2 CS A17 : A0 D7 : D0 RD WR 256KB #1 University of Technology 34 CS Interfacing four 256K Memory Chips to the 8088 Microprocessor A17 : A0 D7 : D0 RD WR A19 A18 CS A17 A17 : A0 D7 : D0 MEMR MEMW 8088 Minimum Mode 256KB #4 : A0 D7 : D0 RD WR 256KB #3 CS A17 : A0 D7 : D0 RD WR 256KB #2 CS A17 : A0 D7 : D0 RD WR 256KB . University of Technology 1
Microprocessor System Design
BÙI QUỐC BẢO
(buiquocbao@hcmut.edu.vn)
University of Technology. 14
Interfacing two 512KB Memory to the 8088 Microprocessor
•
Problem: đụng độ bus (bus conflict). Hai RAM sẽ xuất
dữ liệu cùng lúc khi VXL thực hiện lệnh đọc
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