MOS IC layout

MOS IC layout

[...]... diagrams In most cases the “Bulk” connection is always connected to the logical “1” level for PMOS and logical “0” level for NMOS For this reason most schematics do Figure 2.1 PMOS and NMOS transistors 7 8 SCHEMATIC FUNDAMENTALS Figure 2.2 PMOS gate open and NMOS gate open not show the bulk connection; it is implied Of course, this is not always the case For the moment, in the following schematics we will... the physical nature and limitations of the PMOS and NMOS devices (not to be discussed here), PMOS transistors are almost always used to establish logical “1” levels and NMOS logical “0” (Figure 2.4), although there are exceptions, of course This is why PMOS and NMOS together have been termed “complementary”: they complement each other because, together, they simply and reliably generate both logic levels... also be identified on the schematic (Figure 2.6) Each PMOS and NMOS has a length and a width These dimensions will be The Mos Transistor: The Basic Circuit Structure 9 Figure 2.3 PMOS resistor model and NMOS resistor model Figure 2.4 PMOS generating a “1” and NMOS generating a “0.” Figure 2.5 MOS transistors showing implied bulk connections Figure 2.6 MOS symbols showing device sizes explained in detail... context in which the term is used will be sufficiently obvious Logic gates are implemented directly or in combination to form Boolean logic functions Theoretically, almost any Boolean logic function can be implemented with a single logic gate, but in practice this is not done We hope that, after reading this book, you will fully understand why In general, most logic functions are implemented in CMOS using... the design in layout We start by presenting the basic building block of all CMOS circuits— the transistor We then continue by making sense of a typical schematic drawing, and we also lay the groundwork for more advanced topics 2.1 THE MOS TRANSISTOR: THE BASIC CIRCUIT STRUCTURE The transistor is the smallest building block or device that we need to understand to effectively implement or layout a design... encounter with device generators (Mentor Graphics) Jim Huntington—the Cadence “guru” in verification tools who helped us learn, install, and successfully use DRACULA on 16-Mbit chips Glenn Thorsthensen—another Mentor application engineer who spent a lot of time with the MOSAID layout group explaining place and route and compactor tricks (Mentor Graphics) Michael McSherry—he is the technical marketing person... try to provide a basic understanding of the operation of a transistor so that we can maximize the performance of the design CMOS stands for complementary metal oxide semiconductor This name is appropriate because there are two flavors of transistors, PMOS and NMOS, and together they complement each other, as we shall see in this section Typically, a schematic might denote PMOS and NMOS transistors as... behind producing quality layout are based on physical and electrical properties that never change This is the basic principle on which this book was written 1.2 WHAT IS LAYOUT DESIGN? We define layout design as follows: The process of creating an accurate physical representation of an engineering drawing (netlist) that conforms to constraints imposed by the manufacturing What Is Layout Design? 3 process,... in which a PMOS path to VDD and an NMOS path to VSS are “on” simultaneously Three or more input NAND gates are easily implemented by extending the series connections of the NMOS and the parallel connections of the PMOS transistors In specifying the NAND gate transistor sizes, four device sizes are now required In most cases, however, all PMOS transistors will be the same size and, similarly, all NMOS... identifies an electrical node that is required internally and externally to the schematic block The “VDD” net in this case is used everywhere and is global Again, drawing the wires to show the implied connectivity is impractical Figure 2.17 Schematic example 18 SCHEMATIC FUNDAMENTALS 2.5 REVIEW OF FUNDAMENTAL ELECTRICAL LAWS IC layout design is fundamentally the art of implementing an electrical circuit