Analysis and design of linear circuits

http://www.elsolucionario.blogspot.com LIBROS UNIVERISTARIOS Y SOLUCIONARIOS DE MUCHOS DE ESTOS LIBROS LOS SOLUCIONARIOS CONTIENEN TODOS LOS EJERCICIOS DEL LIBRO RESUELTOS Y EXPLICADOS DE FORMA CLARA VISITANOS PARA DESARGALOS GRATIS The Analysis and Design of Linear Circuits, Sixth Edition Problem 4-1 Find the voltage gain v O 'v S and current gain i O 'i x in Figure P4-1 for r = 10 kΩ i 500 Ω iO 100 Ω X vS 400 Ω iX kΩ r@ vO Solution: The solution is presented in the following MATLAB code clear all format short eng syms vs ix io vo r = 10e3; % Find the current ix ix = vs/(100+400); % Find the current io and the voltage vo io = -r*ix/(500+2e3); vo = io*2e3; % Compute the gains Kv = simplify(vo/vs) Ki = simplify(io/ix) Kv = -16 Ki = -4 Answer: K V = −16 and K I = −4 Solutions Manual The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-2 Find the voltage gain v O 'v and the current gain i O 'i S in Figure P4-2 For i S = mA, find the power supplied by the input current source and the power delivered to the 2-kΩ load resistor i 100 Ω O iS v1 100 Ω 100 i1 kΩ kΩ vO Solution: The solution is presented in the following MATLAB code clear all syms is v1 i1 io vo % Find i1 and v1 i1 = is/100/(1/100+1/100); v1 = i1*100; % Find io and vo io = -100*i1/2e3/(1/2e3+1/2e3); vo = io*2e3; % Find the gains Kv = simplify(vo/v1) Ki = simplify(io/is) % Find the source and load powers v1_num = subs(v1,is,2e-3); is = 2e-3; ps_num = is*v1_num vo_num = Kv*v1_num; io_num = Ki*is; po_num = vo_num*io_num Kv = -1000 Ki = -25 ps_num = 200.0000e-006 po_num = Answer: K V = −1000 and K I = −25 For i S = mA, p S = 200 µW and p L = W The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-3 Find the voltage gain v O 'v S and current gain i O 'i x in Figure P4-3 for g = 10!3 S kΩ vS iX kΩ iO 500 Ω vX g@ vX 10 kΩ kΩ Solution: The solution is presented in the following MATLAB code clear all syms vs ix vx io vo g = 1e-3; % Find ix and vx ix = vs/(1e3+3e3); vx = 3e3*ix; % Find io and vo io = g*vx/(500+2e3)/(1/10e3+1/(500+2e3)); vo = io*2e3; % Find the gains Kv = simplify(vo/vs) Ki = simplify(io/ix) Kv = 6/5 Ki = 12/5 Answer: K V = 1.2 and K I = 2.4 vO The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-4 (a) Find the voltage gain v O 'v S and current gain i O 'i x in Figure P4-4 (b) Validate your answers by simulating the circuit in OrCAD 6.3 kΩ 1.5 kΩ Solution: (a) The solution is presented in the following MATLAB code vS iX clear all syms vs ix io vo % Find ix ix = vs/1.5e3; % Find io and vo io = -50*ix; vo = io*2.2e3; % Find the gains Kv = simplify(vo/vs) Ki = simplify(io/ix) Kv = -220/3 Ki = -50 (b) The following OrCAD simulation verifies the answer in Part (a) Answer: (a) K V = −73.33 and K I = −50 (b) The OrCAD simulation verifies the answer in Part (a) 50iX iO 2.2 kΩ vO The Analysis and Design of Linear Circuits, Sixth Edition Problem 4-5 Find the voltage gain v O 'v S in Figure P4-5 10 kΩ iO vX vS 50 vX kΩ vO Solution: The solution is presented in the following MATLAB code clear all syms vs vx vo % Solve for vx in terms of vs Eqn1 = 'vx-(vs-(-50*vx))'; vx = solve(Eqn1,'vx'); % Find vo vo = -50*vx; % Find the gain Kv = simplify(vo/vs) Kv_num = double(Kv) Kv = 50/49 Kv_num = 1.0204e+000 Answer: K V = 50/49 = 1.02 Solutions Manual The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-6 Find an expression for the current gain i O 'i S in Figure P4-6 Hint: Apply KCL at node A iS iO A RS vS βiE RE RC iE Solution: The solution is presented in the following MATLAB code clear all syms vs is ie io B Rs Re Rc vA % Write a KCL expression at node A Eqn1 = '(vA-vs)/Rs + vA/Re - B*ie'; % Write additional equations relating the variables in the circuit Eqn2 = 'ie -vA/Re'; Eqn3 = 'io + B*ie'; Eqn4 = 'is -(vs-vA)/Rs'; % Solve the equations Soln = solve(Eqn1,Eqn2,Eqn3,Eqn4,'io','is','ie','vA'); io = simplify(Soln.io); is = simplify(Soln.is); % Calculate the gain Ki = io/is Ki = B/(-1+B) Answer: β KI = β −1 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-7 (a) Find the voltage v O in Figure P4-7 (b) Validate your answer by simulating the circuit in OrCAD 0.001 vX A kΩ B 2.2 kΩ Solution: (a) The solution is presented in the following MATLAB code 10 V clear all syms vx vo % Use node-voltage analysis Eqn1 = '(vx-10)/2.2e3 + vx/1.5e3 + (vx-vo)/1e3 + 1e-3*vx'; Eqn2 = '-1e-3*vx + (vo-vx)/1e3 + vo/3.3e3'; % Solve the equations for vo Soln = solve(Eqn1,Eqn2,'vx','vo') vo = double(Soln.vo) Soln = vo: [1x1 sym] vx: [1x1 sym] vo = 4.3980e+000 (b) The following OrCAD circuit verifies the answer in Part (a) Answer: (a) v O = 4.398 V (b) The OrCAD simulation verified the results in Part (a) 1.5 kΩ vX 3.3 kΩ vO The Analysis and Design of Linear Circuits, Sixth Edition Problem 4-8 (a) Find an expression for the current gain i O 'i S in Figure P4-8 (b) Find an expression for the voltage gain v O 'v S in Figure P4-8 iO R1 R2 vS vX μvX RL Solution: The solution is presented in the following MATLAB code clear all syms vs is vx io vo mu R1 R2 RL % Write a node-voltage equation Eqn1 = '(vx-vs)/R1 + (vx-(-mu*vx))/R2'; % Write additional equations relating the circuit parameters Eqn2 = 'vo + mu*vx'; Eqn3 = 'is - (vs-vx)/R1'; Eqn4 = 'vo - io*RL'; % Solve the equations Soln = solve(Eqn1,Eqn2,Eqn3,Eqn4,'vx','vo','is','io'); vo = simplify(Soln.vo); is = simplify(Soln.is); io = simplify(Soln.io); % Compute the gains Ki = simplify(io/is) Kv = simplify(vo/vs) Ki = -mu*R2/RL/(1+mu) Kv = -mu*R2/(R2+R1+R1*mu) Answer: − μR2 (1 + μ ) RL − μR2 (b) K V = (1 + μ ) R1 + R2 (a) K I = Solutions Manual The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 4-9 Find an expression for the voltage gain v O 'v S in Figure P4-9 RS A vX gvX vS RO vO Solution: The solution is presented in the following MATLAB code clear all syms vs vx Rs g Ro vo % Write a node-voltage equation Eqn1 = '(vo-vs)/Rs - g*vx + vo/Ro'; % Write additional equations relating the parameters in the circuit Eqn2 = 'vx - (vs-vo)'; % Solve the equations Soln = solve(Eqn1,Eqn2,'vx','vo'); vo = simplify(Soln.vo); % Calculate the gain Kv = simplify(vo/vs) Kv = Ro*(1+g*Rs)/(Ro+g*Rs*Ro+Rs) Answer: KV = gRO RS + RO gRO RS + RO + RS The Analysis and Design of Linear Circuits, Sixth Edition vO (t ) = Solutions Manual − R2 VA −t / R1C1 for t ≥ e R1 Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 7-63 RC Circuit Design (D) Design the first-order RC circuit in Figure P7-63 so an input v S (t) = 15 u(t) V produces a zerostate response v O (t) = 15 − 5e−500 t V 1st order vS (t) RC circuit vO(t) Solution: The initial output voltage is 10 V, which indicates we need to divide the source voltage with a voltage divider The final output voltage is 15 V Since the source is a scaled step function, the final output voltage will appear across the capacitor To arrange for both the initial voltage of 10 V and the final voltage, we need to include a resistor in series with the capacitor as the output portion of the circuit The following circuit will meet the specifications R1 10k V C1 66.667n IC = V1 15Vdc R2 20k In the circuit, the voltage source has the correct amplitude and the capacitor is in the zero state with an initial condition of V The output voltage is taken across the capacitor and resistor R At time t = 0, the capacitor has a voltage drop of V and the remainder of the source voltage must drop across the resistors in the series circuit Using voltage division, resistor R will drop 10 V, so the initial output voltage is correct After a long time, the capacitor acts like an open circuit, so it will drop the full 15 V from the source to meet the condition on the final output voltage We arbitrarily chose R = 10 kΩ, which required R = 20 kΩ for the voltage divider We then calculated the capacitance using RC = 1/T C = 1/500 to get C = 66.667 nF The following MATLAB code analyzes the voltage across the capacitor and then computes the current in the circuit Using the results we can calculate the output voltage and compare it to the simulation results for the circuit above Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition 15 14.5 14 13.5 Voltage (V) clear all format short eng syms t vc ic vR2 vo vc0 = 0; vcf = 15; R1 = 10e3; R2 = 2*R1; Tc = 1/500; C = 1/500/(R1+R2) vc = (vc0-vcf)*exp(-t/Tc)+vcf ic = C*diff(vc,t); ic_num = vpa(ic,5) vR2 = R2*ic; vo = simplify(vc+vR2); vo_num = vpa(vo,5) C = 66.6667e-009 vc = -15*exp(-500*t)+15 ic_num = 50000e-3*exp(-500.*t) vo_num = -5.0000*exp(-500.*t)+15 Solutions Manual 13 12.5 12 11.5 tt = 0:10e-6:10e-3; vott = subs(vo,t,tt); plot(tt,vott,'g','LineWidth',3) grid on xlabel('Time (s)') ylabel('Voltage (V)') 11 10.5 10 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 Time (s) 0.01 The follow output plot from the OrCAD simulation matches the MATLAB results Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Answer: The required circuit is presented above Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 7-64 Sample Hold Circuit (D) Figure P7-64 is a simplified diagram of a sample hold circuit When the switch is in position A, the circuit is in the sample mode and the capacitor voltage must charge to at least 99% of the source voltage V A in less than μs When the switch is moved to position B, the circuit is in the hold mode and the capacitor must retain at least 99% of V A for at least ms Select a capacitance that meets these constraints 50 Ω Sample A VA C Hold B vC(t) 50 MΩ Solution: The charging specification sets an upper bound on the capacitor value and the discharging specification sets a lower bound on the capacitor value The corresponding inequalities for these constraints are − e −1 μs / R1C > 0.99 and e −1 ms / R2C > 0.99 where R = 50 Ω and R = 50 MΩ Use MATLAB to solve these equations for the maximum and minimum capacitor values and pick a suitable capacitance in the range clear all syms Cmin Cmax Cmax = double(solve('1-exp(-1e-6/50/Cmax)-0.99','Cmax')) Cmin = double(solve('exp(-1e-3/50e6/Cmin)-0.99','Cmin')) Cmax = 4.3429e-009 Cmin = 1.9900e-009 We can choose C = nF to meet the specifications Answer: C = nF Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 7-65 Super Capacitor (A) Super capacitors have very large capacitance (typically from 0.1 to 50 F), small sizes, and very long charge holding times, making them useful in non-battery backup power applications The charge holding quality of a super capacitor is measured using the circuit in Figure P7-65 The switch is closed for a long time (say, 24 hours) and the capacitor charged to V The switch is then opened and the capacitor allowed to self-discharge through any leakage resistance for 24 hours Suppose that after 24 hours the voltage across a 0.47 F super capacitor is 4.5 V What is the equivalent leakage resistance in parallel with the capacitor? 100 Ω C 5V RL Super Capacitor Solution: To solve this problem, we need to find the time constant associated with the capacitor The solution is presented in the following MATLAB code clear all % Set the time points t1 = 0; t2 = 24*60*60; % Set the voltages i1 = 5; i2 = 4.5; % Calculate the time constant Tc = (t2-t1)/log(i1/i2) % Calculate the equivalent parallel resistance C = 0.47; R = Tc/C Tc = 820.0415e+003 R = 1.7448e+006 Answer: R L = 1.7448 MΩ Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 7-66 Cost-Conscious RLC Circuit Design (D) You are assigned a task to design a series, passive RLC circuit with a characteristic equation of s + 2000s + × 10 = To save money your supervisor wants you to use a previously purchased 100 mH inductor with a 10 Ω parasitic resistance The RLC circuit will be used to interface to a Thèvenin source with a 75 Ω series output resistance Your circuit must demonstrate the desired response with the source circuit connected Solution: The corresponding series RLC characteristic equation is s2 + R s+ = s + 2ζω s + ω 02 = s + 2000s + 5000000 = L LC Given a value for the inductance, we can solve for the resistance and capacitance using the characteristic equation clear all L = 100e-3 C = 1/L/5e6 R_total = 2000*L R_design = R_total - 10 -75 L = 100.0000e-003 C = 2.0000e-006 R_total = 200.0000e+000 R_design = 115.0000e+000 Answer: Use the inductor provided and connect it in series with the source, a 115-Ω resistor, and a 2-µF capacitor in order to meet the specifications Copyright © 2008 John Wiley & Sons, Inc All rights reserved No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Sections 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600 The Analysis and Design of Linear Circuits, Sixth Edition Solutions Manual Problem 7-67 Combined First- and Second-Order Response (A) The switch in Figure P7-67 has been in position A for a long time and is moved to position B at t = and then to position C when t = 10 ms For < t < 10 ms the capacitor voltage is a charging exponential v C (t) = 10( ! e!100 t) V For t > 10 ms the capacitor voltage is a 10 kΩ B sinusoid v C (t) = 6.321 cos [1000(t ! 0.01)] V (a) Suppose the resistance is reduced to kΩ and the switching sequence A C repeated 10 V Will the amplitude of the sinusoid increase, decrease, or stay the same? Will the frequency of the sinusoid increase, decrease or stay the same? vC(t) (b) Suppose the inductance is reduced to 100 mH and the switching μF sequence repeated Will the amplitude of the sinusoid increase, decrease, or stay the same? Will the frequency of the sinusoid increase, decrease or stay the same? 10 kΩ B A C 10 V C vC(t) t