4 AMD S1 PROCESSOR 638-Pin uFCPGA 638 EXTERNAL CLOCK GENERATOR ICS951462 LVDS CON 16 LVDS 32 UNBUFFERED DDR2 NEAR SODIMM 9,10 DDR II 400/533/667 UNBUFFERED DDR2 FAR SODIMM ATI NB - RS690T I2C I/F D 200-PIN DDR2 SODIMM 16x16 9,10 200-PIN DDR2 SODIMM CRT BOOTSTRAPS ROM(DNI) 13 5,6,7,8 HyperTransport LINK0 IN 1.0 D OUT VGA CON 32 HyperTransport LINK0 CPU I/F INTEGRATED GRAPHICS DDRII 400MHz LVDS/TVOUT/TMDS X1 PCIE INTERFACE SIDE PORT MEMORY X16 PCIE VIDEO/SDVO I/F 15 X4 PCIE I/F WITH SB EXTRA DISPLAY X1 PCIE I/F MINIPCIE SLOT MINIPCIE SLOT 30 30 NEW CARD 23 RTL8111B PCIE ETHERNET 25 X1 HDMI 32 11,12,13,14,15 C C A-LINK Array Mic X4 NewCard USB#3 23 USBPORT USB#2 28 USBPORT USB#1 28 USBPORT USB#0 28 MiniPCI USB#6 30 USBPORT USB#5 30 USBPORT USB#4 28 USBPORT USB#7 28 USBPORT USB#9 DNI USBPORT USB#8 28 45 ATI SB - SB600 USB 2.0 USB 2.0 (10 PORTS) SATA II (4 PORTS) AZALIA HD AUDIO SPI I/F INT RTC ATA 66/100/133 I/F SATA CONNECTOR 29 ATA 66/100/133 I/F IDE CONNECTOR 29 HW MONITOR I2C I/F B PCI/PCI BDGE MR510 PCI 17, 18, 19, 20, 21 TPM AMP & AUDIO 27 CONN LPC I/F ACPI 2.0 BOOTSTRAPS ROM (SB) 21 ALC888 AZALIA CODEC 26 AC97 2.3 ATA 66/100/133 B HD AUDIO I/F CARDREADER 22 24 LPC BUS KBC ENE3910 BATTERY CHAGER CPU CORE POWER 41 36 CPU&RS690T HT VLDT POWER 35 28 CPU MEMORY POWER 38 PS2 SYSTEM MAIN POWER 37 CIR 31 RS690T CORE POWER 39 ISA I/F KBD MOUSE 31 ISA I/F BIOS 4M BIOS 8M 31 31 DISCHARGE CIRCUIT A A 37 SB600 & PCIE POWER 35 MICRO-STAR INT'L CO.,LTD Title BLOCK DIAGRAM Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet 1 of 45 +5V BATTERY CHARGER BATTERY D +3.3VSUS_NTB +VDC MAIN PWR SW REGULATOR VCCA 2.5V 500mA SW REGULATOR +VIN +5VSUS_NTB VLDT 1.2V SW REGULATOR 12V +/-5% +3.3V_NTB +5V_NTB +VIN_MEM +5VSUS 5VSB +/-5% +5VALW_ATX POWER SWITCH SWITCH CPU PWR 12V +/-5% SWITCH +5V +3.3VALW D VLDT_RUN (S0, S1) VLDT 1.2V 1A NB RS690T/485T NB CORE 10A +VIN PCIE&SB SW REGULATOR VDDA_1V2(S0, S1) PCI-E CORE &PCI-E IO 5A HTPLL (1.8V) 200mA +5V 1.8V SW REGULATOR +1.8V(S0, S1) PLL & DAC-Q(1.8V) 200mA TRANSFORMER 400mA DAC 300mA +3.3V +5V +3.3V AVDD (S0, S1) +5VDUAL_ATX SW +5V_ATX +3.3VALW LDO REGULATOR +5VDUAL DDR2 SODIMMX2 +VIN +3.3VALW_ATX C 3.3V +/-5% VDDCORE 0.375-1.500V 35A VCC_NB (S0, S1) NB CORE SW REGULATOR +5V +3.3VDUAL CPU_VDD_RUN (S0, S1) HT VLDT 1.2V 1A +VIN +5VALW 5V +/-5% ATX POWER SUPPLY AMD CPU S1g1 +VIN +5V +5VALW_NTB SW CPU_VDDA_RUN (S0, S1) 2.5V LDO REGULATOR +3.3VALW_NTB +5V +3.3VDUAL_ATX SW CPU_VDDIO_SUS (S0, S1, S3) 1.8V VDD&VTT SW REGULATOR +5VSUS VDD MEM 6A CPU_VTT_SUS (S0, S1, S3) C VTT_MEM 1A -12V +/-5% VCC_SB (S0, S1) +3.3V_ATX SB SB600 X4 PCI-E 0.8A ATA I/O 0.2A ATA PLL 0.01A PCI-E PVDD 80mA SB CORE 0.6A CONTROL SIGNAL: +3.3VALW 1.2V LDO REGULATOR +1.2VALW 1.2V S5 PW 0.22A MOBILE: BATTERY +3.3V DESKTOP: ATX +3.3VALW 3.3V S5 PW 0.01A +5V USB CORE I/O 0.2A B +VIN 3.3V I/O 0.45A MINI PCI SLOT GBIT ENTHENET +3.3V 3.3V(S0, S1)1.5A +5V 5V (S0, S1) 0.1A 3.3V 0.5A (S0, S1, S3, S4, S5) +3.3VALW 3.3V(S3, S5) 0.2A B PCI-E CARD +5V 1.5V SW REGULATOR 1.5V (S0, S1) 0.7A 3.3V (S3, S5) 0.3A +3.3V 3.3V (S0, S1) 1.3A +5V PCI Slot (per slot) 5V 5.0A 3.3V 7.6A 12V 0.5A 3.3Vaux 0.375A -12V 0.1A X1 PCIE per 3.3V 3.0A 12V 0.5A 3.3Vaux 0.1A A X16 PCIE 3.3V 3.0A 12V 5.5A SUPER I/O +5VALW CNR CONNECTOR +3.3VDUAL (S3) 0.01A 5V 1.0A 3.3V 1.0A 12V 0.5A VDD VDD USB X7 FR USB X2 RL 3.3Vaux 1.0A 5VDual 5VDual -12V 0.1A 3.5A 1.0A 5VDual 0.5A +3.3V (S0, S1) 0.01A 2XPS/2 +5V (S0, S1) 0.1A 5VDual HD CODEC 1.0A 3.3V CORE 0.3A A 5V ANALOG 0.1A MICRO-STAR INT'L CO.,LTD Title POWER DELIVERY CHART Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet of 45 +5VRUN ADAPTER 19 VOLTAGE VDD D AC_OK# +3VSUS VIN PCIE power SW P2231 +VDDA CHARGER MAX 1772 +3VRUN_PCIE D +3VRUN OUT 3.3V IN 3.3V PCIE 1.5VIN +1_5VRUN_PCIE 1.5V PCIE SHDN VDDA_EN ADAPTER & BATTERY SELECTOR Page 41 V CORE MAX8774GTL+ Page 35 +1_5VRUN VID(0~5) +3VSUS_PCIE 3.3VAUX_IN +3VSUS_PCIE Output Select +3VSUS PWR_SRC CPU_VDD_RUN VDD_EN Enable Enable V_CHG Page 23 Page 36 Page 40 RUND VCCFAN1 +5VRUN_HDMI RUN_ON SM BUS to KBC BATTERY or CELL VDD +3VALW System power TPS51120 +5VALW LDO C +5VSUS Swicth Dual +3VSUS SUS_ON Enable AVDD_USB(SB) Page 37 +5VSUS Run power rail Swicth BATTERY 12~16.8V +CRT5V VDDSPD(DIM) CRT5V AVDD(NB) USB5V_A LVDDR18A(NB) +5V_CAMERA USB5V_C VDDR3(NB) AVDD_5V V5_VREF(SB) CLK_VDD(CLK GEN) C CLK_VDDA(CLK GEN) +5VRUN +5VRUN VDD_48(CLK GEN) +3VRUN +3VRUN VDD_REF(CLK GEN) +3.3V_AVDDC(SB) XTLVDD_ATA(SB) S5_3.3V(SB) AVDD(SB) VDD33(LAN) VDDQ(SB) +3V_SOCKET VDD CODEC_3V MEM_VDDQ SC486I CPU_VDDIO_SUS +3V_SPDIF VTT_VDDIO_EN Enable +V3.3S_LVDS_PANEL MEM_VTT CPU_VDDIO_SUS PLLVDD12(NB) CPU_VTT_SUS VDDPLL(NB) singel LDO VDDA12(NB) VTT_VDDIO_EN Enable B VLDT_EN Page 38 B PCIE_VDDR(SB) +VLDT PCIE_PVDD(SB) Page 35 +5VSUS PLLVDD_ATA(SB) S5_1.2V(SB) AVDD_SATA(SB) +1.2VRUN USB_PHY_1.2V(SB) VCC_NB VDD +1.2VRUN VDD(SB) Page 39 +1.2VRUN AVDDQ(NB) OZ813LP +1.2VSUS Enable +5VSUS PLLVDD(NB) HTPVDD(NB) +1.8VRUN +5VRUN Swicth power VDD18(NB) Enable +3VRUN IOPLLVDD18(side port) VDD LVDDR18D(NB) Page 39 VIN APL5912 LPVDD(NB) +1_5VRUN AVDDDI(NB) +5VRUN Enable +1.8VRUN Page 39 A A MICRO-STAR INT'L CO.,LTD Title POWER DELIVERY CHART Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet of 45 D D HTREFCLK 66MHZ NB-OSC 14.318MHZ EXTERNAL PCI SLOT1 PCI CLK2 33MHZ MINI PCI SLOT SUPER IO CLK 48MHZ SB-OSCIN 14.318MHZ TVCLKIN TVCLKIN PAIR MEM CLK NB PCIE CLK 100MHZ SB PCIE CLK 100MHZ SB-OSCIN 14.318MHZ PCI CLK1 33MHZ PCI CLK3 33MHZ SB600 REV SO-DIMM PAIR MEM CLK C PCI SLOT0 ATI SB ATI NB - RS690T NEAR SO-DIMM PCI CLK0 33MHZ SB-OSCIN 14.318MHZ KB_CLK SUPER IO IT8712F KEYBOARD MS_CLK C MOUSE PCI CLK4 33MHZ LPC SLOT PCI CLK5 33MHZ LPC BIOS PCI CLK6 33MHZ DEBUG POST PCI CLK7 33MHZ PCI SLOT2 CLK GEN ATHLON64 S1 CPU PAIR CPU CLK 200MHZ LGA638 PACKAGE PCIE CLK 100MHZ PCIE GFX SLOT - 16 LANES PCIE CLK 100MHZ PCIE GPP SLOT - LANE PCIE CLK 100MHZ PCIE GPP SLOT - LANE PCIE CLK 100MHZ AZALIA_BITCLK AZALIA CODEC PCI EXPRESS CARD - LANE B PCIE CLK 100MHZ 25MHZ OSC INPUT GIGABIT ETHERNET - LANE 32.768K Hz PCIE CLK 100MHZ USB CLK 48MHZ 25M Hz B SUPER IO CLK 48MHZ 14.31818MHz A A MICRO-STAR INT'L CO.,LTD Title CLOCK DISTRIBUTION Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet of 45 PROCESSOR HYPERTRANSPORT INTERFACE VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE D D +VLDT U1A D4 D3 D2 D1 VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0 VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0 AE5 AE4 AE3 AE2 N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2 J1 K1 G1 H1 G3 G2 E1 F1 E3 E2 L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1 HT_CADOUT15_P 11 HT_CADOUT15_N 11 HT_CADOUT14_P 11 HT_CADOUT14_N 11 HT_CADOUT13_P 11 HT_CADOUT13_N 11 HT_CADOUT12_P 11 HT_CADOUT12_N 11 HT_CADOUT11_P 11 HT_CADOUT11_N 11 HT_CADOUT10_P 11 HT_CADOUT10_N 11 HT_CADOUT9_P 11 HT_CADOUT9_N 11 HT_CADOUT8_P 11 HT_CADOUT8_N 11 HT_CADOUT7_P 11 HT_CADOUT7_N 11 HT_CADOUT6_P 11 HT_CADOUT6_N 11 HT_CADOUT5_P 11 HT_CADOUT5_N 11 HT_CADOUT4_P 11 HT_CADOUT4_N 11 HT_CADOUT3_P 11 HT_CADOUT3_N 11 HT_CADOUT2_P 11 HT_CADOUT2_N 11 HT_CADOUT1_P 11 HT_CADOUT1_N 11 HT_CADOUT0_P 11 HT_CADOUT0_N 11 J5 K5 J3 J2 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 Y4 Y3 Y1 W1 HT_CLKOUT1_P HT_CLKOUT1_N HT_CLKOUT0_P HT_CLKOUT0_N 51_0402 HT_CTLIN1_P P3 51_0402 HT_CTLIN1_N P4 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H1 L0_CTLOUT_L1 T5 R5 N1 P1 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLOUT_H0 L0_CTLOUT_L0 R2 R3 C1 4.7u_6V_0603 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 C B +VLDT HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N 11 11 11 11 R1 R2 HT_CLKIN1_P HT_CLKIN1_N HT_CLKIN0_P HT_CLKIN0_N A 11 HT_CTLIN0_P 11 HT_CTLIN0_N HT_CPU_CTLOUT1_P HT_CPU_CTLOUT1_N +VLDT AMD check list 4-24~4-27 0.22u_10V_0402 (DNI) C2 C3 C4 0.22u_10V_0402 180pF_50v_0402 LAYOUT: Place bypass cap on topside of board NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS B 11 11 11 11 HT_CTLOUT0_P 11 HT_CTLOUT0_N 11 MICRO-STAR INT'L CO.,LTD Title SOCKET S1 HT I/F Size Document Number Custom Rev 1.0 MS-12221 Date: 180pF_50v_0402 (DNI) C6 C7 4.7u_6v_0603 4.7u_6V_0603 TP1 TP2 Athlon 64 S1 Processor Socket C5 C Thursday, February 01, 2007 Sheet of 45 A A B C D E Processor DDR2 Memory Interface VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE MEM_MB_DATA[63 0] CPU_M_VREF_SUS CPU_VDDIO_SUS R3 39.2_0402 1% W17 1n_50v_0402 (DNI) SNS_+0.9VTT M_ZN M_ZP R4 39.2_0402 1% PLACE THEM CLOSE TO CPU WITHIN 1" CPU_VTT_SUS U1B CPU_VTT_SUS C8 Y10 AE10 AF10 MEMVREF VTT_SENSE MEMZN MEMZP VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10 9,10 9,10 9,10 9,10 MEM_MA0_CS#3 MEM_MA0_CS#2 MEM_MA0_CS#1 MEM_MA0_CS#0 V19 J22 V22 T19 MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0 MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1 Y16 AA16 E16 F16 MEM_MA0_CLK2_P MEM_MA0_CLK2_N MEM_MA0_CLK1_P MEM_MA0_CLK1_N 9 9 9,10 9,10 9,10 9,10 MEM_MB0_CS#3 MEM_MB0_CS#2 MEM_MB0_CS#1 MEM_MB0_CS#0 Y26 J24 W24 U23 MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0 MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1 AF18 AF17 A17 A18 MEM_MB0_CLK2_P MEM_MB0_CLK2_N MEM_MB0_CLK1_P MEM_MB0_CLK1_N 9 9 H26 J23 J20 J21 MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0 MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0 W23 W26 V20 U19 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0 MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0 J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24 MEM_MB0_ODT1 9,10 MEM_MB0_ODT0 9,10 MEM_MA0_ODT1 9,10 MEM_MA0_ODT0 9,10 MEM_MB_ADD[15 0] 9,10 K22 R20 T22 MA_BANK2 MA_BANK1 MA_BANK0 MB_BANK2 MB_BANK1 MB_BANK0 K26 T26 U26 MEM_MB_BANK2 9,10 MEM_MB_BANK1 9,10 MEM_MB_BANK0 9,10 MB_RAS_L MB_CAS_L MB_WE_L U24 V26 U22 MEM_MB_RAS# 9,10 MEM_MB_CAS# 9,10 MEM_MB_WE# 9,10 9,10 MEM_MB_CKE1 9,10 MEM_MB_CKE0 9,10 MEM_MA_CKE1 9,10 MEM_MA_CKE0 9,10 MEM_MA_ADD[15 0] MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 9,10 MEM_MA_BANK2 9,10 MEM_MA_BANK1 9,10 MEM_MA_BANK0 T20 U20 U21 9,10 MEM_MA_RAS# 9,10 MEM_MA_CAS# 9,10 MEM_MA_WE# MA_RAS_L MA_CAS_L MA_WE_L MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 DDR II: CMD/CTRL/CLK Athlon 64 S1 Processor Socket MEM_MB_DM[7 0] 9 9 9 9 9 9 9 9 U1C MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0 AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11 MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0 MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0 AD12 AC16 AE22 AB26 E25 A22 B16 A12 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0 AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26 F26 E26 A24 A23 D16 C16 C12 B12 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0 MEM_MB_DQS7_P MEM_MB_DQS7_N MEM_MB_DQS6_P MEM_MB_DQS6_N MEM_MB_DQS5_P MEM_MB_DQS5_N MEM_MB_DQS4_P MEM_MB_DQS4_N MEM_MB_DQS3_P MEM_MB_DQS3_N MEM_MB_DQS2_P MEM_MB_DQS2_N MEM_MB_DQS1_P MEM_MB_DQS1_N MEM_MB_DQS0_P MEM_MB_DQS0_N MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10 MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0 Y13 AB16 Y19 AC24 F24 E19 C15 E12 MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0 W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13 MEM_MA_DATA[63 0] MEM_MA_DM[7 0] MEM_MA_DQS7_P MEM_MA_DQS7_N MEM_MA_DQS6_P MEM_MA_DQS6_N MEM_MA_DQS5_P MEM_MA_DQS5_N MEM_MA_DQS4_P MEM_MA_DQS4_N MEM_MA_DQS3_P MEM_MA_DQS3_N MEM_MA_DQS2_P MEM_MA_DQS2_N MEM_MA_DQS1_P MEM_MA_DQS1_N MEM_MA_DQS0_P MEM_MA_DQS0_N 9 9 9 9 9 9 9 9 DDR: DATA Athlon 64 S1 Processor Socket VDD_VREF_SUS_CPU CPU_VDDIO_SUS CPU_M_VREF_SUS MEM_MB0_CLK2_P R5 1K_0402 1% C13 1.5p_50v_0402 MEM_MB0_CLK2_N MEM_MB0_CLK1_P R6 C14 1K_0402 1% 1n_50v_0402 1n_50v_0402 (DNI) C15 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH A1 A26 C19 1.5p_50v_0402 MEM_MB0_CLK1_N Athlon 64 S1g1 AMD check list 2-1 uPGA638 Top View MEM_MA0_CLK2_P 1 LAYOUT:PLACE CLOSE TO CPU C20 1.5p_50v_0402 MEM_MA0_CLK2_N MEM_MA0_CLK1_P AF1 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH C21 1.5p_50v_0402 MICRO-STAR INT'L CO.,LTD MEM_MA0_CLK1_N Title SOCKET S1 DDR2 MEMORY I/F Size C Date: A B C D Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 E Sheet of 45 LAYOUT: ROUTE VDDA TRACE APPROX 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG maximun 40 ohm +VDDA ATHLON Control and Debug CPU_VDDIO_SUS AMD check list 4-22 L1 CPU_VDDA_2.5_RUN R7 +3VSUS 10K_0402 10L1000m_50_0402 C22 C23 C24 3300p_50V_0402 D U1D F8 F9 JNC2 0R_0402 (DNI) R471 CPU_VDDIO_SUS 715_0402 R12 300_0402 (DNI) 300_0402 U51 13,17 LDT_STOP# NC D27 place them to CPU within 1" GND R473 715_0402 VCC A S-BAT54C_SOT23 Y R631 8.2K_0402 CPUCLK C26 3.9n_50V_0603 CPU_CLKIN_SC_P CPU_CLKIN_SC_N R20 169_0402 1% C984 47p_50V_0402 16 C27 CPUCLK# CPU_TMS CPU_TCK CPU_TRST# CPU_TDI CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L TEST19 TEST18 JNC6 0R_0402 (DNI) R475 715_0402 TP7 TP9 TP11 TP13 TP14 CPU_VDDIO_SUS B +3VSUS R38 10K_0402 +3VRUN 8P4R-10K_RN0402 T_CRIT_CPU# CPU_THRM_ALERT6 SMB_THRMCPU_DATA SMB_THRMCPU_CLK B CPU_PH_G RN1 CPU_PROCHOT#_1.8 E R42 CPU_TEST5_THERMDC CPU_TEST4_THERMDA 4.7K_0402 C SB_TALERT# F6 E6 W9 Y9 A9 A8 CPU_DBRDY TP5 3.9n_50V_0603 CPU_HT_RESET# LDT_RST# CPU_HTREF1 P6 CPU_HTREF0 R6 CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L TP3 TP4 B7 A7 F10 AF4 AF5 36 CPU_VDD_RUN_FB_H 36 CPU_VDD_RUN_FB_L CPU_LDTSTOP# 16 SN74LVC1G17DBV C 17 CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP# CPU_SIC_R CPU_SID_R ATI change at Herring 1.5 0C version on 10/26/2006 R15 44.2_0603 1% +VLDT R16 44.2_0603 1% PN N/A Harry 2007/01/18 R13 R14 300_0402 (DNI) +1.8VRUN ATI Errata ER_RS690B2&PA_IPX600AD12 R8 VDDA2 VDDA1 VID5 VID4 VID3 VID2 VID1 VID0 SIC SID HT_REF1 HT_REF0 CPU_PRESENT_L VDD_FB_H VDD_FB_L PSI_L CPU_TEST5_THERMDC VDD SMBCLK SMB_THRMCPU_CLK D+ SMBDATA SMB_THRMCPU_DATA D- ALERT# GND A 33 T_CRIT_CPU# C31 0.1u_10V_0402 T_CRIT_A# R11 4.7K_0402 (DNI) D 300_0402 E C CPU_THERMTRIP# 18 Q1 A5 C6 A6 A4 C5 B5 CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 AC6 CPU_PRESENT# A3 CPU_PSI# CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 CPU_PSI# 36 36 36 36 36 36 36 VDDIO_FB_H VDDIO_FB_L CLKIN_H CLKIN_L G10 DBRDY AA9 AC9 AD9 AF9 TMS TCK TRST_L TDI E9 E8 G9 H10 AA7 C2 D7 E7 F7 C7 AC8 TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 TEST29_H TEST29_L C3 AA6 W7 W8 Y6 AB6 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 P20 P19 N20 N19 RSVD0 RSVD1 RSVD2 RSVD3 R26 R25 P22 R22 U5 C30 2200p_50V_0402 R10 SMBT3904 DBREQ_L JTAC TDO CPU_DBREQ# AE9 CPU_TDO TP8 TP10 TP12 H16 B18 RSVD10 RSVD11 B3 C1 RSVD12 RSVD13 RSVD14 H6 G6 D5 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 R24 W18 R23 AA8 H18 H19 TP6 R22 80.6_0402 1% ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1" TEST21 TP15 J7 H8 AF8 AE6 TEST26 K8 C4 RSVD8 RSVD9 C CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N Trace impedance 80ohm AE7 AD7 AE8 AB8 AF7 TEST24 TEST23 TEST22 TEST21 TEST20 RSVD4 RSVD5 RSVD6 RSVD7 E10 C9 C8 19 +3VSUS 300_0402 AF6 CPU_THERMTRIP#_R AC7 CPU_PROCHOT#_1.8 RESET_L PWROK LDTSTOP_L SMBT3904 CPU_TEST4_THERMDA 300_0402 THERMTRIP_L PROCHOT_L Q3 Cap close to thermal sensor R9 0.22u_10V_0402 4.7u_6V_0603 CPU_ALL_PWROK 17 SB_CPUPWRGD CPU_VDDIO_SUS B CPU_VDDIO_SUS Harry 10/02 TEST26 CPU_DBREQ# CPU_TMS CPU_TCK CPU_TRST# CPU_TDI ERRATA#133 R625 R28 R29 R30 R31 R33 B 300_0402 510_0402 (DNI) 510_0402 (DNI) 510_0402 (DNI) 510_0402 (DNI) 510_0402 (DNI) CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H R35 R36 1K_0402 510_0402 CPU_TEST25_L_BYPASSCLK_L TEST18 TEST19 TEST21 R39 R626 R627 R628 510_0402 300_0402 300_0402 300_0402 Harry 10/02 ERRATA#133 SMB_THRMCPU_CLK 31 MISC SMB_THRMCPU_DATA 31 AMD NPT S1 SOCKET Processor Socket CPU_THRM_ALERT- 31 A MICRO-STAR INT'L CO.,LTD LM86CIMMXNOPB_MSOP8-RH Title Close to CPU socket SOCKET S1 CTRL Size B Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet of 45 U1F CPU_VDD_RUN CPU_VDD_RUN U1E AC4 AD2 G4 H2 J9 J11 J13 K6 K10 K12 K14 L4 L7 L9 L11 L13 M2 M6 M8 M10 N7 N9 N11 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 V6 V8 V10 D C VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 CPU_VDDIO_SUS POWER Athlon 64 S1 Processor Socket A1 A26 B Athlon 64 S1g1 uPGA638 Top View AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 GROUND J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 BOTTOMSIDE DECOUPLING D CPU_VDD_RUN 22u_6V_0805 22u_6V_0805 22u_6V_0805 22u_6V_0805 22u_6V_0805 C32 C33 C34 C35 C36 C37 C38 C39 C40 22u_6V_0805 22u_6V_0805 22u_6V_0805 22u_6V_0805 CPU_VDD_RUN 0.01u_16V_0402 C41 C43 AMD check list 4-16~4-20 C44 180pF_50v_0402 0.22u_10V_0402 0.22u_10V_0402 C DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE CPU_VDDIO_SUS CPU_VDDIO_SUS 4.7u_6V_0603 C50 0.22u_10V_0402 C45 22u_6V_0805 4.7u_6V_0603 C47 C48 C46 C49 22u_6V_0805 0.22u_10V_0402 4.7u_6V_0603 C52 C51 4.7u_6V_0603 0.22u_10V_0402 C54 C53 0.22u_10V_0402 0.22u_10V_0402 C56 C55 0.22u_10V_0402 0.01u_16V_0402 C58 180pF_50v_0402 C60 B C57 C59 0.01u_16V_0402 180pF_50v_0402 AMD Check list 4-1~4-5 CPU_VTT_SUS Athlon 64 S1 Processor Socket 0.22u_10V_0402 C65 4.7u_6V_0603 C61 AF1 C42 4.7u_6V_0603 C63 C62 C64 4.7u_6V_0603 4.7u_6V_0603 0.22u_10V_0402 C67 C66 0.22u_10V_0402 180pF_50v_0402 180pF_50v_0402 C73 C75 1n_50V_0402 1n_50V_0402 C69 C70 C71 C72 C68 C74 C76 1n_50V_0402 1n_50V_0402 0.22u_10V_0402 180pF_50v_0402 180pF_50v_0402 AMD check list 4-6~4-8,4-11 A A MICRO-STAR INT'L CO.,LTD Title SOCKET S1 PWR & GND PROCESSOR POWER AND GROUND Size B Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet of 45 81 82 87 88 95 96 103 104 111 112 117 118 CPU_VDDIO_SUS C B 107 106 85 BA0 BA1 BA2 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 6 6 6 6 MEM_MA_DQS0_P MEM_MA_DQS1_P MEM_MA_DQS2_P MEM_MA_DQS3_P MEM_MA_DQS4_P MEM_MA_DQS5_P MEM_MA_DQS6_P MEM_MA_DQS7_P 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 6 6 6 6 MEM_MA_DQS0_N MEM_MA_DQS1_N MEM_MA_DQS2_N MEM_MA_DQS3_N MEM_MA_DQS4_N MEM_MA_DQS5_N MEM_MA_DQS6_N MEM_MA_DQS7_N 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 MEM_MA0_CLK1_P MEM_MA0_CLK1_N MEM_MA0_CLK2_P MEM_MA0_CLK2_N 30 32 164 166 CK0 CK0 CK1 CK1 6,10 MEM_MA_CKE0 6,10 MEM_MA_CKE1 79 80 CKE0 CKE1 6,10 MEM_MA_RAS# 6,10 MEM_MA_CAS# 6,10 MEM_MA_WE# 6,10 MEM_MA0_CS#0 6,10 MEM_MA0_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 114 119 ODT0 ODT1 6,10 MEM_MA0_ODT0 6,10 MEM_MA0_ODT1 16,18,45 SDATA0 16,18,45 SCLK0 +3VRUN MEM_M_VREF_SUS SA0 SA1 195 197 SDA SCL 199 VDDspd VREF 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 NC1 NC2 NC3 NC4 NC/TEST 50 69 83 120 163 VSS57 VSS58 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 201 202 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DATA[63 0] 6,10 MEM_MB_BANK[2 0] MEM_MB_DM[7 0] MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 107 106 85 BA0 BA1 BA2 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 6 6 6 6 MEM_MB_DQS0_P MEM_MB_DQS1_P MEM_MB_DQS2_P MEM_MB_DQS3_P MEM_MB_DQS4_P MEM_MB_DQS5_P MEM_MB_DQS6_P MEM_MB_DQS7_P 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 6 6 6 6 MEM_MB_DQS0_N MEM_MB_DQS1_N MEM_MB_DQS2_N MEM_MB_DQS3_N MEM_MB_DQS4_N MEM_MB_DQS5_N MEM_MB_DQS6_N MEM_MB_DQS7_N 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 MEM_MB0_CLK1_P MEM_MB0_CLK1_N MEM_MB0_CLK2_P MEM_MB0_CLK2_N 30 32 164 166 CK0 CK0 CK1 CK1 6,10 MEM_MB_CKE0 6,10 MEM_MB_CKE1 79 80 CKE0 CKE1 6,10 MEM_MB_RAS# 6,10 MEM_MB_CAS# 6,10 MEM_MB_WE# 6,10 MEM_MB0_CS#0 6,10 MEM_MB0_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 114 119 ODT0 ODT1 198 200 SA0 SA1 16,18,45 SDATA0 16,18,45 SCLK0 195 197 SDA SCL +3VRUN 199 VDDspd 6,10 MEM_MB0_ODT0 6,10 MEM_MB0_ODT1 +3VRUN MEM_MA0_CS#2 6,10 MEM_MA0_CS#3 6,10 R43 4.7K_0402 MEM_M_VREF_SUS MEM_VREF_SUS CPU_VDDIO_SUS MEM_M_VREF_SUS R44 1K_0402 1% R45 1K_0402 1% C90 0.1u_10V_0402 C92 1n_50v_0402 VREF 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 J1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 NC1 NC2 NC3 NC4 NC/TEST 50 69 83 120 163 VSS57 VSS58 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 201 202 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 MEM_MB_DATA[63 0] MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 D C MEM_MB0_CS#2 6,10 MEM_MB0_CS#3 6,10 B DDR2_SODIMM_RVS_H=9.2mm A 59 60 65 66 71 72 77 78 121 122 127 128 132 A 198 200 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 J2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14/NC A15/NC SO-DIMM(RVS) MEM_MA_DM[7 0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14/NC A15/NC 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 6,10 MEM_MA_BANK[2 0] 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 SO-DIMM (RVS) D MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 6,10 MEM_MA_ADD[15 0] MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 59 60 65 66 71 72 77 78 121 122 127 128 132 81 82 87 88 95 96 103 104 111 112 117 118 6,10 MEM_MB_ADD[15 0] VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 CPU_VDDIO_SUS MICRO-STAR INT'L CO.,LTD DDR2_SODIMM_RVS_H=5.2mm Title LAYOUT: PLACE CLOSE TO DIMMs DDR2 SODIMMS A/B CHANNEL Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet of 45 MEM_MA_ADD[15 0] 6,9 MEM_MA_ADD[15 0] MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 D MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0 6,9 MEM_MA_CAS# 6,9 MEM_MA_WE# 6,9 MEM_MA_RAS# 6,9 6,9 6,9 6,9 MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3 6,9 MEM_MA0_ODT0 6,9 MEM_MA0_ODT1 6,9 MEM_MA_CKE1 6,9 MEM_MA_CKE0 MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3 MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA_CKE1 MEM_MA_CKE0 RN2 8 8 MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_CKE1 MEM_MA0_CS#2 MEM_MA_ADD6 MEM_MA_ADD4 MEM_MA_ADD11 MEM_MA_ADD7 8P4R-47_RN0402 8P4R-47_RN0402 7 RN6 RN7 MEM_MA_RAS# MEM_MA_BANK1 MEM_MA_ADD0 MEM_MA_ADD1 RN8 MEM_MA0_ODT0 MEM_MA0_CS#1 MEM_MA0_CS#0 RN9 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 RN3 RN4 RN5 C93 0.1u_10V_0402 CPU_VDDIO_SUS C94 0.1u_10V_0402 C95 0.1u_10V_0402 CPU_VDDIO_SUS C96 0.1u_10V_0402 C97 0.1u_10V_0402 CPU_VDDIO_SUS C98 0.1u_10V_0402 C106 0.1u_10V_0402 CPU_VDDIO_SUS C107 0.1u_10V_0402 C108 0.1u_10V_0402 CPU_VDDIO_SUS C116 0.1u_10V_0402 C117 0.1u_10V_0402 CPU_VDDIO_SUS C118 0.1u_10V_0402 C119 0.1u_10V_0402 CPU_VDDIO_SUS C127 0.1u_10V_0402 C128 0.1u_10V_0402 CPU_VDDIO_SUS C129 0.1u_10V_0402 D C CPU_VTT_SUS MEM_MB_ADD[15 0] 6,9 MEM_MB_ADD[15 0] B MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 MEM_MB_CKE0 MEM_MB0_CS#2 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD3 MEM_MB_ADD5 MEM_MB_ADD1 MEM_MB_BANK0 MEM_MB_WE# MEM_MB0_CS#1 MEM_MB0_ODT1 MEM_MB_CAS# 7 7 8 8 MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 MEM_MB_ADD11 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MB_CKE1 MEM_MB_ADD0 MEM_MB_ADD2 MEM_MB_ADD6 MEM_MB_ADD4 7 RN15 RN16 8P4R-47_RN0402 8P4R-47_RN0402 MEM_MB0_CS#0 MEM_MB_RAS# MEM_MB_ADD10 MEM_MB_BANK1 MEM_MB0_CS#3 MEM_MB_ADD13 MEM_MB0_ODT0 RN17 RN18 MEM_MB_BANK[2 0] 6,9 MEM_MB_BANK[2 0] 6,9 MEM_MB_CAS# 6,9 MEM_MB_WE# 6,9 MEM_MB_RAS# A MEM_MA_CAS# MEM_MA_WE# MEM_MA_RAS# CPU_VTT_SUS 7 7 MEM_MA_BANK[2 0] 6,9 MEM_MA_BANK[2 0] C 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 MEM_MA_CKE0 MEM_MA_ADD12 MEM_MA_BANK2 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD3 MEM_MA_ADD5 MEM_MA_ADD2 MEM_MA_BANK0 MEM_MA_ADD10 MEM_MA_WE# MEM_MA_CAS# MEM_MA_ADD13 MEM_MA0_CS#3 MEM_MA0_ODT1 6,9 6,9 6,9 6,9 MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3 6,9 MEM_MB0_ODT0 6,9 MEM_MB0_ODT1 6,9 MEM_MB_CKE1 6,9 MEM_MB_CKE0 MEM_MB_CAS# MEM_MB_WE# MEM_MB_RAS# MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3 MEM_MB0_ODT0 MEM_MB0_ODT1 RN11 RN12 RN13 RN14 C144 0.1u_10V_0402 CPU_VDDIO_SUS C145 0.1u_10V_0402 C153 0.1u_10V_0402 CPU_VDDIO_SUS C154 0.1u_10V_0402 C155 0.1u_10V_0402 CPU_VDDIO_SUS C163 0.1u_10V_0402 C164 0.1u_10V_0402 CPU_VDDIO_SUS C165 0.1u_10V_0402 C173 0.1u_10V_0402 CPU_VDDIO_SUS C174 0.1u_10V_0402 C175 0.1u_10V_0402 CPU_VDDIO_SUS C176 0.1u_10V_0402 C181 0.1u_10V_0402 CPU_VDDIO_SUS C182 0.1u_10V_0402 C183 0.1u_10V_0402 CPU_VDDIO_SUS C184 0.1u_10V_0402 B A MICRO-STAR INT'L CO.,LTD Title DDR2 SODIMMS TERMINATIONS MEM_MB_CKE1 MEM_MB_CKE0 Size Document Number Custom Date: Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 10 of 45 +3VRUN A +5VRUN R80 4.7K_0402 D1 G Q5 DAC_SDAT CRT5V S-RB551V-30_SOD323 C 13 D N-2N7002_SOT23 S C284 +3VRUN ME Change to Black on MVT R81 4.7K_0402 16 P1 R83 HARRY 10/17 13 S DAC_SCL +5VRUN 13 13 13 Q6 Errata ER_RS690A4 G 4.7K_0402 D R G B L14 L15 L16 60L500m 60L500m 60L500m R84 100_0402 DDC2BD R85 100_0402 DDC2BC R86 R87 33_0402 33_0402 HSYN VSYN 10 LRED LGREEN LBLUE N-2N7002_SOT23 D-SUB_I2C_A11\A12 D2 +CRT5V A R_HSYN R_VSYN C 0.1u_10V_0402 D 18 R82 4.7K_0402 D 11 12 DDC2BD 13 HSYN 14 VSYN 15 DDC2BC R90 C293 C294 C289 C290 C291 C292 C295 22p_50v_0402 22p_50v_0402 150_0402 1% 150_0402 1% NC7SZ125M5X_NL_SOT23-5-LF C288 19 R89 R88 HSYNC# 13 HSYNC# C287 17 0.1u_10V_0402 C286 U8 C285 S-RB551V-30_SOD323 D01-RB551V0-R06 CONN-VGA15PF_BLACK-RH N59-15F0451-A10 SILM_DSUB_15PF_T 22p_50v_0402 22p_50v_0402 22p_50v_0402 22p_50v_0402 22p_50v_0402 22p_50v_0402 150_0402 1% 22p_50v_0402 22p_50v_0402 +CRT5V C 31 EC_BLON 13 LVDS_BLON LIDJNC29 0.1u_10V_0402 BL-ON 0R_0402 (DNI) U10 NC7SZ08M5X U40 R630 LCD CABLE Q8 Q10 C298 G S G R538 S I2C_CLK N-2N7002_SOT23 ====> GND ==========> R612 N-2N7002_SOT23 0R_0402 (DNI) D-SUB_I2C_A11\A12 HARRY 10/17 Errata ER_RS690A4 N-2N7002_SOT23 ==========> ==========> 17 ====> NC ==========> ==========> 20 ==========> ==========> 10 ====> GND 18 L17 80L3_100_0805 +3VRUN +5VRUN R540 G A 13 +5VRUN 0.1u_50V_0603 R542 OE A GND VCC 1M_0402 R641 Y BR-AD-ADJ R640 C303 C304 0.1u_10V_0402 0.1u_10V_0402 TMDS_HPD BOX/HEADER/1*6 N32-1060170-H06 53398_06 1K_0402 ==========> 13 ====> GND 13 HDMI_DATA0P HDMI_DATA1N 14 ==========> 11 15 ==========> 12 16 ====> GND 17 ==========> 14 18 ==========> 15 19 ====> GND 20 ====> GND HDMI_CLKP EL4 CMC_180ohm (DNI) CMC_180ohm (DNI) HDMI_DATA0N HDMI_CLKN A MICRO-STAR INT'L CO.,LTD Title LVDS,CRT,HDMI,INVERTER,LID Size Document Number Custom 510_0402 Rev 1.0 MS-12221 NC7SZ126 Date: CMC_180ohm (DNI) HDMI_DATA2N EL3 CN1 31 Errata PA_IGPGENF5 Harry 2007/01/18 ==========> 12 HDMI_DATA1P EL2 CMC_180ohm (DNI) 0.1u_50V_0603 (DNI) BL-ON U41 11 HDMI_DATA2P EL1 For EMI DDC_DATA_HDMI D N-2N7002_SOT23 TMDS_HPD_HDMI C302 change PN by Power on 11/08 S DDC_DATA 4.7K_0402 Q45 C301 10u_1210 C300 B LVC-D20SFYG3TP N5Q-20F0040-H21 LVC_D20SFYG PWR_SRC DDC_CLK_HDMI D 13 N-2N7002_SOT23 4.7K_0402 REMOVE IF NB IS A12 Q44 G 13 S S 13 LVDS_DIGON 13 I2C_DATA +3VRUN Q9 1n_50V_0402 G D +5VRUN +3VRUN I2C_CLK 21 CONN-STAR TAKE19_black-RH LVDS_TXLCKN 13 LVDS_TXLCKP 13 100K_0402 JLCD1 13 13 0.1u_10V_0402 R93 47_0805 R94 LVDS_TXL2N LVDS_TXL2P LVDS_TXLCKN LVDS_TXLCKP 23 22 C297 0.01u_16V_0402 11 12 13 14 15 16 17 18 19 20 22 24 26 C914 13 LVDS_TXL1N 13 LVDS_TXL1P C296 22u_1206 1.5A_MSMD_POLY_SW C913 10u_10V_0805 R92 100K_0402 13 LVDS_TXL0N 13 LVDS_TXL0P +V3.3S_LVDS_PANEL 11 12 13 14 15 16 17 18 19 20 22 24 26 +5VRUN_HDMI TMDS_HPD_HDMI +3VRUN 1 10 21 23 25 F3 N-Si3456DV_TSOP6 D B +V3.3S_LVDS_PANEL DDC_CLK_HDMI DDC_DATA_HDMI +3VRUN 10 21 23 25 +5VRUN JLCD1 +V3.3S_LVDS_PANEL Q7 C912 0.1u_10V_0402 10K_0402 300_0402 12 HDMI_CLKN R91 I36-0913109-A30 Add for LCD Garbage by Harry 11/13 If BIOS can cover the bug,remove it! PWR_SRC R536 C911 0.1u_10V_0402 +3VRUN 12 HDMI_DATA0N 12 HDMI_CLKP 300_0402 1n_0402 R535 C910 0.1u_10V_0402 31 12 HDMI_DATA1N 12 HDMI_DATA0P 300_0402 10 11 12 13 14 15 16 17 18 19 C909 0.1u_10V_0402 LID- C908 APX9131AI-TRL_SOT23-3-RH 20 D R534 300_0402 SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND G23 +5V G22 HP DET SHELL2 R533 12 HDMI_DATA2N 12 HDMI_DATA1P LID- 1M_0402 CON2004 12 HDMI_DATA2P 10K_0402 3 NC7SZ125M5X_NL_SOT23-5-LF R95 C907 VDD GND VOUT VSYNC# VSYNC# 13 +3VSUS U9 +3VSUS C Sheet Thursday, February 01, 2007 32 of 45 +3VSUS +3VSUS +3VSUS U36C C625 31 S5_ON 36 VDD_PG +3VSUS C626 39 1.2VSUS_PWRGD +3VSUS D SUSPWROK SUSPWROK 18,31 0.1u_10V_0402 U38A NC7WZ14-SC70 (DNI) C627 U37B NC7WZ14-SC70 (DNI) 14 U37A VHC32MTC_NL_TSSOP14-LF U36A 0.1u_10V_0402 14 100K_0402 D 0.1u_10V_0402 (DNI) R553 VTT_VDDIO_EN 38 10 1 38 VTT_VDDIO_PG NB_PWRGD C931 VDDA_EN 3 VDDA_EN 35 VDD_EN 36 VHC32MTC_NL_TSSOP14-LF A LCX08MTC_NL_TSSOP14-LF D22 0.68u_10V_0603 JNC32 0R_0402 (DNI) U36B AND_PG U38D BAS40WS (DNI) C 35 U38C VDDA_PG VDDA_PG 12 11 13 VHC32MTC_NL_TSSOP14-LF 10 38 VTT_VDDIO_PG LCX08MTC_NL_TSSOP14-LF T_CRIT_CPU# LCX08MTC_NL_TSSOP14-LF 35 VLDT_PG 36 VDD_PG U38B C RUN_ON 31,37 RUN_ON VLDT_EN 35 C LCX08MTC_NL_TSSOP14-LF U36D 12 11 13 VHC32MTC_NL_TSSOP14-LF +3VSUS +3VRUN +3VSUS R418 R417 4.7K_0402 100K_0402 U32 B B U33 VLDT_PG A B GND SB_PWRGD 18 0.68u_10V_0603 SN74AHC1G08 Q24 G N-2N7002_SOT23 VCC Y S RUN_ON B GND NB_PWRGD NB_PWRGD 13 NB PG to SB PG ==>54 ms D 39 NB_VCC_PG C628 D S N-2N7002_SOT23 REMOVE R419,C629 Y Q23 G VCC RUN_ON D +3VSUS A SN74AHC1G08 RUN_ON Q25 G S N-2N7002_SOT23 A A MICRO-STAR INT'L CO.,LTD Title PWRGD Size B Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 33 of 45 D D PWR_SRC +5VRUN +3VRUN 31 FAN_PWM0 Q26 + C630 0.1u_10V_0402 (DNI) C R422 10K_0402 N-Si3456DV_TSOP6 U48 C LM321 EC Change to D/A FAN_TACH0 VCCFAN1 C632 47p_50V_0402 31 FAN1 J13 R423 VCCFAN1 100K_0402 R424 C633 10u_6V_0603 100K_0402 B C634 0.1u_10V_0402 C925 0.1u_10V_0402 BH1X3#_white-1.25pitch N32-1030130-H06 53398_03 B Thermal Team change Location,Footprint and PN 11/06 change to 1058 PN FOR EMI MICRO-STAR INT'L CO.,LTD A Title FAN Size A Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 34 of 45 A 15,26,37,39 RUND +1.2VRUN PQ3 +5VSUS C 1M_0402 PC22 PU3 10u_6V_0603 D2 D1 PR16 100K_0402 C +VLDT AO4468 PR15 Change Mos by HW 11/01 S1 G1 S2 G2 2N7002DW 33 cost down VLDT_EN PR18 100K_0402 +3VRUN +VLDT +3VSUS PR17 100K_0402 PR20 PR22 VLDT_PG VLDT_PG 33 100K_0402 B D B 1K_0402 C N-2N7002_SOT23 E S PQ5 B PQ4 G MMBT3904 whether can connect with run power +3VSUS 1u_6.3V_0402 PC19 +VDDA 33 VDDA_EN VDDA_EN +VDDA VDDA 2.5V PC21 IN BP PC20 SHDN OUT GND PU2 RT9167/A A 10u_6V_0603 PD2 C A S-RB751V-40 0.01u_16V_0402 VDDA_PG VDDA_PG 33 PR19 1K_0402 A PR21 100K_0402 PC23 2.2u_6V_0603 MICRO-STAR INT'L CO.,LTD Title M_1.2V VDDA 2.5V VLDT Size B Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 35 of 45 +5VRUN CPU_VDD_RUN=387.5mV TO 1.55V @ 29A MAX, 37W MAX CPU_VDDIO_SUS PR23 10R_0603 VCC PC29 PC30 2.2u_0603 SRC_VCORE 18 16 CSN1 15 VCORE_GND SKIP# OFS PU4 CCI PC48 470p_0402 MAX8774GTL+ PR40 10K_0402 1% 60.4K0402 1% G PR44 PR41 CCV 10 REF DH2 21 LX2 22 DL2 24 PGND2 23 CSP2 13 CSN2 14 PC50 0.22u_0603 THRM PR47 10K_0402 POUT 1n_50V_0402 (DNI) PC47 Change R by Power FB PQ11 FDS6676AS EC238 1n_50V_0402 (DNI) FB_H PR48 11 1.87K0402 1% 12 GNDA 41 IC 40 B PC55 4700p_0402 1 0.33u_0603 C 11/01 ER2 CPU_FB_H PR49 100_0402 CPU_FB_L PR50 100_0402 PC56 4700p_0402 PR42 2.67KR1%_0402 PR46 10_0402 PR45 1.54K_0402 PC53 GNDS 330u_2SP (DNI) PC46 1u_0603 + PR182 1K_0402 1% PL5 0.56UH/25A PC54 0.1u_0603 VCORE_GND PC43 PC44 PC45 330u_2SP 330u_2SP 330u_2SP + + + + PQ10 FDS6676AS TIME 10K_0402 PR35 1.54K_0402 0_0603 71.5k_0402 PQ49 AO4468 VCORE_GND VCC REF PC52 0.1u_0402 Change PSI circuit by Power BST2 PR181 PC51 470p_0402 20 11/01 PC42 PR31 2.67KR1%_0402 PR38 1.87K0402 1% PQ9 AO4468 Power 02/06 BSS138N_SOT23 1 Change H/L side by Power ER1 39 D C CPU_PSI# S SHDN# EC237 PR39 TWO-PH 38 VDD_EN 33 37 PQ8 FDS6676AS PC188 CPU_VDD_RUN 330u_2SP GND CSP1 PQ7 FDS6676AS Assm level N/A PL4 0.56UH/25A 27 80L6_30_0805 PGND1 D0 D1 D2 D3 D4 D5 31 32 33 34 35 36 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 PWR_SRC 7 7 7 PC191 C15U25POS + 26 PC190 C15U25POS + DL1 PC189 C15U25POS + 28 PQ48 AO4468 29 LX1 0_0603 PQ6 AO4468 DH1 VRHOT# 200K0402 30 PL3 BST1 PC31 0.22u_0603 2.2R_0603 (DNI) PWRGD PR180 PR27 2.2R_0603 (DNI) VDD_PG TON PHASEGD D 11/01 PC35 0.1u_0603 17 Change C by Power PC33 2200p_0402 VCORE_GND DNI BY HARRY 10/02 33 2.2u_0603 PR26 100K_0402 25 PR25 100K_0402 VDD PR24 100K_0402 19 D 10K_0402 (DNI) CPU_VID0 CPU_VID1 10K_0402 (DNI) CPU_VID2 10K_0402 (DNI) CPU_VID3 10K_0402 (DNI) CPU_VID4 10K_0402 (DNI) 10K_0402 (DNI) CPU_VID5 VCC PR28 PR29 PR30 PR32 PR33 PR34 PR183 1K_0402 1% 0.33u_0603 CPU_VDD_RUN_FB_H CPU_VDD_RUN_FB_L 7 PR51 10_0402 B VCORE_GND J15 COPPER VCORE_GND VCORE_GND JNC38 0R_0402 (DNI) JNC39 0R_0402 (DNI) EMI 11/13 A A MICRO-STAR INT'L CO.,LTD Title VCORE Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Thursday, February 01, 2007 36 of 45 PWR_SRC +5VALW PR52 4.7R0603 PL6 80L6_30_0805 Place these CAPs close to FETs PD3 RB717F_SOT323 PC57 VIN 2.2u_0805 PC58 1u_0603 0.1u_0603 1 PC192 C15U25POS PC63 + PWR_SRC_SYS PC65 0.1u_0603 PC59 1u_0805 PWR_SRC_SYS D D PC64 2200p_0402 PC60 2200p_0402 change PN by Power on 01/25 VREF2 change PN by Power on 11/08 VO2 COMP2 VFB2 GND VREF2 VFB1 COMP1 VO1 PU5 TPS51120RHBR PQ12 Current limit at 4A for +3.3V PL7 CH-10U4.4A_S EN5 EN3 PGOOD2 EN2 VBST2 DRVH2 LL2 DRVL2 33 GNDA PC67 0.1u_0603 PR53 4.7R0603 LL2 SKIPSEL TONSEL PGOOD1 EN1 VBST1 DRVH1 LL1 DRVL1 SKIPSEL TONSEL 32 31 30 29 28 27 26 25 Current limit at 7A for +5VSUS PQ13 PR54 4.7R0603 PC68 0.1u_0603 LL1 +5VSUS PL8 CH-10U4.4A_S PC73 0.1u_0402 C220U6.3POS-1 N-SP8K10S_SO8 N-SP8K10S_SO8 change PN&Footprint by Power on 11/08 PC71 PC72 0.1u_0402 1u_0603 + PC69 C220U6.3POS-1 C JNC33 0R_0402 (DNI) JNC34 PR57 14.3K0402 PQ14 AO4468 0R_0402 (DNI) PR58 14.3K0402 RUND 4 PC74 1u_0603 PR192 4.7_0402 Change Mos by Power 11/01 PC77 10u_0805 PC78 +3VSUS RUND +3VALW PQ15 AO4468 + 17 18 19 20 21 22 23 24 PC70 C PGND2 CS2 VREG3 V5FILT VREG5 VIN CS1 PGND1 +3VSUS 10 11 12 13 14 15 16 +5VRUN 10u_0805 VIN PR64 100K_0402 Change Mos by Power 11/01 VREF2 +3VRUN PR65 2K_0402 max voltage 5.5 31 J17 X SUS_ON B PC183 1n_0402 PR67 PR70 240K_0402 PC79 0.1u_0402 B 0R_0402 (DNI) TONSEL SKIPSEL JNC35 0R_0402 (DNI) PWR_SRC +1.2VSUS +5VRUN PR74 100K_0402 RUND D S N-2N7002_SOT23 100K_0402 S G PR82 G N-2N7002_SOT23 G G N-2N7002_SOT23 RUND 15,26,35,39 PQ19 D D 100K_0402 N-2N7002_SOT23 G RUN_ON PQ18 PR81 G S D PR84 G 31,33 PQ17 D PQ22 D PQ21 S SUS_ON PQ20 S 31 PR73 100K_0603 PR80 120R_0805 (DNI) PQ16 A PWR_SRC PR76 120R_0805 D PR79 120R_0805 PR75 120R_0805 S PR78 100K_0402 +3VRUN +3VSUS S PWR_SRC N-2N7002_SOT23 A PC80 0.1u_25V_0603 N-2N7002_SOT23 470K_0603 (DNI) N-2N7002_SOT23 (DNI) MICRO-STAR INT'L CO.,LTD Title SYSTEM POWER 3/5V 2.5VSUS Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Thursday, February 01, 2007 37 of 45 +5VSUS PR85 10R_0603 D D VCCA_VDDQ PC82 PC83 1u_0603 4.7u_0805 PU6 25 GND 17 PGND2 VSSA PR89 10_0402 TON PR87 BST 24 DH 23 DH_VDDQ LX 22 LX_VDDQ ILIM 21 0.1u_0603 PC102 0.1u_0402 10u_0805 10u_0805 PR91 VTT VTT PR93 100K_0402 33 VTT_VDDIO_PG +5VSUS DL 19 PGND2 16 VDDQS +3VSUS DL_VDDQ PC104 PGOOD 11 VTTEN FB PR94 PR99 10_0402 PC105 Vout=1.5(1+(R5/R9)) R5=10K, R9=49.9K Vout=1.8V 22p_0402 B FB=1.5V Control H = 1.9V L = 1.8V D N-2N7002_SOT23 D PR101 13.3K_0402 G PR102 10K_0402 CPU_VDDIO_SUS_ADJ 18 S Q27 S D PC98 220U2.5SP TP87 PQ26 N-2N7002_SOT23 Q28 G + Current limit at 6A for +1.8VSUS Change Mos by Power 11/01 PR96 10K_0402 1% FB_VDDQ VTTEN PR100 G + PC99 0.1u_0402 1u_0603 PR98 36.5K_0402 1K_0402 4.7K_0402 PC97 220U2.5SP SC486IMLTRT_MLPQ24 PR97 100K_0402 33 VTT_VDDIO_EN PQ25 FDS6676AS Power 02/06 C change PN by Power on 01/25 PC101 PL10 CH-1.5U10A VDDQ 5.9K_0402 80L6_30_0805 0.1u_0603 CPU_VDDIO_SUS VTTS PR179 10_0402 15 14 PC100 PC89 1n_0402 0.1u_0603 VTERM +5VSUS PQ24 AO4468 Remove PR88 10/02 Harry COMP PC193 C15U25POS + PC90 PC93 10 PC96 1u_0603 B 1n_0402 0.1u_0603 PC95 CPU_VTT_SUS PWR_SRC_VDDQ 750K_0402 PC88 PC94 TP86 PWR_SRC VTTEN PL9 REF PR90 10_0402 C EN/PSV PD4 S-RB751V-40 18 REF_VDDQ TP85 PGND1 1u_0603 VDDP2 10u_0805 VDDP2 12 10u_0805 Current limit at 3.8A for SMDDR_VTERM 13 PC87 20 PC84 1u_0603 PC86 VDDP1 C PC85 VCCA A CPU_VDDIO_SUS S N-2N7002_SOT23 PC106 PR103 0.1u_0402 100K_0402 A A MICRO-STAR INT'L CO.,LTD Title DDR2 1.8V VTT 0.9V Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Thursday, February 01, 2007 38 of 45 +5VSUS PR104 10R_0603 PWR_SRC 813_VDDA PWR_SRC_VTT PWR_SRC_VTT PL11 80L6_30_0805 PD5 RB717F_SOT323 PC108 PC107 PC109 0.1u_0603 1u_0603 PC116 2200p_0402 813_DL1 813_DL2 PC115 0.1u_0603 GNDA 17 16 15 18 21 1.2VSUS_PWRGD CS2P 22 CS2N 23 Change R by power 11/01 VSET2 24 813_VREF ON/SKIP2 PC127 + PR108 51R_0402 PR107 100K_0402 PC126 + 160KR1%_0402 813_CS2P 813_CS2N 813_VDDA PC129 Change R by power 11/01 J18 X PR113 2.2K_0402 PC131 1n_0402 PR114 60.4K0402 1% PC137 +5VRUN C Harry 10/02 +1.2VRUN PC132 1n_0402 1u_0603 +5VRUN PQ30 FDS6676AS 3300P_0402 813_VSET2 PWR_SRC_VTT PR129 10R_0603 1_5_VCC 0.1u_0402 PR110 Change Mos by Power 11/01 PC130 PR111 95.3K0402 1% PC123 1.2V_RUND VDDA VREF TSET 813_CS1P 813_CS1N PC128 4700p_0402 813_VREF C PR109 365K_0402 4700p_0402 22p_0402 51R_0402 PQ47 FDS6676AS PC121 220U2.5SP +1_2V_P VSET1 PGD2 PC120 220U2.5SP 25 PC125 VIN N-SP8K10S_SO8 OZ813LP_QFN24 PL16 CH-1.5U10A CS1N 0.1u_0603 813_LX2 20 CS1P PC124 ON/SKIP1 PR106 100K_0402 PR105 + PC122 0.1u_0402 +1.2VSUS Current Limit at 10 Amp PGD1 19 LX2 10 HDR2 22p_0402 LX1 4700p_0402 HDR1 11 Power 02/06 PC118 12 813_LX1 PQ46 AO4468 813_DH1 BST2 LDR2 GNDP 813_DH2 PL12 2.5U7.5A_S PC117 0.1u_0603 PC119 220U2.5SP +VTT_P PU7 VDDP +1.8VRUN BST1 13 PQ27 The Limited Current = 4A 14 change PN by Power on 01/25 LDR1 change PN by Power on 01/25 D PC194 C15U25POS + PC195 C15U25POS + PC110 2200p_0402 1u_0603 D +5VSUS 1.2VSUS_PWRGD PR116 127KR1%0402 Change Mos by HW 11/01 1.2VSUS_PWRGD 33 Harry 10/02 PR117 1K_0402 Harry 10/02 813_VSET2 1_5_VCC VIN VOUT VOUT PR193 1K_0402 PC138 PR194 100K_0402 4.7u_6V_0603 PR121 100K_0402 PR191 1M_0603 B +5VSUS 100u_6.3V_1210 +1.8VRUN 2 GND REMOVE PQ43,PC186 +1_5VRUN 1.2V_RUND PR131 18K0402 1% 1 PU8 APL5912 15,26,35,37 RUND PC139 PR130 15.8K_0402 B FB PC133 1n_0402 0.1u_0603 POK EN PR118 1K_0402 PR119 20K_0402 PC134 PR125 100K_0402 PC140 0.01u_0402 PR128 +3VRUN 1K_0603 +1.2VRUN +3VSUS Q29 G PC136 N-2N7002_SOT23 PQ32 B PR187 100K_0402 2.2u_0805 (DNI) E SMBT3904 PR189 1K_0603 Harry 10/02 PR188 100K_0402 NB_VCC_PG Harry 10/02 33 D PR190 D VIN S VCNTL +1.8VRUN C 4.7u_0805 N-2N7002_SOT23 S PQ45 B PQ44 G C 1K_0603 PC187 3.3V>1.8V>1.2V=VCC_NB 2.2u_0805 E SMBT3904 A A MICRO-STAR INT'L CO.,LTD Title VCC_NB 1.2VSUS 1.5VRUN 1.8VRUN Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Thursday, February 01, 2007 39 of 45 +3VALW D EC10 D 0.1u_0603 (DNI) PR132 100K_0402 DCJACK_5 PWR-JACK3P_black-5.2mm PJ1 EC11 PQ33 P-AO4413_SOIC8 2200p_0402 (DNI) DC_IN+ +DC_IN 2200p_0402 (DNI) 0.1u_0603 (DNI) PC145 PC148 PR137 240K_0402 0.47u_0805 PC146 0.01u_0603 10u_1210 31 BATCLK_M 31 BATDATA_M 31 CON3 100_0402 PR136 100_0402 PR138 change PN by Power on 11/08 PC149 0.1u_0402 47K0402 PD7 PD6 +VBATA PC151 10p_50V_0402 PC152 PC150 10p_50V_0402 10 69 C 1: 2: 3: 4: 5: 6: Z-UDZS5.6B_SOD323 P-DTA114EKA_SOT23 D 31 PQ51 G AC_CTL PWR-6P_black-2pitch-RH N93-06M0141-A10 PQ50 B 10 0.1u_0603 A A Z-UDZS5.6B_SOD323 E C M_BATIN# C EC13 EC12 PR135 C 120L6_15_4532 PFL1 BSMCLK SMDATA BT Thermal VBATA VBATA C S N-2N7002_SOT23 PR195 100K_0402 PQ39A P-AO4805_SO8 +3VALW Add AC_CONTROL by EC SDC_IN+ PR140 100K_0402 AC_OK 10K_0402 PR143 100K_0402 D1 D2 PR142 PQ37 18,31,41 AC_OK# PWR_SRC G2 S2 G1 S1 N-2N7002DW B B PQ36A P-AO4805_SO8 PR144 10K_0402 PQ39B P-AO4805_SO8 PC153 0.1u_0603 PR145 PD8 A P-AO4805_SO8 100K_0402 PWR_SRC D PR146 10K_0402 Q31 G ENCHG PQ36B +VBATA CHG_BATT_N 31,41 C ES3BB_DO214AA V_CHG PR147 470K0402 S N-2N7002_SOT23 A A MICRO-STAR INT'L CO.,LTD Title Battery Select Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Thursday, February 01, 2007 40 of 45 Adapter= 90 W SDC_IN+ Adapter input voltage set 17.4 Voltage change PN by Power on 11/08 PR148 DC_IN+ PC154 PC155 PC156 PR149 0.1u_0603 10u_1210 D 2200p_0402 0.02R1% 53.6_0603 1% PR150 D MAX1772_ACIN A 7.15K_0402 1% PD9 S-RB751V-40 For EMI C PR151 4.7_0402 PC157 1u_0805 PR152 4.7_0402 MAX1772_LDO PC158 PC159 0.47u_0805 1u_0603 PC160 0.47u_0805 SDC_IN+ MAX1772_REF PL14 D2 PD10 C A PQ40 PR161 49.9K_0402 15K_0402 1% 18,31,40 AC_OK# 11 AC_OK# 12 ACOK MAX1772_ICHG 10 ICHG MAX1772_IINP PC172 0.1u_0603 PR166 12K_0402 PC173 0.1u_0603 28 CCV MAX1772_CCI CCI CCS PU9 24 LX 23 V_CHG PL15 15UH_104R C DLO 21 PGND 20 PR162 0.05R1% PC168 PC167 0.1u_0603 10u_1210 N-SP8K10S_SO8 CSIP CSIN IINP MAX1772_CCV PR167 12K_0402 DHI ACIN CLS MAX1772_ACIN PR163 10K_0402 PC166 PR160 100K_0402 +5VALW 80L6_30_0805 change PN by Power on 01/25 S-RB751V-40 REFIN VCTL ICTL REF PR158 20.5K0402 1% PC163 0.1u_0603 DLOV 22 0.1u_0603 PR159 PC162 2200p_0402 0.1u_0603 CELLS LDO BST PC196 C15U25POS + PR153 16 25 D1 N-2N7002DW C 13 15 14 DCIN 31 ENCHG_1P MAX1772_REFIN MAX1772_VCTL MAX1772_ICTL PR157 1.54K_0402 G2 S2 G1 S1 31 PRE_CHG PR156 24.3K_0402 1% PR155 47.5K_0402 1% CSSN PR154 34K_0402 1% CSSP 4S1P: Charge current set 1.5 Amp 4S2P: Charge current set 3.0 Amp Pre-charger: Charge current set PQ41 200mA 26 27 33_0402 19 18 BATT 17 GND GND CSIP CSIN PR164 PR165 PC174 0.1u_0603 MAX1772EEI PC169 PC170 10u_1210 10u_1210 change PN by Power on 11/08 1_0603 1% 1_0603 1% PC175 0.1u_0603 MAX1772_REF PR168 10K_0402 PC176 0.01u_0603 PC177 0.01u_0603 PC179 1n_0402 PC178 1u_0603 JT1 X PR169 42.2K_0402 1% B B Change R by Power 11/01 PR170 20K_0402 SET Iin MAX = 4.2A +5VALW PR171 10K_0402 ENCHG-1P PRE_CHG ENCHG D2 D1 MAX1772_ICTL 1 Pre-charge 1 4S1P-Fast charge X X STOP CHARGE PQ42 ENCHG S1 G1 S2 G2 N-2N7002DW 31,40 Define on 4S2P charge current A A MICRO-STAR INT'L CO.,LTD Title M_Battery Charger Size C Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 41 of 45 H8 X_holes_p_r276d118 H5 X_holes_p_r276d118 H15 X_holes_p_r276d118 1 H20 X_holes_p_r276d118 H3 X_holes_p_r276d118 H1 X_holes_p_r276d118 H7 X_holes_p_r276d118 MYLAR1 MYLAR2 MYLAR3 D H28 X_holes_p_r276d118 H26 X_holes_p_r276d118 1 D H19 X_RECT276X228D118_24 mylar PCIE E2Y-2210211-G40 MYLAR hdd E2Y-2210311-G40 mylar fan E2Y-2210411-G40 MYLAR4 MYLAR5 MYLAR6 mylar mb top E2P-2211611-G40 mylar mb top E2P-2211711-G40 mylar mb bot E2P-2211511-G40 ME Change Harry 2007/01/18 1 H6 X_holes236d118_PM H2 X_holes_p_r276d118 H18 X_holes_p_r276d118 H22 X_HOLES_R177D91 H21 X_holes_p_r276d118 H4 X_holes_p_r276d118 1 1 CPU HEATSINK C C Footprint wrong need to change H30 HOLES_R236d91_PT E2B-1221010-L63 ME Change Harry 2007/01/18 1 H9 _E2B-1003010 E2B-1022020-A89 H24 _E2B-1003010 E2B-1022020-A89 SC3 SC4 M2X4 E43-1203003-H29 M2X4 E43-1203003-H29 SH1 NEW CARD SHIELDING E2M-2210111-SH4 H29 X_HOLES_R177D91 H25 X_HOLES_R177D91 H23 X_HOLES_R177D91 NB Stand off H32 X_NPTH_80 H33 X_NPTH_80 New Card Screw x2 MDC Stand off Modify by ME on 11/13 H31 X_HOLES_R177D91 H27 STANDOFF B 1 1 B Modify by ME 10/24 HT1 HT2 New Card Modify by ME 10/24 FM1 FM2 FM3 FM4 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 FM5 FM6 FM7 FM8 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 FM9 FM10 FM11 FM12 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 FM13 FM14 FM15 FM16 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 FM17 FM18 FM19 FM20 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 HOLE157 (DNI) HOLE157 (DNI) PCB1 BAT1 1 MDC1 HT3 Harry 2007/01/18 HT4 HOLE157 (DNI) PCB P30-1222110-D05 HOLE157 (DNI) FM30 FM31 FM32 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 FM33 FM34 FM35 FM36 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 A FM29 MODEM S52-2801150-Q09 RTC_BAT D06-0100300-H04 A FM37 X_PANEL_PAD FM38 FM39 FM40 FM41 FM21 FM22 FM23 FM24 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 FM43 FM44 FM25 FM26 FM27 FM28 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 FM42 MICRO-STAR INT'L CO.,LTD X_PANEL_PAD Title ME Parts Size Document Number Custom Rev 1.0 MS-12221 Date: Sheet Friday, February 02, 2007 42 of 45 J20 J21 L3_4mil_60 L4_4mil_60 X_PIN1*2 Normal Signal 60 Ohm X_PIN1*2 D D J24 J25 L3_6mil_50 Ohm L4_6mil_50 Ohm RGB Signal 50 Ohm X_PIN1*2 X_PIN1*2 J28 J29 L3_DIFF_5/7/5_100 Ohm+ L4_DIFF_5/7/5_100 Ohm+ Differential Pair 100 Ohm C X_PIN1*2 C X_PIN1*2 J44 J45 L3_DIFF_5/7/5_100 Ohm- L4_DIFF_5/7/5_100 Ohm- X_PIN1*2 X_PIN1*2 J32 J33 L3_DIFF_5/6/5_93 Ohm+ L4_DIFF_5/6/5_93 Ohm+ Differential Pair 93 Ohm X_PIN1*2 X_PIN1*2 J48 J49 L3_DIFF_5/6/5_93 Ohm- B L4_DIFF_5/6/5_93 Ohm- X_PIN1*2 B X_PIN1*2 J36 J37 L3_DIFF_5/5/5_90 Ohm+ L4_DIFF_5/5/5_90 Ohm+ Differential Pair 90 Ohm X_PIN1*2 X_PIN1*2 J52 J53 L3_DIFF_5/5/5_90 Ohm- L4_DIFF_5/5/5_90 Ohm- X_PIN1*2 X_PIN1*2 J40 J41 L4_DIFF_8/5/8_72 Ohm+ L3_DIFF_8/5/8_72 Ohm+ Differential Pair 72 Ohm X_PIN1*2 A X_PIN1*2 J56 A J57 L3_DIFF_8/5/8_72 Ohm- MICRO-STAR INT'L CO.,LTD L4_DIFF_8/5/8_72 OhmTitle IMPEDANCE X_PIN1*2 X_PIN1*2 Size B Date: Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 43 of 45 CPU_VDDIO_SUS EC186 EC183 EC185 EC188 EC181 EC191 EC187 EC182 EC192 EC190 EC184 EC193 EC203 D VDDA12 x +VLDT CPU_VDDIO_SUS 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 x 12 +1.2VRUN x 11 EC215 EC216 EC217 EC218 EC219 EC220 EC221 EC222 EC73 EC77 EC250 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 +3VRUN x 28 EC71 EC75 EC79 EC83 EC87 EC92 EC96 EC100 EC104 EC109 EC113 EC116 EC117 EC223 EC224 EC225 EC226 EC227 EC228 EC229 EC230 EC120 EC123 EC126 EC130 EC134 EC137 EC139 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 EC234 EC89 0.1u_25V_0402 EC14 EC19 EC24 EC29 EC34 EC241 EC242 EC243 EC244 EC245 EC246 EC247 EC248 EC249 EC313 EC314 EC315 0.1u_10V_0402 AGND_DSP 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 PWR_SRC EC18 EC23 EC28 EC33 EC38 EC43 EC48 EC52 EC69 EC72 EC76 EC80 EC84 EC276 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 VDD33 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 (DNI) 0.1u_10V_0402 (DNI) 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 P6 EC144 EC148 EC151 EC154 C +3VRUN 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 EC17 EC22 EC307 EC308 EC310 EC312 P7 1 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 P3 P8 P9 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 B x AGND 1 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 P4 P10 P11 +3VALW 1 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 P5 P12 P13 1 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 P14 ME_PAD (DNI) ate_c006_106 P15 1 ME_PAD (DNI) ate_c006_106 ME_PAD (DNI) ate_c006_106 x EC271 EC272 EC273 EC274 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 A MICRO-STAR INT'L CO.,LTD Title EMI Size B Date: x +5VRUN +3VSUS EC252 EC253 EC254 P2 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 +3VSUS x +5VRUN EC294 EC295 EC296 EC297 EC298 EC299 EC300 EC167 EC170 EC172 EC174 EC283 EC284 x 14 +5VRUN PWR_SRC ==> OVER 19V +5VRUN x 19 EC231 EC232 EC233 EC255 EC256 EC257 EC258 EC259 EC260 EC261 EC262 EC263 EC264 EC265 EC266 EC267 EC268 EC269 EC270 0.1u_10V_0402 SRC_VCORE EC251 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 +5VSUS 0.1u_10V_0402 D 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 (DNI) 0.1u_25V_0402 (DNI) 0.1u_25V_0402 0.1u_25V_0402 (DNI) 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 (DNI) 0.1u_25V_0402 (DNI) 0.1u_25V_0402 VDDA12 EC240 +1.8VRUN x near RS690T and OZ813LP_QFN24 EC121 0.1u_10V_0402 EC124 0.1u_10V_0402 EC127 0.1u_10V_0402 EC131 0.1u_10V_0402 EC204 0.1u_10V_0402 AGND_DSP 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 0.1u_25V_0402 +3VSUS EC235 CPU_VDD_RUN x 14 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 EC290 EC291 EC292 EC293 0.1u_10V_0402 +1.2VRUN EC281 EC309 EC311 EC128 EC132 EC135 EC138 EC140 EC143 EC147 EC150 EC153 EC155 EC157 EC159 PWR_SRC PWR_SRC ==> OVER 19V 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 EC285 EC286 EC287 EC288 PWR_SRC ==> OVER 19V +1.2VSUS +3VRUN EC16 EC21 EC26 EC31 EC36 EC41 EC46 EC51 EC55 EC58 EC61 EC64 EC66 EC68 EC275 EC277 EC278 EC279 EC280 AGND DC_IN+ +1.2VSUS 0.1u_10V_0402 0.1u_10V_0402 +3VSUS B A +3VRUN EC177 EC180 CPU_VTT_SUS 0.1u_10V_0402 0.1u_10V_0402 0.1u_10V_0402 PWR_SRC +1.2VRUN x EC82 EC86 EC91 memorry slot under to motherboard EC15 EC20 EC25 EC30 EC35 EC40 EC45 EC50 EC54 EC57 EC60 EC63 EC65 EC67 EC70 EC74 EC78 EC81 EC85 EC90 EC95 EC99 EC103 EC107 EC111 EC115 near RS690T EC108 EC112 EC194 EC196 EC201 EC202 EC239 C between the memorry slot to CPU Document Number Rev 1.0 MS-12221 Thursday, February 01, 2007 Sheet 44 of 45 26 MIC2_VREFOUT_L 9,16,18 9,16,18 25 26 NC SCLK0 SDATA0 NC 28 29 27 SCLK_CE NC NC 31 30 NC NC NC 32 34 33 TEST AGND_DSP PWD_LED EMI 1/30 D 35 C932 2.2u_6V_0603 NC R556 2.2K_0402 MIC1_N R555 2.2K_0402 36 R554 475_0402 D +1.8VRUN_FM2010 SDA_CE 23 C936 0.01u_16V_0402 C938 0.1u_10V_0402 MIC0_N 39 MIC0_N NC 22 0.1u_10V_0402 MIC0_P 40 MIC0_P RESET 21 41 NC SHI_S 20 42 NC VDD 19 43 NC NC 18 44 NC GND 17 45 NC IRQ_ANA 16 46 NC NC 15 47 VSS_CODEC XTAL_OUT 14 48 NC NC 13 U45 R557 10K_0402 +1.8VRUN_FM2010 TP97 C NC XTAL_IN NC 24 12 +3VRUN R561 100K_0402 11 VREF AGND_DSP 10 100K_0402 NC MIC0P MIC0N MIC1P MIC1N C LINE_IN_P R560 J59 VDD_CODEC +3VRUN VCOM AGND_DSP AGND_DSP 5020 N/A R559 2.2K_0402 NC NC EC306 R558 2.2K_0402 47p_50V_0402 47p_50V_0402 47p_50V_0402 47p_50V_0402 MIC1_P EC305 38 LINE_OUT EC304 NC MIC1_P EC303 37 0.1u_10V_0402 LINE_IN_N C937 MIC0P 0.1u_10V_0402 NC MIC0N C933 0.01u_16V_0402 C935 C934 MIC1P MIC1_N MIC1N FORTEMEDIA ( FM2010-N ) AGND_DSP MOLEX_53261-0490 N32-1040430-H06 53398_04 0.22u_10V_0402 C944 R564 2.2K_0402 26,27 LINEOUT_L + - PCI_CLK1 U47 0.1u_10V_0402 +1.8VRUN_CODEC R565 AGND_DSP C945 2.2K_0402 17,21 C943 0.1u_10V_0402 ANPEC ( APC217BI-TR ) 26,27 LINEOUT_R C942 C946 0.1u_10V_0402 0.22u_10V_0402 C947 4.7u_6V_0603 R5681K_0402 C948 1n_50V_0402 26 INT_MIC2 B B AGND_DSP C949 0.01u_16V_0402 AGND_DSP +1.8VRUN +1.8VRUN_CODEC HARRY 10/17 L75 +3VRUN 4.7u_6V_0603 (DNI) GND EN VOUT C940 IN ADJ AME8804 (DNI) SOT23_5_NPC30X +1.8VRUN_FM2010 L65 300L300m (DNI) 300L300m L64 R562 4.87KR1%0402-RH (DNI) C950 0.1u_10V_0402 C941 C951 0.1u_10V_0402 4.7u_6V_0603 C952 DNI C953 0.1u_10V_0402 C954 0.1u_10V_0402 (DNI) 4.7u_6V_0603 R563 A 80L3_100_0805 C939 1n_50V_0402 (DNI) 300L300m L63 Vout = 1.8V U46 A 10K_0402 1% (DNI) AGND_DSP AGND_DSP AGND_DSP MICRO-STAR INT'L CO.,LTD AGND_DSP Vout=1.215(Ru+Rd)/Rd Title Array Mic FM2010 Size Document Number Custom Rev 1.0 MS-12221 Date: Thursday, February 01, 2007 Sheet 45 of 45 www.s-manuals.com ... 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02... 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02... P2 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02 0. 1u_10V _04 02