msi ms 7345 r1 2 schematics

36 16 0
msi ms 7345 r1 2 schematics

Đang tải... (xem toàn văn)

Tài liệu hạn chế xem trước, để xem đầy đủ mời bạn chọn Tải xuống

Thông tin tài liệu

5 CONTENT D SHEET Cover Sheet, Block diagram 1-2 Intel LGA775 CPU - Signals/ Power/ GND 3-5 Intel Bearlake - FSB, PCIE, DMI, VGA, MSIC Intel Bearlake - Memory DDR2 Intel Bearlake - Power / GND 8-9 ICH9 - PCI, USB, DMI, PCIE 10 ICH9 - Host, DMI, SATA, Audio, SPI, RTC, MSIC 11 ICH9 - Power, GND 12 DDR2 Chanel-A / Chanel-B 13-14 Clock Gen ICS9LPRS906 15 Super I/O Fintek F71882 16 PS2 / COM / VGA Port 17 SATA / e-SATA / FAN Control 18 LAN Realtek RTL8111(PCIE) 19 Audio Codec RTL888T/888 20 PCIE x16, x4, x1 & Bus Switch 21 PCI Slot & 22 Marvell 88SE6111 PCIE to IDE/ SATA 23 USB Connectors 24 IEEE1394 VT6308 25 System Power/ACPI Controller UPI 26 DDR2 / NB-Core Switching Power 27 VRD 11 - ISL6322 (4 Phases) 28 ATX Power-Con / F_Panel 29 Manual & Option Parts 30 Power Delivery 31 Reset & PWROK map 32 C B A MS-7345 CPU: ATX Version: 1.2 System Chipset: Intel Bearlake - Q/G/P (G33, P35, Q35/33North Bridge) Intel ICH9 (South Bridge) On Board Device: CLOCK Gen ICS 9LPRS906 LPC Super I/O Fintek F71882F LAN Realtek 8111 (PCIE) HD Audio Codec RTL888/888T 1394 Controller VT6308 (2-port) PCIE to PATA/SATA Bridge Marvel 88SE6111 C Main Memory: Dual-channel DDR-II * Expansion Slots: PCI EXPRESS X16 SLOT *1 PCI EXPRESS X4 SLOT PCI EXPRESS X1 SLOT * PCI SLOT * Alternative B PWM: Intersil ISL6322 (4 Phases) w/ ISL6612 driver A MICRO-STAR INT'L CO.,LTD 33-35 GPIO Setting & PCI Routing / Revision History D Intel Pentium 4, Pentium D, Core2 Duo, Wolfdale, Kentsfield and Yorkfield processors in LGA775 Package MS-7345 MSI Size Custom Document Description Rev 1.2 COVER SHEET Sheet Date: Friday, May 18, 2007 1 of 35 Block Diagram Board Stack-up (1080 Prepreg Considerations) D D 1.9mils Cu plus plating Solder Mask VRD 11 ISL6322 4-Phase PWM Intel LGA775 Processor PREPREG 2.7mils FSB 800/1066/1333 FSB PCI_E X16 Connector Analog Video Out oz (1.2mils) Cu Power Plane DDR3 800/1066 CORE 50mils DDR II DIMM Modules PCI EXPRESS X16 Bearlake G/Q/P GMCH oz (1.2mils) Cu GND Plane PREPREG 2.7mils Solder Mask DDRII 1.9mils Cu plus plating Single End 50ohm Top/Bottom : 4mils USB2.0 - 90ohm : 15/4.5/7.5/4.5/15 SATA - 95ohm : 15/4/8/4/15 LAN - 100ohm : 15/4/8/4/15 PCIE - 95ohm : 15/4/8/4/15 IEEE1394 - 110ohm : 15/4/9/4/15 IDE : 15/4/8/4/15 RGB C DMI HD Audio Codec RTL888T/888 HD Audio Link C LAN PCI_E x4 PCI-E RTL8111B PCI_E x1 PCI_E x4 (2 PCI_E x1 option) PCI_E x1 ICH9 E-SATA SATA2 1394 VT6308 PCI J1394_2 SATA2 J1394_1 SATA-II 0~4 B B SATA-II USB2.0 LPC Bus PCI_E to PATA Marvell 88SE6111 PCI Slot USB Port 0~11 PCI_E x1 LPC SIO Fintek F71882 SPI IDE Keyboard A LPC Debug Port SPI Flash ROM Floopy Serial A Mouse MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Sheet Date: Friday, May 18, 2007 Rev 1.2 BLOCK DIAGRAM of 35 VCC_SENSE CPU SIGNAL BLOCK H_INIT# B2 C1 E3 6 6 6 H_ADS# H_LOCK# H_BNR# H_HIT# H_HITM# H_BPRI# H_DEFER# D2 C3 C2 D4 E4 G8 G7 H_PROCHOT# 11 H_IGNNE# 11 ICH_H_SMI# 11 H_A20M# H_BPM#1 H_PROCHOT# H_TESTHI13 R100 0/4 Kentsfield B 15,16 CPU_BSEL0 15,16 CPU_BSEL1 15,16 CPU_BSEL2 4,11 4,6 AH2 N5 AE6 C9 D16 A20 RSVD#AH2 RESERVED0 RESERVED1 RESERVED2 RESERVED4 RESERVED5 Y1 V2 AA2 BOOTSELECT LL_ID0 LL_ID1 G29 H30 G30 BSEL0 BSEL1 BSEL2 H_CPURST# G23 H_D#[0 63] B22 A22 A19 B19 B21 C21 B18 A17 B16 C18 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 RSVD/VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 AC2 AN3 AN4 AN5 AN6 AJ3 AK3 ITP_CLK1 ITP_CLK0 AN7 H1 H2 H29 E24 F2 G10 CPU_GTLREF0 CPU_GTLREF1 GTLREF_SEL CPU_MCH_GTLREF CPU_GTLREF2 CPU_GTLREF3 BPM5# BPM4# BPM3# BPM2# BPM1# BPM0# AG3 AF2 AG2 AD2 AJ1 AJ2 H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0 REQ4# REQ3# REQ2# REQ1# REQ0# J6 K6 M6 J5 K4 H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0 TESTHI12 TESTHI11 TESTHI10 TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0 FORCEPH RSVD#G6 W2 P1 H5 G4 G3 F24 G24 G26 G27 G25 F25 W3 F26 AK6 G6 H_TESTHI12 H_TESTHI11 H_TESTHI10 H_TESTHI9 H_TESTHI8 BCLK1# BCLK0# G28 F28 CK_H_CPU_DN CK_H_CPU_DP A3 F5 B3 H_RS#2 H_RS#1 H_RS#0 AP1# AP0# BR0# COMP5 COMP4 COMP3 COMP2 COMP1 COMP0 U3 U2 F3 T2 J2 R1 G2 T1 A13 TEST-U3 TEST-U2 DP3# DP2# DP1# DP0# J17 H16 H15 J16 TEST-J17 TEST-H16 TEST-H15 TEST-J16 ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0# LINT1/NMI LINT0/INTR AD5 R6 C17 G19 E12 B9 A16 G20 G12 C8 L1 K1 RS2# RS1# RS0# PWRGOOD RESET# D63# D62# D61# D60# D59# D58# D57# D56# D55# D54# H_TESTHI2_7 H_TESTHI1 H_TESTHI0 FORCEPH RSVD_G6 H_COMP5 H_COMP4 H_COMP3 H_COMP2 H_COMP1 H_COMP0 H_D#53 B15 H_D#52 C14 H_D#51 C15 H_D#50 A14 H_D#49 D17 H_D#48 D20 H_D#47 G22 H_D#46 D22 H_D#45 E22 H_D#44 G21 H_D#43 F21 H_D#42 E21 H_D#41 F20 H_D#40 E19 H_D#39 E18 H_D#38 F18 H_D#37 F17 H_D#36 G17 H_D#35 G18 H_D#34 E16 H_D#33 E15 H_D#32 G16 H_D#31 G15 H_D#30 F15 H_D#29 G14 H_D#28 F14 H_D#27 G13 H_D#26 E13 H_D#25 D13 H_D#24 F12 H_D#23 F11 H_D#22 D10 H_D#21 E10 H_D#20 D7 H_D#19 E9 H_D#18 F9 H_D#17 F8 H_D#16 G9 H_D#15 D11 H_D#14 C12 H_D#13 B12 H_D#12 D8 H_D#11 C11 H_D#10 B10 H_D#9 A11 H_D#8 A10 H_D#7 A7 H_D#6 B7 H_D#5 B6 H_D#4 A5 H_D#3 C6 H_D#2 A4 H_D#1 C5 H_D#0 B4 D53# D52# D51# D50# D49# D48# D47# D46# D45# D44# D43# D42# D41# D40# D39# D38# D37# D36# D35# D34# D33# D32# D31# D30# D29# D28# D27# D26# D25# D24# D23# D22# D21# D20# D19# D18# D17# D16# D15# D14# D13# D12# D11# D10# D9# D8# D7# D6# D5# D4# D3# D2# D1# D0# H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54 R54 1KR1%/2 VID_SELECT GTLREF0 GTLREF1 GTLREF_SEL GTLREF2 FC5/CPU_GTLREF2 RSVD/CPU_GTLREF3 ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER# TDI TDO TMS TRST# TCK PECI THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13 N1 VTT_OUT_RIGHT DBSY# DRDY# TRDY# AD1 AF1 AC1 AG1 AE1 G5 AL1 AK1 M2 AE8 AL2 N2 P2 K3 L2 H_PWRGD DBR# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP# H_DBSY# H_DRDY# H_TRDY# H_TDI H_TDO H_TMS H_TRST# H_TCK PECI VTIN1 GNDHM H_TRMTRIP# A35# A34# A33# A32# A31# A30# A29# A28# A27# A26# A25# A24# A23# A22# A21# A20# A19# A18# A17# A16# A15# A14# A13# A12# A11# A10# A9# A8# A7# A6# A5# A4# A3# AB2 AB3 R3 M3 AD3 P3 H4 6 11,16 PECI 16 VTIN1 16 GNDHM 11 H_TRMTRIP# DBI0# DBI1# DBI2# DBI3# A RN4 7 RN3 8P4R-680R 8 8P4R-680R H_BPM#0 H_BPM#1 H_BPM#5 H_BPM#3 RN5 VTT_OUT_RIGHT 8P4R-51R/2 H_TRST# H_BPM#4 H_TDO H_TCK RN6 8P4R-51R/2 H_TDI H_BPM#2 H_TMS RN7 8P4R-51R/2 RN9 8P4R-51R/2 VID5 VID2 VID4 VID0 VID7 VID3 VID6 VID1 VRD_VIDSEL 28 CPU_GTLREF0 CPU_GTLREF1 T14 X_TP CPU_MCH_GTLREF CPU_GTLREF2 CPU_GTLREF3 H_BPM#0 H_REQ#[0 4] H_TESTHI12 R118 R140 VTT_OUT_RIGHT C73 0.1u/16V/Y/4 C36 0.1u/16V/Y/4 C Kentsfield H_BPM#2 H_BPM#3 0/4 0/4 R166 51R/2 V_FSB_VTT R172 R101 R146 51R/2 X_130R1%/2 X_51R/2 VTT_OUT_RIGHT VTT_OUT_LEFT CK_H_CPU_DN CK_H_CPU_DP H_RS#[0 2] H_TESTHI10 H_TESTHI12 H_TESTHI9 H_TESTHI11 V_FSB_VTT VTT_OUT_RIGHT 4,5 H_TESTHI8 R143 H_TESTHI1 R123 H_TESTHI13 R134 15 15 VTT_OUT_LEFT C94 0.1u/16V/Y/4 51R/2 51R/2 51R/2 T8 X_TP T7 X_TP R130 R135 R131 R144 R126 R173 H_BR#0 49.9R1%/2 49.9R1%/2 49.9R1%/2 49.9R1%/2 49.9R1%/2 49.9R1%/2 T9 T12 T11 T10 4,6 VTT_OUT_LEFT B C95 0.1u/16V/Y/4 X_TP X_TP X_TP X_TP H_ADSTB#1 H_ADSTB#0 H_DSTBP#3 H_DSTBP#2 H_DSTBP#1 H_DSTBP#0 H_DSTBN#3 H_DSTBN#2 H_DSTBN#1 H_DSTBN#0 H_NMI H_INTR Thermal TRIP 6 6 6 6 6 11 11 VCC3 VTT_OUT_RIGHT R76 X_10K/4 B 11 H_IERR# H_FERR# H_STPCLK# A8 G11 D19 C20 VCC_SENSE VSS_SENSE VCC_MB_REGULATION VSS_MB_REGULATION AJ6 AJ5 AH5 AH4 AG5 AG4 AG6 AF4 AF5 AB4 AC5 AB5 AA5 AD6 AA4 Y4 Y6 W6 AB6 W5 V4 V5 U4 U5 T4 U6 T5 R4 M4 L4 M5 P6 L5 H_A#35 H_A#34 H_A#33 H_A#32 H_A#31 H_A#30 H_A#29 H_A#28 H_A#27 H_A#26 H_A#25 H_A#24 H_A#23 H_A#22 H_A#21 H_A#20 H_A#19 H_A#18 H_A#17 H_A#16 H_A#15 H_A#14 H_A#13 H_A#12 H_A#11 H_A#10 H_A#9 H_A#8 H_A#7 H_A#6 H_A#5 H_A#4 H_A#3 11 11 C H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 H_DBI#[0 3] 28 D U8A VSS_SENSE 28 H_A#[3 35] AM7 AM5 AL4 AK4 AL6 AM3 AL5 AM2 28 PULL HIGHT PULL DOWN C71 X_10u/16V/12 VSS_SENSE VID[0 7] D VCC_SENSE E FORCEPH R108 R89 10KR/2 Q12 X_2N3904 C ICH_THERM# 11 X_0/4 ZIF-SOCK775-15U-IN_TH H_PROCHOT# R99 X_0/4 A 16 R95 THRM# 0/4 MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Sheet Date: Wednesday, June 20, 2007 Rev 1.2 LGA775 - Signal of 35 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC U8B AF21 AF22 AF8 AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30 AG8 AG9 AH11 AH12 AH14 AH15 AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30 AL8 AL9 AM11 AM12 AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30 AM8 AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 VCCP VCCP AF19 AF18 AF15 AF14 AF12 AF11 AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11 AD8 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AC8 AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23 AB8 AA8 A23 B23 D23 C23 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTTPWRGD A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 AM6 VTT_PWG VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL AA1 J1 F27 VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL RSVD#F29 F29 D H_VCCPLL V_FSB_VTT V_FSB_VTT C153 10u/10V/8 C143 10u/10V/8 C165 C10U6.3X5R6 CAPS FOR FSB GENERIC C VTT_SEL 26 ZIF-SOCK775-15U-IN_TH Y8 Y30 Y29 Y28 Y27 Y26 Y25 Y24 Y23 W8 W30 W29 W28 W27 W26 W25 W24 W23 V8 U8 U30 U29 U28 U27 U26 U25 U24 U23 T8 T30 T29 T28 T27 T26 T25 T24 T23 R8 P8 N8 N30 N29 N28 N27 N26 N25 N24 N23 M8 M30 M29 M28 M27 M26 M25 M24 M23 L8 K8 K30 K29 K28 K27 K26 K25 K24 K23 J9 J8 J30 J29 J28 J27 J26 J25 J24 J23 J22 J21 J20 J19 J18 J15 J14 J13 J12 J11 J10 AN9 AN8 AN30 AN29 AN26 AN25 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC C VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC H_VCCA H_VSSA H_VCCPLL H_VCCA VCCA VSSA VCCPLL VCC-IOPLL D VCCP EMI *GTLREF VOLTAGE SHOULD BE 0.67 * VTT = 0.8V (At VTT=1.2V) T33 X_TP VTT_OUT_RIGHT B R119 115R1%/2 C82 X_C10U6.3X5R6 R139 R124 200R1%/2 10R/2 C90 C1U16Y3 VTT_OUT_LEFT CPU_GTLREF0 R128 C98 C220P50N2 *PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET *TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS 115R1%/2 R141 200R1%/2 R145 10R/2 C91 C1U16Y3 CPU_GTLREF2 C104 C220P50N2 V_FSB_VTT V_FSB_VTT R115 115R1%/2 R137 R117 200R1%/2 10R/2 C87 C1U16Y3 R104 CP10 H_VCCA C154 C1U16Y3 115R1%/2 R109 10R/2 B V_1P5_ICH L13 X_L10U_100mA_0805 CP4 T36 X_TP T34 X_TP VTT_OUT_RIGHT T35 X_TP C151 10u/10V/8 H_VCCPLL X_COPPER C145 X_C10U10Y5 C182 X_C1U16Y3 C177 0.01u/25V/4/X C253 10u/10V/8 X_COPPER CPU_GTLREF3 CPU_GTLREF1 H_VSSA R105 200R1%/2 C97 C220P50N2 C78 C1U16Y3 C77 C220P50N2 VTT_PWRGOOD VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns PLACE AT CPU END OF ROUTE VTT_OUT_RIGHT VTT_OUT_LEFT VTT_OUT_RIGHT VTT_OUT_LEFT R75 R116 130R1%/2 62R/2 H_PROCHOT# H_IERR# R111 R133 R148 62R/2 X_100R/2 62R/2 H_CPURST# H_PWRGD H_BR#0 H_PROCHOT# H_IERR# H_CPURST# H_PWRGD H_BR#0 R50 680R/2 3,6 3,11 3,6 26,28 VID_GD# R21 1KR1%/2B A 1.2V VTT_PWRGOOD VTT_PWG C 3,5 VTT_OUT_RIGHT Q7 2N3904 MICRO-STAR INT'L CO.,LTD E A MS-7345 MSI Size Custom Document Description Rev 1.2 LGA775 - Power Sheet Date: Friday, May 18, 2007 4 of 35 Y7 Y5 Y2 W7 W4 V7 V6 V30 V3 V29 V28 V27 V26 V25 V24 V23 U7 T7 T6 T3 R7 R5 R30 R29 R28 R27 R26 R25 R24 R23 R2 P7 P4 P30 P29 P28 P27 P26 P25 P24 P23 N7 N6 N3 M7 M1 L7 L6 L30 L3 L29 L28 L27 L26 L25 L24 L23 K7 K5 K2 J7 J4 H9 H8 H7 H6 H3 H28 H27 H26 H25 H24 H23 H22 H21 H20 H19 H18 H17 H14 H13 H12 H11 H10 F7 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS U8C D C D VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS COMP6 COMP7 RSVD/COMP8 Y3 AE3 B13 RSVD#AE4 RSVD#D1 RSVD#D14 RSVD#E5 RSVD#E6 RSVD#E7 RSVD#E23 RSVD#F23 RSVD RSVD#J3 RSVD#N4 RSVD#P5 RSVD#AC4 AE4 D1 D14 E5 E6 E7 E23 F23 AL3 J3 N4 P5 AC4 IMPSEL# MSID1 MSID0 F6 V1 W1 FC28 FC27 FC26 FC23 U1 G1 E29 A24 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F4 F22 F19 F16 F13 F10 E8 E28 E27 E26 E25 E20 E2 E17 E14 E11 D9 D6 D5 D3 D24 D21 D18 D15 D12 C7 C4 C24 C22 C19 C16 C13 C10 B8 B5 H_COMP6 H_COMP7 H_COMP8 R120 R113 R175 T13 T17 T15 T2 49.9R1%/2 49.9R1%/2 24.9R1%/2 VTT_OUT_RIGHT 3,4 X_TP X_TP X_TP X_TP R114 R125 R122 51R/2 51R/2 51R/2 R127 R142 0/4 0/4 H_TESTHI12 H_BPM#0 H_TESTHI12 H_BPM#0 3 T16 X_TP R163 X_1K/4 Kentsfield C CPU DECOUPLING CAPACITORS Place these caps within socket cavity VCCP AG10 AG13 AG16 AG17 AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AN1 AN10 AN13 AN16 AN17 AN2 AN20 AN23 AN24 AN27 AN28 B1 B11 B14 B17 B20 B24 VCCP EC18 C22U6.3X5R6 EC28 C22U6.3X5R6 EC25 C22U6.3X5R6 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS B A12 A15 A18 A2 A21 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF3 AF30 AF6 AF7 B EC23 X_C10U10X6 EC27 C22U6.3X5R6 EC24 X_C10U10X6 ZIF-SOCK775-15U-IN_TH VCCP VCCP EC15 C22U6.3X5R6 EC26 C22U6.3X5R6 EC17 C22U6.3X5R6 EC19 X_C10U10X6 EC14 X_C10U10X6 EC16 C22U6.3X5R6 A A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 LGA775 - GND Sheet Date: Thursday, May 31, 2007 5 of 35 H_ADSTB#0 H_ADSTB#1 3 3 3 3 3 H_DSTBP#0 H_DSTBN#0 H_DSTBP#1 H_DSTBN#1 H_DSTBP#2 H_DSTBN#2 H_DSTBP#3 H_DSTBN#3 H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 H_DBI#[0 3] H_ADS# H_TRDY# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# 3,4 H_BR#0 H_BNR# H_BPRI# H_DBSY# H_RS#[0 2] B 3,4 H_RS#0 H_RS#1 H_RS#2 H_CPURST# F40 L35 L38 G43 J37 FSB_REQB_0 FSB_REQB_1 FSB_REQB_2 FSB_REQB_3 FSB_REQB_4 M34 U34 FSB_ADSTBB_0 FSB_ADSTBB_1 M42 M43 G35 H33 G27 H27 B38 C38 FSB_DSTBPB_0 FSB_DSTBNB_0 FSB_DSTBPB_1 FSB_DSTBNB_1 FSB_DSTBPB_2 FSB_DSTBNB_2 FSB_DSTBPB_3 FSB_DSTBNB_3 M40 J33 G29 E33 FSB_DINVB_0 FSB_DINVB_1 FSB_DINVB_2 FSB_DINVB_3 W40 Y40 W41 T43 Y43 U42 V41 AA42 W42 G39 U40 U41 AA41 U39 C31 FSB_ADSB FSB_TRDYB FSB_DRDYB FSB_DEFERB FSB_HITMB FSB_HITB FSB_LOCKB FSB_BREQ0B FSB_SWING FSB_BNRB FSB_RCOMP FSB_BPRIB FSB_SCOMP FSB_DBSYB FSB_SCOMPB FSB_RSB_0 FSB_DVREF FSB_RSB_1 FSB_ACCVREF FSB_RSB_2 HPL_CLKINP FSB_CPURSTB HPL_CLKINN OF H_D#[0 63] 10 10 10 10 10 10 10 10 W2 V1 Y8 Y9 AA7 AA6 AB3 AA4 DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1 DMI_RXP_2 DMI_RXN_2 DMI_RXP_3 DMI_RXN_3 CK_PE_100M_MCH_DP CK_PE_100M_MCH_DN B12 B13 EXP_CLKINP EXP_CLKINN SDVO_CTRL_DATA SDVO_CTRL_CLK G17 E17 SDVO_CTRLDATA SDVO_CTRLCLK 21 SDVO_CTRL_DATA 21 SDVO_CTRL_CLK R189 49.9R1%/2 C228 X_C2.7P25N2 HXSCOMPB CK_H_MCH_DP CK_H_MCH_DN R214 R213 CK_H_MCH_DP 15 CK_H_MCH_DN 15 EXP16_PRSNT# 21 EXP16_PRSNT# RN29 10K/4/8P4R MCH_BS0 MCH_BS1 MCH_BS2 X_TP T18 X_TP T20 X_1KR1%/2 MTYPE X_1KR/2 EXP_SLR X_TP T21 0/4 EXP_EN X_1KR/2 MCH_RFU_G15 15,16 MCH_BSEL0 15,16 MCH_BSEL1 15,16 MCH_BSEL2 R188 49.9R1%/2 C227 X_C2.7P25N2 HXRCOMP PIN MTYPE EXP_SLR EXP_EN MCH_TCEN V_FSB_VTT R190 100R1%/2 CPU_MCH_GTLREF H DDR2 Normal Concurrent Enable L R217 R216 DDR3 Reverse Non-concurrent Disable Description MEMORY TYPE PCI_E Lane Reversal PCI_E/SDVO co-existence TLS confidentiality R194 49.9R1%/2 MCH_GTLREF R195 200R1%/2 C234 C1U16Y3 C233 C220P50N2 11 11 CLINK_DATA CLINK_CLK 11 11 CLINK_RST CLINK_PWOK CHIP_PWGD X_TP T26 MCH_TCEN X_TP X_TP X_TP X_TP X_TP X_TP T19 T27 T25 T24 T22 T23 CLINK_DATA CLINK_CLK CL_VREF_MCH CLINK_RST CLINK_PWOK R234 R202 16.5R1%/2 T37 CL_VREF_MCH = 0.349V Close to GMCH HXSWING SHOULD BE 1/4*VTT V_FSB_VTT V_FSB_VTT DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1 DMI_TXP_2 DMI_TXN_2 DMI_TXP_3 DMI_TXN_3 V7 V6 W4 Y4 AC8 AC9 Y2 AA2 DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3 AC11 AC12 GRCOMP R226 EXP_A_TXP_0 21 EXP_A_TXN_0 21 EXP_A_TXP_1 21 EXP_A_TXN_1 21 EXP_A_TXP_2 21 EXP_A_TXN_2 21 EXP_A_TXP_3 21 EXP_A_TXN_3 21 EXP_A_TXP_4 21 EXP_A_TXN_4 21 EXP_A_TXP_5 21 EXP_A_TXN_5 21 EXP_A_TXP_6 21 EXP_A_TXN_6 21 EXP_A_TXP_7 21 EXP_A_TXN_7 21 EXP_A_TXP_8 21 EXP_A_TXN_8 21 EXP_A_TXP_9 21 EXP_A_TXN_9 21 EXP_A_TXP_10 21 EXP_A_TXN_10 21 EXP_A_TXP_11 21 EXP_A_TXN_11 21 EXP_A_TXP_12 21 EXP_A_TXN_12 21 EXP_A_TXP_13 21 EXP_A_TXN_13 21 EXP_A_TXP_14 21 EXP_A_TXN_14 21 EXP_A_TXP_15 21 EXP_A_TXN_15 21 DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3 D 10 10 10 10 10 10 10 10 EXP_COMPO EXP_COMPI 24.9R1%/2 V_1P25_CORE OF RN28 470/4/8P4R *GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V (At VTT=1.2V) CPU_MCH_GTLREF V_FSB_VTT EXP_A_TXP_0 EXP_A_TXN_0 EXP_A_TXP_1 EXP_A_TXN_1 EXP_A_TXP_2 EXP_A_TXN_2 EXP_A_TXP_3 EXP_A_TXN_3 EXP_A_TXP_4 EXP_A_TXN_4 EXP_A_TXP_5 EXP_A_TXN_5 EXP_A_TXP_6 EXP_A_TXN_6 EXP_A_TXP_7 EXP_A_TXN_7 EXP_A_TXP_8 EXP_A_TXN_8 EXP_A_TXP_9 EXP_A_TXN_9 EXP_A_TXP_10 EXP_A_TXN_10 EXP_A_TXP_11 EXP_A_TXN_11 EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15 V_FSB_VTT R218 X_1KR/2 HXSCOMP D11 D12 B11 A10 C10 D9 B9 B7 D7 D6 B5 B6 B3 B4 F2 E2 F4 G4 J4 K3 L2 K1 N2 M2 P3 N4 R2 P1 U2 T2 V3 U4 BRLK_B_CRB BRLK_B_CRB V_FSB_VTT PEG_TXP_0 PEG_TXN_0 PEG_TXP_1 PEG_TXN_1 PEG_TXP_2 PEG_TXN_2 PEG_TXP_3 PEG_TXN_3 PEG_TXP_4 PEG_TXN_4 PEG_TXP_5 PEG_TXN_5 PEG_TXP_6 PEG_TXN_6 PEG_TXP_7 PEG_TXN_7 PEG_TXP_8 PEG_TXN_8 PEG_TXP_9 PEG_TXN_9 PEG_TXP_10 PEG_TXN_10 PEG_TXP_11 PEG_TXN_11 PEG_TXP_12 PEG_TXN_12 PEG_TXP_13 PEG_TXN_13 PEG_TXP_14 PEG_TXN_14 PEG_TXP_15 PEG_TXN_15 C 15 CK_PE_100M_MCH_DP 15 CK_PE_100M_MCH_DN HXSWING HXRCOMP HXSCOMP HXSCOMPB MCH_GTLREF B25 D23 C25 D25 D24 B24 R32 U32 DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3 DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3 PCIE R40 P41 R41 N40 R42 M39 N41 N42 L41 J39 L42 J41 K41 G40 F41 F42 C42 D41 F38 G37 E42 E39 E37 C39 B39 G33 A37 F33 E35 K32 H32 B34 J31 F32 M31 E31 K31 G31 K29 F31 J29 F29 L27 K27 H26 L26 J26 M26 C33 D35 E41 B41 D42 C40 C35 B40 D38 D37 B33 D33 C34 B35 A32 D32 DMI 3 C H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_REQ#[0 4] FSB_DB_0 FSB_DB_1 FSB_DB_2 FSB_DB_3 FSB_DB_4 FSB_DB_5 FSB_DB_6 FSB_DB_7 FSB_DB_8 FSB_DB_9 FSB_DB_10 FSB_DB_11 FSB_DB_12 FSB_DB_13 FSB_DB_14 FSB_DB_15 FSB_DB_16 FSB_DB_17 FSB_DB_18 FSB_DB_19 FSB_DB_20 FSB_DB_21 FSB_DB_22 FSB_DB_23 FSB_DB_24 FSB_DB_25 FSB_DB_26 FSB_DB_27 FSB_DB_28 FSB_DB_29 FSB_DB_30 FSB_DB_31 FSB_DB_32 FSB_DB_33 FSB_DB_34 FSB_DB_35 FSB_DB_36 FSB_DB_37 FSB_DB_38 FSB_DB_39 FSB_DB_40 FSB_DB_41 FSB_DB_42 FSB_DB_43 FSB_DB_44 FSB_DB_45 FSB_DB_46 FSB_DB_47 FSB_DB_48 FSB_DB_49 FSB_DB_50 FSB_DB_51 FSB_DB_52 FSB_DB_53 FSB_DB_54 FSB_DB_55 FSB_DB_56 FSB_DB_57 FSB_DB_58 FSB_DB_59 FSB_DB_60 FSB_DB_61 FSB_DB_62 FSB_DB_63 PEG_RXP_0 PEG_RXN_0 PEG_RXP_1 PEG_RXN_1 PEG_RXP_2 PEG_RXN_2 PEG_RXP_3 PEG_RXN_3 PEG_RXP_4 PEG_RXN_4 PEG_RXP_5 PEG_RXN_5 PEG_RXP_6 PEG_RXN_6 PEG_RXP_7 PEG_RXN_7 PEG_RXP_8 PEG_RXN_8 PEG_RXP_9 PEG_RXN_9 PEG_RXP_10 PEG_RXN_10 PEG_RXP_11 PEG_RXN_11 PEG_RXP_12 PEG_RXN_12 PEG_RXP_13 PEG_RXN_13 PEG_RXP_14 PEG_RXN_14 PEG_RXP_15 PEG_RXN_15 X_TP T32 V_1P25_CORE X_TP A R191 300R1%/2 R224 1KR1%/2 R193 49.9R1%/2 HXSWING U12E G20 J20 J18 K20 F20 G18 E18 K17 J17 G15 BSEL0 BSEL1 BSEL2 ALLZTEST XORTEST MTYPE EXP_SLR RESERVED_12 EXP_EN RFU_G15 L17 E20 N18 N15 N17 L15 L18 M18 RESERVED_14 TCEN RESERVED_16 RESERVED_17 RESERVED_18 RESERVED_19 RESERVED_20 RESERVED_21 AD12 AD13 AM5 AA12 AM15 CL_DATA CL_CLK CL_VREF CL_RSTB CL_PWROK AA10 AA9 AA11 Y12 V31 U30 U31 R29 R30 RESERVED_22 RESERVED_23 RESERVED_24 RESERVED_25 RESERVED_V31 RESERVED_26 RESERVED_27 RESERVED_28 RESERVED_29 0/4 CRT_HSYNC CRT_VSYNC C15 E15 HSYNC VSYNC CRT_RED CRT_GREEN CRT_BLUE CRT_REDB CRT_GREENB CRT_BLUEB B18 C19 B20 C18 D19 D20 VGA_RED VGA_GREEN VGA_BLUE CRT_DDC_DATA CRT_DDC_CLK L13 M13 MCH_DDC_DATA MCH_DDC_CLK CRT_IREF A20 DACREFSET DPL_REFCLKINP DPL_REFCLKINN VCC VSS C14 D13 L12 M11 CK_DOT96_MCH_DP CK_DOT96_MCH_DN VGA FSB_AB_3 FSB_AB_4 FSB_AB_5 FSB_AB_6 FSB_AB_7 FSB_AB_8 FSB_AB_9 FSB_AB_10 FSB_AB_11 FSB_AB_12 FSB_AB_13 FSB_AB_14 FSB_AB_15 FSB_AB_16 FSB_AB_17 FSB_AB_18 FSB_AB_19 FSB_AB_20 FSB_AB_21 FSB_AB_22 FSB_AB_23 FSB_AB_24 FSB_AB_25 FSB_AB_26 FSB_AB_27 FSB_AB_28 FSB_AB_29 FSB_AB_30 FSB_AB_31 FSB_AB_32 FSB_AB_33 FSB_AB_34 FSB_AB_35 F13 E13 K15 J15 F12 E12 J12 H12 J11 H11 F7 E7 E5 F6 C2 D2 G6 G5 L9 L8 M8 M9 M4 L4 M5 M6 R9 R10 T4 R4 R6 R7 D J42 L39 J40 L37 L36 K42 N32 N34 M38 N37 M36 R34 N35 N38 U37 N39 R37 P42 R39 V36 R38 U36 U33 R35 V33 V35 Y34 V42 V38 Y36 Y38 Y39 AA37 EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6 EXP_A_RXP_7 EXP_A_RXN_7 EXP_A_RXP_8 EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11 EXP_A_RXN_11 EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15 21 EXP_A_RXP_0 21 EXP_A_RXN_0 21 EXP_A_RXP_1 21 EXP_A_RXN_1 21 EXP_A_RXP_2 21 EXP_A_RXN_2 21 EXP_A_RXP_3 21 EXP_A_RXN_3 21 EXP_A_RXP_4 21 EXP_A_RXN_4 21 EXP_A_RXP_5 21 EXP_A_RXN_5 21 EXP_A_RXP_6 21 EXP_A_RXN_6 21 EXP_A_RXP_7 21 EXP_A_RXN_7 21 EXP_A_RXP_8 21 EXP_A_RXN_8 21 EXP_A_RXP_9 21 EXP_A_RXN_9 21 EXP_A_RXP_10 21 EXP_A_RXN_10 21 EXP_A_RXP_11 21 EXP_A_RXN_11 21 EXP_A_RXP_12 21 EXP_A_RXN_12 21 EXP_A_RXP_13 21 EXP_A_RXN_13 21 EXP_A_RXP_14 21 EXP_A_RXN_14 21 EXP_A_RXP_15 21 EXP_A_RXN_15 H_A#[3 35] FSB H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 U1MCH U12A U1MCH U12B H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 MISC HSYNC VSYNC C627 10P/4 C643 10P/4 C644 10P/4 17 17 VGA_RED 17 VGA_GREEN 17 VGA_BLUE 17 B MCH_DDC_DATA 17 MCH_DDC_CLK 17 CK_DOT96_MCH_DP 15,21 CK_DOT96_MCH_DN 15,21 V_1P25_CORE Non-GraphicV_1P25_CORE sku RESERVED_34 RESERVED_35 RESERVED_36 RSTINB PWROK ICH_SYNCB H18 F17 A14 AM18 AM17 J13 NC RESERVED_37 A42 R20 RESERVED_33 RESERVED_32 RESERVED_31 RESERVED_30 R13 R12 U11 U12 CHIP_PWGD PLTRST# CHIP_PWGD ICH_SYNC# 11,16 11,26 11 CK_DOT96_MCH_DP R571 X_10KR/2 CK_DOT96_MCH_DN R572 X_0R/2 Reserved for non-Graphic sku HSYNC VSYNC R212 R211 X_0R/2 X_0R/2 Close to GMCH Change to 0-ohm for non-Graphic sku OF DACREFSET BRLK_B_CRB R203 A 1.3KR1%/2 CL_VREF_MCH R192 100R1%/2 C230 0.01u/25V/4/X R225 392R1%/2 MICRO-STAR INT'L CO.,LTD C282 0.1u/16V/Y/4 MS-7345 MSI Size Custom Document Description Sheet Date: Friday, June 08, 2007 Rev 1.2 Bearlake - FSB, PCIE, DMI, VGA, MSIC of 35 U1MCH U1MCH U12C BB30 AY25 BA23 BB23 AY23 BB22 BA22 BB21 AW21 BA21 BB31 AY21 BC20 AY38 BA19 DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14 WE_A# CAS_A# RAS_A# BA33 AW35 AY33 DDR_A_WEB DDR_A_CASB DDR_A_RASB SBS_A0 SBS_A1 SBS_A2 BA31 AY31 AY20 DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2 SCS_A#0 SCS_A#1 SCS_A#2 SCS_A#3 BA34 AY35 BB33 BB38 DDR_A_CSB_0 DDR_A_CSB_1 DDR_A_CSB_2 DDR_A_CSB_3 SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3 AY19 AW18 BB19 BA18 DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3 ODT_A0 ODT_A1 ODT_A2 ODT_A3 BB35 BA38 BA35 BA39 DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A AR31 AU31 AP27 AN27 AV33 AW33 AP29 AP31 AM26 AM27 AT33 AU33 DDR_A_CK_0 DDR_A_CKB_0 DDR_A_CK_1 DDR_A_CKB_1 DDR_A_CK_2 DDR_A_CKB_2 DDR_A_CK_3 DDR_A_CKB_3 DDR_A_CK_4 DDR_A_CKB_4 DDR_A_CK_5 DDR_A_CKB_5 D 13,14 13,14 13,14 WE_A# CAS_A# RAS_A# 13,14 SBS_A[0 2] 13,14 13,14 13,14 13,14 C SCS_A#0 SCS_A#1 SCS_A#2 SCS_A#3 13,14 13,14 13,14 13,14 SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3 13,14 13,14 13,14 13,14 ODT_A0 ODT_A1 ODT_A2 ODT_A3 13 13 13 13 13 13 13 13 13 13 13 13 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A U12D MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13 MAA_A14 13,14 MAA_A[0 14] R235 0/4 BC16 AN15 AY37 BB29 BB34 AW32 DDR3_DRAMRSTB DDR3_DRAM_PWROK DDR3_A_CSB1 DDR3_A_MA0 DDR3_A_WEB DDR3_B_ODT3 BC43 BC1 A43 AN21 TEST3 TEST1 TEST0 RESERVED_1 X_TP T4 X_TP T6 X_TP T3 N20 B2 B42 B43 BB1 BB2 BB43 BC2 BC42 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC B DDR3 DDR_A X_TP T5 OF DDR_A_DQS_0 DDR_A_DQSB_0 DDR_A_DQS_1 DDR_A_DQSB_1 DDR_A_DQS_2 DDR_A_DQSB_2 DDR_A_DQS_3 DDR_A_DQSB_3 DDR_A_DQS_4 DDR_A_DQSB_4 DDR_A_DQS_5 DDR_A_DQSB_5 DDR_A_DQS_6 DDR_A_DQSB_6 DDR_A_DQS_7 DDR_A_DQSB_7 AP2 AP3 AW2 AW1 AY7 BA6 AT20 AU18 AR41 AR40 AL41 AL40 AG42 AG41 AC42 AC41 DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7 DDR_A_DM_0 DDR_A_DM_1 DDR_A_DM_2 DDR_A_DM_3 DDR_A_DM_4 DDR_A_DM_5 DDR_A_DM_6 DDR_A_DM_7 AN2 AW3 BB6 AN18 AU43 AM43 AG40 AC40 DQM_A0 DQM_A1 DQM_A2 DQM_A3 DQM_A4 DQM_A5 DQM_A6 DQM_A7 DDR_A_DQ_0 DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7 DDR_A_DQ_8 DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15 DDR_A_DQ_16 DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23 DDR_A_DQ_24 DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31 DDR_A_DQ_32 DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39 DDR_A_DQ_40 DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47 DDR_A_DQ_48 DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55 DDR_A_DQ_56 DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63 AM1 AN3 AR2 AR3 AL3 AM2 AR5 AR4 AV4 AV3 BA4 BB3 AU2 AU1 AY2 AY3 BB5 AY6 BA9 BB9 BA5 BB4 BC7 AY9 AT18 AR18 AU21 AT21 AP17 AN17 AP20 AV20 AV42 AU40 AP42 AN39 AV40 AV41 AR42 AP41 AN41 AM39 AK42 AK41 AN40 AN42 AL42 AL39 AJ40 AH43 AF39 AE40 AJ42 AJ41 AF41 AF42 AD40 AD43 AB41 AA40 AE42 AE41 AC39 AB42 DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63 DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 DQM_A[0 7] 14 MAA_B[0 14] 14 14 14 13 14 WE_B# CAS_B# RAS_B# SBS_B[0 2] 14 14 14 14 DATA_A[0 63] 13 SCS_B#0 SCS_B#1 SCS_B#2 SCS_B#3 14 14 14 14 SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3 14 14 14 14 ODT_B0 ODT_B1 ODT_B2 ODT_B3 14 14 14 14 14 14 14 14 14 14 14 14 P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13 MAA_B14 AW15 BB15 BA15 AY15 BA14 BB14 AW12 BA13 BB13 AY13 BA17 AY12 BA11 AY27 BB11 DDR_B_MA_0 DDR_B_MA_1 DDR_B_MA_2 DDR_B_MA_3 DDR_B_MA_4 DDR_B_MA_5 DDR_B_MA_6 DDR_B_MA_7 DDR_B_MA_8 DDR_B_MA_9 DDR_B_MA_10 DDR_B_MA_11 DDR_B_MA_12 DDR_B_MA_13 DDR_B_MA_14 WE_B# CAS_B# RAS_B# BB25 AW26 AY24 DDR_B_WEB DDR_B_CASB DDR_B_RASB SBS_B0 SBS_B1 SBS_B2 BB17 AY17 AY11 DDR_B_BS_0 DDR_B_BS_1 DDR_B_BS_2 SCS_B#0 SCS_B#1 SCS_B#2 SCS_B#3 BA25 BA29 BA26 BA30 DDR_B_CSB_0 DDR_B_CSB_1 DDR_B_CSB_2 DDR_B_CSB_3 SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3 AW11 BC12 BA10 BB10 DDR_B_CKE_0 DDR_B_CKE_1 DDR_B_CKE_2 DDR_B_CKE_3 ODT_B0 ODT_B1 ODT_B2 ODT_B3 BB27 AW29 BA27 AY29 DDR_B_ODT_0 DDR_B_ODT_1 DDR_B_ODT_2 DDR_B_ODT_3 P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B AW31 AV31 AU27 AT27 AV32 AT32 AR29 AU29 AV29 AW27 AN33 AP32 DDR_B_CK_0 DDR_B_CKB_0 DDR_B_CK_1 DDR_B_CKB_1 DDR_B_CK_2 DDR_B_CKB_2 DDR_B_CK_3 DDR_B_CKB_3 DDR_B_CK_4 DDR_B_CKB_4 DDR_B_CK_5 DDR_B_CKB_5 DDR_B VCC_DDR PLACE 0.1UF CAP CLOSE TO MCH R229 1KR1%/2 MCH_VREF_A R231 1KR1%/2 AM6 C296 0.1u/16V/Y/4 SRCOMP0 AL4 SRCOMP1 AL2 SRCOMP2 BB40 SRCOMP3 BA40 DDR_RCOMPVOL AM8 DDR_RCOMPVOH AM10 BA2 AW42 AN32 AM31 AG32 AF32 AP21 AA39 AM21 DDR_VREF DDR_RCOMPXPD DDR_RCOMPXPU DDR_RCOMPYPD DDR_RCOMPYPU DDR_RCOMPVOL DDR_RCOMPVOH RESERVED_2 RESERVED_3 RESERVED_4 RESERVED_5 RESERVED_6 RESERVED_7 RESERVED_8 RESERVED_9 RESERVED_10 OF BRLK_B_CRB DDR_B_DQS_0 DDR_B_DQSB_0 DDR_B_DQS_1 DDR_B_DQSB_1 DDR_B_DQS_2 DDR_B_DQSB_2 DDR_B_DQS_3 DDR_B_DQSB_3 DDR_B_DQS_4 DDR_B_DQSB_4 DDR_B_DQS_5 DDR_B_DQSB_5 DDR_B_DQS_6 DDR_B_DQSB_6 DDR_B_DQS_7 DDR_B_DQSB_7 AV6 AU5 AR12 AP12 AP15 AR15 AT24 AU26 AW39 AU39 AL35 AL34 AG35 AG36 AC36 AC37 DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7 DDR_B_DM_0 DDR_B_DM_1 DDR_B_DM_2 DDR_B_DM_3 DDR_B_DM_4 DDR_B_DM_5 DDR_B_DM_6 DDR_B_DM_7 AR7 AW9 AW13 AP23 AU37 AM37 AG39 AD38 DQM_B0 DQM_B1 DQM_B2 DQM_B3 DQM_B4 DQM_B5 DQM_B6 DQM_B7 DDR_B_DQ_0 DDR_B_DQ_1 DDR_B_DQ_2 DDR_B_DQ_3 DDR_B_DQ_4 DDR_B_DQ_5 DDR_B_DQ_6 DDR_B_DQ_7 DDR_B_DQ_8 DDR_B_DQ_9 DDR_B_DQ_10 DDR_B_DQ_11 DDR_B_DQ_12 DDR_B_DQ_13 DDR_B_DQ_14 DDR_B_DQ_15 DDR_B_DQ_16 DDR_B_DQ_17 DDR_B_DQ_18 DDR_B_DQ_19 DDR_B_DQ_20 DDR_B_DQ_21 DDR_B_DQ_22 DDR_B_DQ_23 DDR_B_DQ_24 DDR_B_DQ_25 DDR_B_DQ_26 DDR_B_DQ_27 DDR_B_DQ_28 DDR_B_DQ_29 DDR_B_DQ_30 DDR_B_DQ_31 DDR_B_DQ_32 DDR_B_DQ_33 DDR_B_DQ_34 DDR_B_DQ_35 DDR_B_DQ_36 DDR_B_DQ_37 DDR_B_DQ_38 DDR_B_DQ_39 DDR_B_DQ_40 DDR_B_DQ_41 DDR_B_DQ_42 DDR_B_DQ_43 DDR_B_DQ_44 DDR_B_DQ_45 DDR_B_DQ_46 DDR_B_DQ_47 DDR_B_DQ_48 DDR_B_DQ_49 DDR_B_DQ_50 DDR_B_DQ_51 DDR_B_DQ_52 DDR_B_DQ_53 DDR_B_DQ_54 DDR_B_DQ_55 DDR_B_DQ_56 DDR_B_DQ_57 DDR_B_DQ_58 DDR_B_DQ_59 DDR_B_DQ_60 DDR_B_DQ_61 DDR_B_DQ_62 DDR_B_DQ_63 AN7 AN8 AW5 AW7 AN5 AN6 AN9 AU7 AT11 AU11 AP13 AR13 AR11 AU9 AV12 AU12 AU15 AV13 AU17 AT17 AU13 AM13 AV15 AW17 AV24 AT23 AT26 AP26 AU23 AW23 AR24 AN26 AW37 AV38 AN36 AN37 AU35 AR35 AN35 AR37 AM35 AM38 AJ34 AL38 AR39 AM34 AL37 AL32 AG38 AJ38 AF35 AF33 AJ37 AJ35 AG33 AF34 AD36 AC33 AA34 AA36 AD34 AF38 AC34 AA33 DATA_B0 DATA_B1 DATA_B2 DATA_B3 DATA_B4 DATA_B5 DATA_B6 DATA_B7 DATA_B8 DATA_B9 DATA_B10 DATA_B11 DATA_B12 DATA_B13 DATA_B14 DATA_B15 DATA_B16 DATA_B17 DATA_B18 DATA_B19 DATA_B20 DATA_B21 DATA_B22 DATA_B23 DATA_B24 DATA_B25 DATA_B26 DATA_B27 DATA_B28 DATA_B29 DATA_B30 DATA_B31 DATA_B32 DATA_B33 DATA_B34 DATA_B35 DATA_B36 DATA_B37 DATA_B38 DATA_B39 DATA_B40 DATA_B41 DATA_B42 DATA_B43 DATA_B44 DATA_B45 DATA_B46 DATA_B47 DATA_B48 DATA_B49 DATA_B50 DATA_B51 DATA_B52 DATA_B53 DATA_B54 DATA_B55 DATA_B56 DATA_B57 DATA_B58 DATA_B59 DATA_B60 DATA_B61 DATA_B62 DATA_B63 DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 DQM_B[0 7] D 14 DATA_B[0 63] 14 C B Place close to GMCH VCC_DDR C173 C2.2U6.3Y3 C162 X_C2.2U6.3Y3 C167 C2.2U6.3Y3 C146 C2.2U6.3Y3 C222 C2.2U6.3Y3 C192 C2.2U6.3Y3 BRLK_B_CRB SCROMP1,3 CLOSED TO VCC_DDR VCC_DDR R232 1KR1%/2 DDR_RCOMPVOL R223 R227 R184 R182 DDR_RCOMPVOL = 0.2 * VCC_DDR A R230 3.01KR1%/2 VCC_DDR R228 1KR1%/2 C197 22p/4/N C297 0.01u/25V/4/X 19.1R1%/2 19.1R1%/2 19.1R1%/2 19.1R1%/2 DDR_RCOMPVOH DDR_RCOMPVOH = 0.8 * VCC_DDR MICRO-STAR INT'L CO.,LTD C291 0.01u/25V/4/X MS-7345 Size Custom Document Description Rev 1.2 Bearlake - Memory Sheet Date: Friday, May 18, 2007 A C289 0.1u/16V/Y/4 MSI SRCOMP0 SRCOMP1 SRCOMP2 SRCOMP3 of 35 D VCCD_CRT For non-Graphic sku change to 0-ohm (0402) C254 0.1u/16V/Y/4 VCCDQ_CRT For non-Graphic sku change to 0-ohm (0603) C252 C1U16Y3 L25 X_L10U_100mA_0805 R221 1R1%/2 C271 X_C10U10Y5 L16 X_L10U_100mA_0805 VCCA_MPLL R198 1R1%/2 CP7 X_COPPER If non-Graphic sku Remove these resisters L17 X_L10U_100mA_0805 CP8 X_COPPER C244 C2.2U6.3Y3 H_VCCPLL H_VCCPLL R204 R205 0/4 0/4 C240 0.1u/16V/Y/4 VCCDQ_CRT VCCD_CRT VCCA_GPLL VCCA_MPLL VCCA_HPLL VCCA_DPLLA VCCA_DPLLB V_3P3_DAC_FILTERED L18 X_L10U_100mA_0805 V_1P25_CORE CP9 X_COPPER VCCA_DPLLA C250 X_C10U10Y5 C248 0.1u/16V/Y/4 L19 X_L10U_100mA_0805 VCC3 VCC_DDR L15 X_L10U_100mA_0805 R178 R177 CP5 X_COPPER V_1P25_CORE VCCDQ_CRT VCCD_CRT VCCA_EXPPLL VCCA_MPLL VCCA_HPLL VCCA_DPLLA VCCA_DPLLB B16 C17 VCCA_DAC_1 VCCA_DAC_2 B17 A16 VCCA_EXP VCC3_3 VCCA_EXP 1R1%/2 1R1%/2 C203 10u/10V/8 C204 C1U16Y3 BB42 BB41 BA43 BA42 AY42 VCCA_DPLLB C255 X_C10U10Y5 C251 0.1u/16V/Y/4 AV18 AV26 AW20 AW24 AY32 BB12 BB16 BB18 BB20 BB24 BB26 BB28 BB32 BB37 BB39 BC14 BC18 BC22 BC26 BC30 BC34 BC39 CP11 X_COPPER L6 N11 N12 N3 N6 N8 N9 VCC_CKDDR_5 VCC_CKDDR_4 VCC_CKDDR_3 VCC_CKDDR_2 VCC_CKDDR_1 VCC_DDR_1 VCC_DDR_2 VCC_DDR_3 VCC_DDR_4 VCC_DDR_5 VCC_DDR_6 VCC_DDR_7 VCC_DDR_8 VCC_DDR_9 VCC_DDR_10 VCC_DDR_11 VCC_DDR_12 VCC_DDR_13 VCC_DDR_14 VCC_DDR_15 VCC_DDR_16 VCC_DDR_17 VCC_DDR_18 VCC_DDR_19 VCC_DDR_20 VCC_DDR_21 VCC_DDR_22 B B21 C21 B15 A24 C23 A22 C22 VCCA_HPLL VCC_CL VCC_CL_77 VCC_CL_76 VCC_CL_75 VCC_CL_73 VCC_CL_72 VCC_CL_71 VCC_CL_70 VCC_CL_69 VCC_CL_68 VCC_CL_67 VCC_CL_66 VCC_CL_65 VCC_CL_64 VCC_CL_63 VCC_CL_62 VCC_CL_61 VCC_CL_60 VCC_CL_59 VCC_CL_58 VCC_CL_57 VCC_CL_56 VCC_CL_55 VCC_CL_54 VCC_CL_53 VCC_CL_52 VCC_CL_51 VCC_CL_50 VCC_CL_49 VCC_CL_48 VCC_CL_47 VCC_CL_46 VCC_CL_45 VCC_CL_44 VCC_CL_43 VCC_CL_42 VCC_CL_41 VCC_CL_40 VCC_CL_39 VCC_CL_38 VCC_CL_37 VCC_CL_36 VCC_CL_35 VCC_CL_34 VCC_CL_33 VCC_CL_32 VCC_CL_31 VCC_CL_30 VCC_CL_29 VCC_CL_28 VCC_CL_27 VCC_CL_26 VCC_CL_25 VCC_CL_24 VCC_CL_23 VCC_CL_22 VCC_CL_21 VCC_CL_20 VCC_CL_19 VCC_CL_18 VCC_CL_17 VCC_CL_16 VCC_CL_15 VCC_CL_14 VCC_CL_13 VCC_CL_12 VCC_CL_11 VCC_CL_10 VCC_CL_9 VCC_CL_8 VCC_CL_7 VCC_CL_6 VCC_CL_5 VCC_CL_4 VCC_CL_3 VCC_CL_2 VCC_CL_1 V_1P25_CORE C238 10u/10V/8 R197 1R1%/2 VCC_DDR A L23 L0.1U_50mA C265 X_C10U10Y5 V_FSB_VTT VCCA_EXP R215 C267 0.1u/16V/Y/4 1R1%/2 C264 0.01u/25V/4/X VCC_EXP_1 VCC_EXP_2 VCC_EXP_3 VCC_EXP_4 VCC_EXP_5 VCC_EXP_6 VCC_EXP_7 VCC_EXP_8 VCC_EXP_9 VCC_EXP_10 VCC_EXP_11 VCC_EXP_12 VCC_EXP_13 C V_1P25_CORE L28 X_FB80/8 V_1P25_PCIE B CP13 X_COPPER Separate when AMT is supported V_FSB_VTT V_1P25_CORE V_1P25_CORE V_1P25_CORE V_3P3_DAC_FILTERED C226 X_1u/6.3V/4 C160 10u/10V/8 C711 10u/10V/8 C295 0.1u/16V/Y/4 C290 0.1u/16V/Y/4 For non-Graphic sku Cxx change to 0-ohm Rxx unstuff C166 X_1u/6.3V/4 C198 X_1u/6.3V/4 C710 X_10u/10V/8 C719 X_0.1u/16V/Y/4 C275 0.1u/16V/Y/4 C190 1u/6.3V/4 C185 1u/6.3V/4 C716 X_10u/10V/8 C278 0.1u/16V/Y/4 C247 0.1u/16V/Y/4 C184 X_1u/6.3V/4 C179 X_0.1u/16V/Y/4 C713 X_10u/10V/8 C722 X_0.1u/16V/Y/4 C277 0.1u/16V/Y/4 C225 X_1u/6.3V/4 C223 X_0.1u/16V/Y/4 C714 X_10u/10V/8 C280 0.1u/16V/Y/4 C279 0.1u/16V/Y/4 C178 X_1u/6.3V/4 C189 X_0.1u/16V/Y/4 C715 X_10u/10V/8 C717 X_0.1u/16V/Y/4 C721 X_0.1u/16V/Y/4 C224 X_1u/6.3V/4 C709 X_10u/10V/8 C276 0.1u/16V/Y/4 C720 X_0.1u/16V/Y/4 C191 X_1u/6.3V/4 C712 10u/10V/8 C294 0.1u/16V/Y/4 C718 X_0.1u/16V/Y/4 AC2 AC3 AC4 AD1 AD10 AD11 AD2 AD4 AD5 AD6 AD7 AD8 AD9 D OF BRLK_B_CRB A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 Bearlake - Power Date: Friday, May 18, 2007 P14 P15 P20 R14 R15 R17 R18 U10 U13 U14 U15 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 U3 U6 U9 V10 V12 V13 V14 V15 V17 V18 V19 V20 V21 V22 V23 V24 V25 V26 V27 V9 W17 W18 W19 W21 W23 W25 W26 W27 Y11 Y13 Y14 Y15 Y17 Y18 Y20 Y22 Y24 Y26 Y27 Y6 V_1P25_CORE CP17 X_COPPER VCC3 V_1P25_CORE VCC_111 VCC_112 VCC_113 VCC_114 VCC_115 VCC_116 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_126 VCC_127 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_154 VCC_155 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCC_161 VCC_162 VCC_163 VCC_164 VCC_165 VCC_166 VCC_167 VCC_168 VCC_169 VCC_170 VCC_171 POWER VSS V_1P25_CORE C269 0.1u/16V/Y/4 VTT_FSB_1 VTT_FSB_2 VTT_FSB_3 VTT_FSB_4 VTT_FSB_5 VTT_FSB_6 VTT_FSB_7 VTT_FSB_8 VTT_FSB_9 VTT_FSB_10 VTT_FSB_11 VTT_FSB_12 VTT_FSB_13 VTT_FSB_14 VTT_FSB_15 VTT_FSB_16 VTT_FSB_17 VTT_FSB_18 VTT_FSB_19 VTT_FSB_20 VTT_FSB_21 VTT_FSB_22 VTT_FSB_23 VTT_FSB_24 VTT_FSB_25 VTT_FSB_26 VTT_FSB_27 VTT_FSB_28 VTT_FSB_29 VTT_FSB_30 VTT_FSB_31 VTT_FSB_32 VTT_FSB_33 VTT_FSB_34 VTT_FSB_35 VTT_FSB_36 VTT_FSB_37 VTT_FSB_38 VTT_FSB_39 VTT_FSB_40 VTT_FSB_41 VTT_FSB_42 VTT_FSB_43 VTT_FSB_44 VTT_FSB_45 VTT_FSB_46 Y32 Y31 Y30 Y29 AL9 AL8 AL7 AL6 AL5 AL29 AL27 AL26 AL24 AL23 AL21 AL20 AL18 AL17 AL15 AL13 AL12 AL11 AL10 AK30 AK3 AK29 AK27 AK26 AK24 AK23 AK21 AK20 AK2 AK18 AK17 AK15 AK14 AK1 AJ4 AJ31 AJ30 AJ3 AJ29 AJ27 AJ26 AJ24 AJ23 AJ21 AJ20 AJ2 AJ18 AJ17 AJ15 AJ14 AJ13 AG31 AG30 AG29 AG27 AG26 AG25 AF31 AF30 AF29 AF27 AD32 AD31 AD30 AD29 AC32 AC31 AC30 AC29 AA32 AA31 AA30 AA29 C VCCA_GPLL R219 1R1%/2 CP12 X_COPPER A28 A30 B27 B28 B29 B30 C27 C29 C30 D27 D28 D29 E23 E26 E27 E29 F23 F24 F26 G23 G24 G26 H23 H24 J23 J24 K23 K24 L23 L24 M23 M24 M29 N23 N24 N26 N29 P23 P24 P26 P27 P29 R23 R24 R26 R27 V30 V_1P25_CORE U12F VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 V_FSB_VTT VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110 NB POWER AA13 AA14 AA15 AA17 AA19 AA21 AA23 AA25 AA26 AA27 AA3 AB17 AB18 AB20 AB22 AB24 AB26 AB27 AC13 AC14 AC15 AC17 AC19 AC21 AC23 AC25 AC26 AC27 AC6 AD14 AD15 AD17 AD18 AD20 AD22 AD24 AD26 AD27 AE17 AE19 AE21 AE23 AE25 AE26 AE27 AF1 AF11 AF12 AF13 AF14 AF15 AF17 AF18 AF2 AF20 AF22 AF24 AF25 AF26 AF3 AG10 AG11 AG12 AG13 AG14 AG15 AG17 AG18 AG19 AG2 AG20 AG21 AG22 AG23 AG24 AG3 AG4 AG5 AG6 AG7 AG8 AG9 AH1 AH2 AH4 AJ10 AJ11 AJ12 AJ5 AJ6 AJ7 AJ8 AJ9 C13 C9 D4 F11 F9 G2 J2 J3 J6 V_1P25_CORE Sheet of 35 VSS_297 VSS_296 VSS_295 VSS_294 VSS_293 VSS_292 VSS_291 VSS_290 VSS_289 VSS_288 VSS_287 VSS_286 VSS_285 VSS_284 VSS_283 VSS_282 VSS_281 VSS_280 VSS_279 VSS_278 VSS_277 VSS_276 VSS_275 VSS_274 VSS_273 VSS_272 VSS_271 VSS_270 VSS_269 VSS_268 VSS_267 VSS_266 VSS_265 VSS_264 VSS_263 VSS_262 VSS_261 VSS_260 VSS_259 VSS_258 VSS_257 VSS_256 VSS_255 VSS_254 VSS_253 VSS_252 VSS_251 VSS_250 VSS_249 VSS_248 VSS_247 VSS_246 VSS_245 VSS_244 VSS_243 VSS_242 VSS_241 VSS_240 VSS_239 VSS_238 VSS_237 VSS_236 VSS_235 VSS_234 VSS_233 VSS_232 VSS_231 U12G A12 A18 A26 A3 A34 A39 A41 A5 A7 AA18 AA20 AA22 AA24 AA35 AA38 AA5 AA8 AB1 AB19 AB2 AB21 AB23 AB25 AB43 AC10 AC18 AC20 AC22 AC24 AC35 AC38 AC5 AC7 AD19 AD21 AD23 AD25 AD33 AD35 AD37 AD39 AD42 AE18 AE2 AE20 AE22 AE24 AE3 AE4 AF10 AF19 AF21 AF23 AF36 AF37 AF43 AF5 AF6 AF7 AF8 AF9 AG34 AG37 AH42 AJ32 AJ33 AJ36 AJ39 AK43 AL31 AL33 AL36 AM11 AM20 AM23 AM24 C GND AM29 AM33 AM36 AM4 AM40 AM42 AM7 AM9 AN11 AN12 AN13 AN20 AN23 AN24 AN29 AN31 AN38 AN4 AP1 AP18 AP24 AP43 AR17 AR20 AR21 AR23 AR26 AR27 AR32 AR33 AR38 AR6 AR9 AT12 AT13 AT15 AT29 AT31 AU20 AU24 AU32 AU38 AU4 AU42 AU6 AV11 AV17 AV2 AV21 AV23 AV27 AV35 AV37 AV7 AV9 AW41 AW43 AY4 AY40 AY41 B10 B14 B19 B22 B23 B26 B31 B32 B37 BA1 BB7 A D VSS_223 VSS_222 VSS_221 VSS_220 VSS_219 VSS_218 VSS_217 VSS_216 VSS_215 VSS_214 VSS_213 VSS_212 VSS_211 VSS_210 VSS_209 VSS_208 VSS_207 VSS_206 VSS_205 VSS_204 VSS_203 VSS_202 VSS_201 VSS_200 VSS_199 VSS_198 VSS_197 VSS_196 VSS_195 VSS_194 VSS_193 VSS_192 VSS_191 VSS_190 VSS_189 VSS_188 VSS_187 VSS_186 VSS_185 VSS_184 VSS_183 VSS_182 VSS_181 VSS_180 VSS_179 VSS_178 VSS_177 VSS_176 VSS_175 VSS_174 VSS_173 VSS_172 VSS_171 VSS_170 VSS_169 VSS_168 VSS_167 VSS_166 VSS_165 VSS_164 VSS_163 VSS_162 VSS_161 VSS_160 VSS_159 VSS_158 VSS_157 VSS_156 VSS_155 VSS_154 VSS_153 VSS_152 VSS_151 VSS_150 VSS_149 VSS_148 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 B VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 M10 M1 L7 L5 L40 L33 D VSS_229 VSS_228 VSS_227 VSS_226 VSS_225 VSS_224 Y7 Y5 Y42 Y37 Y35 Y33 Y25 Y23 Y21 Y19 Y10 Y1 W3 W24 W22 W20 V8 V5 V43 V39 V37 V34 V32 V29 V2 V11 U8 U7 U5 U38 U35 U29 U27 T42 T1 R8 R5 R36 R33 R31 R3 R21 R11 P43 P30 P21 P2 P18 P17 N7 N5 N36 N33 N31 N27 N21 N13 N10 M7 M37 M35 M33 M27 M21 M20 M17 M15 L32 L31 L3 L29 L21 L20 L11 K43 K26 K21 K2 K18 K13 K12 J9 J7 J5 J38 J35 J32 J27 J21 H31 H29 H21 H20 H17 H15 H13 G9 G7 G42 G38 G32 G21 G13 G12 G11 G1 F37 F35 F3 F27 F21 F18 F15 E9 E43 E32 E3 E24 E21 E11 E1 D40 D31 D3 D21 D17 D16 D15 C6 C5 C43 C4 C26 C11 C1 BC5 BC41 BC37 BC32 BC3 BC28 BC24 BC10 C B OF BRLK_B_CRB A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 Bearlake - GND Sheet Date: Friday, May 18, 2007 of 35 U21B PCI PGNT#0 PGNT#1 PGNT#2 PGNT#0 PGNT#1 PGNT#2 PGNT#3 H5 A7 C7 F7 GNTB0 GNTB1_GP51 GNTB2_GP53 GNTB3_GP55 22 22 22,25 22 PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#0 K7 PREQ#1 G13 PREQ#2 F13 PREQ#3 G8 REQB_0 REQB1_GP50 REQB2_GP52 REQB3_GP54 22 22 22,25 22 V1_5SET_0 V1_5SET_1 V1_05SET 22 PIRQ#A PIRQ#B PIRQ#C PIRQ#D 22 22 25 26 26 26 PAR DEVSELB PCICLK PCIRSTB IRDYB PMEB SERRB STOPB PLOCKB TRDYB PERRB FRAMEB PIRQ#H PIRQ#A PIRQ#B PIRQ#C PIRQ#D V1_5SET_0 V1_5SET_1 V1_05SET PIRQ#H J5 E1 F1 A3 K6 L7 F2 G2 PIRQAB PIRQBB PIRQCB PIRQDB GP2_PIRQEB GP3_PIRQFB GP4_PIRQGB GP5_PIRQHB AD_0 AD_1 AD_2 AD_3 AD_4 AD_5 AD_6 AD_7 AD_8 AD_9 AD_10 AD_11 AD_12 AD_13 AD_14 AD_15 AD_16 AD_17 AD_18 AD_19 AD_20 AD_21 AD_22 AD_23 AD_24 AD_25 AD_26 AD_27 AD_28 AD_29 AD_30 AD_31 CXBEB_0 CXBEB_1 CXBEB_2 CXBEB_3 F11 G9 C4 E8 C_BE#0 C_BE#1 C_BE#2 C_BE#3 AD[31 0] 6 6 6 6 6 6 6 6 22,25 DMI_MTN_IRN_0 DMI_MTP_IRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_0 DMI_MTN_IRN_1 DMI_MTP_IRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_1 DMI_MTN_IRN_2 DMI_MTP_IRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_2 DMI_MTN_IRN_3 DMI_MTP_IRP_3 DMI_ITN_MRN_3 DMI_ITP_MRP_3 19 PE_RN6_ICH 19 PE_RP6_ICH 19 HSO_N6 19 HSO_P6 21 PE_RN1 21 PE_RP1 21 HSO_N1 21 HSO_P1 21 PE_RN2 21 PE_RP2 21 HSO_N2 21 HSO_P2 C_BE#[3 0] 22,25 23 23 23 23 OF ICH9R PE_RXN5 PE_RXP5 PE_TXN5 PE_TXP5 DMI_MTN_IRN_0 DMI_MTP_IRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_0 DMI_MTN_IRN_1 DMI_MTP_IRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_1 DMI_MTN_IRN_2 DMI_MTP_IRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_2 DMI_MTN_IRN_3 DMI_MTP_IRP_3 DMI_ITN_MRN_3 DMI_ITP_MRP_3 W28 W26 V30 V29 AA26 AA28 Y30 Y29 AC26 AC28 AB30 AB29 AF26 AE26 AD29 AD30 DMIORXN DMIORXP DMIOTXN DMIOTXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP PE_RN6_ICH PE_RP6_ICH HSO_N6 C459 0.1u/16V/Y/4 HSO_P6 C455 0.1u/16V/Y/4 D29 D30 PE_TN6 E26 PE_TP6 E28 PE_RN1P30 PE_RP1 P29 HSO_N1 C431 0.1u/16V/Y/4 PE_TN1 R26 HSO_P1 C426 0.1u/16V/Y/4 PE_TP1 R28 PE_RN2M30 PE_RP2M29 HSO_N2 C437 0.1u/16V/Y/4 PE_TN2 N26 HSO_P2 C434 0.1u/16V/Y/4 PE_TP2 N28 PE_RN3 K30 PE_RP3 K29 PE_TN3 L26 PE_TP3 L28 PE_RN4 H30 PE_RP4 H29 PE_TN4 J26 PE_TP4 J28 PE_RXN5 F30 PE_RXP5 F29 PE_TXN5C446 0.1u/16V/Y/4 PE_TN5G26 PE_TXP5C443 0.1u/16V/Y/4 PE_TP5 G28 PER6N_GLAN_RXN PER6N_GLAN_RXP PER6N_GLAN_TXN PER6N_GLAN_TXP PER1N PER1P PET1N PET1P PER2N PER2P PET2N PET2P PER3N PER3P PET3N PET3P PER4N PER4P PET4N PET4P PER5N PER5P PET5N PET5P USB D CK_P_33M_ICH R411 33R/2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P C V_1P5_ICH R278 15 CK_PE_100M_ICH_DN 15 CK_PE_100M_ICH_DP 24.9R1%/2 12 mils width AF28 AF30 DMIRCOMPO DMICOMPI CK_PE_100M_ICH_DN CK_PE_100M_ICH_DP U26 U25 DMICLK100N DMICLK100P USB0USB0+ USB1USB1+ USB2USB2+ USB3USB3+ USB4USB4+ USB5USB5+ USB6USB6+ USB7USB7+ USB8USB8+ USB9USB9+ USB10USB10+ USB11USB11+ AD6 AD5 AE3 AE2 AD1 AD2 AB6 AB5 AC3 AC2 AB1 AB2 Y6 Y5 AA3 AA2 Y1 Y2 V6 V5 W2 W3 V1 V2 USB0USB0+ USB1USB1+ USB2USB2+ USB3USB3+ USB4USB4+ USB5USB5+ USB6USB6+ USB7USB7+ USB8USB8+ USB9USB9+ USB10USB10+ USB11USB11+ 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 D Place near SB OC0B_GB59 OC1B_GP40 OC2B_GP41 OC3B_GP42 OC4B_GP43 OC5B_GP29 OC6B_GP30 OC7B_GP31 OC8B_GP44 OC9B_GB45 OC10B_GB46 OC11B_GB47 PCI-E 22,25 PAR 22,25 DEVSEL# 15 CK_P_33M_ICH 22 PCIRST_ICH9# 22,25 IRDY# 22,25 PCI_PME# 22 SERR# 22,25 STOP# 22 LOCK# 22,25 TRDY# 22,25 PERR# 22,25 FRAME# C10 C8 E9 C9 A5 E12 E10 B7 B6 B4 E7 A4 H12 F8 C5 D2 E5 G7 E11 G10 G6 D3 H6 G5 C1 C2 C3 D1 J7 F3 G1 H3 DMI U21A E3 C6 B3 R2 J8 R3 K5 F10 H8 E6 F5 G12 P5 N3 P7 R7 N2 N1 N5 M1 P3 R6 T7 P1 OC#0 OC#4 C528 0.1u/16V/Y/4 24 24 C532 0.1u/16V/Y/4 C538 0.1u/16V/Y/4 C534 0.1u/16V/Y/4 C522 0.1u/16V/Y/4 USBRBIASN USBRBIASP AG1 AG2 CLK48 AG3 USBRBIAS_ICH R350 CK_48M_USB_ICH OC#6 24 OC#8 OC#10 24 24 C 22.6/4/1 CK_48M_USB_ICH 15 OF ICH9R 11,13,15,21,26,28 SMBCLK 11,13,15,21,26,28 SMBDATA SMBCLK SMBDATA VCC3 R428 R371 1KR1%/2 X_1KR/2 PGNT#0 SPI_CS1# 3VSB 11,19,21,23 WAKE# SPI_CS1# WAKE# 11 PCIE_1PORT_S1_HSO_P1 PCIE_1PORT_S1_HSO_N1 BOOT SELECT STRAPS BOOT DEVICE GNT#0 SPI_CS1# FWH 1 X PCI 12V 12V#B2 RSVD GND SMCLK SMDATA GND#B7 3.3V JTAG1 3.3VAUX WAKE_# B12 B13 B14 B15 B16 B17 B18 RSVD#B12 GND#B13 HSOP0+ HSOP0GND#B16 PRSNT2_# GND#B18 PRSNT1_# 12V#A2 12V#A3 GND#A4 JTAG2 JTAG3 JTAG4 JTAG5 3.3V#A9 3.3V#A10 PWRGD X1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 X1 GND#A12 REFCLK+ REFCLKGND#A15 HSIP0+ HSIP0GND#A18 X2 A12 A13 A14 A15 A16 A17 A18 X2 C461 C460 0.1u/16V/Y/4 +12V U19 PCIE1_LED VCC3 PLTRST_BU1# PLTRST_BU1# 16,21 CK_1PORT_S1_DP CK_1PORT_S1_DN CK_1PORT_S1_DP 15 CK_1PORT_S1_DN 15 C403 C436 C425 38 37 PCIE_4PORT_HSI_P4 PCIE_4PORT_HSI_N4 HSO_P4B C444 0.1u/16V/Y/4 HSO_N4B C442 0.1u/16V/Y/4 A0 A1 2B1 3B1 36 35 PE_RP4 PE_RN4 A2 A3 0B2 1B2 34 33 2B2 3B2 32 31 4B1 5B1 29 28 PCIE_4PORT_HSI_P3 PCIE_4PORT_HSI_N3 HSO_P3B C421 0.1u/16V/Y/4 HSO_N3B C415 0.1u/16V/Y/4 PCIEX4_PRSNT# SEL GND PCIE_1PORT_S1_HSI_P1 PCIE_1PORT_S1_HSI_N1 11 12 A4 A5 6B1 7B1 27 26 PE_RP3 PE_RN3 15 16 A6 A7 4B2 5B2 25 24 6B2 7B2 23 22 10 14 17 19 21 39 41 43 PCI_E2 V_1P5_ICH PCIE_4PORT_HSO_P4 PCIE_4PORT_HSO_N4 PCIE_4PORT_HSO_P4 21 PCIE_4PORT_HSO_N4 21 PCIE_4PORT_HSI_P4 21 PCIE_4PORT_HSI_N4 21 PCIE_1PORT_S2_HSO_P1 PCIE_1PORT_S2_HSO_N1 B PE_TP3 PE_TN3 PCIe_x1_Slot FB14 FB80/8 C445 0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 HSO_P4 C454 0.1u/16V/Y/4 HSO_N4 C447 0.1u/16V/Y/4 0B1 1B1 PE_TP4 PE_TN4 GND GND GND GND GND GND GND GND GND 43 SPI B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 PCIE_SWITCH_PWR VDD VDD VDD VDD VDD VDD VDD VDD +12V B PCIE X SLOT AND SWITCH PCI_E1 13 18 20 30 40 42 SB STRAPPING RESISTOR PCIE_1PORT_S2_HSI_P1 PCIE_1PORT_S2_HSI_N1 HSO_P3 HSO_N3 C435 0.1u/16V/Y/4 C429 0.1u/16V/Y/4 PCIE_4PORT_HSO_P3 PCIE_4PORT_HSO_N3 PCIE_4PORT_HSO_P3 21 PCIE_4PORT_HSO_N3 21 PCIE_4PORT_HSI_P3 21 PCIE_4PORT_HSI_N3 21 PCIE_1PORT_S1_HSO_P1 PCIE_1PORT_S1_HSO_N1 PCIE_1PORT_S1_HSI_P1 PCIE_1PORT_S1_HSI_N1 PI2PCIE412-CZHE_TQFN42-LF PCIE_SWITCH_PWR R448 X_1KR/2 3VSB SMBCLK SMBDATA A SIGNAL GNT3 H DIS GNT2 N/A L DES VCC3 EN A16 OVERIDE 3VSB SET BIT PCIE PORT CONFIG BIT (5-6) WAKE# PCIE_1PORT_S2_HSO_P1 PCIE_1PORT_S2_HSO_N1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 12V 12V#B2 RSVD GND SMCLK SMDATA GND#B7 3.3V JTAG1 3.3VAUX WAKE_# RSVD#B12 GND#B13 HSOP0+ HSOP0GND#B16 PRSNT2_# GND#B18 PRSNT1_# 12V#A2 12V#A3 GND#A4 JTAG2 JTAG3 JTAG4 JTAG5 3.3V#A9 3.3V#A10 PWRGD X1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 X1 GND#A12 REFCLK+ REFCLKGND#A15 HSIP0+ HSIP0GND#A18 X2 A12 A13 A14 A15 A16 A17 A18 X2 VCC3 +12V R328 4.7K/5%/04 +12V PCIE2_LED R361 10KR/2 R651 2KR0805 VCC3 PLTRST_BU1# C PCIE1_LED 16,21 LED-B_1608 CK_1PORT_S2_DP CK_1PORT_S2_DN CK_1PORT_S2_DP 15 CK_1PORT_S2_DN 15 Q50 2N3904 B LED15 A PCIEX4_PRSNT# C PGNT#3 +12V PCIEX1# PCIEX1# R337 10KR/2 B E X_1KR/2 C R427 Q49 2N3904 A E PGNT#2 +12V PCIE_1PORT_S2_HSI_P1 PCIE_1PORT_S2_HSI_N1 R652 2KR0805 MICRO-STAR INT'L CO.,LTD LED16 A PCIe_x1_Slot MS-7345 MSI C PCIE2_LED Size Custom LED-B_1608 Document Description Rev 1.2 ICH9 - PCI, DMI, USB, PCIE & Slots Sheet Date: Friday, May 18, 2007 10 of 35 PCI SLOT (PCI VER: 2.2 COMPLY) PCI SLOT (PCI VER: 2.2 COMPLY) -12V -12V +12V +12V PCI1 VCC5 PIRQ#B PIRQ#D D VCC3 15 CK_P_33M_S1 10 PREQ#0 CK_P_33M_S1 PREQ#0 AD31 AD29 AD27 AD25 C_BE#3 AD23 AD21 AD19 AD17 C_BE#2 IRDY# DEVSEL# C LOCK# PERR# SERR# C_BE#1 AD14 AD12 AD10 AD8 AD7 AD5 AD3 AD1 ACK#64 PCI2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 X1 -12V TRST# TCK +12V GND TMS TDO TDI +5V +5V +5V INTA# INTB# INTC# INTD# +5V PRSNT#1 RESERVED RESERVED#B10 +5V(I/O) PRSNT#2 RESERVED#A11 GND GND GND GND RESERVED#B14 3.3VAUX GND RST# CLK +5V(I/O)#A16 GND GNT# REQ# GND +5V(I/O)#B19 PME# AD31 AD30 AD29 +3.3V GND AD28 AD27 AD26 AD25 GND +3.3V AD24 C/BE#3 IDSEL AD23 +3.3 GND AD22 AD21 AD20 AD19 GND +3.3V AD18 AD17 AD16 C/BE#2 +3.3V GND FRAME# IRDY# GND +3.3V TRDY# DEVSEL# GND GND STOP# LOCK# +3.3V PERR# SMBCLK +3.3V SMBDAT SERR# GND +3.3V PAR C/BE#1 AD15 AD14 +3.3V GND AD13 AD12 AD11 AD10 GND GND AD9 X1 X2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 X2 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O)#B59 ACK64# +5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 +3.3V AD6 AD4 GND AD2 AD0 +5V(I/O)#A59 REQ64# +5V +5V VCC5 PIRQ#A PIRQ#C PIRQ#C PIRQ#A VCC5 VCC3 VCC3 PCI1_LED 3VSB PCIRST_ICH9# PGNT#0 15 CK_P_33M_S2 PGNT#0 10 PCI_PME# AD30 C635 X_10P/4 AD28 AD26 AD24 ID1 R475 10 EMI 10 PREQ#1 330R/2 AD16 C_BE#3 AD23 AD21 AD19 AD18 AD16 TRDY# STOP# PREQ#1 AD27 AD25 AD22 AD20 FRAME# CK_P_33M_S2 AD31 AD29 AD17 C_BE#2 FRAME# 10,25 TRDY# 10,25 STOP# 10,25 PAR 10,25 IRDY# DEVSEL# LOCK# PERR# SERR# PAR AD15 C_BE#1 AD14 AD13 AD11 AD12 AD10 AD9 C_BE#0 AD8 AD7 AD6 AD4 AD5 AD3 AD2 AD0 AD1 REQ#64 ACK#64 SLOT-PCI120_WHITE-RH B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 X1 -12V TRST# TCK +12V GND TMS TDO TDI +5V +5V +5V INTA# INTB# INTC# INTD# +5V PRSNT#1 RESERVED RESERVED#B10 +5V(I/O) PRSNT#2 RESERVED#A11 GND GND GND GND RESERVED#B14 3.3VAUX GND RST# CLK +5V(I/O)#A16 GND GNT# REQ# GND +5V(I/O)#B19 PME# AD31 AD30 AD29 +3.3V GND AD28 AD27 AD26 AD25 GND +3.3V AD24 C/BE#3 IDSEL AD23 +3.3 GND AD22 AD21 AD20 AD19 GND +3.3V AD18 AD17 AD16 C/BE#2 +3.3V GND FRAME# IRDY# GND +3.3V TRDY# DEVSEL# GND GND STOP# LOCK# +3.3V PERR# SMBCLK +3.3V SMBDAT SERR# GND +3.3V PAR C/BE#1 AD15 AD14 +3.3V GND AD13 AD12 AD11 AD10 GND GND AD9 X1 X2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 X2 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O)#B59 ACK64# +5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 +3.3V AD6 AD4 GND AD2 AD0 +5V(I/O)#A59 REQ64# +5V +5V PIRQ#B PIRQ#D D VCC5 VCC3 PCI2_LED PCIRST_ICH9# PGNT#1 3VSB PGNT#1 10 PCI_PME# AD30 AD28 AD26 AD24 ID2 R536 330R/2 AD17 AD22 AD20 VCC5 AD18 AD16 R649 220R0805 FRAME# TRDY# LED13 C PCI1_LED A STOP# C LED-B_1608 PAR AD15 VCC5 AD13 AD11 AD9 R650 220R0805 C_BE#0 LED14 C PCI2_LED A AD6 AD4 LED-B_1608 AD2 AD0 REQ#64 SLOT-PCI120_WHITE-RH IDSEL = AD16 MASTER = PREQ#0 PIRQ#A B 10,25 AD[31 0] 10,25 C_BE#[3 0] AD[31 0] C_BE#[3 0] PCI PULL-UP / DOWN RESISTORS IDSEL = AD17 MASTER = PREQ#1 PIRQ#B B PCI SLOT DECOUPLING CAPACITORS VCC5 VCC5 RN57 10 10 10,25 10 PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#0 PREQ#1 PREQ#2 PREQ#3 VCC5 8P4R-2.7KR/2 10,25 STOP# 10 LOCK# 10,25 PERR# 10 SERR# STOP# LOCK# PERR# SERR# 10 10 10,25 10 8P4R-2.7KR/2 REQ#64 ACK#64 10,25 PCI_PME# PCI_PME# R474 R513 4.7K/5%/04 4.7K/5%/04 R535 X_4.7KR/2 0.1u/16V/Y/4 VCC5 RN63 PIRQ#B PIRQ#A PIRQ#C PIRQ#D PIRQ#B PIRQ#A PIRQ#C PIRQ#D EC66 560u/4V/8*9/O C631 EC65 100u/16V/6.3*10.5/O C672 X_C180P50N2 RN69 + + 8P4R-2.7KR/2 A VCC3 FRAME# IRDY# TRDY# DEVSEL# FRAME# IRDY# TRDY# DEVSEL# C675 0.1u/16V/Y/4 RN67 10,25 10,25 10,25 10,25 A 8P4R-2.7KR/2 10 3VSB PIRQ#H PIRQ#H R220 MICRO-STAR INT'L CO.,LTD 2.7KR/2 MS-7345 MSI Size Custom Document Description Rev 1.2 PCI Slot & Sheet Date: Friday, May 18, 2007 22 of 35 Hi-Speed PCIE to SATA/PATA Bridge H_DD15 H_DD0 H_DD14 H_DD1 H_DD11 H_DD4 H_DD10 H_DD5 H_DD9 H_DD6 H_DD8 H_DD7 H_DD13 H_DD2 H_DD12 H_DD3 C JM_IDELED# H_DIOW_N H_IORDY H_DD3 H_DD11 VDD H_DD4 H_DD10 H_DD5 VDDIO H_DD9 H_DIOR_N H_DD6 VDD H_DD8 H_DD7 H_CBLID_N ACT0 ACT1 GPIO0 H_DD2 H_DD13 VDD_1V2 H_DD1 H_DD14 3V3_VDDIO H_DD0 H_DD15 H_IDE_DMAREQ VDD_1V2 H_IDE_DMAACK# H_IDE_IRQ H_IDE_A1 H_IDE_A0 H_IDE_CS0# H_IDE_A2 H_CS1_N H_RESET_N CFG1 CFG0 PERST_N WAKE_N VDD CLKP CLKN AVDDL PRXP PRXN AVDDT PTXP NC7 PTXN HSDACP HSDACN ISET 88SE6111B2-NAA1-RH 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 H_IDE_CS1# H_IDE_RST# REF_CFG1 REF_CFG0 PLTRST_BU3# R496 X_0R/2 VDD_1V2 FB22 PLTRST_BU3# 16 WAKE# 10,11,19,21 RN60 RN64 RN65 RN62 SATA_RX7 SATA_RX#7 3V3_VAA2 SATA_TX#7 SATA_TX7 3V3_VAA1 XIN_12M XO_12M R531 X_0R/2 3V3_VDDIO C683 0.1u/16V/Y/4 3V3_VAA1 C618 0.1u/16V/Y/4 PE_RXP5 10 C619 0.1u/16V/Y/4 PE_RXN5 10 0R/5 C625 X_C0.1U16Y2 C636 10u/10V/8 C646 0.1u/16V/Y/4 FB21 VCC3 22R/2 22R/2 22R/2 22R/2 22R/2 22R/2 22R/2 22R/2 22R/2 IDE_IOW# IDE_IOR# IDE_A2 IDE_A1 IDE_A0 IDE_DMAACK# IDE_CS0# IDE_CS1# IDE_RST# H_IDE_DMAREQ H_IDE_IORDY H_IDE_IRQ H_IDE_DIAG# R522 R544 R517 R537 82.5R/2/1% 82.5R/2/1% 82.5R/2/1% 82.5R/2/1% C C652 10u/10V/8 C651 0.1u/16V/Y/4 IDE_DMAREQ IDE_IORDY IDE_IRQ IDE_DIAG# R500 6.04KR/2/1% IDE1 R560 IDE_RST# R561 10KR1%/2 XIN_12M V_1P5_ICH U26 CK_25M_88SE611 R506 X_1MR/2 XO_12M CK_25M_88SE611 15 VIN C609 10u/10V/8 ADJ/GND R543 R542 R502 R508 R509 R516 R501 R493 R482 3V3_VAA2 0R/5 C664 X_C0.1U16Y2 VOUT FB19 X_L80ohm_3A_0805 VDD_1V5 RC1117S_SOT223 C612 Y5 X_25MHz X_C18P50N2 X_C18P50N2 H_IDE_IOW# H_IDE_IOR# H_IDE_A2 H_IDE_A1 H_IDE_A0 H_IDE_DMAACK# H_IDE_CS0# H_IDE_CS1# H_IDE_RST# 6.04KR/2/1% VCC3 C613 8P4R-33R/2 8P4R-33R/2 8P4R-33R/2 8P4R-33R/2 FB20 10 10 PE_RXN5_C R514 0/4 B D 3V3_VDDIO C653 0.1u/16V/Y/4 X_0R/5 VCC3 PE_TXP5 PE_TXN5 VDD_1V5 PE_RXP5_C R497 DD15 DD0 DD14 DD1 DD11 DD4 DD10 DD5 DD9 DD6 DD8 DD7 DD13 DD2 DD12 DD3 L02-8008074-J07 FOR BEAD CK_PE_PATA_DP 15 CK_PE_PATA_DN 15 VDD_1V5 7 7 Change 0R/0805 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 29 10 11 12 13 14 15 16 17 18 19 3V3_VDDIO CP15 X_COPPER GPIO1 GPIO2 TESTMODE NC1 NC2 NC3 NC4 NC5 VSS RXP0 RXN0 VAA2_0 TXN0 TXP0 VAA1 XTLIN_OSC XTLOUT S_ISET TP H_IDE_IOW# H_IDE_IORDY H_DD3 H_DD11 VDD_1V2 H_DD4 H_DD10 H_DD5 3V3_VDDIO H_DD9 H_IDE_IOR# H_DD6 VDD_1V2 H_DD8 H_DD7 H_IDE_DIAG# VCC3 77 H_DD12 UAO UAI H_DD2 H_DD13 VDD H_DD1 H_DD14 VDDIO H_DD0 H_DD15 H_DMARQ VDD H_DMACK_N H_INTRQ H_DA1 H_DA0 H_CS0_N H_DA2 U29 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 H_DD12 D 8 8 R473 243R1%/2 C603 10u/10V/8 C616 0.1u/16V/Y/4 R559 5.1K/4/1 R558 4.7K/5%/04 R557 10KR1%/2 R555 X_4.7KR/2 C617 0.1u/16V/Y/4 VCC3 R471 49.9R1%/2 REF_CFG[1:0] = 00:20MHz 01:25MHz VCC5 33R/2 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 IDE_DMAREQ IDE_IOW# IDE_IOR# IDE_IORDY IDE_DMAACK# IDE_IRQ IDE_A1 IDE_A0 IDE_CS0# IDEACTP# 10 12 14 16 18 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 22 24 26 28 30 32 34 36 38 40 B IDE_DIAG# IDE_A2 IDE_CS1# IDE/YELLOW-RH C699 X_4700p/4/X R556 10KR1%/2 VCC3 VCC3 SATA7 C681 0.1u/16V/Y/4 R495 X_10KR/2 A R494 10KR/2 VIN VOUT RX+ TX+ GND RX- TXGND GND GND GND REF_CFG0 REF_CFG1 VDD_1V2 RC1117S_SOT223 R529 100R1%/2 U30 ADJ/GND R483 X_10KR/2 VDD_1V2 R484 10KR/2 C682 10u/10V/8 C662 0.1u/16V/Y/4 C648 0.1u/16V/Y/4 C679 0.1u/16V/Y/4 C678 0.1u/16V/Y/4 ST_TX7 ST_TX#7 C638 C649 0.01u/25V/4/X SATA_TX7 0.01u/25V/4/X SATA_TX#7 ST_RX#7 ST_RX7 C655 C663 0.01u/25V/4/X SATA_RX#7 0.01u/25V/4/X SATA_RX7 A SATA_Blue R528 0/4 MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Date: Friday, May 18, 2007 Rev 1.2 Marvell 88SE6111 PCIE to PATA/SATA Sheet 23 of 35 Rear USB Connector USB POWER FOR PORT 1,2 NEAR CONNECTOR FUSB_STR FS5 FUSB_VCC3 F-SMD1812P150TF-RH OC#6 10 R162 51KR1% R485 27KR/2 EC63 470u/6.3V/8*8/O OC#8 10 R491 51KR1% R487 27KR/2 EC62 470u/6.3V/8*8/O 10 R481 27KR/2 EC64 470u/6.3V/8*8/O 2 EC37 470u/6.3V/8*8/O OC#4 R132 51KR1% FUSB_VCC2 F-SMD1812P150TF-RH + 10 FUSB_STR FS6 + C155 X_C0.1U16Y2 FUSB_VCC1 F-SMD1812P150TF-RH + R168 27KR/2 EC13 470u/6.3V/8*8/O OC#0 D FUSB_STR FS7 F-SMD1812P150TF-RH + C89 X_C0.1U16Y2 NEAR CONNECTOR RUSB_VCC2 FS4 + R136 27KR/2 10 RUSB_STR USB POWER FOR PORT 6,7 NEAR CONNECTOR RUSB_VCC1 F-SMD1812P260TF-RH USB POWER FOR PORT 6,7 NEAR CONNECTOR RUSB_STR FS2 USB POWER FOR PORT 6,7 NEAR CONNECTOR D Front USB Connector USB POWER FOR PORT 0,3,4,5 OC#10 R490 51KR1% R489 51KR1% REAR USB PORT 0,3,4,5 (2x2) FRONT USB PORT 6,7 RUSB_VCC1 RUSB_VCC1 C C SBD4SBD4+ L40 10 USB010 USB0+ 10 USB510 USB5+ SBD0SBD0+ DOWN-R DOWN-L 18 8P4R-0R/6 SBD3SBD3+ SBD4SBD4+ SBD3SBD3+ RN55 USB3USB3+ USB4USB4+ 10 10 10 10 10 10 10 10 USB6+ USB6USB7+ USB7- USB6+ USB6USB7+ USB7- 8P4R-0R/6 SBD6+ SBD6SBD7+ SBD7- JUSB1 C605 X_C0.1U16Y2 SBD6SBD6+ X_8P4R-0R/6 VCC USB0USB0+ GND L43 C84 0.1u/16V/Y/4 C99 0.1u/16V/Y/4 L42 SBD5SBD5+ SBD3SBD3+ USB3USB3+ 10 10 SBD4SBD4+ USB4USB4+ 10 10 X_CMC-L12-121D017-LF 10 10 USB6+ USB6- USB6+ USB6- 10 10 USB7+ USB7- USB7+ USB7- SBD6+ SBD6- SBD7+ SBD7- UP-R RN10 10 VCC USB1USB1+ GND USBOC SBD7SBD7+ D21 SBD6- SBD7- SBD6+ SBD7+ 12 11 10 UP-L SBD5SBD5+ 17 SBD0SBD0+ SBD5SBD5+ 5 19 13 13 10 USB010 USB0+ 10 USB510 USB5+ 16 15 14 SBD0SBD0+ FUSB_VCC1 FUSB_VCC1 USB1 CONN-USBAX4_BLACK-RH RN8 ESD-IP4220 NEAR CONNECTOR 2X5(9)USB_yellow CMC-L12-121D017-LF X_CMC-L12-121D017-LF FRONT USB PORT 8,9 RUSB_VCC1 SBD5- SBD0+ SBD5+ B SBD3+ ESD-IP4220 FUSB_VCC2 FUSB_VCC2 D6 SBD4- SBD4+ RN54 10 10 10 10 ESD-IP4220 USB8+ USB8USB10+ USB10- USB8+ USB8USB10+ USB10- SBD8+ SBD8SBD10+ SBD10- JUSB2 C606 X_C0.1U16Y2 SBD8SBD8+ X_8P4R-0R/6 VCC USB0USB0+ GND L44 NEAR USB CONNECTOR 10 10 NEAR USB CONNECTOR 10 10 USB8+ USB8- USB8+ USB8- USB10+ USB10- USB10+ USB10- SBD8+ SBD8- SBD10+ SBD10- SBD0- SBD3- 10 VCC USB1USB1+ GND USBOC SBD10SBD10+ D20 SBD8- SBD10- SBD8+ SBD10+ D5 5 RUSB_VCC1 B ESD-IP4220 NEAR CONNECTOR 2X5(9)USB_yellow CMC-L12-121D017-LF FRONT USB PORT 10,11 REAR USB PORT 1,2 (With LAN) FUSB_VCC3 RUSB_VCC2 USB1USB1+ USB2USB2+ 8P4R-0R/6 A UP DOWN 23 24 25 26 27 28 29 30 5 SBD1SBD1+ SBD11+ SBD11SBD9+ SBD9- JUSB3 C604 X_C0.1U16Y2 SBD11SBD11+ X_8P4R-0R/6 SBD2SBD2+ ESD-IP4220 L45 10 10 USB11+ USB11- USB11+ USB11- 10 10 USB9+ USB9- USB9+ USB9- SBD11+ SBD11- SBD9+ SBD9- VCC USB0USB0+ GND D12 RN23 10 10 10 10 LAN_USB1A USB11+ USB11USB9+ USB9- 10 VCC USB1USB1+ GND USBOC SBD9SBD9+ D19 SBD11- SBD9- SBD11+ SBD9+ 10 10 10 10 RUSB_VCC2 C140 0.1u/16V/Y/4 SBD1SBD1+ SBD2SBD2+ FUSB_VCC3 RN53 USB11+ USB11USB9+ USB9- ESD-IP4220 NEAR CONNECTOR 2X5(9)USB_yellow A CMC-L12-121D017-LF CONN-RJ45_USBX2 L41 10 USB110 USB1+ SBD1SBD1+ 10 USB210 USB2+ SBD2SBD2+ NEAR USB CONNECTOR MICRO-STAR INT'L CO.,LTD MS-7345 MSI X_CMC-L12-121D017-LF Size Custom Document Description Rev 1.2 USB Connector Sheet Date: Tuesday, June 26, 2007 24 of 35 1394a OHCI Link Layer Controller PWRDET_VCC P3VA L3 VDD PCI_PME# PCI_PME# PCICLK PLTRST_BU2# 92 PCIRST# 37 PME# R462 X_0/4 B NC/REG_OUT NC/REG_fb NC#86 NC/REG_en NC/INTREG 88 87 86 85 84 REG_OUT REG_FB F2 CPWR C F-SMD1812P150TF/24-RH TPB1TPB1+ TPB_1TPB_1+ TPA1TPA1+ TPA_1TPA_1+ TPBIAS0 X_Common Chock C68 334P BJT_CTL 11K/1/4 63 R515 1KR1%/2 XREST R532 6.2KR1%/2 NC/D6/CMC_JMP PHYRESET# 52 58 C657 47P/NPO/4 R74 4.99K/1/4 C60 270p/X7R/6 NC/CTL0/PC0JMP NC/CTL1/PC1JMP NC/D7/PC2JMP 54 55 53 NC/LINKON NC/LREQ NC/D5 NC/D4 D3/CARDBUS D2/I2CEEN NC/D1 NC/D0 NC/MODE0 NC/MODE1 NC/SCLK NC/LPS NC#67 57 56 51 48 47 46 45 44 43 42 40 38 67 EECK/SCL EEDI/SDA EEDO EECS 32 31 30 29 XI 60 XO 61 CPWR_0 TPB_0TPA_0- C622 1u/6.3V/4 R479 1394-6PMSTRAIGHT_BLACK-RH D24 A F3 CPWR_F C DIODE,40V,2A, EECK EEDI R464 CPWR_1 F-SMD1812P150TF/24-RH C690 X_102P/50V/X7R/4 P3VA C696 0.01u/16V/4 4.7K/5%/04 R504 1M/6 Y6 24M-16pf TPBIAS1 R551 R550 R549 R548 C637 10P/4 VCC3 VT6308P-CD-RH For VT6308 C685 334P R547 4.99K/1/4 C684 270p/X7R/6 54.9/1/4 54.9/1/4 54.9/1/4 54.9/1/4 TPA1+ TPA1TPB1+ TPB1- B R463 4.7K/5%/04 PWRDET_VCC J1394_1 C578 0.1u/16V/Y/4 TPB_1+ CPWR_1 TPA_1- 10 TPB_1CPWR_1 H2X5[9]_GREEN-RH-1 VDD VCC3 For VT6308 VCC3 For Intel 1394 pinheader E VCC3 Q70 X_2SB1197K R451 X_4.7K/4 C621 X_0.1u/16V/Y/4 EECK R534 REG_FB VCC3 P3VA EEDI A 0/4 L38 P3VA VCC3 REG_OUT B C R450 X_4.7K/4 C634 0.1u/16V/Y/4 TPB_0+ TPA_0+ KBGND +12V R380 X : USE EEPROM R380 O: NO EEPROM VCC3 C581 C582 C598 0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 C 4.7K/5%/04 C654 10P/4 X_0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 TPA0+ TPA0TPB0+ TPB0- P3VA CK_P_33M_1394 C614 0.1u/16V/Y/4 54.9/1/4 54.9/1/4 54.9/1/4 54.9/1/4 C44 0.01u/50V/6 EMI C608 R88 R84 R81 R71 CPWR_F TPA_1+ C579 C46 X_0.01u/16V/4 C45 X_102P/50V/X7R/4 L39 R526 CPWR_0 DIODE,40V,2A, VDD C580 39 49 24 114 35 62 65 76 75 90 89 TPBIAS1 TPA1+ TPA1TPB1+ TPB1- A C620 10P/4 94 103 111 121 16 26 34 IDSEL = AD18 MASTER = PCI_REQ#2 PCI_GNT#2 PCI_IRQ#C(INTC) D +12V TPBIAS0 TPA0+ TPA0TPB0+ TPB0- 81 80 79 78 77 VSS10 VSSC3 10,22 93 74 73 72 71 70 66 41 50 16,19 PLTRST_BU2# CK_P_33M_1394 VSSC1 VSS9 15 CK_P_33M_1394 115 36 DEVSEL# PREQ#2 PGNT#2 PERR# PIRQ#C VSSC2 AD18 TPA_0TPA_0+ D2 XTPBIAS0 XTPA0P XTPA0M XTPB0P XTPB0M XCPS PAR FRAME# IRDY# TRDY# STOP# IDSEL DEVSEL# REQ# GNT# PERR# INTA# 25 PAR FRAME# 123 IRDY# 124 TRDY# 126 STOP# 128 R503 100R1%/2108 DEVSEL# 127 PREQ#2 96 PGNT#2 95 PERR# PIRQ#C 91 J1 GNDATX0 GNDARX0 GNDARX1 GNDATX1 GNDARX2 GNDATX2 10,22 10,22 10 10,22 10,22 PAR FRAME# IRDY# TRDY# STOP# X_Common Chock XTPBIAS1 XTPA1P XTPA1M XTPB1P XTPB1M VT6308P/VT6308S 59 64 68 69 82 83 10,22 10,22 10,22 10,22 10,22 TPA0TPA0+ CBE3# CBE2# CBE1# CBE0# TPB_0TPB_0+ 107 122 15 C_BE#[3 0] 10,22 C_BE#[3 0] C_BE#3 C_BE#2 C_BE#1 C_BE#0 C U28 VDDATX0 VDDARX0 VDDATX1 VDDARX1 VDDATX2 VDDARX2 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VDD6 VDDC3 97 98 99 100 101 104 105 106 109 110 112 116 117 118 119 120 10 11 12 13 14 17 18 19 21 22 23 27 28 VDDC2 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 RAMVSS AD[31 0] VDDC1 PWRDET AD[31 0] VDD1 VDD2 VDD3 VDD4 VDD5 RAMVDD 102 113 125 20 33 D TPB0TPB0+ VCC3 10,22 X_L02-8008044-J07 A C671 0.1u/16V/Y/4 U25 C656 C659 C658 C660 C661 C597 0.1u/16V/Y/4 A0 A1 A2 GND VCC WP SCL SDA R456 X_510/4 EECK EEDI CP14 MICRO-STAR INT'L CO.,LTD X_COPPER X_ATMEL AT24C02 0.1u/6/Y For VT6308 0.1u/16V/Y/4 0.1u/16V/Y/4 0.1u/16V/Y/4 X_0.1u/16V/Y/4 BJT_CTL R533 VCC3 MS-7345 MSI Size Custom X_4.7K/4 Document Description Sheet Date: Friday, May 18, 2007 Rev 1.2 IEEE-1394 VIA-VT6308 25 of 35 Change Package 0.1u/16V/Y/4 S Q19 D 5VSB_DRV U16 uP7707 5VSBDRV1 C56 18nf/16V/X/4 C92 X_0.1u/25V/6 EN C51 22nf/16V/4 Q17 N-IPD20N03L_TO252 VCC1_5REF R312 10KR/2 C394 4.7u/10V/8 R284 C398 16KR0402 X_0.1u/16V/Y/4 10 + U18C - C451 0.1u/16V/Y/4 R357 200K/4 R314 R282 18KR1%0402 +12V MODE X_4.7K/5%/04 C448 X_0.1u/16V/Y/4 voltage V1_5SET_1=0 V1_5SET_1=0 V1_5SET_1=1 V1_5SET_1=1 V_1P5_ICH 1.8V 1.7V 1.6V 1.5V VCC5 R329 1.24K/1%/04 R318 2.49K/1%/04 R336 X_4.7K/5%/04 Q48 X_2N7002S Change Package NS NG ND ND PS PG PD PD 5VDRV1 NS NG ND ND PS PG PD PD R454 10KR/2 5VSBDRV2 R275 10/4 U15 10,11,13,15,21,28 10,11,13,15,21,28 5VSBDRV2 C231 18nf/16V/X/4 GPIO for USB voltage H:Follow 5VDIMM L:Always off VCC5 R268 SMBCLK R267 SMBDATA V1_5SET_0 D R320 X_4.7K/5%/04 B R316 0/4 5VDRV1 0/4 SCL 0/4 SDA 200K/4 EN C R276 Q63 2N3904 R578 R577 X_11K/1/4 X_11K/1/4 1.8V 1.25V 1_8VREF Q42 X_2N3904S For over voltage 1_25VREF C +12V 1_25VREF 1_2VREF 1.2V 1_8VREF 1_8VREF VCC_DDR 1_2VREF uP6261B near U36 Pin12 R272 56K/4/1 1_2VREF R311 27K/4 12 U18D + 14 E 11 USB_MODE C389 0.1u/16V/Y/4 C572 18nf/16V/X/4 C211 X_0.1u/25V/6 R470 B 4.7K/5%/04 10 5VSB 5VSB DUAL_P_N D 5VDRV1 0/4 FUSB_STR U34 GND 5VSB 5VSB VCC5 DUAL_P_N 13 C452 0.1u/16V/Y/4 VCC5 R183 20KR1%/2 LM324DR2G_SOIC14 V_FSB_VTT FB uP7706 5VDRV1 C200 X_10u/16V/Y/12 D C C419 X_0.1u/16V/Y/4 Q40 2N7002S S G E VTT_SEL 29 C 16 EC57 470u/6.3V/8*8/O R540 LED_VCC 4.7K/5%/04 B Q68 2N3904 R440 3.3K/4 VCC3 C521 10u/10V/8 B R290 4.7K/5%/04 B Q38 2N3904 V_FSB_VTT V_FSB_VTT 180R1%0402 E 200K/4 PWR_LED +1 GND VREF VIN 3VSB R527 330R/6 R541 1KR1%/2 3VSB R439 10KR/2 R441 R292 X_1K/4/1 G 5VDRV1 Q60 N-IPD20N03L_TO252 VOUT R437 1KR1%/2 3VSB S 1u/6.3V/4 C565 15nf/16V/X/4 GND 0/4 EN R438 POK VCTRL U23 C539 D 10/4 R407 R293 EC42 820u/2.5V/8*9/O + 5VSB C602 X_10u/10V/8 R299 300K/4 LED ( for Fintek 71882) VCC3 5VSB R301 4.7K/5%/04 1.2V 5.8A Q28 N-IPD20N03L_TO252 G 11 5VSBDRV1 5VSB Q43 X_2N7002S G R343 DDR REF NB 1.25V REF V_FSB_VTT REF RUSB_STR U35 reference Voltage (Channel only) Change Package 5VSB VCC5 R321 X_4.7K/5%/04 C 5VSB FOR Front USB 5VSB 5VSB FOR Rear USB V1_5SET_1 Q45 X_2N3904S E 10 X_4.7K/5%/04 B S R344 C 0/4 VCC5 E E 1_25VREF GPIO for over V1_5SET_0=0 V1_5SET_0=1 V1_5SET_0=0 V1_5SET_0=1 To avoid the 5VSB droop when V1_5 power up G R449 EC53 820u/2.5V/8*9/O D Q9 X_2N3904 B X_4.7K/5%/04 V_1P5_ICH V1_5SET C C R40 SB 1.5V 2.75A 150R1%/2 R358 16KR0402 Cost down; Only stuff R449 Note: The Dual_CTRL must used GP27 or other default "OutputLow" Q10 X_2N3904 B 11 DUAL_CTRL Q35 N-IPD20N03L_TO252 G R285 20KR1%/2 D V1_5SET VCC5 R80 GPIO,Defualt=L H:Support S0/S3/S5 L:Support S0/S3 C 1_5VDRV LM324DR2G_SOIC14 +1 R61 1.5K/6 near U36 Pin10 VCC1_5REF VOUT S X_4.7K/5%/04 C385 1u/6.3V/4 VIN G 5VSB R52 VCC3 5VSB 5VDRV1 uP7501 Used SLP_S5# for AMT 5VCC_DRV S MODE E D GND MODE VCC_DDR VCC1_5REF D S3# S5# +12V P06P03LCG_SOT89 G S SLP_S3# SLP_S5# 5VCC 5VSB U6 11,16 11 5VSB D C38 S 10KR/2 R53 11 10/4 NC R47 GND 510R0402 16,27,29 ATX_PWR_OK R48 VCC1_5REF VCC3 VCC5 5VDIMM 5VDIMM FOR DDR 5VSB VCC3 B 5VSB 3VSB R405 4.7K/5%/04 R525 330R/6 R523 1KR1%/2 D 16 Q34 G LM324DR2G_SOIC14 R286 20KR1%/2 S N-IPD20N03L_TO252 SB 1.05V 2A VCC3 R386 X_4.7K/5%/04 C E Remove U24(7414 delay control), Add Q64,Q61,Q65 VCC3 VID_GD# S E 1 2 +1 2 10KR/2 B VCC3 +12V V_FSB_VTT 4,28 A Q55 2N3904 E +12V +12V C480 1u/6.3V/4 C405 0.01U/16V/4 For over voltage 1_2VREF C410 0.1u/16V/Y/4 Q41 X_2N3904S 1_25VREF Remove U24(7414 delay control), Modify VID_GD# to PWM and CPU for power sequence C R370 4.7K/5%/04 D 1_8VREF Q39 X_2N7002S G C EC55 X_560u/4V/8*9/O + EC44 560u/4V/8*9/O + 3VSB V_FSB_VTT R349 C549 0.1u/16V/Y/4 0/4 EC67 470u/6.3V/8*8/O + R333 VCC5 C379 0.1u/16V/Y/4 X_4.7K/5%/04 B C381 0.1u/16V/Y/4 V1_05SET 5VSB EC61 100u/16V/6.3*10.5/O R338 X_4.7K/5%/04 C377 0.1u/16V/Y/4 10 5VSB EC58 470u/6.3V/8*8/O R291 2KR1%0402 VCC5 A GPIO for over voltage H:1.05V L:1.15V EC52 820u/2.5V/8*9/O C196 X_C10U6.3X1206/B C744 X_0.1u/16V/Y/4 V_105 R331 SIO_PWROK 180R1%0402 +1 R287 MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 ACPI controller UPI Date: Wednesday, June 20, 2007 6,11 V_1P05_ICH V_FSB_VTT V_105 20KR1% PWROK DELAY +1 - + R401 U18B 11 R288 10KR1%/2 C404 0.1u/16V/Y/4 B Q61 2N3904 CHIP_PWGD VID before PWROK >3ms Update from SLP_S3# to VRM_PGD 16,27,29 ATX_PWR_OK R283 4.22KR1%0402 B Q65 2N3904 C V_1P25_CORE B Q64 2N3904 E C R393 4.7K/5%/04 ICH_VRM_PGD E LED_VSB 29 28 Q66 2N3904 E 16 +12V 4.7K/5%/04 B C CHIP_PWGD SUS_LED R524 VCC1_5REF R404 4.7K/5%/04 Sheet 26 of 35 Q13 2N3904 S C C 1KR1%/2 B X_0/6 R92 12.1K/4/1 C591 X_3.3n/50V/X/4 R419 20KR1% ATX_PWR_OK R222 60.4K/4 CLOSED DDR POWER PIN4 16,26,29 Q72 2N3904 15 W83310DS 100u/16V/6.3*10.5/O +12V C220 X_0.1u/16V R412 B X_0/6 C235 X_0.01U/16V/4 C207 C237 0.1u/16V/Y/4 0.1u/16V/Y/4 D CH-1.2U8A-LF C239 X_0.01U/16V/4 NB_V1_25 16.3A CHOKE5 V_1P25_CORE N-P75N02LDG_TO252 Irms(MAX) of VCC1_25=16.3A R199 X_1K/4/1 1 C243 1u/10V/6 N-P75N02LDG_TO252 C258 3.3n/50V/X/4 CH-1.2U18A R207 2.2/8 Q31 G 2 D uP6103 Iripple=16.3*0.49*0.878/1=7A 1.14*3*1.7=5.814A>5.59A VCC5 Q33 G C242 0/6 1u/25V/X/8 S VCC PHASE UG LG R201 S C330 X_3.3n/50V/X/4 GND FB R196 3.01KR1%/2 C148 0.1u/16V/Y/4 EC50 820u/2.5V/8*9/O + C311 X_3.3n/50V/X/4 EC48 820u/2.5V/8*9/O + R244 X_1K/4/1 R432 X_2.2/8 10u/10V/8 0.1u/16V/Y/4 C229 1u/25/X/8 BOOT 2 EC49 820u/2.5V/8*9/O + C245 0.1u/16V/Y/4 Vref C274 C259 D13 EC45 470u/6.3V/8*8/O + C158 0.1u/16V/Y/4 C CHOKE4 EC46 470u/6.3V/8*8/O + 2.2/8 U11 2KR1%0402 560u/4V/8*9/O de- VCC_DDR high frequency noise X_BAT54A R200 EC41 For channel DOT3 used 1_25VREF EC43 VCC_DDR 9.4A+4.3A+2.75A+5.8A=22.25A VCC5_IN 1_25VREF VTT_DDR DDR_LG_L +12V R187 R186 1K/6/1 1.25V/2.9A R573 30K/4 NB 1.25V POWER R185 1K/6/1 DDRVTT_REF Irms(MAX) of VCC_DDR=22A To meet Intel power down sequence C 1 C168 1u/10V/6 N-P75N02LDG_TO252 C152 3.3n/50V/X/4 VIN GND VREF1 VOUT GND G CH-1.1U25A VREF2 ENABLE VCNTL BOOT_SEL R169 2.2/8 Q24 D S C63 X_0.01U/16V/4 B E SLP_S4# E R70 11,15 R431 Q15 2N7002S C524 0.1u/16V/Y/4 DDR2_LG uP6103 VCC_DDR 2 D G + R86 3.01KR1%/2 CHOKE3 N-P75N02LDG_TO252 D VCC_DDR EC35 560u/4V/8*9/O + 1KR1%/2 U10 EC36 560u/4V/8*9/O + R98 FB PHASE UG LG G C76 0/6 1u/25V/X/8 R110 3VSB EC38 560u/4V/8*9/O + 5VSB R459 X_2.2/8 VCC_DDR EC33 560u/4V/8*9/O R245 12.1K/4/1 C493 X_3.3n/50V/X/4 BOOT Q23 C74 1u/6.3V/4 Vref D S 3.01KR1%/2 R112 1u/25/X/8 VCC U7 1_8VREF 1_8VREF C61 2.2/8 GND R82 VCC_DDR D DDR VTT Power +1 10u/10V/8 0.1u/16V/Y/4 +1 X_BAT54A R96 X_0/6 To CPU Copper trace width > 250mils , Fill island behind DIMM > 400mils 5VDIMM C102 X_0.01U/16V/4 C108 C105 2 CH-1.2U18A D4 +1 +1 5VDIMM 3 EC21 470u/6.3V/8*8/O + +12V EC29 X_470u/6.3V/8*8/O D3 S-BAT54C_SOT23 CHOKE2 EC11 470u/6.3V/8*8/O DDR II 1.8V POWER Iripple=21*0.6*0.8/1=10.08A 2.22*3*1.7=11.322A>10.08A The uP6261B 1.8Vref output connect a resistance =15K ohm that sourcing current must more than 120uA (120uA*15Kohm=1.8V) The DDR just can offer 1.8V output voltage Note: If DDR need over voltage to 3.3V, the uP6261B’s 1.8Vref pin current sourcing capacitor must more than 220uA (220uA*15Kohm=3.3V) 5VDIMM_IN B For EMI VCC_DDR VTT_DDR VCC_DDR C236 C22P50N C156 C1U16Y3 C169 C1U16Y3 CHANNEL B V_SM_VTT DECOULPING CAPS VCC_DDR EC39 560u/4V/8*9/O 1+ EC40 560u/4V/8*9/O 1+ VTT_DDR VTT_DDR C215 C22P50N C194 0.1u/16V/Y/4 C266 C22P50N A C175 X_C0.1U16Y2 C134 X_0.1u/16V/Y/4 CHANNEL A V_SM_VTT DECOULPING CAPS VTT_DDR VTT_DDR C149 X_0.1u/16V/Y/4 C232 22p/4/N C172 X_0.1u/16V/Y/4 C174 X_0.1u/16V/Y/4 C212 X_0.1u/16V/Y/4 C256 X_0.1u/16V/Y/4 C114 X_0.1u/16V/Y/4 C180 22p/4/N C188 X_C0.1U16Y2 C186 0.1u/16V/Y/4 C163 0.1u/16V/Y/4 C157 0.1u/16V/Y/4 C300 X_0.1u/16V/Y/4 C150 0.1u/16V/Y/4 C214 C10U6.3X5R6 C195 X_0.1u/16V/Y/4 C205 0.1u/16V/Y/4 C218 C10U6.3X5R6 C302 X_0.1u/16V/Y/4 C147 X_C0.1U16Y2 C141 0.1u/16V/Y/4 C199 C1U16Y3 C206 0.1u/16V/Y/4 C129 X_C4.7U35Y6 C246 X_C1U16Y3 C135 0.1u/16V/Y/4 C127 X_C4.7U35Y6 A C193 0.1u/16V/Y/4 C262 X_C1U16Y3 C128 0.1u/16V/Y/4 MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Sheet Date: Wednesday, June 20, 2007 Rev 1.2 NB Core Power & DDR Power 27 of 35 12VIN VCC5 GND REF FS SS/RST/A0 49 R102 R77 R83 X_0/4 C62 120K/4/1 39.2KR1% 0.01u/25V/4/X PWM4 24 EN_PH4 23 R41 PHASE4 R37 5.1K/4/1 R36 R20 ISL6322CRZ_QFN48-RH C23 0.1u/16V/Y/4 R15 2.2K/6 R106 243K/4/1 X_Short PAD +12VIN 2.2/8 VCC PVCC UGATE BOOT PHASE E R22 10K/6 GND 2 470U/16V/O 470U/16V/O C6 X_10u/16V/12 PWM LGATE LGATE4 SP3 C142 X_10u/12/Y N-P0903BD_TO252 X_Short PAD R39 2.2/8 Q6 N-P75N02LDG_TO252 C37 1000p/4/X PHASE4 ISEN4 1 1 2 C109 C120 C50 SP4 SP6 C103 EC71 EMI 12VIN C85 X_0.1u/6/Y C113 X_0.1u/6/Y C43 X_0.1u/6/Y C117 X_0.1u/6/Y PWM4 VRMPWRGD LEVEL SHIFT R7 22R/2 For Intel Bearlake Design Guide VRM must need level shift 3VSB PWM_CPU R387 15 R6 X_200K/4 VCC3 A A 1KR1%/2 R436 10KR/2 10KR/2B Q59 2N3904 E Q54 2N3904 R375 B E R402 ICH_VRM_PGD 11 C C ICH_VRM_PGD VRM_PGD C86 22u/12/X X_1u/6/Y X_1u/6/Y X_1u/6/Y X_1u/6/Y CH-0.25U40A-RH-1 LG4 C1U16Y3 B C93 CLOSED PWM PIN24 R403 4.7K/5%/04 1 C118 X_22u/12/X L2 Q5 N-P75N02LDG_TO252 G G C31 PWR-2X4P_P_WHITE-RH VCCP 2 D S D S C100 1u/8/Y Q4 S 1 1 470U/16V/O C66 G D 1/8 UG4 S R18 C16 0.1u/6/Y D UGATE4 R35 4.7/8 D R38 ISL6612ACBZT_SOIC8-RH EC47 C64 100uF/16V/SP 470U/16V/O EC3 C101 C111 C81 X_C220U2.5SP-LF EC12 C65 + EC30 SP8 22u/12/X X_22u/12/X X_22u/12/X X_22u/12/X 22u/12/X X_22u/12/X + +12V C15 C164 0.01u/25V/4/X X_10u/12/Y SP7 12VIN + +12V C47 1000p/4/X PHASE3 ISEN3 LG3 R17 X_1KR/2 12VIN L14 CH-1.2U18A-LF R59 2.2/8 Q8 N-P75N02LDG_TO252 + Q2 N-P75N02LDG_TO252 G G L4 CH-0.25U40A-RH-1 X_Short PAD +12V N-P0903BD_TO252 X_Short PAD +12V LGATE3 SP5 U2 MEC1 S D C32 0.1u/16V/Y/4 X_100K/4 15K/4 V_6312 + GND C19 0.1u/6/Y PWM4 EC32 EC34 EC22 EC31 G R72 10K/6 ISEN4 C106 X_10u/12/Y C144 1u/8/Y Q11 BOTTOM PAD CONNECT TO GND Through VIAs + GND 0/6 1/8 UG3 OVPSEL/SDA 21 22 R87 11 45 ISEN4+ ISEN4- C59 0.1u/16V/Y/4 DRSEL/SCL C57 0.1u/6/Y R69 X_100K/4 +12VIN MEC1 GND 5.1K/4/1 OFS 75R/6 ISEN3 R73 PHASE3 R68 12 S 12VIN offset WDT# POWER1 D UGATE3 44 43 C ISEN3+ ISEN3- 0.1u/6/Y 39 38 41 C126 1000p/4/X PHASE2 ISEN2 LG2 C34 UGATE3 PHASE3 LGATE3 Q26 SP14 SP13 N-P75N02LDG_TO252 RGND +12VIN GND X_Short PAD EC10 EC20 EC8 C42 X_0.01u/16V/4 17 2.2/8 FOR 6322 LGATE2 R46 X_100K/4 EC6 R159 2.2/8 40 R49 S VCC BOOT3 C72 C 15,16,29 Q21 N-P75N02LDG_TO252 SP12 G G X_820u/2.5V/8*9/O B +12VIN C40 0.1u/16V/Y/4 + VSEN X_1K/4 B Q14 X_2N3904 ISEN2 75R/6 C39 0.1u/6/Y OS-CON L8 CH-0.25U40A-RH-1 820u/2.5V/8*9/O VCC3 R91 X_10K/4 2.2/8 N-P0903BD_TO252 + R93 R56 10K/6 820u/2.5V/8*9/O 18 X_100p/4/N V_6312 R51 5.1K/4/1 C69 X_10u/12/Y X_Short PAD 0/4 0/4 R165 PHASE2 R42 C54 1u/8/Y Q27 G X_Short PAD X_1K/4 R107 R97 UG2 D VCCP X_4.7K/4 R94 1/8 + V_6312 10,11,13,15,21,26 SMBCLK 10,11,13,15,21,26 SMBDATA R164 + R103 V_6312 UGATE2 820u/2.5V/8*9/O FOR 6312 -15mV R90 X_100KR/2 C25 0.1u/16V/Y/4 C49 C1U16Y3 100R1%/2 R55 C35 C41 100R1%/2 X_0.1u/16V/Y/4 X_0.1u/16V/Y/4 V_6312 5.1K/4/1 C26 0.1u/6/Y R19 0.1u/6/Y X_100K/4 S X_10u/8/Y 0/4 42 C11 D C30 R45 PVCC3 VDIFF 2.2/8 12VIN + VSS_SENSE 19 20 PHASE1 R25 R23 ISEN1 75R/6 820u/2.5V/8*9/O + ISEN2+ ISEN2- PHASE1 ISEN1 R34 820u/2.5V/8*9/O + VCC_SENSE 16 FB IDROOP C96 1000p/4/X LG1 820u/2.5V/8*9/O + 0/4 100/6 Q18 SP11 SP10 N-P75N02LDG_TO252 820u/2.5V/8*9/O R43 R44 UGATE2 PHASE2 LGATE2 26 25 28 X_Short PAD LGATE1 X_Short PAD C 27 0.1u/6/Y X_Short PAD 4.7KRT BOOT2 C20 D E R60 RT2 35 34 2.2/8 D + 14 15 C48 470p/4/N 1.65K/4 ISEN1+ ISEN1- R24 X_820u/2.5V/8*9/O 12p/6/N R57 475R/4 R58 COMP 32 33 30 C53 1500p/6/Y 22KR/2 C52 13 UGATE1 PHASE1 LGATE1 (125Amp) EC9 + R67 31 EC4 820u/2.5V/8*9/O VRD_VIDSEL 750R/2 29 BOOT1 EC5 + R62 PVCC1_2 EC7 820u/2.5V/8*9/O C24 0.1u/16V/Y/4 PGOOD EN VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VRSEL R138 2.2/8 + B Q3 2N3904 37 36 46 47 48 SP9 X_Short PAD R16 10KR/2 VID_GD# VID[0 7] Q16 N-P75N02LDG_TO252 G G 820u/2.5V/8*9/O 4,26 UGATE1 L5 0.8V~1.55V/125AVCCP CH-0.25U40A-RH-1 OS-CON N-P0903BD_TO252 X_Short PAD C U5 VRM_PGD VRM_ENABLE VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 C18 C1U16Y3 C5 X_10u/12/Y G 10K/6 D 1KR1%/2 UG1 R147 10 R27 1/8 S D R149 C67 10u/10V/8 C8 1u/8/Y Q20 S R26 6.2KR1%/2 R14 2.2/8 S R85 2.2/8 S V_6312 +12VIN D +12VIN 100KR/2 MICRO-STAR INT'L CO.,LTD C745 X_1u/6.3V/4 MS-7345 MSI Size Custom Document Description Rev 1.2 VRD11-ISL6322 4-phase Sheet Date: Friday, June 01, 2007 28 of 35 Cap for EMI & Power ATX POWER CONNECTOR VCC5 VCC3 VCC3 +12V 25 5VSB R179 10KR/2 D 16 -12V 16 C217 X_0.1u/16V/Y/4 17 PSON# 18 VCC5 3.3V 25 13 C183 X_0.1u/16V/Y/4 14 C201 X_0.1u/16V/Y/4 15 VCC3 -12V GND VCC3 ATX1 3.3V C80 VCC5 C33 VCC3 X_0.1u/16V/Y/4 C28 GND C171 X_0.1u/16V/Y/4 C694 X_0.1u/16V/Y/4 5V GND GND GND 5V 19 GND GND 20 -5V POK 21 C270 X_0.1u/16V/Y/4 22 5V 5VSB 5V +12V 10 23 5V +12V 11 24 GND 3.3V 12 VCC5 C313 X_0.1u/16V/Y/4 VCC5 ATX_PWR_OK C260 X_0.1u/16V/Y/4 C566 X_0.1u/16V/Y/4 C312 X_0.1u/16V/Y/4 C21 X_0.1u/16V/Y/4 C531 X_0.1u/16V/Y/4 C469 X_0.1u/16V/Y/4 C567 X_0.1u/16V/Y/4 C299 X_0.1u/16V/Y/4 C670 X_0.1u/16V/Y/4 C83 C70 C704 X_0.1u/16V/Y/4 C575 X_0.1u/16V/Y/4 C687 X_0.1u/16V/Y/4 C325 X_0.1u/16V/Y/4 C304 X_0.1u/16V/Y/4 C595 X_0.1u/16V/Y/4 C547 X_0.1u/16V/Y/4 C326 X_0.1u/16V/Y/4 C673 X_0.1u/16V/Y/4 C674 X_0.1u/16V/Y/4 C688 X_0.1u/16V/Y/4 C692 X_0.1u/16V/Y/4 C695 X_0.1u/16V/Y/4 C669 X_0.1u/16V/Y/4 C693 X_0.1u/16V/Y/4 C629 X_0.1u/16V/Y/4 C632 X_0.1u/16V/Y/4 C22 X_0.1u/16V/Y/4 C686 X_0.1u/16V/Y/4 C568 X_0.1u/16V/Y/4 C492 X_0.1u/16V/Y/4 C408 X_0.1u/16V/Y/4 C570 X_0.1u/16V/Y/4 C374 X_0.1u/16V/Y/4 C320 X_0.1u/16V/Y/4 C293 X_0.1u/16V/Y/4 C574 0.1u/16V/Y/4 C112 X_0.1u/16V/Y/4 C564 X_0.1u/16V/Y/4 C506 X_0.1u/16V/Y/4 C397 X_0.1u/16V/Y/4 C677 X_0.1u/16V/Y/4 C409 X_0.1u/16V/Y/4 C593 X_0.1u/16V/Y/4 C10 C486 X_0.1u/16V/Y/4 0.1u/16V/Y/4 VCCP R210 1KR1%/2 C633 X_0.1u/16V/Y/4 0.1u/16V/Y/4 3.3V P_ON C119 X_0.1u/16V/Y/4 C55 X_0.1u/16V/Y/4 C29 X_0.1u/16V/Y/4 X_0.1u/16V/Y/4 +12V C292 X_0.1u/16V/Y/4 C88 X_0.1u/16V/Y/4 C58 X_0.1u/16V/Y/4 VCC3 C283 X_0.1u/16V/Y/4 C327 X_0.1u/16V/Y/4 C471 X_0.1u/16V/Y/4 PWR-24P_white-RH 12VIN C7 LED7 A LED17 C LED8 A DLED2 RN39 1K/4/8P4R DLED_E4 10 LED18 C DLED2 LED9 A C79 C DLED3 E DLED4 LED19 C LED-G_1608-LF DLED_E1 A LED-R_1608 DLED_E2 C X_0.1u/16V/Y/4 X_0.1u/16V/Y/4 C249 X_0.1u/16V/Y/4 C494 0.1u/16V/Y/4 C706 X_0.1u/16V/Y/4 C508 X_0.1u/16V/Y/4 C527 X_0.1u/16V/Y/4 C13 C456 X_0.1u/16V/Y/4 C573 X_0.1u/16V/Y/4 C107 X_0.1u/16V/Y/4 C462 X_0.1u/16V/Y/4 VCC3 X_0.1u/16V/Y/4 VCC5 CP16 X_COPPER CP6 X_COPPER CP3 X_COPPER C C467 0.1u/16V/Y/4 LED-G_1608-LF DLED_E2 A LED-R_1608 DLED_E3 C LED-G_1608-LF DLED_E3 A B Q52 2N3904 B Q56 2N3904 E B Q47 2N3904 E B Q44 2N3904 E C DLED3 C X_H2X5[9]_WHITE-RH RN37 10K/4/8P4R DLED_E1 DLED_E2 DLED_E3 C RN36 1K/4/8P4R JDB1 2 DLED1 DLED2 DLED3 DLED4 DLED1 DLED2 DLED3 DLED4 16 16 16 16 DLED1 VCC5 VCC5 X_0.1u/16V/Y/4 C116 X_0.1u/16V/Y/4 5VSB LED-R_1608 DLED_E1 C DEBUG LED C D C110 X_0.1u/16V/Y/4 16,26,27 5VSB C170 X_0.1u/16V/Y/4 DLED1 X_0.1u/16V/Y/4 LED10 A LED20 C DLED4 LED-R_1608 DLED_E4 C LED-G_1608-LF DLED_E4 A 5VSB VCC5 R642 1KR0805 B R643 1KR0805 LED1 A FRONT PANNEL C LED-R_1608 D22 11 ICH_SATALED# S-BAT54A_SOT23 R374 330R/6 JM_IDELED# 15,16,28 11 LED-B_1608 A VCC5 IDE_LED 23 B LED3 C WDT# FP_RST# R510 5VSB C665 X_0.1u/16V/Y/4 JFP1 H2X5[10]_YELLOW-RH HDD+ R PWR_LED G 0/4 IDE_LED R G 4SUS_LED B BL B BL BL Y C639 X_C20P50N2 C640 0.1u/16V/Y/4 C668 X_0.1u/16V/Y/4 R505 4.7K/5%/04 PWRBTIN C647 X_0.1u/16V/Y/4 16 C630 X_0.1u/16V/Y/4 EMI A A SUS_LED PWR_LED C650 X_0.1u/16V/Y/4 VCC5 C667 X_0.1u/16V/Y/4 MICRO-STAR INT'L CO.,LTD C SUS_LED PWR_LED RN61 150/4/8P4R E 26 26 JFP2 H2X4[7]_YELLOW-RH B R538 10KR/2 Q69 2N3904 SPKR 11,20 MS-7345 MSI Size Custom Document Description ATX PWR-Connector & Front Panel & EMI Sheet Date: Friday, May 18, 2007 29 of Rev 1.2 35 Optical Fiducial Marks-120 PCB1 Option : cfg-7345-GT(601-7345-02S) 1.INTEL G33 cfg-7345-GT(601-7345-07S(PCB1.1)) cfg-7345-GT(601-7345-050(PCB1.1)) 2.ICH9R D 3.Audio RTL888T 7345 PD0-0734512-D05, PD0-0734512-Y34, FM11 FM15 FM2 FM12 FM13 X_FM X_FM X_FM X_FM X_FM X_FM Optical Fiducial Marks-100 陸), ( FM14 FM8 FM9 FM7 FM10 D FM3 FM6 FM4 FM5 FOR DACREFSET U12_P X_MH001 X_MH001 R468 0/6 R469 0/6 R2 0/4 X_MH001 R3 X_0/4 R233 X_0/4 EMI R236 0/4 9 MH5 MH4 MH9 6 C C264_P X_0R/2 Heatsink Heatsink X_INTEL_ICH9 X_NB MH7 6 X_MH001 X_MH001 MH10 X_MH001 2 SB MH8 NB X_MH001 ICH9 INTEL R209_P X_0R/2 R208_P X_0R/2 R206_P X_0R/2 U21_H U12_H U21_P X_INTEL_P35 VCCD_CRT VCCDQ_CRT X_MH001 C252_P X_0/6 C254_P X_0/4 P35 INTEL V_3P3_DAC_FILTERED Option : cfg-7345-PCD(601-7345-05S) Cost down cfg-7345-PCD(601-7345-10S(PCB1.1)) 1.INTEL P35 cfg-7345-PCD(601-7345-020(PCB1.1)) B KBGND R203_P X_0R/2 3.Audio RTL888 2.ICH9 3.Audio RTL888 Kwoger heatsink 4.北 , IO SPDIF OUT 5.Remove Heatpipe_1 Heat-Pipe module Option : cfg-7345-P(601-7345-03S) cfg-7345-P(601-7345-08S(PCB1.1)) 1.INTEL P35 2.ICH9R MP BOM:cfg-7345-P(601-7345-010(PCB1.1)) Option Parts 3.Audio RTL888T C MH2 Option : cfg-7345-PT(601-7345-04S) 1.INTEL P35 cfg-7345-PT(601-7345-09S(PCB1.1)) 2.ICH9R MP BOM:cfg-7345-PT(601-7345-070(PCB1.1)) MH6 BAT-BCR2032P-RH X_JUMPER-1X2A_green 2.ICH9R 3.Audio RTL888 MH3 Mounting Holes BAT1_X JFP2(4-6) X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS Option : cfg-7345-G(601-7345-01S) 1.INTEL G33 cfg-7345-G(601-7345-06S(PCB1.1)) X_MH001 X_SB R,G,B PULL DOWN Option : cfg-7345-PCDH Cost down(PCB1.1) 1.INTEL P35 cfg-7345-PCDH(601-7345-030(PCB1.1)) Simulation H_1_P X_Cost down Heat-Pipe module B 2.ICH9R 3.Audio RTL888 Cost down Heat-Pipe module 4.北 , 5.Remove 1394 IO SPDIF OUT 6.Remove SIP2 SIM2 X_PIN1*2 SIP3 VCC5 SIM1 X_PIN1*2 : P35 Neo2-FIR BOM ( PCB 1.1) (1).7345_11_0524_FIR.ECR 7345_11_FIR.avl for 601-7345-010.(New BOM) 1.remove rear Spdif out 2.remove E31-0800340-A21( CIRCU-PIPE) 3.add E31-0800341-A21( COST DOWN PIPE) MP minor change cfg-7345-FIR(601-7345-040(PCB1.1)) A A MS-7345 BOM ( G33+ICH9R+ALC888) 601-7345-050 ( G33 Platinum) , 1) 2) Remove ALC888T function cfg-7345-GG(601-7345-060(PCB1.1)) 3) Add ALC888 function 4) Remove VOIP connector 5) PM MP minor change MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Sheet Date: Tuesday, June 26, 2007 Rev 1.2 Manual Parts & Option Parts 30 of 35 ISL6322 VCCP LGA775-CPU 0.8375V - 1.6000V Core 1.2V FSB Vtt VRD11/10.x DDRII x4 & TERMINATOR 0.8375V-1.6000V 4-Phase Switch - 125A - 4.6A 0.9V VTT_DDR 1.5V VCC_DDR (S0,S1) - 0.83A - 9.6A W83310DS Bearlake-G (G33) VTT_DDR D 1.2V FSB_VTT 1.25V Core 1.25V DMI/PCI Exp 1.5V VCC_DDR 1.5V VCC_SMCLK 3.3V VCCA_DAC 3.3V VCC33 1.25V Vcc CL - 1.2 A 13.8A 2.47 A 3.3A 350mA 66 mA 15.8mA 4.9A D 0.75V Linear 0.83A uP6103 SW-Power 1.5V PCI Express x16 slot 6.99A VCC_DDR PWM +12V +3.3Vaux +3.3Vaux +3.3V 18.64A uP6103 SW-Power V_1P25_CORE 1.25V PWM 6.63A C 1.05V Linear 1.05V Core 1.25V DMI 1.2V FSB_VTT 1.5V_A USB/SATA/PLL 1.5V_B PCI Exp VCCRTC 3.3V CL 1.5V GbE LAN 3.3V VccSus3_3 3.3V Vcc3_3 3.3V 10/100 LAN 3.3V GbE LAN 3.3V HDA 3.3V SusHDA - 1.16A 41 mA mA 1.65A 0.65A uA 19 mA 87 mA 200mA 308mA 19 mA mA 32 mA 33 mA +12V +3.3Vaux +3.3Vaux +3.3V 1.16A +12V +3.3Vaux +3.3Vaux +3.3V UPI Controller V_FSB_VTT 1.2V Linear V_1P5_ICH 1.5V - 0.5 A 375mA 20mA 3.0A Linear 3.3V 5.5A 375mA 20mA 3.0A - 375mA 20mA 7.6A 5.0A 0.5A PCI slot x2 2.31A +3.3Vaux +3.3Vaux +3.3V +5V +12V Linear 2.5A Switch 6.35A 5VSB 5V (wake) (no wake) C - 5.8A (wake) (no wake) 5VDIMM - 156mA 5V Switch 6.99A B USB x12 +5V +5V HD Audio RTL888/888T - 32mA - 200mA (S0,S1) (S3) - 6.0A - 20mA (S0,S1) (S3) - 345mA - 2.0mA PS2 ICS906 +5V +5V 3.3V VDD_48/PCI/REF - 250mA 0.3V - 1V CPU/SRC/DOT/PLL - 80mA 5VAudio +5VR 500mA RTL8111B A (wake) (no wake) (TO263) VCC3_SB B 3.3V AUDIO 5V AUDIO 5.5 A 375mA 20mA 3.0A PCI Express x slot 1394 Controller VT6308 3.3V - PCI Express x slot 21.21A V_1P05_ICH ICH9 (wake) (no wake) 3.3V_SB I/O & LED 1.8V EVDD/AVDD 1.5V VDD - 668mA - 198mA - 367mA +12V +5V +3.3V +5VSB +12V 24.97A 3V Battery Bead or Inductor X-Copper ATX 2x2 A ATX POWER MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 Power Delivery Sheet Date: Friday, May 18, 2007 31 of 35 12V RESET MAP PWROK MAP 5V D D Intel LGA775 Processor Intel LGA775 Processor VTT_GD H_CPURST# Bearlake GMCH ICS-CLK 9LPRS906 3.3V VRD 11 ISL6322 1.5VREF VID_GD# Bearlake GMCH H_PWRGD WDRST# VRM_EN VTT_GD signal must be delayed 1~10ms after VTT_FSB for proper clock/cpu function ready NB 1.25V Core WDRST# ICH_SYNC# PLTRST# PWRGD UPI VDDR VRM_GD C C SB 1.5V FP_RST# ICH9 LPC SIO F71882F RSMRST# PCIRST_ICH9# ICH9 VRM_GD SLP_S3# VRM_GD assertion to ICH9 occurs at least 10ms prior to PWRGD assertion to the ICH9 PLTRST_BU3# AC_RST# PLTRST_BU2# RTL888T/888 HD Codec PLTRST_BU1# RESET SW CK_PWRGD PCI Slot PCI Slot PCIE Slot PCIE Slot PCIE Slot PCIE Slot X16 PCIE GIGA-LAN PCIE-to-IDE 88SE6111 1394 VT6308 VID_GD PWR_OK VTT_PWGD PS_ON# PWRBTIN VRM_EN POWER CONN X1 X1 ICS906 PWRBTIN# LPC I/O B V_FSB_VTT Front Panel B CPU VCore X4 VRMGD to SB CK_PGD CHIP_GD PL_RST PCI_RST A A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Date: Friday, May 18, 2007 Rev 1.2 Reset Map & PWROK Map Sheet 32 of 35 ICH8 D C B A GPIO GPIO[0] GPIO[1] GPIO[5:2] GPIO[7:6] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] GPIO[16] GPIO[17] GPIO[18] GPIO[19] GPIO[20] GPIO[21] GPIO[22] GPIO[23] GPIO[24] GPIO[25] GPIO[26] GPIO[27] GPIO[28] GPIO[29] GPIO[30] GPIO[31] GPIO[32] GPIO[33] GPIO[34] GPIO[35] GPIO[36] GPIO[37] GPIO[38] GPIO[39] GPIO[43:40] GPIO[47:44] GPIO[48] GPIO[49] GPIO[50] GPIO[51] GPIO[52] GPIO[53] GPIO[54] GPIO[55] GPIO[56] GPIO[57] GPIO[58] GPIO[59] GPIO[60] SIO(F71882) Alt Func BM_BUSY# TACH1 PIRQ[H:E]# TACH[3:2] unmuxed WOL_EN CLGPIO1 SMBALERT# unmuxed unmuxed CLGPIO2 unmuxed unmuxed TACH0 unmuxed SATA1GP unmuxed SATA0GP SCLOCK LDRQ1# CLGPIO0 STP_CPU# S4_STATE# QRT_STATE0 QRT_STATE1 OC5# OC6# OC7# unmuxed unmuxed unmuxed SATACLKREQ# SATA2GP SATA3GP SLOAD SDATAOUT0 OC[4:1]# OC[11:8]# SDATAOUT1 unmuxed REQ1# GNT1# REQ2# GNT2# REQ3# GNT3# GLAN_DOCK# CLGPIO5 SPI_CS1# OC#0 LINKALERT# I/O/NC I/O I/O I/OD I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Power Core Core Core Core Resume Resume Resume Resume Resume Resume Resume Resume Core Core Core Core Core Core Core Core Resume Resume Resume Resume Resume Resume Resume Resume Core Core Core Core Core Core Core Core Resume Resume Core Core Core Core Core Core Core Core Resume Resume Resume Resume Resume Tol 3.3V 3.3V 5V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 5V 3.3V 5V 3.3V 5V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V Default GPI GPI GPI GPI GPI Native GPI Native GPO GPI GPI Native GPO GPI GPO GPI GPO GPI GPI Native GPO Native Native GPO GPO Native Native Native GPO GPO GPO GPO GPI GPI GPI GPI Native Native GPI GPO Native Native Native Native Native Native GPI GPI GPI Native Native PIN NAME USAGE Signal Name SYS1_FANTAC PIRQ#[H:E] SYS2/3_FANTAC SIO_PME# CPU_FANTAC OC#4 OC#6 OC#6 SPI_WP# SPI_HOLD_GPO# Input/Output NOTES GPIO[2:0] MCH_BSEL2:0] OUTPUT PROGRAMED BSEL[2:0] OUTPUT GPIO3 PCIEX1# OUTPUT PROGRAMED X1/X4 OPTION OUTPUT GPIO4 UNUSED GPIO5 UNUSED GPIO6 UNUSED GPIO7 WDT# OUTPUT WATCH DOG TIMER RESET OUTPUT GPIO10 DLED1 OUTPUT DEBUG LED OUTPUT GPIO11 UNUSED GPIO12 UNUSED GPIO13 BEEP GPIO14 UNUSED GPIO15 DLED2 OUTPUT DEBUG LED OUTPUT GPIO16 DLED3 OUTPUT DEBUG LED OUTPUT GPIO17 UNUSED GPIO20 PLTRST_BU#1 OUTPUT PCI RESTE BUFFER1 GPIO21 PLTRST_BU#2 OUTPUT PCI RESTE BUFFER2 GPIO22 PLTRST_BU#3 OUTPUT PCI RESTE BUFFER3 GPIO23 UNUSED GPIO24 PWR_OK INPUT ATX POWER OK INPUT GPIO26 PWRBTIN INPUT FRONT PANNEL POWER BUTTON GPIO27 PWRBTN# OUTPUT POWER BUTTON BUFFER OUT GPIO30 SLP_S3# INPUT FRONT SOUTBRIDGE S3# GPIO31 PSON# OUTPUT OUTPUT FOR ATX POWER ON GPIO32 DLED4 OUTPUT DEBUG LED OUTPUT D OUTPUT C GPIO33 UNUSED GPIO40 SYS2_FANTAC GPIO41 UNUSED GPIO42 IRTX OUTPUT GPIO43 IRRX INPUT VIDIN[2:0] CPU_BSEL[2:0] INPUT CPU BSEL[2:0] INPUT VIDIN3 UNUSED INPUT RESERVED FOR PCIE X4 INDICATION INPUT DDR-II DIMM Config DEVICE DIMM DIMM DIMM DIMM OC#0;OC#4 OC#8;OC#10 PREQ1# PGNT1# PREQ2# PGNT2# PREQ3# PGNT3# ADDRESS 00 01 10 11 CLOCK P/N_DDR0_A P/N_DDR3_A P/N_DDR0_B P/N_DDR3_B P/N_DDR2_A P/N_DDR5_A P/N_DDR2_B P/N_DDR4_B B PCI Config DEVICE PCI Slot PCI Slot SPI_CS1# OC#0 1394 MCP1 INT Pin PIRQ#A PIRQ#B PIRQ#C PIRQ#D PIRQ#B PIRQ#C PIRQ#D PIRQ#A PIRQ#D REQ#/GNT# IDSEL CLOCK PREQ#0 PGNT#0 AD16 CK_P_33M_S1 PREQ#1 PGNT#1 AD17 CK_P_33M_S2 AD18 CK_P_33M_1394 A PREQ#2 PGNT#2 MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Sheet Date: Friday, May 18, 2007 Rev 1.2 GPIO setting & PCI Routing 33 of 35 D C B A HW Ver.0A Change to Ver.0B List: 2006/12/23 1/.Remove Q54 and R374and short Q54 B,C pin for power sequence.(page26) 2.U24 power change from VCC3 to 3VSB for power sequence.(page26) 3.Change EC42 from 470u to 820u for V_FSB_VTT power noise.(page26) 4.Change EC52 from 470u to 820u for SB1_05 power noise.(page26) 5.Change EC53 from 470u to 820u for SB1_5 power noise.(page26) 5.CPU_GTLREF resistor value R119 , R115, R128, R104 change from 50ohm to 100ohm for pull-up(intel suggestion)(page4) 6.CPU_GTLREF resistor value R124 , R117 , R141 , R105 change from 100ohm to 200ohm for pull-down.(intel suggestion)(page4) 7.MCH_GTLREF resistor value R190 change from 50ohm to 100ohm for pull-pu.(intel suggestion)(page6) 8.MCH_GTLREF resistor value R195 change from 100ohm to 200ohm for pull-down.(intel suggestion)(page6) 9.SRCOMP[3:0] R223 , R227 , R184 , R182 change from 20ohm to 19.1ohm.(intel suggestion)(page7) 10.DDR2 termination RN16 , RN26 , RN11 , RN14 , RN27 , RN12 , R171 change from 39ohm to 43ohm.(intel suggestion)(page14) 11.Add CK_DOT96_MCH_DP pull-high 1.25V and CK_DOT96_MCH_DN pull-down for non-graphic SKU.(intel suggestion)(page6) 12.RIRQ[H:A] pull-up 2.7Kohm to VCC5.(intel suggestion)(page22) 13.USB have two group [5:0] EHCI#1,[6:11EHCI#2 , please one group to real and one group to front.(intel suggestion)(page24) 14.Audio VREFOUT_E and VREFOUT_F swap.(for schematic error)(page20) 15.Audio BASS and CEN_OUT swap.(for schematic error)(page20) 2007/1/5 1.Update E-SATA SATA_TX0/TX#0 and SATA_RX0/RX#0 swap,SATA_TX1/TX#1 and SATA_RX1/RX#1 swap.(Fix can not find E-SATA HD issue) (Please update CIS data base new libry,this libry have describe TX and RX pin name)(Page18) 2007/1/9 1.Add VRMPWPGD Circuit level shift for ICH VRMPWRGD.(Intel Design Guide page193)(Page11) 2.Power team Suggest VRD11-ISL6322 14,15,16pin circuit change.(For intel 05B spec)(Page 28) 3.Power team other suggest R62=330ohm,R57=0ohm,RT2=4.7Kohm,R58=1.6Kohm,R83=39.2Kohm.(Page 28) 2007/01/15 1.Q19 change package.(page26) 2.Only stuff R449 for DUAL CTRL.(page26) 3.Q30,Q29 change package to U35.(page26) 4.Q64,Q65 change package to U34.(page26) 5.Add Q17 for avoid the 5VSB droop when V1_5 power up.(page26) 6.Remove U24(7414 delay control), Add Q64,Q61,Q65 and meet intel power sequencing.(page26) 7.Add Q72,R419 to meet intel power down sequence.(page27) 8.Add R222,R573 for DDR DOC.(page27) 9.Add VRM_PGD level shift circuit.(Intel DG)(page 28) 2007/01/17 1.Change UPI 7501 pin6 from SLP_S4# to SLP_S5#,For AMT support.(Page 26) 2.Update CHIP_PWGD circuit If used SLP_S3# will to fast active low on S0 >S5.(Page 26) 3.VCC1_5VREF used V_1P25_CORE to control UPI 7707 pin3(EN),let V_1P25_CORE and V_1P5_ICH at the same time power up and power down (Add R357=200K and R358=27K)(Page 26) 2007/01/26 1.Change clear CMOS from jump to button.(Page11) 2.Add D18 for F71882 IO VBAT power 3.Change to ICS906 clock GEN.(Page15) 4.F71882 SIN2,DCD2,RI2,CTS2#,DSR2# input pin add pull high 4.7K to VCC3 when non-used COM2.(Fintek AP note)(Page16) 5.Change VSYNC and HSYNC circuit.(Page17) 6.5VDDCCL and 5VDDCDA pull high VCC5 from 8.2Kohm to 2.2Kohm (Fix DDC_CLK and DDC_DATA time issue)(Page17) 7.Add CPUFAN DIP CAP EC104.(Page 18) 8.Add SYSFAN2 DIP CAP EC105.(Page18) 9.Add SYSFAN3 DIP CAP EC106.(Page 18) 10.Change audio from STA9227 to RTL888T and 888 co-lay.(Page 20) 11.Remove 1394 common chock but reserve it.(Page 25) 12.Power Team suggestion R62=681ohm,R57=475ohm R58=1.65Kohm,R67=22Kohm.(fix load line test failed)(Page 28) 2007/02/07 1.Update USB2*2 connect 料 "N53-16M0081-K06",footprint "USB_A4_16_1".(Page24) 2.Update Power1 connect 料 "N93-08M0081-H06",footprint"POWCONN_D8".(Page28) 3.Update sysfan1 from 4pin FAN to 3pin FAN.(Page 18) 4.Update Bearlake from A0 to A1 料 "B01-LE82BE5-I06".(Page 6,7,8,9) 5.Update ICH9 A1 料 "B01-801IB05-I06".(Page 10,11,12) 6.Co-lay intersil switch power on DDR power and NB power.(Page 27) HW Ver.0B Change to Ver.10 List: 2007/02/12 1.Change R393 from connect VRM_GD to ICH_VRM_PGD.(Fix boot issue.)(Page 26) 2.Add R460 for SYS1_FANTAC.(Page 18) 3.Add R470 for Q63 turn on.(Page 26) 4.CN10 "C12-4712813-W08" is singl souce change CN10 料 to "C12-4711013-Y01".(Page 20) 5.Add R244 and R245.(UPI suggestion)(Page 27) 6.Add GPIO23_SIO and GPIO17_SIO for detect ALC888/888T.(Page 16) 2007/0314 1.UPI suggestion R283=4.22K R288=10k, C404=0.1uF C231=NC, C572=NC R222=30K, R573=15K, C63=NC, R431=NC, C74=1uF, R200=2K, R412=NC, C235=NC,R48=510R,R53=10K.(Page26,27) 2.Add SYSFAN4 and SYSFAN5 circuit.(Page18) 3.Remove BEEP circuit(Audio and Fintek I/O),just keep SB BEEP circuit.(Page16,20,29) 4.VGA HSYNC,VSYNC pull down CAP from 33P to 10P.(For fix The Hsync,Vsync of Rise-Voltage Range quality has glitch)(Page17) 5.Update Bearlake from A1 to A2 G33料 "B01-082BL25-I06".(Page 6,7,8,9) 6.Update Bearlake from A1 to A2 P35料 "B01-082BL15-I06".(Page 6,7,8,9) 7.Update ICH9R A2 料 "B01-801IR05-I06".(Page 10,11,12) 8.Update Upi 6261 from A to B 料 "I32-0626119-U33".(Page 26) 9.Remove IR function.(Page 16) 10.Add DLED(8) on board.(Page 29) 11.Add LED(6) on PCI,PCI-E slot.(Page10,21,22) 12.Power team suggestion Q27,Q20,Q11,Q4-make NIKOS-0903(PN: D03-0903BDB-N03) to be main source.(Page 28) 13.Power team suggestion Q16,Q18,Q21,Q26,Q2,Q8,Q5,Q6-make NIKOS-75N02(PN: D03-75N022B-N03) to be main source.(Page 28) 14.Audio SKYPE connect(JSLC1) add (料 FOOTPRINT change).(Page 20) 15.Remove R5 VID_GD pull high( Pull high).(Page 4) 16.R393 connect VRM_PGD change to connect ICH_VRM_PGD.(For fix Q64 can not turn on issue)(Pgae26) 17.USB mode add R470 for Q63 turn on.(Page26) 18.Add R460=27Kohm for FAN speed detect.(Page18) 19.ICSn Clock GEN Pin9 must pull down,Pin64 must pull high for clock GEN straping.(Page15) 20.ICS Clock GEN change to Ver.C 料 "I11-RS90622-I02".(Page15) 21.Update Heatpipe 料 "E31-0800340-A21".(Page30) 22.Add NB,SB heatsink for cost down.(Page30) D C B A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 Revision History Sheet Date: Friday, May 18, 2007 34 of 35 HW Ver.10 Change to Ver.1.1 List: 1.Add EC57 and EC58 for 3VSB and 5VSB drop.(Page 26) 2.Change CPU Vcore CAP from 560u to 820u.(Page 28) 3.Add JB1,JB2 for OC used.(Page 15) 4.R401,R419 from 4.7Kohm to 20Kohm for ATX_PER_OK to tune on 3904.(Page 26,27) 5.ATX_PWR_OK pull up R210=1K to VCC5.(Page 29) D D HW Ver.1.1 Change to Ver.1.2 List: 1.Audio 10u/10V(EC68,69,75,76,72,73,70,80) DIP CAP change to SMD CAP.(Page 20) 2.1394 Extenal components(R88,R84,R81,R71,R74,C60,C68) placement from connect side to chip side.(Page 25) 3.1394 R532=6.34K >6.2K,C622=0.1u >1u.(Page 25) 4.VRD ODT R6=200K >no stuff,R7=100K >22ohm.(Page 28) 5.JUMP cricuit change.(Page 15) 6.Audio CD-G circuit change.(Page 20) 7.E-SATA port0,1 and SATA port2,3 swap.(Page 18) C C B B A A MICRO-STAR INT'L CO.,LTD MS-7345 MSI Size Custom Document Description Rev 1.2 Revision History Sheet Date: Friday, May 18, 2007 35 of 35 www.s-manuals.com ... AC29 AA 32 AA31 AA30 AA29 C VCCA_GPLL R219 1R1% /2 CP 12 X_COPPER A28 A30 B27 B28 B29 B30 C27 C29 C30 D27 D28 D29 E23 E26 E27 E29 F23 F24 F26 G23 G24 G26 H23 H24 J23 J24 K23 K24 L23 L24 M23 M24 M29... N26 N25 N24 N23 M8 M30 M29 M28 M27 M26 M25 M24 M23 L8 K8 K30 K29 K28 K27 K26 K25 K24 K23 J9 J8 J30 J29 J28 J27 J26 J25 J24 J23 J 22 J21 J20 J19 J18 J15 J14 J13 J 12 J11 J10 AN9 AN8 AN30 AN29 AN26... 26 ZIF-SOCK775-15U-IN_TH Y8 Y30 Y29 Y28 Y27 Y26 Y25 Y24 Y23 W8 W30 W29 W28 W27 W26 W25 W24 W23 V8 U8 U30 U29 U28 U27 U26 U25 U24 U23 T8 T30 T29 T28 T27 T26 T25 T24 T23 R8 P8 N8 N30 N29 N28 N27

Ngày đăng: 08/08/2021, 15:01

Tài liệu cùng người dùng

  • Đang cập nhật ...

Tài liệu liên quan