MSI z370 GAMING PLUS (MS 7b61) rev 1 0 схема

D C B A ╔══════════╦═══════════════════════════════════╗ ║ Page ║ TITLE ║ ╠══════════╬═══════════════════════════════════╣ ║ ║ Cover Sheet ║ ║ ║ Block Diagram ║ ║ ║ CPU-Memory ║ ║ ║ CPU-Control/MISC/CFG/Audio ║ ║ ║ CPU-PEG/Display ║ ║ ║ CPU-GND ║ ║ ║ CPU-Power ║ ║ ║ DDR4 SLOT-DIMM1/DIMM2 ║ ║ ║ DDR4 SLOT-DIMM3/DIMM4 ║ ║ 10 ║ DDR4-POWER/GND-1 ║ ║ 11 ║ DDR4-POWER/GND-2 ║ ║ 12 ║ PCH-LPC/SPI/SMBUS/MISC ║ ║ 13 ║ PCH-Clock/Audio ║ ║ 14 ║ PCH-DMI/PCIE/USB/SATA ║ ║ 15 ║ PCH-GPIO/RSVD ║ ║ 16 ║ PCH-POWER ║ ║ 17 ║ PCH-GND ║ ║ 18 ║ PCH-Strap ║ ║ 19 ║ PCIE SLOT (X16) ║ ║ 20 ║ PCIE SLOT (X1) ║ ║ 21 ║ PCIE SLOT (X4) ║ ║ 22 ║ DP to VGA - ITE6516 ║ ║ 23 ║ DVI Connector ║ ║ 24 ║ DISPLAY PORT CON ║ ║ 25 ║ M2_1 2242/2260/2280/22110 ║ ║ 26 ║ NA ║ ║ 27 ║ SATA Connector ║ ║ 28 ║ USB POWER-MP1495/UP7501 ║ ║ 29 ║ Front JUSB1 / JUSB2 2.0 ║ ║ 30 ║ Front JUSB3 3.0 / CHARGE ║ ║ 31 ║ Front JUSB4 3.0 ║ ║ 32 ║ Rear PS2_USB1 3.0 / Redriver ║ ║ 33 ║ Rear LAN_USB2 3.0 / VR ║ ║ 34 ║ NA ║ ║ 35 ║ Rear USB2.0 CON ║ ║ 36 ║ LAN INTEL I219V ║ ║ 37 ║ AUDIO ALC892 ║ ║ 38 ║ AUDIO De-POP ║ ║ 39 ║ SIO-NTC6795D-1 ║ ║ 40 ║ SIO-NTC6795D-2 ║ ║ 41 ║ LED-BOT/AUD/LBAR ║ ║ 42 ║ LED-EZ DBG/PCH/PCIE ║ ║ 43 ║ CPU FAN1 / PUMP_FAN1 ║ ║ 44 ║ SYSTEM FAN 1/2 ║ ║ 45 ║ SYSTEM FAN 3/4 ║ ║ 46 ║ ACPI UPI POWER ║ ║ 47 ║ ATX Power/F_Panel/JTPM/JTBT ║ ║ 48 ║ OV-NCT3933 ║ ║ 49 ║ PWM-RT3606BC VCORE+VGT ║ ║ 50 ║ VCORE MOS-PHASE 1~3 ║ ║ 51 ║ VGT MOS-PHASE 1~2 ║ ║ 52 ║ PWR_12V OCP - UP6273A ║ ║ 53 ║ CPU PWR_VCCIO - NB681G ║ ║ 54 ║ CPU PWR_ST/PLL ║ ║ 55 ║ CPU PWR_SA-RT8125E ║ ║ 56 ║ DDR4 Power-RT8125E ║ ║ 57 ║ DDR4 Power-VPP25 ║ ║ 58 ║ PCH Core Power-RT8125E ║ ║ 59 ║ SPI ROM ║ ║ 60 ║ Clear CMOS SLG4B41231V ║ ║ 61 ║ Manual parts ║ ╠══════════╬═══════════════════════════════════╣ ║ 62 ║ CLOCK MAP ║ ║ 63 ║ GPIO MAP ║ ║ 64 ║ POWER MAP ║ ║ 65 ║ Power Sequence ║ ║ 66 ║ Revision History ║ ╚══════════╩═══════════════════════════════════╝ MS-7B61 Ver: 1.0 ATX PCB size : 304.8mm * 243.84mm D Intel - Kaby Lake Z370 System Chipset: CPU: Z370 Coffee Lake S Onboard Chip: HD Audio Codec : ALC892 LAN : intel I219V SIO : Nuvoton 6795 Flash ROM : 16MB Z270 C Main Memory: DDRIV (800/1066/1333/1600/2133/2400MHz) * (Dual Channel) PWM: ACPI: NIKO/UPI Expansion Slots: PCI Express (X16) Slot *1 PCI Express (X4) Slot * PCI Express (X1) Slot * M2 M-Key * Display : B UPI9508 Other: SATA3.0 *6 FRONT USB2.0 *4 FRONT USB3.0 *4 REAR USB3.0 GEN1 Z270 *4 REAR USB2.0 *2 DISPLAY PORT DVI VGA-ITE6516 DDI to D-SUB A MICRO-STAR INT'L CO.,LTD MS-7B6117ci203 MS-7B61 MSI Size Custom Document Description Rev 1.0 Cover Sheet Date: Wednesday, July 19, 2017 Sheet 1 of 65 MS-7B61 Block Diagram PCIE*X16 SLOT1 Lane0~16 PORT B DP++ Coffeelake-S LGA1151 DDRIV 800/1066/1333/1600/2133 UNBUFFERE DDRIV DIMM B1/B2 D DMI PORT C DVI RGB UNBUFFERE DDRIV DIMM A1/A2 INTEL DISPLAY D VGA D-SUB DDRIV 800/1066/1333/1600/2133 PORT D ITE6516 LAN_USB2 Rear USB 3.0 P1&P2 2.0 P11&P12 JUSB3 Front USB 3.0 P7&P8 2.0 P3&P4 Lane JUSB4 Front USB 3.0 P3&P4 2.0 P5&P6 Lane PCIE*X1 SLOT2 USB3 Rear USB 3.0 P5&P6 2.0 P9&P10 Lane PCIE*X1 SLOT JUSB1 Front USB 2.0 P1&P2 Lane PCIE*X1 SLOT JUSB2 Front USB 2.0 P13&P14 Lane PCIE*X1 SLOT PS2_USB1 Rear USB 2.0 P7&P8 Lane 21/22/23/24 PCIE*X4 SLOT4 Realtek RTL8111H C C Z370 ALC892 SATA 1/2/3_4/5_6 Lane 9/10/11/12 M2_1 2260,2280,22110 HD AUDIO I/F B SPI ROM Lane 13/14/15/16/17/18 SATA 0/1/2/3/4/5 B SPI I/F TPM 1.2 LPC I/F M2_1 PCIe_E1 PCIe_E2 M2 Slot Sequence: 22110 SIO NTC6795 CPU PCIe X16 PCIe X1 PCIe_E3 PCIe X1 PCIe_E4 PCIe X4 PCIe_E5 PCIe X1 PCIe_E6 PCIe X1 KBD MOUSE A COM1 LPT1 A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Rev 1.0 Block Diagram Date: Wednesday, July 19, 2017 Sheet of 65 SOCKET PN N12-151A020-F02 M_BG_A_1 M_ACT_A_N 8 8 M_CKE_A0 M_CKE_A1 M_CKE_A2 M_CKE_A3 8 8 M_CS#_A0 M_CS#_A1 M_CS#_A2 M_CS#_A3 8 8 M_ODT_A0 M_ODT_A1 M_ODT_A2 M_ODT_A3 8 M_BA_A_0 M_BA_A_1 M_BG_A_0 8 8 8 8 M_CK_A_DP0 M_CK_A_DN0 M_CK_A_DP1 M_CK_A_DN1 M_CK_A_DP2 M_CK_A_DN2 M_CK_A_DP3 M_CK_A_DN3 M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAA_A13 M_MAA_A14 M_MAA_A15 M_MAA_A16 AW15 AU18 AU17 AV19 AT19 AU20 AV20 AU21 AT20 AT22 AY14 AU22 AV22 AV12 AV14 AY11 AW13 M_BG_A_1 M_ACT_A_N AV23 AU24 M_CKE_A0 M_CKE_A1 M_CKE_A2 M_CKE_A3 AY24 AW24 AV24 AV25 M_CS#_A0 M_CS#_A1 M_CS#_A2 M_CS#_A3 AW12 AU11 AV13 AV10 M_ODT_A0 M_ODT_A1 M_ODT_A2 M_ODT_A3 AW11 AU14 AU12 AY10 M_BA_A_0 M_BA_A_1 M_BG_A_0 AY13 AV15 AW23 M_CK_A_DP0 AW18 M_CK_A_DN0 AV18 M_CK_A_DP1 AW17 M_CK_A_DN1 AY17 M_CK_A_DP2 AW16 M_CK_A_DN2 AV16 M_CK_A_DP3 AT16 M_CK_A_DN3 AU16 M_PARITY_A AY15 M_ALERT_A_N AT23 M_PARITY_A M_ALERT_A_N AU33 AT33 AW33 AV31 AU31 AV33 AW31 AY31 B DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_DQ[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_DQ[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_DQ[2] DDR0_MA[3] DDR0_DQ[3] DDR0_MA[4] DDR0_DQ[4] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_DQ[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_DQ[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_DQ[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_DQ[8] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_DQ[9] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_DQ[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_DQ[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_DQ[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_DQ[13] DDR0_MA[14]/DDR0_CAB[2]/DDR0_WE# DDR0_DQ[14] DDR0_MA[15]/DDR0_CAB[1]/DDR0_CAS# DDR0_DQ[15] DDR0_MA[16]/DDR0_CAB[3]/DDR0_RAS# DDR0_DQ[32]/DDR0_DQ[16] DDR0_DQ[33]/DDR0_DQ[17] DDR0_DQ[34]/DDR0_DQ[18] DDR0_BG[1]/DDR0_CAA[9]/DDR0_MA[14] DDR0_DQ[35]/DDR0_DQ[19] DDR0_ACT#/DDR0_CAA[8]/DDR0_MA[15] DDR0_DQ[36]/DDR0_DQ[20] DDR0_DQ[37]/DDR0_DQ[21] DDR0_DQ[38]/DDR0_DQ[22] DDR0_CKE[0] DDR0_DQ[39]/DDR0_DQ[23] DDR0_CKE[1] DDR0_DQ[40]/DDR0_DQ[24] DDR0_CKE[2] DDR0_DQ[41]/DDR0_DQ[25] DDR0_CKE[3] DDR0_DQ[42]/DDR0_DQ[26] DDR0_DQ[43]/DDR0_DQ[27] DDR0_DQ[44]/DDR0_DQ[28] DDR0_CS#[0] DDR0_DQ[45]/DDR0_DQ[29] DDR0_CS#[1] DDR0_DQ[46]/DDR0_DQ[30] DDR0_CS#[2] DDR0_DQ[47]/DDR0_DQ[31] DDR0_CS#[3] DDR1_DQ[0]/DDR0_DQ[32] DDR1_DQ[1]/DDR0_DQ[33] DDR1_DQ[2]/DDR0_DQ[34] DDR0_ODT[0] DDR1_DQ[3]/DDR0_DQ[35] DDR0_ODT[1] DDR1_DQ[4]/DDR0_DQ[36] DDR0_ODT[2] DDR1_DQ[5]/DDR0_DQ[37] DDR0_ODT[3] DDR1_DQ[6]/DDR0_DQ[38] DDR1_DQ[7]/DDR0_DQ[39] DDR1_DQ[8]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR1_DQ[9]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR1_DQ[10]/DDR0_DQ[42] DDR0_BG[0]/DDR0_CAA[5]/DDR0_BA[2] DDR1_DQ[11]/DDR0_DQ[43] DDR1_DQ[12]/DDR0_DQ[44] DDR1_DQ[13]/DDR0_DQ[45] DDR1_DQ[14]/DDR0_DQ[46] DDR0_CKP[0] DDR1_DQ[15]/DDR0_DQ[47] DDR0_CKN[0] DDR1_DQ[32]/DDR0_DQ[48] DDR0_CKP[1] DDR1_DQ[33]/DDR0_DQ[49] DDR0_CKN[1] DDR1_DQ[34]/DDR0_DQ[50] DDR0_CKP[2] DDR1_DQ[35]/DDR0_DQ[51] DDR0_CKN[2] DDR1_DQ[36]/DDR0_DQ[52] DDR0_CKP[3] DDR1_DQ[37]/DDR0_DQ[53] DDR0_CKN[3] DDR1_DQ[38]/DDR0_DQ[54] DDR1_DQ[39]/DDR0_DQ[55] DDR1_DQ[40]/DDR0_DQ[56] DDR1_DQ[41]/DDR0_DQ[57] DDR0_PAR DDR1_DQ[42]/DDR0_DQ[58] DDR0_ALERT# DDR1_DQ[43]/DDR0_DQ[59] DDR1_DQ[44]/DDR0_DQ[60] DDR1_DQ[45]/DDR0_DQ[61] DDR1_DQ[46]/DDR0_DQ[62] DDR1_DQ[47]/DDR0_DQ[63] AE38 AE37 AG38 AG37 AE39 AE40 AG39 AG40 AJ38 AJ37 AL38 AL37 AJ40 AJ39 AL39 AL40 AN38 AN40 AR38 AR37 AN39 AN37 AR39 AR40 AW37 AU38 AV35 AW35 AU37 AV37 AT35 AU35 AY8 AW8 AV6 AU6 AU8 AV8 AW6 AY6 AY4 AV4 AT1 AT2 AV3 AW4 AT4 AT3 AP2 AM4 AP3 AM3 AP4 AM2 AP1 AM1 AK3 AH1 AK4 AH2 AH4 AK2 AH3 AK1 M_DATA_A5 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A0 M_DATA_A6 M_DATA_A7 M_DATA_A13 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A8 M_DATA_A12 M_DATA_A14 M_DATA_A15 M_DATA_A21 M_DATA_A16 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A17 M_DATA_A22 M_DATA_A23 M_DATA_A25 M_DATA_A28 M_DATA_A27 M_DATA_A31 M_DATA_A29 M_DATA_A24 M_DATA_A30 M_DATA_A26 M_DATA_A32 M_DATA_A36 M_DATA_A34 M_DATA_A35 M_DATA_A33 M_DATA_A37 M_DATA_A39 M_DATA_A38 M_DATA_A44 M_DATA_A40 M_DATA_A47 M_DATA_A43 M_DATA_A41 M_DATA_A45 M_DATA_A46 M_DATA_A42 M_DATA_A49 M_DATA_A54 M_DATA_A53 M_DATA_A50 M_DATA_A52 M_DATA_A51 M_DATA_A48 M_DATA_A55 M_DATA_A61 M_DATA_A63 M_DATA_A60 M_DATA_A59 M_DATA_A62 M_DATA_A57 M_DATA_A58 M_DATA_A56 DDR0_DQSN[0] DDR0_DQSN[1] DDR0_DQSN[4]/DDR0_DQSN[2] DDR0_DQSN[5]/DDR0_DQSN[3] DDR1_DQSN[0]/DDR0_DQSN[4] DDR1_DQSN[1]/DDR0_DQSN[5] DDR1_DQSN[4]/DDR0_DQSN[6] DDR1_DQSN[5]/DDR0_DQSN[7] DDR0_DQSN[8] AF39 AK39 AP39 AU36 AW7 AU3 AN3 AJ3 AU32 M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7 DDR0_DQSP[0] DDR0_DQSP[1] DDR0_DQSP[4]/DDR0_DQSP[2] DDR0_DQSP[5]/DDR0_DQSP[3] DDR1_DQSP[0]/DDR0_DQSP[4] DDR1_DQSP[1]/DDR0_DQSP[5] DDR1_DQSP[4]/DDR0_DQSP[6] DDR1_DQSP[5]/DDR0_DQSP[7] DDR0_DQSP[8] AF38 AK38 AP38 AV36 AV7 AU2 AN2 AJ2 AV32 M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7 DDR0_ECC[0] DDR0_ECC[1] DDR0_ECC[2] DDR0_ECC[3] DDR0_ECC[4] DDR0_ECC[5] DDR0_ECC[6] DDR0_ECC[7] CPU_CA_VREF_A TP1 DDR0_VREF_DQ AB40 AC40 DDR_VREF_CA DDR0_VREF_DQ CPU1B M_MAA_B[16 0] CFL-S D C AVL: N12-151A040-L06 CPU1A M_MAA_A[16 0] 8 CHANNEL A M_DATA_A[63 0] 9 M_BG_B_1 M_ACT_B_N 9 9 M_CKE_B0 M_CKE_B1 M_CKE_B2 M_CKE_B3 9 9 M_CS#_B0 M_CS#_B1 M_CS#_B2 M_CS#_B3 9 9 M_ODT_B0 M_ODT_B1 M_ODT_B2 M_ODT_B3 9 M_BA_B_0 M_BA_B_1 M_BG_B_0 9 9 9 9 M_CK_B_DP0 M_CK_B_DN0 M_CK_B_DP1 M_CK_B_DN1 M_CK_B_DP2 M_CK_B_DN2 M_CK_B_DP3 M_CK_B_DN3 M_PARITY_B M_ALERT_B_N M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7 8 8 8 8 M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7 8 8 8 8 CFL-S M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_MAA_B11 M_MAA_B12 M_MAA_B13 M_MAA_B14 M_MAA_B15 M_MAA_B16 AL19 AL22 AM22 AM23 AP23 AL23 AW26 AY26 AU26 AW27 AP18 AU27 AV27 AR15 AL17 AP16 AN18 DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_MA[3] DDR1_MA[4] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_MA[14]/DDR1_CAB[2]/DDR1_WE# DDR1_MA[15]/DDR1_CAB[1]/DDR1_CAS# DDR1_MA[16]/DDR1_CAB[3]/DDR1_RAS# M_BG_B_1 M_ACT_B_N AY28 AU28 DDR1_BG[1]/DDR1_CAA[9]/DDR1_MA[14] DDR1_ACT#/DDR1_CAA[8]/DDR1_MA[15] M_CKE_B0 M_CKE_B1 M_CKE_B2 M_CKE_B3 AY29 AV29 AW29 AU29 DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] M_CS#_B0 M_CS#_B1 M_CS#_B2 M_CS#_B3 AP17 AN15 AN17 AM15 DDR1_CS#[0] DDR1_CS#[1] DDR1_CS#[2] DDR1_CS#[3] M_ODT_B0 M_ODT_B1 M_ODT_B2 M_ODT_B3 AM16 AL16 AP15 AL15 DDR1_ODT[0] DDR1_ODT[1] DDR1_ODT[2] DDR1_ODT[3] M_BA_B_0 M_BA_B_1 M_BG_B_0 AL18 AM18 AW28 DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_BG[0]/DDR1_CAA[5]/DDR1_BA[2] M_CK_B_DP0 M_CK_B_DN0 M_CK_B_DP1 M_CK_B_DN1 M_CK_B_DP2 M_CK_B_DN2 M_CK_B_DP3 M_CK_B_DN3 AM20 AM21 AP22 AP21 AN20 AN21 AP19 AP20 DDR1_CKP[0] DDR1_CKN[0] DDR1_CKP[1] DDR1_CKN[1] DDR1_CKP[2] DDR1_CKN[2] DDR1_CKP[3] DDR1_CKN[3] M_PARITY_B AL20 M_ALERT_B_N AY25 AR25 AR26 AM26 AM25 AP26 AP25 AL25 AL26 DDR1_PAR DDR1_ALERT# DDR1_ECC[0] DDR1_ECC[1] DDR1_ECC[2] DDR1_ECC[3] DDR1_ECC[4] DDR1_ECC[5] DDR1_ECC[6] DDR1_ECC[7] CPU_CA_VREF_B AC39 DDR1_VREF_DQ DDR0_DQ[16]/DDR1_DQ[0] DDR0_DQ[17]/DDR1_DQ[1] DDR0_DQ[18]/DDR1_DQ[2] DDR0_DQ[19]/DDR1_DQ[3] DDR0_DQ[20]/DDR1_DQ[4] DDR0_DQ[21]/DDR1_DQ[5] DDR0_DQ[22]/DDR1_DQ[6] DDR0_DQ[23]/DDR1_DQ[7] DDR0_DQ[24]/DDR1_DQ[8] DDR0_DQ[25]/DDR1_DQ[9] DDR0_DQ[26]/DDR1_DQ[10] DDR0_DQ[27]/DDR1_DQ[11] DDR0_DQ[28]/DDR1_DQ[12] DDR0_DQ[29]/DDR1_DQ[13] DDR0_DQ[30]/DDR1_DQ[14] DDR0_DQ[31]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[16] DDR0_DQ[49]/DDR1_DQ[17] DDR0_DQ[50]/DDR1_DQ[18] DDR0_DQ[51]/DDR1_DQ[19] DDR0_DQ[52]/DDR1_DQ[20] DDR0_DQ[53]/DDR1_DQ[21] DDR0_DQ[54]/DDR1_DQ[22] DDR0_DQ[55]/DDR1_DQ[23] DDR0_DQ[56]/DDR1_DQ[24] DDR0_DQ[57]/DDR1_DQ[25] DDR0_DQ[58]/DDR1_DQ[26] DDR0_DQ[59]/DDR1_DQ[27] DDR0_DQ[60]/DDR1_DQ[28] DDR0_DQ[61]/DDR1_DQ[29] DDR0_DQ[62]/DDR1_DQ[30] DDR0_DQ[63]/DDR1_DQ[31] DDR1_DQ[16]/DDR1_DQ[32] DDR1_DQ[17]/DDR1_DQ[33] DDR1_DQ[18]/DDR1_DQ[34] DDR1_DQ[19]/DDR1_DQ[35] DDR1_DQ[20]/DDR1_DQ[36] DDR1_DQ[21]/DDR1_DQ[37] DDR1_DQ[22]/DDR1_DQ[38] DDR1_DQ[23]/DDR1_DQ[39] DDR1_DQ[24]/DDR1_DQ[40] DDR1_DQ[25]/DDR1_DQ[41] DDR1_DQ[26]/DDR1_DQ[42] DDR1_DQ[27]/DDR1_DQ[43] DDR1_DQ[28]/DDR1_DQ[44] DDR1_DQ[29]/DDR1_DQ[45] DDR1_DQ[30]/DDR1_DQ[46] DDR1_DQ[31]/DDR1_DQ[47] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63] AD34 AD35 AG35 AH35 AE35 AE34 AG34 AH34 AK35 AL35 AK32 AL32 AK34 AL34 AK31 AL31 AP35 AN35 AN32 AP32 AN34 AP34 AN31 AP31 AL29 AM29 AP29 AR29 AM28 AL28 AR28 AP28 AR12 AP12 AM13 AL13 AR13 AP13 AM12 AL12 AP10 AR10 AR7 AP7 AR9 AP9 AR6 AP6 AM10 AL10 AM7 AL7 AM9 AL9 AM6 AL6 AJ6 AJ7 AE6 AF7 AH7 AH6 AE7 AF6 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63 DDR0_DQSN[2]/DDR1_DQSN[0] DDR0_DQSN[3]/DDR1_DQSN[1] DDR0_DQSN[6]/DDR1_DQSN[2] DDR0_DQSN[7]/DDR1_DQSN[3] DDR1_DQSN[2]/DDR1_DQSN[4] DDR1_DQSN[3]/DDR1_DQSN[5] DDR1_DQSN[6] DDR1_DQSN[7] DDR1_DQSN[8] AF34 AK33 AN33 AN29 AN13 AR8 AM8 AG6 AN26 M_DQS_B_DN0 M_DQS_B_DN1 M_DQS_B_DN2 M_DQS_B_DN3 M_DQS_B_DN4 M_DQS_B_DN5 M_DQS_B_DN6 M_DQS_B_DN7 DDR0_DQSP[2]/DDR1_DQSP[0] DDR0_DQSP[3]/DDR1_DQSP[1] DDR0_DQSP[6]/DDR1_DQSP[2] DDR0_DQSP[7]/DDR1_DQSP[3] DDR1_DQSP[2]/DDR1_DQSP[4] DDR1_DQSP[3]/DDR1_DQSP[5] DDR1_DQSP[6] DDR1_DQSP[7] DDR1_DQSP[8] AF35 AL33 AP33 AN28 AN12 AP8 AL8 AG7 AN25 M_DQS_B_DP0 M_DQS_B_DP1 M_DQS_B_DP2 M_DQS_B_DP3 M_DQS_B_DP4 M_DQS_B_DP5 M_DQS_B_DP6 M_DQS_B_DP7 CHANNEL B M_DATA_B[63 0] D C M_DQS_B_DN0 M_DQS_B_DN1 M_DQS_B_DN2 M_DQS_B_DN3 M_DQS_B_DN4 M_DQS_B_DN5 M_DQS_B_DN6 M_DQS_B_DN7 9 9 9 9 M_DQS_B_DP0 M_DQS_B_DP1 M_DQS_B_DP2 M_DQS_B_DP3 M_DQS_B_DP4 M_DQS_B_DP5 M_DQS_B_DP6 M_DQS_B_DP7 9 9 9 9 B LGA1151 LGA1151 ZIF-SOCKET1151-HF ZIF-SOCKET1151-HF A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Rev 1.0 CPU-Memory Date: Wednesday, July 19, 2017 Sheet of 65 CFG Strap CFG Table VCCSTPLL CPU1E R192 R194 R185 R184 R307 R343 D X_100R1%/4 100R1%/4 56.2R1%/4 1KR1%/4 10KR/4 1KR1%/4 CPU_VIDCLK CPU_VIDSOUT H_VIDALERT# H_PROCHOT# 13 PCH_CPU_BCLK_DP 13 PCH_CPU_BCLK_DN 13 PCH_CPU_PCIE_DP 13 PCH_CPU_PCIE_DN CPU_CATERR_N CPU_THERMTRIP_N 13 PCH_CPU_NSSC_CLK_DP 13 PCH_CPU_NSSC_CLK_DN +VCCIO 47 CPU_VIDCLK 47 CPU_VIDSOUT 47 H_VIDALERT# 47 H_PROCHOT# R1356 X_1KR/4 CPU_CNL_N R193 R191 CFL-S PCH_CPU_BCLK_DP PCH_CPU_BCLK_DN W5 W4 BCLKP BCLKN PCH_CPU_PCIE_DP PCH_CPU_PCIE_DN W1 W2 PCI_BCLKP PCI_BCLKN PCH_CPU_NSSC_CLK_DP PCH_CPU_NSSC_CLK_DN K9 J9 CLK24P CLK24N 220R/4 499R1%/4 CPU_VIDCLK CPU_VIDSOUT CPU_VIDALERT# H_PROCHOT#_R E38 E40 E39 C39 VIDSCK VIDSOUT VIDALERT# PROCHOT# CRB 1.0 update R11 change 100R 12 CPU_PWRGD 12 CPURST# 12,37 CPU_PECI 12 CPU_PM_SYNC 12 CPU_PM_DOWN 12 PCH_THERMTRIP F8 VCCST_PWRGD U2 R367 0R/4 CPURST#_R E7 C365 X_C0.1U16X/4 CPU_PECI G7 CPU_PM_SYNC E8 R327 20R/4 CPU_PM_DOWN_R D8 R331 CPU_THERMTRIP_N D11 PROCPWRGD VCCST_PWRGD RESET# AC36 AB36 AC38 D13 DDR_VTT_CNTL PROC_SELECT# SKTOCC# CATERR# 56 DDR_VTT_CTRL 52 CPU_CNL_N 15,37,40,45 CPU_SKTOCC# CPU_CATERR_N C1364 C0.1U16X/4 C R276 49.9R1%/4 CFG_COMP VCC_SENSE VSS_SENSE C38 D38 VCCCORE_SENSE VSSCORE_SENSE VCCCORE_SENSE 47 VSSCORE_SENSE 47 VCCGT_SENSE VSSGT_SENSE F39 F38 VCCGT_SENSE VSSGT_SENSE VCCGT_SENSE 47 VSSGT_SENSE 47 VCCSA_SENSE VCCIO_SENSE VSS_SAIO_SENSE AD5 AF4 AE4 VCCSA_SENSE VCCIO_SENSE 10 11 12 13 14 15 VCCSA_SENSE 54 VCCIO_SENSE 52 HIGH No Lock LOW Lock NORM REVERSE DISABLE DISABLE DISABLE RESET# ENABLE ENABLE ENABLE BIOS REQ CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] F14 E14 F18 G18 CFG[17] CFG[16] CFG[19] CFG[18] M11 D RSVD RSVD PECI PM_SYNC PM_DOWN THERMTRIP# H15 F15 F16 H16 F19 H18 G21 H20 G16 E16 F17 H17 G20 F20 F21 H19 DESCRIPTION PCU PLL lock RSVD PEG_LANE_REVERSAL RSVD eDP PEG0CFGSEL[0] PEG0CFGSEL[1] PEG_DEFER_TRAINING RSVD RSVD RSVD RSVD RSVD RSVD VCCSTPLL 2014.09.29 remove PROC_TDO PROC_TDI PROC_TMS PROC_TCK H13 G12 F13 F11 XDP_TDO XDP_TDI XDP_TMS XDP_TCK0 BPM#[0] BPM#[1] BPM#[2] BPM#[3] D16 D17 G14 H14 Remove XDP V3 V2 U1 PCH_CPU_AUD_SCLK PCH_CPU_AUD_SDO PCH_CPU_AUD_SDI_R F12 B9 B10 XDP_TRST CPU_PREQ CPU_PRDY D1 B3 CPU_INPUT_TRIGGER CPU_OUTPUT_TRIGGER_R XDP_TDO XDP_TDI XDP_TMS XDP_TCK0 XDP_TDO XDP_TDI XDP_TMS XDP_TCK0 12 12 12 12 R342 R348 R341 R349 X_51R/4 X_51R/4 X_51R/4 51R/4 Close CPU 20K Loop2 32 48 CORE_CSN1 11 NTC_Lb COMPA GT_FB CORE_CSP1 CSN 1.3K->1.2K COMP FB VR83 VC44 4.7K1%/4 VR120 TONSET 14 CORE_PWM4 49 X_0.1u16X4 VC19 VGT_VSS_SENSE_R 13 CORE_PWM2 48 CORE_PWM3 49 VR77 ALERT# CORE_FB VCORE_VSS_SENSE_R 100R1%/4 Diff pair 0R/4 DAC 100R1%/4 0R/4 VR86 VCORE_VCC_SENSE_R VC16 +VCCGT C1000p50X/4 48,49,50 CORE_PWM1 48 Loop1 24.9K->39K VC38 DRCTRL CSP TONSET 1KR1%/4 10KR/4 0A to 10 SMB VC50 C1u6.3X/6 R1889 VR62 PWM2_IMAXA CSN1 R1884 A 49 PSYS VCCSTPLL B DRCTRL VR_RDY VR52 2N7002D PCB layout notice: DRCTRL trace is noise sensitive, keep >15mil space to other net VINSEN VCC VU1 19 20 15,37,40,45 CPU_SKTOCC# R86 47KR/4 Sheet 47 of 65 0603 12VIN R1900 +12VIN R1899 NTC1a X_0R/6 RT7 100KRT1%4 RT6 10KRT1%/4 Vcore = 1.52V ICCMAX = 138A Irms = 17.25A RT7放置在VccCORE 這組switching power 最熱的地方 0R/6 Driver_VCC NTC_Lb NTC_La D D RT6 放在CHOKE20與CHOKE21中間 12VIN UG1 0603 R274 UG1 C957 C1u16X/6 C958 C10u16X5/8 Q143 U76 2.2R/1%6 NIKO/PK616BA X_10KR1%/4 47 CORE_PWM1 VCC PWM UGATE EN 47,49,50 DRCTRL GND-1 GND-2 C1u16X/6 UG1_R R1907 0R/6 BT1_R R1910 0R/6 BOOT PHASE LGATE +VCCCORE NIKO/PK616BA CHOKE20 C960 C0.1u25X/6 PH1 CH-0.22u60A0.5m-HF 8/25 Modify to 25V C11-1042023-W08 LG1 C959 Q142 Q144 LG1 UP1962PDN8 R1909 place at MOSFET side Driver_VCC Q145 CP26 CP27 X_COPPER C NIKO/PK632BA R1908 2.2R/8 NIKO/PK632BA X_COPPER C956 C3.3n50X4 C I33-1962P0C-U33 47 CORE_CSP1 47 CORE_CSN1 12VIN UG2 0603 R1903 2.2R/1%6 UG2 C952 C1u16X/6 C953 C10u16X5/8 Q147 B U75 X_10KR1%/4 47 CORE_PWM2 VCC PWM EN 47,49,50 DRCTRL GND-1 GND-2 C1u16X/6 UGATE UG2_R R1901 0R/6 BOOT BT2_R R1905 0R/6 PHASE LGATE NIKO/PK616BA +VCCCORE NIKO/PK616BA CHOKE21 C955 PH2 C0.1u25X/6 CH-0.22u60A0.5m-HF 8/25 Modify to 25V C11-1042023-W08 LG2 C954 Q146 Q148 LG2 UP1962PDN8 B R1904 place at MOSFET side Driver_VCC NIKO/PK632BA Q149 R1902 2.2R/8 CP20 CP21 X_COPPER NIKO/PK632BA X_COPPER C951 C3.3n50X4 I33-1962P0C-U33 47 CORE_CSP2 47 CORE_CSN2 A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 VCORE - PHASE 1~2 Sheet 48 of 65 12VIN UG3 0603 UG3 R336 C961 C1u16X/6 C962 C10u16X5/8 Q151 C304 C0.1U16X/4 U71 2.2R/1%6 NIKO/PK616BA X_10KR1%/4 47 CORE_PWM3 VCC PWM UGATE EN 47,48,50 DRCTRL GND-1 GND-2 C1u16X/6 UG3_R R1912 0R/6 BT3_R R1913 0R/6 BOOT PHASE LGATE C964 C0.1u25X/6 D +VCCCORE NIKO/PK616BA CHOKE22 PH3 CH-0.22u60A0.5m-HF 8/25 Modify to 25V C11-1042023-W08 LG3 C963 Q150 R1914 D place at MOSFET side Driver_VCC Close to Q150 Q152 LG3 UP1962PDN8 Q153 NIKO/PK632BA R337 2.2R/8 CP28 CP29 X_COPPER NIKO/PK632BA X_COPPER C324 C3.3n50X4 I33-1962P0C-U33 47 CORE_CSP3 47 CORE_CSN3 C C 12VIN UG4 0603 UG4 R1918 C968 C1u16X/6 C2 C10u16X5/8 Q155 U77 2.2R/1%6 NIKO/PK616BA X_10KR1%/4 PWM EN 47,48,50 DRCTRL UGATE UG4_R R1916 0R/6 BT4_R R1920 0R/6 BOOT PHASE LGATE +VCCCORE NIKO/PK616BA CHOKE23 C969 C0.1u25X/6 PH4 CH-0.22u60A0.5m-HF 8/25 Modify to 25V C11-1042023-W08 LG4 47 CORE_PWM4 VCC GND-1 GND-2 C22 C1u16X/6 Q154 R1919 place at MOSFET side Driver_VCC Q156 LG4 UP1962PDN8 B Q157 NIKO/PK632BA R1917 2.2R/8 CP31 CP32 X_COPPER NIKO/PK632BA X_COPPER C967 C3.3n50X4 B I33-1962P0C-U33 47 CORE_CSP4 47 CORE_CSN4 +VCCCORE 1 1 1 1 CD560u6.3SO-HF-2 CD560u6.3SO-HF-2 + CD560u6.3SO-HF-2 + CD560u6.3SO-HF-2 + CD560u6.3SO-HF-2 + CD560u6.3SO-HF-2 + CD560u6.3SO-HF-2 + + CD560u6.3SO-HF-2 + C966 C22u6.3X5/8 C965 C22u6.3X5/8 EC55 EC54 EC46 EC45 EC44 EC43 EC42 EC41 A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 VCORE - PHASE 3~4 Sheet 49 of 65 +VCCGT 1 1 EC6 EC48 Vcore = 1.52V ICCMAX = 45A Irms = 9.79A + + + CD560u6.3SO-HF-2 CD560u6.3SO-HF-2 CD560u6.3SO-HF-2 CD560u6.3SO-HF-2 D 2 2 100KRT1%4 RT9放置在VccGT 這組switching power 最熱的地方 RT8 放在L50與L52中間 CD560u6.3SO-HF-2 RT9 + 10KRT1%/4 + RT8 EC47 NTCA1a EC7 NTCA_La EC49 NTCA_Lb D 12VIN D01-BAT5429-D07 D76 BT1A_R X BT2A_R Driver_VCC place at MOSFET side Y Z UG1A_R R1926 0R/6 UG1A S-BAT54ALT1G_SOT23-RH R46 R1935 0603 X_10KR1%/4 U78 C972 C1u16X/6 Q158 C973 C1u16X/6 +VCCGT NIKO/PK616BA CHOKE24 2.2R/1%6 13 UG1A_R PH1 12 PH1A LG1 11 LG1A BOOT2 BT2A_R UG2 UG2A_R NC PH2 PH2A GND GND LG2 10 LG2A BOOT1 ISP1 ISP2 ISP2 GT_PWM1 PWM0 47,48,49 DRCTRL 15 47 47 GT_CSP1A GT_CSP1A 17 EN ISP0 R1928 0R/6 C974 PH1A C0.1u25X/6 CH-0.22u60A0.5m-HF 8/25 Modify to 25V C11-1042023-W08 LG1A UG1 VCC 16 BT1A_R BT1A_R ISP1 C978 C1u16X/6 C 14 Q159 LG1A NIKO/PK632BA uP1961SQDD_WQFN16-HF ISP1 R1923 X_0R/4 I33-1961S0C-U33 ISP2 R1934 0R/4 Q160 R1927 2.2R/8 47 CP37 X_COPPER X_COPPER C971 C3.3n50X4 NIKO/PK632BA ISEN1A_1 CP36 C GT_CSP1 R1924 5.6K/1%4 GT_CSP1 C970 C1000p50X/4 GT_CSN1 47 GT_CSN1 12VIN place at MOSFET side UG2A_R R1930 UG2A 0R/6 R1932 B C8 C976 C10u16X5/8 C10u16X5/8 Q161 B X_10KR1%/4 +VCCGT NIKO/PK616BA CHOKE25 BT2A_R R1933 0R/6 C977 C0.1u25X/6 PH2A CH-0.22u60A0.5m-HF LG2A 5 8/25 Modify to 25V C11-1042023-W08 Q162 LG2A NIKO/PK632BA ISP1 R119 0R/4 ISP2 R1922 X_0R/4 Q163 NIKO/PK632BA 47 ISEN1A_2 R1931 2.2R/8 CP39 X_COPPER X_COPPER C975 C3.3n50X4 GT_CSP2 R1929 5.6K/1%4 GT_CSP2 C81 C1000p50X/4 GT_CSN2 47 CP38 GT_CSN2 A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 VGT MOS-PHASE 1~2 Sheet 50 of 65 ATX_5VSB VCC5 2.2R/1%6 C0.1U16X/4 10KR1%/4 6.8KR1%4 C0.1U16X/4 374KR1%4 R1537 R1536 C1350 33K/1%/4 68KR1%4 C2200p50X/4 RT9553_VCC VCC RT9553_EN 2.024V EN TIMER 375k:15us 125K:5us SIO_3VA 11 ILIM N93-08M0221-H06 OVSET UVSET R1522 R1521 C1348 R1525 R1524 C1349 100KR/4 X_78.7KR1%4 C2200p50X/4 X_38.3KR1%4 100KR/4 C2200p50X/4 SIO_3VA 12VIN_CS_P SIO_3VA 1 12VIN C6 C0.1U16X/4 C23 C0.1U16X/4 C24 C0.1U16X/4 C31 C0.1U16X/4 D Iripple=30.95A VCORE 18.101A VGT 8.457A VCCSA 4.392A OCP:30A Real OCP:30.05A C 12VIN C71-2711761-N07 RT9553BGQW R17+R18>100k 12VIN 12VIN_CS_N UV: 0V OV:30.42V EP(GND) CP15 X_COPPER MEC1 CP14 PWRCONN8P_BLACK-RH-2 X_COPPER R1520 C17 R1526 R1531 C19 R1523 VCC5 D R10 X_0R/4 Default:Hi ;Acitve:UP +12VIN RT9553_RESET GND +12V RESET GND CSP R1539 RT9553_FLAG# GND 0R/4 GND 12VIN_CSP_R RT9553_PROCHOT# EC60 CD270u16SO-RH-9 + 12VIN EC59 CD270u16SO-RH-9 + PROCHOT# EC58 CD270u16SO-RH-9 + CSN CHOKE1 CH-0.22u40A0.58m-RH EC57 CD270u16SO-RH-9 + 10 L04-22B7331-T15 +12VIN EC56 CD270u16SO-RH-9 + 12VIN_CSN_R CPU_PWR1 +12V +12V +12V R1535 10KR/4 U114 Vsio_3va= 3.33V I3933_imon*[R17*R18/(R17+R18)]= Istep* Rdcr*100 I3933_imon= 10uA/step Istep=4.785A 12VIN_CS_P R1529 C20 C0.1U16X/4 4,47,54 VRM_EN 12VIN_CS_N ATX_5VSB D G S 40.2R1%04 C1334 C10u16X5/6 R1534 12VIN_CSP_R 0R/4 12VIN_CSN_R C R1530 680R1%04 R1533 Q2 N-2N7002 Rdc is DCR of the input inductor R7 10KR/4 Q1 G2 RT9553_FLAG#_G 0R/4 D2 FAULT#_VRD R2 0R/4 PWR_FAULT# PWR_FAULT# C21 C0.1U16X/4 45 D1 S2 RT9553_FLAG# S1 G1 2N7002D B B A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 CPU_PWR_12V OCP - UP6273A Sheet 51 of 65 VCCIO 0.95V; 5.5A IMAX 10A ILIMIT=10A~12A IOC=ILIMIT+40%*IMAX/2=12A~14A VCCIO support OV=>NB685 NB685_BST IOR5 4.7R1%/4 I9C-685GQ0C-M03 U26 0R IOR6 80L6A-30_0805-RH IOC4 C22u16X5/8 IOC3 C22u16X5/8 IOC1 C0.1U16X/4 VIN 16 EN1 15 EN2 FB 13 VDDQ 12 VCCIO_PG VTT PG IOR7 10KR/4 5.6R/6 IOC6 C1u6.3X/6 3V3 C PGND VCCIO_3V3 VCC3 AGND C404 X_C0.1U16X/4 R318 VCCIO_FB IOR12 X_499K1% IOR11 X_499R1%/4 IOC10 X_C3.3n50X4 IOC13 C0.1U16X/4 C16 X 1 0.85 0.875 0.95 0.975 X 0 1 D IOC12 C0.1U16X/4 IOC11 C0.1U16X/4 IOC5 IOC14 IOC9 IOC8 IOC7 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8 CPU Side VTTREF VTTS OTW 11 MODE 14 +VCCIO IOR10 6.8R1% IOR4 150K NB685GQ_QFN16-HF close CPU C VCCIO_SENSE_R VCCIO_PG 1 1 +VCCIO VCCIO_SENSE_R 47 IOR3 100KR/4 VOUT(V) +VCCIO IOL1 NB685_SW SW IOR2 300K/4 VCCIO_EN C0 1.0u15A7.5mS-HF BST Width:＞20mil IOR1 80L6A-30_0805-RH L04-01072H0-T15 AVL:L04-0107800-M26 IOC2 C0.22u16X/4 10 +12V_IO 12VIN 0.7776uH≒L≒1.1664uH NB685_BST_R 12vin or +12v D LP# C1 IOR8 0R/4 VCCIO_SENSE X_C0.1U16X/4 CPU_CNL_N come from CPU PROC_SELECT# AGND->DGND CPU_CNL_N CPU_CNL_N IOR13 X_5.9K1% IOR9 1KR1%/4 VCCIO_FB CP4 X_COPPER VCCIO_OV 46 from NCT3933 R288 1.74K/4 SLP_S3# assertion to VCCIO VR disabled ＜1uS SLP_S3# assertion to VCC, VCCGT, VCCIO and VCCSA rails completely off DGND VCC_DDR B B R347 10KR/4 VCC3 R346 X_10KR/4 SLP_S3# assertion to max:1us ATX_5VSB R338 X_10KR/4 R345 47KR/4 R352 10KR/4 Q53 R351 10KR/4 NN-MMDT3904_SOT363-6-HF VCCIO_EN# D2 VCCIO_EN G2 D1 S2 G1 S1 C399 X_C0.1U16X/4 Q46 47,54 SLP_S3_CTRL VCCIO_EN VR disabled 2N7002D C398 X_C0.1U16X/4 A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 CPU PWR_VCCIO - NB681G Sheet 52 of 65 VCCSTPLL for Gaming3/5, Classic, ECO and H110 1.0V; 250mA For Cost down VCCST&VCCPLL merge 5VDUAL 新增VCCST漏電線路 ATX_5VSB R332 3VSB 10R/4 VCCSTPLL_CNTL C346 C1u6.3X5/4 EN:VIH 1.4V / VIL 0.6V EN pin Maximum:5.5V G2 VSTPLL_EN D2 D1 3VSB S2 POK EN VIN C345 C22u6.3X5/6 NC C793 X_C0.1U16X/4 R408 VOUT C344 C560p50X/4 G1 SLP_S4# S1 12,27,37,44,55,56 VDD Q66 2N7002D VSTPLL_EN_S4 D VCCSTPLL U35 GND-2 R403 4.7KR/4 GND-1 R409 47KR/4 D FB R328 1KR1%/4 VCCSTPLL_FB C335 C22u6.3X5/8 GS7133SO-R_PSOP8 I31-7133S02-N03 R329 3.16KR1%/4 X_0R/4 AVL: I31-3730S02-N62 Q65 2N7002D 37,45 G2 PS_ON# VSTP_EN_Q SLP_S3# R407 4.7KR/4 C422 C0.1U16X/4 C VSTPLL_EN S2 VSTP_EN_Q D1 CP5 46 VCCSTPLL_OV X_COPPER NO OV,R26->25.5K,R27->100K, C178 unstuff from NCT3933 VCCIO ramped and stable before beginning of VCCOPC/VCCEOPIO ramp G1 S1 12,27,37,44,47,56 D2 POK (OD pin) Vout @92% of full value delay 1.7ms OK to high VCCST/PLL stable 1ms before PROCPWRGD C VCCPLL_OC 1.2V; 110mA 2014.08.21 update 3VSB I31-7116S09-N03 VCCSFR_OC AVL:I31-0111A29-U33 I31-8866509-A36 U44 B VDD EN GS7116S5-ADJ-R_SOT23-5 VOUT C792 X_C0.1U16X/4 ADJ GND VCCSFR_OC_EN Channel SPEC ATX_5VSB EN:VIH1.2V EN pin Maximum:VIN+0.3V C406 C4.7u6.3X5/8 C423 C1u6.3X5/4 GS7116 datasheet EN:VIH 1.6V / VIL 0.6V EN pin Maximum:6.5V C407 C0.1U16X/4 B R395 1KR1%/4 R418 47KR/4 Q68 2N7002D C434 G2 C0.01u25X/4 VCCSFR_OC_FB D2 D1 S2 SLP_S4# G1 CP6 46 VCCSFR_OC_OV R396 2KR1%/4 X_COPPER from NCT3933 S1 12,27,37,44,55,56 3VSB 2014.08.25 update 2014.08.25 update S3 have power ATX_5VSB R417 47KR/4 R410 47KR/4 Q67 2N7002D G2 D2 3V VCCSFR_OC_EN D1 12,27,37,44,47,56 SLP_S3# R422 0R/4 R416 X_0R/4 S2 G1 A S1 55 DDR_PWRGD A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 CPU PWR_ST/PLL Sheet 53 of 65 SA Power:1.05V,12.3A 10R/6 VCCSA_VCC C379 C1u16X/6 VCC3 VCCSA_PG C374 C1000p50X/4 up1540ㄩC5/R415 no stuff EN VCCSA_PG PGOOD SA_REFOUT 10 REFOUT R361 768R1%/4 Rdson(low)10V REFIN C361 C1000p50X/4 2014.12.25 for up1540:C39 is OCP set min:5K ohm stuff 5.36K OCP SET:15.76A 46 BOOT SA_BOOT1 PHASE SA_PH1 UGATE SA_UG1 LGATE/OCSET SA_LG1 FB R379 0R/6 C387 VCCSA C0.1U16X/4 D R350 10R/4 SA_FB SA_BST1 R368 1KR1%/4 R362 0R/4 SA_FB_R R356 0R/4 VCCSA_SENSE FB:0.8V RT8125EGQW_WDFN10-HF SA_REFIN D03-4C05N03-O05 : 3.4mohm D03-632BA0C-N03 : 3.3mohm D03-3056M00-U47 : 4.2mohm U39 VCCSA_EN VCC Rocs:5.76K,OCP: D03-4C05N03-O05 : 16.94A D03-632BA0C-N03 : 17.45A use UBIQ MOS need Check GND R354 10KR/4 2014.08.25 update EN:VIH 2.4V / VIL 0.4V EN pin Maximum:5.5V Internal Pull-high 11 D R380 +12V Rocpset:5.49K OCP=Rocset*Rdson(Low side)/10uA =7.32K*2.5mohm/10uA =18.3A I32-8125E0C-R11 SA_FB_RC C368 C100p50N/4 R369 3.16KR1%/4 R353 0R/4 SA_OV +12V C C Irms = Iout * SQRT((Vout/Vin) * (1 - (Vout/Vin))) = 18* 0.2825 L7 30L3A-15_0805-RH = 5.086A L8 30L3A-15_0805-RH L02-3008014-M09 Pull up by layout&Check level VCCSA_12VIN +12V C367 C1u16X/6 ATX_5VSB R363 26.1KR1%/4 SA_UG1 R360 0R/6 SA_UG1_R 3.3V Q59 C22u16X5/8 Near High side MOS Q57 D03-616BA0C-N03 N-2N7002 VRM_EN線路update L04-01073F0-M26 1.05V,12.3A CHOKE11 C388 C0.1U16X/4 N-2N7002 VCCSA B CH-1.0u14A5.5mS-HF + R384 2.2R/8 VCCSA_EN SA_LG1 D 47,52 SLP_S3_CTRL G S Q56 N-2N7002 R385 4.53KR1%/4 SLP_S3# assertion to max:1us C355 C22u6.3X5/8 D03-632BA0C-N03 EC26 CD560u6.3SO-HF-2 EC27 CD560u6.3SO-HF-2 snubber C71-5610671-N07 C386 C3300p50X/6 NIKO/PK632BA 2014.12.25 for up1540:R417 no stuff SLP_S3# assertion to VCC, VCCGT, VCCIO and VCCSA rails completely off Q58 SA_SNB C349 C1u6.3X5/4 + EN:VIH2.4V EN pin Maximum:6.5V S SA_PH1 G Q61 D 4,47,51 VRM_EN C383 C22u16X5/8 NIKO/PK616BA S B C384 C22u16X5/8 Footprint:CHK_IHLP2525CZ01 R355 10KR/4 D G C385 VCCSA_EN R386 47KR/4 C366 C10u16X5/8 2014.08.21 update Lmin = ((Vin - Vout)/(Fsw * k * Iout_max)) * (Vout/Vin) = 0.5914uH (K = 30%) 2016.8.9 4.53K for OCP=18.3A VR disabled A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 CPU PWR_SA-RT8125E Sheet 54 of 65 OCP =13.2A*1.5=19.8A Rocs(R3)=OCP*Rdson[(Low side)/2]/10uA =19.8A*(4.6/2)mohm/10uA =4.95Kohm < 5K ohm DDR_VCC C145 C1u6.3X/6 EN:VIH 2.4V / VIL 0.4V EN pin Maximum:5.5V Internal Pull-high R206 10KR/4 U18 53 DDR_PWRGD DDR_VR_EN EN DDR_PWRGD PGOOD DDR_REFO C129 C1000p50X/4 up1540 : C145/R102 no stuff R200 10 665R1%/4 BOOT DDR_BOOT PHASE DDR_PH UGATE DDR_UG LGATE/OCSET DDR_LG REFOUT REFIN R225 0R/6 DDR_BST C150 C0.1U16X/4 D DDR_FB FB R208 FB:0.8V RT8125EGQW_WDFN10-HF 11 Rocpset:4.3K OCP=Rocset*Rdson(Low side)/10uA =4.75K*4.6mohm/10uA =21.85A 10R/6 1KR1%/4 VCC_DDR C131 X_C0.1U16X/4 DDR_FB_RC R202 Vout=0.8*(1+R1/R2) X_0R/4 I32-8125E0C-R11 46 R201 DDR_OV 0R/4 DDR_REF R214 1.96KR1%/4 C130 2014.12.25 for up1540:R52>NC up1540 stuff R Rdson(low)4.5V C1000p50X/4 2014.12.25 for up1540:stuff R55->0R 2014.12.25 for up1540:C125 is OCP set min:5K ohm R105 stuff 5.1K OCP SET:22.173A D03-4C05N03-O05 : mohm D03-632BA0C-N03 : 4.6mohm D03-3056M00-U47 : 6.2mohm Irms = Iout * SQRT{(Vout/Vin) * [1 - (Vout/Vin)]} = 13.2* 0.427 L04-12A7721-T15 = 5.636A C CHOKE2 CH-1.2u15A3.2m-HF-1 (OS-CON CAP) 5VDIMM_IN 2 CD560u6.3SO-HF-2 C 5VDIMM EC5 + DDR_UG_R CD560u6.3SO-HF-2 0R/6 Q24 C0.1U16X/4 R205 C10u6.3X5/6 DDR_UG C89 + C125 EC4 D R227 5VDIMM 5VDIMM VCC DDR4_1.2V 2.5A+9.5A+1.2A=13.2A 2.5A FOR CPU 9.5A FOR 4DIMM 1.2A FOR DDR VTT GND C64 C0.1U16X/4 C71-5610671-N07 NIKO/PK616BA D03-616BA0C-N03 1 CD560u6.3SO-HF-2 CD560u6.3SO-HF-2 C154 C3300p50X/6 2014.12.25 for up1540:R95 ->NC + C10u6.3X5/6 C22u6.3X5/8 C22u6.3X5/8 D03-632BA0C-N03 B snubber C22u6.3X5/8 NIKO/PK632BA C185 C177 C168 C218 C294 EC21 EC18 L04-11A7331-T15 C1u6.3X5/4 R226 6.98KR1%/4 R234 2.2R/8 DDR_SNB OCPSET Q29 13.2A VCC_DDR + DDR_LG 1.2V CHOKE6 CH-1.1u32A1.8m-HF DDR_PH B C71-5610671-N07 2016.8.9 4.99K for OCP=19.8A Datasheet公式計算 Lmin = ((Vin - 1.2V)/(Fsw * k * Iout_max)) * (Vout/Vin) = 0.7677uH (K = 30%) 2016.10.27 6.89K for OCP=20A 若帶入CAP ESR計算,0.2432uH＜L＜1.2897uH 2014.12.17 update From SIO pin 87 37 SIO_VDDQ_EN VPP_VR_PG control預留 37,56 VPP_VR_PG R694 0R/4 R207 X_0R/4 DDR_VR_EN ATX_5VSB R708 47KR/4 Q93 2N7002D C627 X_C1u6.3X5/4 A DDR_S4_EN G2 D2 A D1 S2 SLP_S4# G1 S1 12,27,37,44,53,56 MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 DDR4 Power-RT8125E Sheet 55 of 65 4DIMM :2.24A FOR DDR VPP2.5V VPP25 Power 2.5V; 2.24A VPP25 5VDIMM_VPP 5VDIMM_VPP C391 C0.22u6.3X5/4 L04-47B7930-M26 D 5VDIMM L02-3008014-M09 AVL: L04-47B7350-M26 5VDIMM_VPP VPP25 VPP25_MODE U36 C337 C0.1U16X/4 13 R323 X_47KR/4 R320 X_10KR/4 C339 C0.1U16X/4 VPP_EN EN:VIH 1.6V / VIL 0.4V EN pin Maximum:6.0V ATX_5VSB OUT FB VPP_PHASE1 CH-0.47u5A21mS-HF EN PG VPP25_MODE SW-1 SW-2 MODE/VCON R344 200KR1%/4 VPP25 VPP25_FB 5VDIMM VPP25 C350 C330p50N/4 VPP25_RAMP VPP25 CHOKE10 Ramp R335 63.4KR1%/4 12 GND C412 C0.1U16X/4 C362 C22u6.3X5/8 37,55 VPP_VR_PG VIN-1 VIN-2 D Close DIMM C363 C22u6.3X5/8 C330 C22u6.3X5/8 30L3A-15_0805-RH C322 C22u6.3X5/8 L5 5VDIMM_VPP R315 10KR/4 C338 C22u6.3X5/8 L6 5VDIMM_VPP 30L3A-15_0805-RH C370 C10u6.3X5/6 MP2147GD-Z_QFN12-RH R311 47KR/4 Q52 2N7002D C323 G2 C1u6.3X5/4 R324 X_0R/4 R325 0R/4 S2 G1 R309 100KR/4 D G S R310 X_100KR/4 ENABLE HIGH:1.6V C R330 3.3KR1%/4 C347 C0.1U16X/4 S1 SLP_S4# 37 SIO_VPP_EN 5VDIMM VPP_EN D2 D1 C 12,27,37,44,53,55 I9C-P21470C-M03 R312 2.2KR/4 Q49 N-2N7002 R316 X_0R/4 C318 C1u16X/6 To make sure VPP EN after 5VDIMM stable DDR VTT Power B B VCC_DDR VCC_DDR VCC5 VTT_DDR C231 C0.22u6.3X5/4 near pin6 0.3*4=1.2A C215 C0.1U16X/4 12,27,37,44,47,53 SLP_S3# VIN EN1 DDR_VTT_CTRL EN2 VOUT NC VTT_DDR near DIMM slot VCC_DDR VREF C273 C10u6.3X5/6 C272 C10u6.3X5/6 C274 C0.1U16X/4 EN1, EN2 Enable : HIGH > 0.8V Disable : Low < 0.4V VCNTL R268 10KR1%/4 U24 PAD GND C174 C10u6.3X5/6 VCC_DDR VTT_DDR C246 C0.1U16X/4 C245 C0.1U16X/4 C259 C0.1U16X/4 R272 10KR1%/4 VTT_DDR_VREF NCT3103S_ESOP8-HF I31-3103S02-N62 C219 C0.1U16X/4 R273 10KR1%/4 2015.03.02 change to 3103S A A NCT3103S co-lay NCT3102S/UP0109 MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 DDR4 Power-VPP25 Sheet 56 of 65 PCH_1VSB 1.0V; 11A Rdson(low side mosfet)4.5V D03-3116M00-U47 : 3.6 mohm D03-632BA0C-N03 : 4.6mohm D03-3056M00-U47 : 6.2mohm OCP = 16.69A OCP = 10uA*7.68K / 4.6 mohm = 16.69 A D D Rocs:7.87K,OCP: D03-4C05N03-O05 : 15.74A D03-632BA0C-N03 : 17.1A use UBIQ MOS need Check 5VDUAL L04-47B7730-T15 for OC, Gaming 10, 9, 7, L04-12A7321-L65 for Gaming 3, SLI, ECO R725 10R/6 L04-12A7721-T15 for cost down 2014.08.25:Change 1u/0603 L02-3008014-M09 PCH_SWIC_VCC C650 EN:VIH 2.4V / VIL 0.4V EN pin Maximum:5.5V Internal Pull-high C1u6.3X/6 30L3A-15_0805-RH PCH_BOOT PCH_PHASE 10 REFOUT UGATE PCH_UGATE LGATE/OCSET PCH_LGATE C10u16X5/8 Q92 C651 too Big X_C0.1U16X/4 MAX:10.664A C71-5610671-N07 PCH_1VSB NIKO/PK616BA C Q90 CH-1.0u14A5.5mS-HF C546 C803 C804 C10u6.3X5/6 C1u6.3X5/4 C22u6.3X5/8 C22u6.3X5/8 PCH_CORE_FB_CP C536 1KR1%/4 C10u6.3X5/6 C71-5610671-N07 CP7 R739 C547 X_0R/4 C22u6.3X5/8 R738 C537 PCH_CORE_FB_RC CD560u6.3SO-HF-2 AVL: L04-0107800-M26 C597 C3300p50X/6 C657 X_C0.01u25X/4 CD560u6.3SO-HF-2 D03-632BA0C-N03 2016.08.15 change used L04-01073F0-M26 PCH_SNB NIKO/PK632BA L04-01073F0-M26 EC33 R648 2.2R/8 2016.8.9 4.22K for OCP=16.69A 2016.10.27 5.62K for OCP=17.8A PCH Bottom CHOKE12 +1 D03-616BA0C-N03 2014.12.25 for up1540:R177->NC 46 PCH_CORE_OV to sink/source over voltage IC pin10 sink/source current capability can't over 1mA So max voltage can't over 1.8V from NCT3933 CD560u6.3SO-HF-2 EC32 RT8125EGQW_WDFN10-HF I32-8125E0C-R11 R759 0R/4 PCH_R_UGATE R726 5.62KR1%/4 PCH_CORE_FB C659 C1000p16X/4 0R/6 C626 C0.1U16X/4 5VDUAL 11 PCH_REFIN FB R687 C625 REFIN PCH_R_BOOT +1 C 0R/6 R758 665R1%/4 GND PCH_REFOUT R727 1 PHASE BOOT PGOOD 2014.12.25 for up1540:C193 is OCP set min:5Kohm R185 stuff 7.87K OCP SET:15.74A L9 EC36 EN VCC C634 C0.1u16X/6 + PCH_1VSB_EN 2014.08.21 update C660 C1000p16X/4 30L3A-15_0805-RH 5VDUAL_PCH_IN U61 2014.12.25 for up1540:C236&R204 ->NC L10 Lmin = ((Vin - Vout)/(Fsw * k * Iout_max)) * (Vout/Vin) = 0.8335uH (K = 30%) PCH_1VSB X_COPPER PLACE UNDER THE PCH R750 3.92KR1%/4 B B Vout = = = = 5VDUAL Vref * (1 + R821/R822) 0.8 * (1 + 1K/3.92K) 0.8 * 1.2551 1.004V R757 X_47KR/4 PCH_1VSB_EN PCH_1VSB_EN 59 C658 X_C0.1U16X/4 0728: Change net name PCH_1VSB_EN R768 ATX_5VSB 10KR/4 D OPC_1P8_EN# G S Q98 N-2N7002 C676 X_C0.1U16X/4 D 37,38,44,58 SIO_SLPSUS G S Q110 N-2N7002 A A C B E 3VSB R783 1KR1%/4 R782 2.21KR1%/4 Q99 2N3904 MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom 0902 : Stuff R when NO PCH_1P8 & V_OPC_1P8 Document Description Date: Wednesday, July 19, 2017 Rev 1.0 PCH Core Power-RT8125E Sheet 57 of 65 SPI_VCC3 SPI_VCC3 JSPI1 11 PCH_SPI_MISO PCH_SPI_CS0# SPI_SW_SEL PCH_SPI_IO2 D C709 C0.1U16X/4 PCH_SPI_MOSI PCH_SPI_CLK EMI D 12 PCH_SPI_IO3 H2X6[10]M-2PITCH_BLACK-RH-3 N31-2061451-H06 SPI_VCC3 3VSB C48 C0.1U16X/4 CP10 X_COPPER D25 X_ESD-MLVS0402L04 P.S Close to JSPI1 R767 0R/4 PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_MISO PCH_SPI_MOSI PCH_SPI_IO2 PCH_SPI_IO3 CHIP_PWGD PCH_PWROK For TL624-1.1 : Stuff R62 Old : Don't stuff R62 SPI_VCC3 C SPI_VCC3 PCH_SPI_CS0# 12 PCH_SPI_CLK 12 PCH_SPI_MISO 12 PCH_SPI_MOSI 12 PCH_SPI_IO2 12 PCH_SPI_IO3 12 CHIP_PWGD 12,37 PCH_PWROK 4,12 SPI_VCC3 C SPI_VCC3 A BIOS R778 X_2.2KR/4 R780 SPI1 X_1KR/4 PCH_SPI_CS# PCH_SPI_MISO PCH_SPI_IO2 R779 R781 15R/4 15R/4 SPI1_MISO SPI1_IO2 CS VCC DO(IO1) HOLD(IO3) WP(IO2) CLK GND DI(IO0) C701 C0.1U16X/4 C710 C10u6.3X5/6 Module Stuff CHIP_PWGD, But PCH_PWROK may ramp up before CHIP_PWGD R808 X_1KR/4 SPI1_IO3 SPI1_CLK SPI1_MOSI R807 R777 R776 15R/4 15R/4 15R/4 PCH_SPI_IO3 PCH_SPI_CLK PCH_SPI_MOSI For Tl624 1.1 W25Q128FVSIQ-HF M31-2512893-W03 12,37 CHIP_PWGD AVL:M31-2512832-M24 CHIP_PWGD ATX_5VSB 12,37 RSMRST# D28 SPI_SW_SEL X_S-RB751V-40_SOD323-RH R775 10KR/4 RSMRST# D27 S-RB751V-40_SOD323-RH D74 12,37 SIO_DPWROK S-RB751V-40_SOD323-RH D31 37,38,44,57 SIO_SLPSUS B B S-RB751V-40_SOD323-RH A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 SPI ROM Sheet 58 of 65 Function IN Co-Lay NOT U18 , VBAT 3VDSW D Stuff R260 INPUT1 20160505 1 X_0R/4 0 1 0 0 Z X CRB Y D20 VBAT1 VBAT1 Default S-BAT54C_SOT23 D01-BAT54H9-N47 D01-BAT54H9-O05 R588 45.3KR1%/4 OUTPUT1 R568 C560 C1u6.3X/6 VBAT_3VDSW INPUT2 IN VBAT_PCH VBAT R589 3KR1%/4 Function OUT INPUT3 & lowswitch EN INPUT4 OUTPUT2 OUTPUT3 0 1 1 (discharge) 1 0 (discharge) 1 0 (discharge) VOUT D R549 1KR1%/4 Co-Lay NOT USE U1 , R20 STUFF VBAT1_BAT BAT1_X1 OUT RTCRST# R523 X_0R/4 Default RTCRST#_D BAT1 BAT2P_BLACK-RH-1 N91-01F0151-L06 If STUFF R20 Please Check RTCRST# Double Pull High BAT-BCR2032P-RH D06-0100101-P01 VBAT Co-Lay NOT USE U18 , C SIO_3VA 14 R522 X_4.7KR/4 U54 VDD R508 100KR/4 R550 20KR1%/4 CLR_CMOS 37 CLR_CMOS RTCRST#_D 2 CLR_CMOS# RTCRST#_PCH OUTPUT1 INPUT2 11 RTCRST# RTCRST# D19 ESD-0402-L D0G-130050C-A68 AVL:D0G-1200520-I05 37 R537 RTCRST#_D ATX_5VSB CUT_VBAT function X_4.7KR/4 CUT_VBAT DIS_CHARGE N31-1020151-H06 R524 100KR/4 ALL UNSTUFF 12 SIO_3VA 10 INPUT3 INPUT4 DIS_CHARGE If has cut other power,please use output OUTPUT2 12 POWER_OFF RTCRST#_SIO OUTPUT3 13 RTCRST#_D POWER_OFF CUTVBAT DCPRTC R492 4.7KR/4 3VA_OFF# RTCRST#_D 38 3VA_OFF# Q77 N-2N7002 LOW SWITCH VIN VBAT NC-1 NC-2 If has discharge function R15 change to ESD ESD"D0G-2950500-SI0" VBAT_PCH(POWER) VOUT VBAT_PCH 3VDSW R969 9.1KR1%/4 16 R494 5.6KR/4 G S B DCPRTC 44 D POWER_OFF VBAT GND-1 GND-2 C541 C1u6.3X/6 INPUT1 Co-Lay NOT USE U1 , RTCRST# Pull high on PCH side CLR_CMOS function 1 H1X2M_BLACK-RH C Close to Pin14 VBAT JBAT1 C279 UnstuFF C524 C0.1U16X/4 Q79 POWER_OFF R493 2.2KR/4 D 20160503 G B S N-2N7002 SLG4B41231V_STQFN14-HF PCH_TIME C521 C0.1U16X/4 T70-412310C-SF9 20160629 PCH_1VSB_EN PCH_1VSB_EN 57 CLR_CMOS R958 100KR/4 Q78 POWER_OFF D 3VSB_EN G 3VSB_EN 44 S N-2N7002 Q80 PCH_1VSB POWER_OFF D G S N-2N7002 3VSB CUT_VBAT R959 X_100KR/4 A A MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Date: Wednesday, July 19, 2017 Rev 1.0 Clear CMOS SLG4B41231V Sheet 59 of 65 PCB Mounting Holes MH9 X_MH001 X_MH001 MH8 MH11 6 X_MH001 X_MH001 5 E31-0504590-A87 X_MH001 MH7 D X_MH001 MOS-W_HS1 MEC2 MEC2 MH10 HS-0P505260-HF MEC2 CPU_H1 C MH5 MEC1 E21-7869020-F02 MEC1 X_MH001 MH4 鐵座 X_MH001 CPU MEC1 PD0-07B6110-E48 PCH_HS1 MH2 PD0-07B6110-G37 CPU_H1 7B61_1.0 CPU Socket metal sheet MH1 D PCB1 X_MH001 C HS-0408740-RH C696 C0.1U16X/4 E31-0408740-A87 C718 C0.1U16X/4 BIOS Label AMI_LABLE AMI_BIOS LABLE BIOS_LABLE G51-M1SPXXA-A09 CFOS Label LABLE1 Label B CFOS CFOS SIM1 XSPLIT Label LABLE2 Label +VCCCORE +VCCGT VCC_DDR VCCSA +VCCIO PCH_1VSB SIM2 SIM1 SIM2 X_PIN1*2 X_PIN1*2 XSPLIT X_XSPLIT Y02-MA00401-XSP B Test point Simulation Y02-MU00170-CFO VCORE VGT VCC_DDR VCCSA VCCIO PCH_1VSB Optical Fiducial Marks-120 SSE Label LABLE3 FM1 FM2 FM3 FM4 VCCSTPLL VCCST Label VCCSFR_OC SSE SSE VCCSFR VTT_DDR Y02-MA00101-SSE FM5 FM6 FM7 FM8 VTT_DDR VPP25 VPP25 MKT Label LABLE4 A Label A MKT MKT G51-M1SPK88-Q13 To POWER 2015/02/03 MICRO-STAR INT'L CO.,LTD MS-7B61 MSI Size Custom Document Description Rev 1.0 Manual parts Date: Wednesday, July 19, 2017 Sheet 60 of 65 ... VCC -12 0 VCC -11 9 VCC -11 8 VCC -11 7 VCC -11 6 VCC -11 5 VCC -11 4 VCC -11 3 VCC -11 2 VCC -11 1 VCC -11 0 VCC - 10 9 VCC - 10 8 VCC - 10 7 VCC - 10 6 VCC - 10 5 VCC - 10 4 VCC - 10 3 VCC - 10 2 VCC - 10 1 VCC - 10 0 VCC -09 9 VCC -09 8 VCC -09 7 VCC -09 6... VSS -0 01 VSS -00 2 VSS -00 3 VSS -00 4 VSS -00 5 VSS -00 6 VSS -00 7 VSS -00 8 VSS -00 9 VSS- 01 0 VSS- 01 1 VSS- 01 2 VSS- 01 3 VSS- 01 4 VSS- 01 5 VSS- 01 6 VSS- 01 7 VSS- 01 8 VSS- 01 9 VSS -02 0 VSS -0 21 VSS -02 2 VSS -02 3 VSS -02 4... 11 6 11 8 12 0 12 3 12 5 12 7 12 9 13 1 13 4 13 6 13 8 14 7 14 9 15 1 15 4 15 6 15 8 16 0 16 2 16 5 16 7 16 9 17 1 17 3 17 6 17 8 18 0 18 2 18 4 18 7 18 9 19 1 19 3 19 5 19 8 200 202 239 2 41 243 246 248 2 50 252 254 257 259 2 61 263