MSI h55m p31 MS 7636 rev 1 3 схема

5 Title D C B Page Cover Sheet Block Diagram/Device Map/GPIO Table/history 2, 3, 4, CPU-CLK/Control/MISC/PEG ,CPU-Memory ,7 CPU-Power,CPU-GND ,9 DDR III DIMM / 10,11 CLK GEN ICS4105 12 PCH-PCI-E/PCI/DMI/USB/CLK 13 PCH-SATA/HOST/FAN/GPIO/Display 14 PCH-SMB/LPC/AUDIO/RTC/SPI/JTAG/RST 15 PCH-POWER,GND/NVRAM 16,17 SIO-Fintek F71889F/Print Port/COM1/COM2 18 PCIE x16 & x1, x1 Slots 19 PCI SLOT 20 LAN-RTL8111DL 21 Audio Codec ALC889 22 JMB-368 IDE*1 23 VGA - D-Sub 24 DVI-D 25 SATA conn / FAN Control 26 USB 27 ATX F_Panel/EMI/TPM/Buzzer/KB 28 ACPI Controller (uPI solution) DDR Power - uP6103 1-Phase PCH Power - 1P05-Linear CPU_VTT Power - uP6103_1 Phase GPU Power -ISL6314_1-Phase CPU Power - uP6206 3-Phase Manual & Option parts D INTEL - Lynnfield/ Clarkdale LGA 1156 System Chipset: INTEL-IBEXPEAK PCH (H - 55) OnBoard Chipset: Clock Gen:ICS 4105B HD Audio Codec:ALC889 LAN:RTL8111D 10/100/1000 SIO:F71889 Flash ROM: 64 Mb SPI (CHIP) IDE X1 JMB-368 C Main Memory: DDRIII (800/1066/1333MHz) * (Dual Channel) Expansion Slots: PCI Express (X16) Slot * PCI Express (X1) Slot * PCI Slot *1 PWM: Controller: uP6206 OV by uP6264 or SIO uP6103 (CPU_VTT) Linear (PCH) uP6103(DDR) GPU Power -ISL6314 ( 3-Phase use STD MOS 95W ) 32 ACPI: uPI+SIO 33 Other: 34 36 A uATX(244mm X 240mm) CPU: 30 31 MS-7636 Ver: 1.3 29 35 CPU XDP SATA(SATA2-300MB/s) *6 USB2.0 *10 (Rear*4 / Front*6) PRINT Header *1 COM pin header *2 TPM Header *1 on BOARD BUZZER D-SUB *1 DVI PORT*1 BOM SKUs H55:chiset S:solid cap EL:EL cap G:giga lan 8111DL M:Miga lan 8103EL 6: ports DVI: DVI Stuff MSI B A MICRO-STAR INT'L CO.,LTD MS-7636 Size Custom Document Description Rev 1.3 Cover Sheet Date: Friday, March 19, 2010 Sheet 1 of 38 INTEL CONFIDENTIAL D D UNBUFFERED DDRIII DIMM1 DDRIII 1066,1333 UNBUFFERED DDRIII DIMM2 128bit INTEL PCIE SLOT DDRIII 1066,1333 LGA 1156 16X 16X DDRIII FIRST LOGICAL DIMM FDI LINK X8 DMI X4 IBEXPEAK C DVI PORT:B VGA RGB C PCIE PCIE X1 SLOT USB-6 USB-5 USB-4 USB-3 USB-1 USB-2 USB-0 PCIE X1 SLOT GIGA LAN JMB-368 PCH H55 USB 2.0 IDE*1 HD AUDIO I/F B USB-7 USB-8 Audio Codec USB-9 B SPI ROM SPI I/F SATA#0 SATA II I/F SATA#1 SATA#2 SATA#3 SATA#4 PCI BUS SATA#5 PCI SLOT #1 LPC I/F SIO A A MICRO-STAR INT'L CO.,LTD KB/ MOUSE COM1/Print Port MSI MS-7636 Size Custom Document Description Rev 1.3 Block Diagram Date: Friday, March 19, 2010 Sheet of 38 DDR DIMM config Device Address PCI Config DEVICE Clock CHA DIMM1 10100001B MEM_MA_CLK_H0/L0 H1/L1 CHB DIMM2 10100000B MEM_MB_CLK_H0/L0 H1/L1 PCI Slot MCP1 INT Pin PCI_INT#A PCI_INT#B PCI_INT#C PCI_INT#D REQ#/GNT# PCI_REQ0# PCI_GNT0# IDSEL CLOCK AD16 PCH CLKOUT_PCI D D TPM PCH CLKOUT_PCI SIO PCH CLKOUT_PCI PCI RESET DEVICE IBEXPEAK C Signals PCIRST#_PCH PLTRST_BU1# PLTRST_BU2# PLTRST_BU3# PLTRST# C Target PCISLOT1 JMB368 IDE PCIE*16 / *1 LAN&TPM SIO B B A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Rev 1.3 Device Map Date: Friday, March 19, 2010 Sheet of 38 D D C C B B A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size C Document Description Date: Friday, March 19, 2010 Rev 1.3 GPIO Table Sheet of 38 History D C 1.2009-10-13 Change VCC_SENSE to CPU_VCC_SENSE 2.2009-10-13 Add HDMI circuit,change USB circuit,JSP1 circuit update 3.2009-10-13 update NCT3016 circuit ,add VTIN3 circuit for VRM MOS 4.2009-10-18 Add C589 C590 5.2009-10-18 Add R561 R562 For HDMI HPDET 6.2009-10-20 Add R602,Swap HDMI wire for layout 7.2009-10-21 NCT3016 circuit update:add R637 Q65 R592,Change U27 pin16 NCT_GPIO16,delete C121 8.2009-10-21A NCT3016 citcui update:add Q85,chang SATA1&SATA2 to SATA1_2 9.2009-10-23 change JUSB2 & JUSB1 for layout 10.2009-10-23A NCT3016 circuit update:add R850 11.2009-10-24 delete VCCGATE and DUALGATE circuit 12.2009-10-26 delete C534 13.2009-10-26 Swap RN40 D MS-7636-1.3 C 1.2010-02-23 Add MH7 MH8 MH9 R545 B B A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size C Document Description Date: Friday, March 19, 2010 Rev 1.3 History Sheet of 38 AA8/Y8 ,these signals for 120 MHz from the Intel?5 Series Chipset CLKOUT_DP_P /CLKOUT_BCLK1_P and CLKOUT_DP_N / CLKOUT_BCLK1_N Leave as NC on the PCH and connect directly to GND at the processor 120MHz clock is used for embedded DisplayPort which is no supported on Desktop designs Follow DG&CRB BACK SIDE X_49.9R/1% CP3 CP2 VTT_PGD MEM_PWRGD 15 CPU_PWRGD 30,35 VTT_PGD 15 MEM_PWRGD 14,18 20R/1% 20R/1% R321 R322 R324 100R/1% SM_RCOMP0 24.9R/1% SM_RCOMP1 130R/1% SM_RCOMP2 49.9/1% 49.9/1% SKTOCC# C TP31 TP30 TP37 TP35 TP32 TP39 TP34 代翴　璉　 TP38 TP33 PM_EXT_TS0 PM_EXT_TS1 H_COMP2 H_COMP3 R296 R299 R325 R214 H_COMP1 H_COMP0 SKTOCC# RSTIN* PROC_PWROK VCCPWRGOOD VTTPWRGOOD SM_DRAMPWROK AG35 AG39 AH34 AF35 AH39 PECI CATERR* PROCHOT* THERMTRIP* PM_SYNC AB5 AB4 B11 C11 PM_EXT_TS[0]* PM_EXT_TS[1]* COMP2 COMP3 AG1 AD1 AE1 SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] 35 35 CPU_VTT Follow MS7588-1.0 R210 X_1KR1%0402 R380 GFX_VR_EN 34 0R H_GFX_VID[6 0] H_GFX_VID0 H_GFX_VID1 H_GFX_VID2 H_GFX_VID3 H_GFX_VID4 H_GFX_VID5 H_GFX_VID6 VCC_SENSE VSS_SENSE VTT_SENSE VSS_SENSE_VTT T35 T34 AE35 AE36 CPU_VCC_SENSE CPU_VSS_SENSE VAXG_SENSE VSSAXG_SENSE A13 B13 GFX_VCC_SENSE_R GFX_VSS_SENSE_R ISENSE T40 VCCP_IMAX 34 TP2 VTT_SELECT TP_MCP_VCCVTT_VID2 33 TP3 CPU_VCC_SENSE 35 CPU_VSS_SENSE 35 R394 0R R383 0R GFX_VCC_SENSE 34 GFX_VSS_SENSE 34 VCCP_IMAX 35 R35 X_0R0402 Follow MS7588-1.0 RSVD RSVD RSVD RSVD RSVD RSVD RSVD AL18 AK18 T39 M12 L12 AL15 AL14 TDO TDI TCK TMS TRST* AM38 AM37 AN37 AN40 AM39 CPU_TDO CPU_TDI CPU_TCK CPU_TMS CPU_TRST# PRDY* PREQ* DBR* BCLK_ITP* BCLK_ITP TAPPWRGOOD RESET_OBS* AJ38 AK37 AL40 AK40 AK39 AK34 AL39 XDP_CPU_PRDY# XDP_CPU_PREQ# FP_RST# XDP_CPU_BCLK_N XDP_CPU_BCLK_P XDP_CPU_PWRGD CPU_RESET_OUT# XDP_CPU_PRDY# 36 XDP_CPU_PREQ# 36 FP_RST# 15,29,36 XDP_CPU_BCLK_N 36 XDP_CPU_BCLK_P 36 XDP_CPU_PWRGD 36 CPU_RESET_OUT# 36 BPM[0]* BPM[1]* BPM[2]* BPM[3]* BPM[4]* BPM[5]* BPM[6]* BPM[7]* AL33 AL32 AK33 AK32 AM31 AL30 AK30 AK31 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD AL17 AM17 AM25 AL29 AM30 AK29 AK28 AM29 AM28 AL27 AK27 AM26 AM27 AL26 AK26 AK25 COMP1 COMP0 SKTOCC* CFG6/FC_E9 CFG7/FC_F9 CFG8/FC_G12 CFG9/FC_H12 CFG10/FC_K10 H_MCP_CFG11 H_MCP_CFG12 H_MCP_CFG13 H_MCP_CFG14 H_MCP_CFG15 H_MCP_CFG16 H_MCP_CFG17 K8 J12 L8 K9 K12 H7 L11 CFG11/FC_K8 CFG12/FC_J12 CFG13/FC_L8 CFG14/FC_K9 CFG15/FC_K12 CFG16/FC_H7 CFG17/FC_L11 X_3K X_3K X_3K X_3K X_3K X_3K X_3K X_3K X_3K H_VID1 H_VID[7 2] TP_MCP_VCCVTT_VID0 E9 F9 G12 H12 K10 H_MCP_CFG0 R381 H_MCP_CFG1 R362 H_MCP_CFG2 R361 H_MCP_CFG3 R363 H_MCP_CFG4 R368 H_MCP_CFG5 R364 H_MCP_CFG6 R365 H_MCP_CFG7 R379 H_MCP_CFG15 R359 F12 F6 G10 B12 E12 E11 C12 G11 J11 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_VID7 CPU_PSI GFX_VR_EN GFX_IMON AE38 AF39 AG40 H_MCP_CFG6 H_MCP_CFG7 H_MCP_CFG8 H_MCP_CFG9 H_MCP_CFG10 A4 B3 C2 D1 TP_GFX_DPRSLPVR J10 AV38 AK12 AK13 AK14 AL12 AM15 AM16 AM18 AM19 AM20 AM21 AU40 AV1 AV39 AW2 AW38 AY37 U40 U39 U38 U37 U36 U35 U34 U33 AG38 FC_AE38 VTT_SELECT FC_AG40 CFG0 CFG1/RSVD CFG2/RSVD CFG3/PEG_LANE_REVERSAL CFG4/RSVD CFG5/VSS Configuration signals: The CFG signals have a default value of if not terminated on the board Refer to the Platform Design Guide for pull-down recommendations when logic low is desired CFG[0]: PCI Express Bifurcation: - With all Intel?5 Series Chipsets except P55 and P57 SKUs: Reserved (Only x16 PCI Express supported by default) - With Intel?5 Series Chipsets P55 and P57 SKUs only: = x16 PCI Express = x8 PCI Express - With Workstation and Server Ibex Peak: = x16 PCI Express = x8 PCI Express CFG[1]: Reserved (Lynnfield processor PCI Express Port Bifurcation) CFG[2]: Reserved configuration lands A test point may be placed on the board for this land CFG[3]: PCI Express* Static Lane Numbering Reversal A test point may be placed on the board for this land Lane reversal will be applied across all 16 lanes 1: No Reversal 0: Reversal In the case of Bifurcation with NO Lane Reversal, the physical lane mapping is as follows: Lanes 15:8 => Port Lanes 7:0 Lanes 7:0 => Port Lanes 7:0 In the case of Bifurcation WITH Lane Reversal, the physical lane mapping is as follows: Lanes 15:8 => Port Lanes 0:7 Lanes 7:0 => Port Lanes 0:7 CFG[6:4]: Reserved configuration lands A test point may be placed on the board for this land CFG[17:7]: Reserved configuration lands Intel does not recommend a test point on the board for this land SEL2 AF34 AH36 AH35 AG37 AH37 GFX_VR_EN GFX_IMON/RSVD GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] E8 G8 E10 F10 H10 H9 CFG 0~5 HAVE INTERNAL PULL-UPS A TDI_M TD0_M H_MCP_CFG0 H_MCP_CFG1 H_MCP_CFG2 H_MCP_CFG3 H_MCP_CFG4 H_MCP_CFG5 TP36 R358 X_3K R353 X_3K R352 X_3K AF37 AF38 AF2 AF36 AK38 CPU_VTT B CPURST# PROC_PWROK VCCP_PWRGD X_COPPER X_COPPER H_PECI H_CATERR# H_PROCHOT# H_THERMTRIP# PM_SYNC CPU_VTT H_PECI 14 H_THERMTRIP# 14 PM_SYNC 18 For DP port H_TDO_TDI_M TP1 R178 CPU_VTT VID[0]/MSID[0] VID[1]/MSID[1] VID[2]/MSID[2] VID[3]/MSID[3] VID[4]/MSID[4] VID[5]/MSID[5] VID[6] VID[7] PSI* RSVD RSVD RSVD RSVD GFX_DPRSLPVR/RSVD VSS RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD R190 0R 51R R202 R203 X_51R X_51R CPU_RESET_OUT# R199 51R H_THERMTRIP# H_PROCHOT# R213 R204 X_51R 51R XDP_CPU_PRDY# R212 SEL0 PCIE CONFIG 1 1 X 16 1 X R1 T1 U3 U2 U1 V1 W3 W2 DMI_RX[0] DMI_RX[0]* DMI_RX[1] DMI_RX[1]* DMI_RX[2] DMI_RX[2]* DMI_RX[3] DMI_RX[3]* C7 D7 E7 E6 E5 F5 F3 F4 G6 G5 H4 H3 F7 G7 J6 J5 K3 K4 H8 J8 L6 L5 M4 M3 K7 L7 N6 N5 M8 N8 R5 R6 DMI_TX[0] DMI_TX[0]* DMI_TX[1] DMI_TX[1]* DMI_TX[2] DMI_TX[2]* DMI_TX[3] DMI_TX[3]* L1 M1 N3 N2 N1 P1 R2 R3 PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS RSVD RSVD RSVD RSVD DMI_TX0 DMI_TX0# DMI_TX1 DMI_TX1# DMI_TX2 DMI_TX2# DMI_TX3 DMI_TX3# EXP_A_TXP_0 EXP_A_TXN_0 EXP_A_TXP_1 EXP_A_TXN_1 EXP_A_TXP_2 EXP_A_TXN_2 EXP_A_TXP_3 EXP_A_TXN_3 EXP_A_TXP_4 EXP_A_TXN_4 EXP_A_TXP_5 EXP_A_TXN_5 EXP_A_TXP_6 EXP_A_TXN_6 EXP_A_TXP_7 EXP_A_TXN_7 EXP_A_TXP_8 EXP_A_TXN_8 EXP_A_TXP_9 EXP_A_TXN_9 EXP_A_TXP_10 EXP_A_TXN_10 EXP_A_TXP_11 EXP_A_TXN_11 EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 DMI_TX0 DMI_TX0# DMI_TX1 DMI_TX1# DMI_TX2 DMI_TX2# DMI_TX3 DMI_TX3# 13 13 13 13 13 13 13 13 D C GRCOMP D11 C10 B10 A11 GRBIAS R297 750/1% R304 49.9/1% Break-out:10mil width, mil space Other Area:10mil width, 15 mil space 36 36 36 36 36 36 36 36 CPU1D VDDIO FDI_FSYNC0 FDI_LSYNC0 14 FDI_FSYNC0 14 FDI_LSYNC0 AC4 AD4 FDI_FSYNC[0] FDI_LSYNC[0] DISPLAY LINK FDI_FSYNC1 FDI_LSYNC1 14 FDI_FSYNC1 14 FDI_LSYNC1 AC3 AD3 FDI_INT 14 FDI_INT CPU_VTT AC2 FDI_FSYNC[1] FDI_LSYNC[1] FDI_INT OF 12 H_PROCHOT# PEG_TX[0] PEG_TX[0]* PEG_TX[1] PEG_TX[1]* PEG_TX[2] PEG_TX[2]* PEG_TX[3] PEG_TX[3]* PEG_TX[4] PEG_TX[4]* PEG_TX[5] PEG_TX[5]* PEG_TX[6] PEG_TX[6]* PEG_TX[7] PEG_TX[7]* PEG_TX[8] PEG_TX[8]* PEG_TX[9] PEG_TX[9]* PEG_TX[10] PEG_TX[10]* PEG_TX[11] PEG_TX[11]* PEG_TX[12] PEG_TX[12]* PEG_TX[13] PEG_TX[13]* PEG_TX[14] PEG_TX[14]* PEG_TX[15] PEG_TX[15]* FDI_TX[0] FDI_TX[0]* FDI_TX[1] FDI_TX[1]* FDI_TX[2] FDI_TX[2]* FDI_TX[3] FDI_TX[3]* U6 U5 V4 V3 U8 U7 W8 W7 FDI_TX0 FDI_TX0# FDI_TX1 FDI_TX1# FDI_TX2 FDI_TX2# FDI_TX3 FDI_TX3# FDI_TX0 FDI_TX0# FDI_TX1 FDI_TX1# FDI_TX2 FDI_TX2# FDI_TX3 FDI_TX3# 14 14 14 14 14 14 14 14 FDI_TX[4] FDI_TX[4]* FDI_TX[5] FDI_TX[5]* FDI_TX[6] FDI_TX[6]* FDI_TX[7] FDI_TX[7]* W5 W4 R8 R7 Y4 Y3 Y6 Y5 FDI_TX4 FDI_TX4# FDI_TX5 FDI_TX5# FDI_TX6 FDI_TX6# FDI_TX7 FDI_TX7# FDI_TX4 FDI_TX4# FDI_TX5 FDI_TX5# FDI_TX6 FDI_TX6# FDI_TX7 FDI_TX7# 14 14 14 14 14 14 14 14 B Q30 C E SIO_TRIP# 14,18 3904_SOT23 CPU reset reserve 3VSB CPU_VTT R1 X_1KR1%0402 CPU_PSI E CPU_VTT 51R PEG CONFIG TABLE SEL1 DMI_RX0 DMI_RX0# DMI_RX1 DMI_RX1# DMI_RX2 DMI_RX2# DMI_RX3 DMI_RX3# demo board no connect CPU_VTT R211 DMI_RX0 DMI_RX0# DMI_RX1 DMI_RX1# DMI_RX2 DMI_RX2# DMI_RX3 DMI_RX3# PEG_RX[0] PEG_RX[0]* PEG_RX[1] PEG_RX[1]* PEG_RX[2] PEG_RX[2]* PEG_RX[3] PEG_RX[3]* PEG_RX[4] PEG_RX[4]* PEG_RX[5] PEG_RX[5]* PEG_RX[6] PEG_RX[6]* PEG_RX[7] PEG_RX[7]* PEG_RX[8] PEG_RX[8]* PEG_RX[9] PEG_RX[9]* PEG_RX[10] PEG_RX[10]* PEG_RX[11] PEG_RX[11]* PEG_RX[12] PEG_RX[12]* PEG_RX[13] PEG_RX[13]* PEG_RX[14] PEG_RX[14]* PEG_RE[15] PEG_RX[15]* OF 12 N12-160A010-F02 PM_SYNC H_PECI 13 13 13 13 13 13 13 13 C9 D9 B8 C8 A7 A6 B6 C6 A5 B5 B4 C4 C3 D3 D2 E2 E1 F1 G3 G2 G1 H1 J3 J2 J1 K1 L2 L3 P3 P4 T3 T4 AM14 AM13 AK15 AK16 if not use XDP,add Test point OF 12 H_CATERR# EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6 EXP_A_RXP_7 EXP_A_RXN_7 EXP_A_RXP_8 EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11 EXP_A_RXN_11 EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15 CPU_TDO 36 CPU_TDI 36 CPU_TCK 36 CPU_TMS 36 CPU_TRST# 36 B D BCLK[0] BCLK[0]* PEG_CLK PEG_CLK* BCLK[1]* BCLK[1] 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 DMI CK_DMI_P CK_DMI_N AA7 AA6 AA3 AA4 Y8 AA8 35 B CLK133M_CPU_P CLK133M_CPU_N MISC 13 CLK133M_CPU_P 13 CLK133M_CPU_N 13 CK_DMI_P 13 CK_DMI_N H_VID0 PEG CPU1C CPU1E CPU_TDO CPU_TDI CPU_TMS R196 R201 R207 51R 51R 51R CPU_TCK CPU_TRST# R217 R209 51R 51R CPU_VTT R182 10K/1% PLTRST# R197 150R Follow MS7588-1.0 C PSI# 35 15,18,36 PLTRST# R188 10K/1% X_1.3K/1% C80 X_100p/16X Q26 Q7 X_N-SST3904_SOT23 R192 R193 X_665R/1% CPURST# A 3904_SOT363 MICRO-STAR INT'L CO.,LTD demo board empty check list not empty MSI MS-7636 Size Custom Document Description Rev 1.3 CPU-CNTL/CLK/MISC Date: Friday, March 19, 2010 CPURST# Sheet of 38 CPU1A 10 MEM_MA_WE_L 10 MEM_MA_CAS_L 10 MEM_MA_RAS_L 10 MEM_MA_BANK0 10 MEM_MA_BANK1 10 MEM_MA_BANK2 10 MEM_MA_CS_L0 10 MEM_MA_CS_L1 10 MEM_MA_CS_L2 10 MEM_MA_CS_L3 10 10 10 10 10 10 10 10 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_ODT2 MEM_MA_ODT3 AW18 AY15 AV15 AU15 AW14 AY13 AV14 AW13 AU14 AW12 AT19 AU13 AW11 AU24 AT11 AR10 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] MEM_MA_WE_L MEM_MA_CAS_L MEM_MA_RAS_L AT22 AU22 AT20 SA_WE* SA_CAS* SA_RAS* MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 AV20 AU19 AU12 SA_BA[0] SA_BA[1] SA_BA[2] MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_CS_L2 MEM_MA_CS_L3 AV21 AW24 AU21 AU23 SA_CS[0]* SA_CS[1]* SA_CS[2]* SA_CS[3]* MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CKE2 MEM_MA_CKE3 AU10 AW10 AV10 AY10 SA_CKE[0] SA_CKE[1] SA_CKE[2] SA_CKE[3] MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_ODT2 MEM_MA_ODT3 AV23 AV24 AW23 AY24 SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3] MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 AR22 AR21 AP18 AN18 AN21 AP21 AP19 AN19 C 10 MEM_MA_CLK_H0 10 MEM_MA_CLK_L0 10 MEM_MA_CLK_H1 10 MEM_MA_CLK_L1 10 MEM_MA_CLK_H2 10 MEM_MA_CLK_L2 10 MEM_MA_CLK_H3 10 MEM_MA_CLK_L3 DDR3_DRAMRST# AV8 AK22 AM22 AL23 AK23 B SA_CK[0] SA_CK[0]* SA_CK[1] SA_CK[1]* SA_CK[2] SA_CK[2]* SA_CK[3] SA_CK[3]* SM_DRAMRST* SA_CS[4]* SA_CS[5]* SA_CS[6]* SA_CS[7]* AL10 AM10 SA_DQS[8] SA_DQS[8]* AP10 AN10 AR11 AP11 AK9 AL9 AK11 AM11 SA_ECC_CB[0] SA_ECC_CB[1] SA_ECC_CB[2] SA_ECC_CB[3] SA_ECC_CB[4] SA_ECC_CB[5] SA_ECC_CB[6] SA_ECC_CB[7] DDR_A OF 12 SA_DQS[0] SA_DQS[0]* SA_DQS[1] SA_DQS[1]* SA_DQS[2] SA_DQS[2]* SA_DQS[3] SA_DQS[3]* SA_DQS[4] SA_DQS[4]* SA_DQS[5] SA_DQS[5]* SA_DQS[6] SA_DQS[6]* SA_DQS[7] SA_DQS[7]* AK3 AJ3 AP2 AP3 AU4 AU3 AY6 AW6 AR28 AT29 AV32 AW32 AW36 AV35 AR39 AR38 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] AJ2 AN1 AU1 AV6 AN29 AW31 AU35 AT38 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] AH1 AJ4 AL2 AL1 AG2 AH2 AK1 AK2 AN3 AN2 AR3 AR2 AM3 AM2 AP1 AR4 AT4 AU2 AW3 AW4 AT3 AT1 AV2 AV4 AW5 AY5 AU8 AY8 AU5 AV5 AV7 AW7 AN27 AT28 AP28 AP30 AN26 AR27 AR29 AN30 AU30 AU31 AV33 AU34 AV30 AW30 AU33 AW33 AW35 AY35 AV37 AU37 AY34 AW34 AV36 AW37 AT39 AT40 AN38 AN39 AU38 AU39 AP39 AP40 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 11 MEM_MB_ADD[15 0] 10 10 10 10 10 10 10 10 11 MEM_MB_WE_L 11 MEM_MB_CAS_L 11 MEM_MB_RAS_L 11 MEM_MB_BANK0 11 MEM_MB_BANK1 11 MEM_MB_BANK2 MEM_MA_DATA[63 0] 10 11 11 11 11 MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_CS_L2 MEM_MB_CS_L3 11 11 11 11 11 11 11 11 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CKE2 MEM_MB_CKE3 MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_ODT2 MEM_MB_ODT3 11 MEM_MB_CLK_H0 11 MEM_MB_CLK_L0 11 MEM_MB_CLK_H1 11 MEM_MB_CLK_L1 11 MEM_MB_CLK_H2 11 MEM_MB_CLK_L2 11 MEM_MB_CLK_H3 11 MEM_MB_CLK_L3 VCC_DDR MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 AU20 AU18 AV18 AU17 AY18 AV17 AW17 AU16 AT17 AY16 AY25 AW16 AW15 AW28 AY12 AV11 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] MEM_MB_WE_L MEM_MB_CAS_L MEM_MB_RAS_L AU26 AW27 AW26 SB_WE* SB_CAS* SB_RAS* MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 AU25 AW25 AV12 SB_BA[0] SB_BA[1] SB_BA[2] MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_CS_L2 MEM_MB_CS_L3 AY27 AW29 AV26 AV29 SB_CS[0]* SB_CS[1]* SB_CS[2]* SB_CS[3]* MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CKE2 MEM_MB_CKE3 AW8 AY9 AU9 AV9 SB_CKE[0] SB_CKE[1] SB_CKE[2] SB_CKE[3] MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_ODT2 MEM_MB_ODT3 AU27 AU29 AV27 AU28 SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3] MEM_MB_CLK_H0 MEM_MB_CLK_L0 MEM_MB_CLK_H1 MEM_MB_CLK_L1 MEM_MB_CLK_H2 MEM_MB_CLK_L2 MEM_MB_CLK_H3 MEM_MB_CLK_L3 AR17 AR16 AT15 AR15 AN17 AN16 AR19 AR18 SB_CK[0] SB_CK[0]* SB_CK[1] SB_CK[1]* SB_CK[2] SB_CK[2]* SB_CK[3] SB_CK[3]* AM23 AM24 AL24 AK24 SB_CS[4]* SB_CS[5]* SB_CS[6]* SB_CS[7]* AR14 AR13 SB_DQS[8] SB_DQS[8]* AR12 AT13 AN15 AP14 AM12 AN12 AN14 AP13 SB_ECC_CB[0] SB_ECC_CB[1] SB_ECC_CB[2] SB_ECC_CB[3] SB_ECC_CB[4] SB_ECC_CB[5] SB_ECC_CB[6] SB_ECC_CB[7] VCC_DDR DDR3_DRAMRST#B 11 R270 470R R262 150R C D MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 R268 470R Q45 2N3904 B E 10 MEM_MA_ADD[15 0] CPU1B VCC_DDR DDR_B R261 X_0R OF 12 R260 150R X_0R AF4 AE5 AH6 AJ5 AN6 AM6 AR8 AP8 AT25 AR24 AP32 AR32 AR36 AR37 AL37 AM36 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] AE4 AH4 AM7 AT7 AN24 AN32 AM33 AK35 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] AD7 AD6 AH8 AJ8 AC7 AC6 AF5 AE6 AG5 AH7 AK6 AL4 AG6 AG4 AJ7 AK7 AL6 AN5 AP6 AR5 AL5 AM4 AN7 AP5 AT6 AR7 AR9 AM8 AN8 AR6 AL8 AT9 AN23 AP23 AR25 AR26 AT23 AP22 AP25 AT26 AT32 AP31 AR33 AM32 AT31 AR31 AR34 AT33 AR35 AT36 AN33 AP36 AP34 AT35 AN34 AP37 AL35 AM35 AJ36 AJ37 AN35 AM34 AJ35 AL36 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 D 11 11 11 11 11 11 11 11 MEM_MB_DATA[63 0] 11 C B DDR3_DRAMRST#A 10 C R258 SB_DQS[0] SB_DQS[0]* SB_DQS[1] SB_DQS[1]* SB_DQS[2] SB_DQS[2]* SB_DQS[3] SB_DQS[3]* SB_DQS[4] SB_DQS[4]* SB_DQS[5] SB_DQS[5]* SB_DQS[6] SB_DQS[6]* SB_DQS[7] SB_DQS[7]* 470R Q44 2N3904 B E R269 A C A R257 C180 X_0.1u/16X 1K/1% Q48 2N3904 B E DDR3_DRAMRST# MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Rev 1.3 CPU-Memory Date: Friday, March 19, 2010 Sheet of 38 GPU_CORE Decoupling VCCP VCCP CPU_VTT GPU_CORE CPU1F CPU VCC_DDR 背面 D CPU SOCKET CAVITY CAPS CPU_VTT Decoupling 背面 CPU_VTT CPU_VTT C C561 X_22u/6.3X/8 C554 X_22u/6.3X/8 C553 X_22u/6.3X/8 C549 X_22u/6.3X/8 C154 22u/6.3X/8 C128 22u/6.3X/8 C141 22u/6.3X/8 C147 22u/6.3X/8 OF 12 C174 22u/6.3X/8 CPU POWER C149 22u/6.3X/8 VDDQ_01 VDDQ_02 VDDQ_03 VDDQ_04 VDDQ_05 VDDQ_06 VDDQ_07 VDDQ_08 VDDQ_09 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 C117 22u/6.3X/8 AJ11 AJ13 AJ15 AT18 AT21 AT10 AU11 AV13 AV16 AV19 AV22 AV25 AV28 AW9 AY11 AY14 AY17 AY23 AY26 C164 22u/6.3X/8 CPU SOCKET CAVITY CAPS VCC_DDR C158 22u/6.3X/8 C558 X_22u/6.3X/8 C556 X_22u/6.3X/8 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76 VTT_77 VTT_78 VTT_79 C557 X_22u/6.3X/8 L10 M10 M11 M9 N7 P6 P7 P8 T2 V2 V6 W1 W6 C560 X_22u/6.3X/8 T6 T7 T8 V7 V8 AB7 C555 X_22u/6.3X/8 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 C559 X_22u/6.3X/8 VTT_60 GPU_CORE CPU1I VAXG_01 VAXG_02 VAXG_03 VAXG_04 VAXG_05 VAXG_06 VAXG_07 VAXG_08 VAXG_09 VAXG_10 VAXG_11 VAXG_12 VAXG_13 VAXG_14 VAXG_15 VAXG_16 VAXG_17 VAXG_18 VAXG_19 VAXG_20 VAXG_21 VAXG_22 VAXG_23 VAXG_24 VAXG_25 VAXG_26 VAXG_27 VAXG_28 VAXG_29 VAXG_30 VAXG_31 VAXG_32 VAXG_33 VAXG_34 VAXG_35 VAXG_36 VAXG_37 VAXG_38 VAXG_39 VAXG_40 VAXG_41 VAXG_42 VAXG_43 VAXG_44 VAXG_45 VAXG_46 VAXG_47 VAXG_48 VAXG_49 C136 22u/6.3X/8 AJ23 A14 A15 A17 A18 B14 B15 B17 B18 C14 C15 C17 C18 C20 C21 D14 D15 D17 D18 D20 D21 E14 E15 E17 E18 E20 F14 F15 F17 F18 F19 G14 G15 G17 G18 H14 H15 H17 J14 J15 J16 K14 K15 K16 L14 L15 L16 M14 M15 M16 C171 22u/6.3X/8 VTT_01 VTT_02 POWER VTT_03 VTT_04 VTT_05 VTT_06 VTT_07 VTT_08 VTT_09 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 C166 X_4.7u/10X/12 AA33 AA34 AA35 AA36 AA37 AA38 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40 AD33 AD34 AD35 AD36 AD37 AD38 AD39 AD40 AE33 AE34 AE39 AE40 AF33 AG33 AJ31 AJ32 V33 V34 V35 V36 V37 V38 V39 V40 Y33 Y34 Y35 Y36 Y37 Y38 AJ21 AJ25 AJ27 AJ29 AK20 AK21 AL20 AL21 AC8 AE8 AJ17 AJ19 AK19 AC5 C172 22u/6.3X/8 CPU POWER CPU SOCKET CAVITY CAPS OF 12 CPU_VCCP-Dec u i g VCC1_8 AG8 AF8 AF7 VCCPLL_01 VCCPLL_02 VCCPLL_03 VCCP B C134 22u/6.3X/8 VCC1_8 0603 背面 C173 22u/6.3X/8 C548 X_1u/10Y/6 C550 X_1u/10Y/6 C545 X_1u/10Y/6 C543 X_1u/10Y/6 C546 X_22u/6.3X/8 C540 X_22u/6.3X/8 C552 X_22u/6.3X/8 C542 X_22u/6.3X/8 C551 X_22u/6.3X/8 C541 X_22u/6.3X/8 C535 X_22u/6.3X/8 C547 X_22u/6.3X/8 C536 X_22u/6.3X/8 C537 X_22u/6.3X/8 OF 12 C120 22u/6.3X/8 C118 22u/6.3X/8 C132 22u/6.3X/8 C153 22u/6.3X/8 C131 22u/6.3X/8 C144 22u/6.3X/8 C151 22u/6.3X/8 C152 22u/6.3X/8 C119 22u/6.3X/8 C133 22u/6.3X/8 OF 12 C143 22u/6.3X/8 C142 22u/6.3X/8 H26 H28 H29 H31 H32 H34 H35 H37 H38 H40 J18 J19 J21 J22 J24 J25 J27 J28 J30 J31 J33 J34 J36 J37 J39 J40 K17 K18 K20 K21 K23 K24 K26 K27 K29 K30 K32 K33 K35 K36 K38 K39 L17 L19 L20 L22 L23 L25 L26 L28 L29 L31 L32 L34 L35 L37 L38 L40 M17 M19 M21 M22 M24 M25 M27 M28 M30 M33 M34 M36 M37 M39 M40 N33 N35 N36 N38 N39 P33 P34 P35 P36 P37 P38 P39 P40 R33 R34 R35 R36 R37 R38 R39 R40 C123 22u/6.3X/8 B VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC C160 22u/6.3X/8 C VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC CPU_VTT CPU1H C175 22u/6.3X/8 D A23 A24 A26 A27 A33 A35 A36 A38 B23 B25 B26 B28 B29 B31 B32 B34 B35 B37 B38 C23 C24 C25 C27 C28 C30 C31 C33 C34 C36 C37 C39 C40 D23 D24 D26 D27 D29 D30 D32 D33 D35 D36 D38 D39 E22 E23 E25 E26 E28 E29 E31 E32 E34 E35 E37 E38 E40 F21 F22 F24 F25 F27 F28 F30 F31 F33 F34 F36 F37 F39 F40 G20 G21 G23 G24 G26 G27 G29 G30 G32 G33 G35 G36 G38 G39 H19 H20 H22 H23 H25 CPU_VTT CPU1G CPU POWER VCC_DDR-Decoupling A A CPU SOCKET CAVITY CAPS MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Rev 1.3 CPU-Power Date: Friday, March 19, 2010 Sheet of 38 stuff or unstuff ????? CPU1J A16 A25 A28 A34 A37 AA5 AB3 AB33 AB34 AB35 AB36 AB37 AB38 AB39 AB40 AB6 AB8 AC1 AD5 AD8 AE3 AE37 AE7 AF1 AF40 AF6 AG34 AG36 AH5 AG7 AH3 AH33 AH38 AJ1 AJ12 AJ14 AJ16 AJ18 AJ20 AJ22 AJ24 AJ26 AJ28 AJ30 AJ33 AJ34 AJ40 AJ6 AJ9 AK10 AK17 AK36 AK5 AK8 AL11 AL13 AL16 AL19 AL22 AL25 AL28 AL3 AL31 AL34 AL38 AL7 AM1 AM40 AK4 AN13 AN20 AN22 AN25 AN28 AN31 AM5 AN36 AM9 AN4 AP12 AP15 AP16 AP17 AP20 AP24 AP26 AP27 AP29 AN9 AP35 D C B CPU1K VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AP33 AP38 AP4 AP7 AP9 AR1 AR20 AR23 AR40 AT12 AT14 AT16 AT2 AT24 AT27 AT30 AR30 AT34 AT37 AT5 AU32 AT8 AV3 AV31 AV34 AU36 AU6 AY33 AY36 AY4 AY7 B16 B24 B27 B30 B33 B36 B7 B9 C13 C16 C19 C22 C26 C29 C32 C35 C38 C5 D10 D12 D13 D16 D19 D22 D25 D28 D31 D34 D37 D4 D40 D5 D6 D8 E13 E16 E19 E21 E24 E27 E3 E30 E33 E36 E39 E4 F11 F13 F16 F2 F20 F23 F26 F29 F32 F35 F38 F8 G13 CPU1L VDDIO G16 G19 G22 G25 G28 G31 G34 G37 G4 G40 G9 H11 H13 H16 H18 H2 H21 H24 H27 H30 H33 H36 H39 H5 H6 J13 J17 J20 J23 J26 J29 J32 J35 J38 J4 J7 J9 K11 K13 K19 K2 K22 K25 K28 K31 K34 K37 K40 K5 K6 L13 L18 L21 L24 L27 L30 L33 L36 L39 L4 L9 M13 M18 M2 M20 M23 M26 M29 M32 M35 M38 M5 M6 M7 N34 N37 N4 N40 P2 P5 R4 T33 T36 T37 T38 T5 U4 V5 W33 W34 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 10 OF 12 VSS VSS VSS VSS VSS VSS_NCTF W35 W36 W37 W38 Y7 B39 VREF_DQ_B VREF_DQ_A close to DIMM TP_CGC TP29 R320 R323 X_0R X_0R DIMM_VREFA DIMM_VREFB A12 RSVD AD2 AE2 AF3 AG3 AU7 AH40 AJ39 RSVD RSVD RSVD RSVD VSS RSVD RSVD AN11 AY3 RSVD RSVD D NOTE:R310,R316 STUFFED,IF DDR3 DIMM VREFDQ OPTION UNSTUFFED FOLLOW DDR3 DIMM VREFDQ Platform Design Guide Change Option FOLLOW WW11, 18 2009 Havendale and Clarkdale must stuff NC/SPARE Channel A and B Output DDR3 DIMM DQ Reference 12 OF 12 Voltage NOTE: This signal is reserved for possible future use, and may not be driven on initial steppings Refer to the Platform Design Guide for DIMM DQ VREF implementation details C B GND 11 OF 12 A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Rev 1.3 CPU-GND Date: Friday, March 19, 2010 Sheet of 38 DDRIII DIMM_A1 VCC_DDR C92 C2.2u6.3Y C169 C220p10X C30 C2.2u6.3Y C177 C2.2u6.3Y Place close to DIMM1 with DIMM2 VCC_DDR C1u6.3Y0402-RH Place close to DIMM2 VCC_DDR C138 C1u6.3Y0402-RH C112 C1u6.3Y0402-RH 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 UPI VOLTAGE CONSOLE VREF_CA_A VCC_DDR VREF_CA_A R237 C124 C0.1u16Y0402 R231 1KR1%0402 1KR1%0402 UPI VOLTAGE CONSOLE VREF_DQ_A R414 C239 C0.1u16Y0402 R415 1KR1%0402 1KR1%0402 C102 X_C2.2u6.3Y VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS UPI VOLTAGE CONSOLE(2) 2.083325V 5VDIMM 0x66:RH=18K,RL=13K 11,12,15,19,21,30,35,36 SMBCLK 11,12,15,19,21,30,35,36 SMBDATA DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 MEM_MA_DM0 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_A VREF_CA_A SMBCLK_DDR SMBDATA_DDR 5VDIMM R246 X_18KR1%0402 R253 X_13KR1%0402 SMBCLK SMBDATA 11 SMBCLK_DDR U11 VCC OUT1 BUS_SEL SCL OUT2 SDA GND OUT3 VREF_CA_A VREF_CA_A VREF_CA_B VREF_CA_B 11 SMBDATA_DDR MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 7 7 7 7 7 7 7 7 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM7 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 C135 C0.1u16Y0402 DDR3_DRAMRST#A 7 7 C246 C0.1u16Y0402 DDEIII-240_BLUE-R DIMM1(CHANNEL-A) ADDRESS = 0:0 [SA1:SA0] SMBCLK_DDR R173 33R0402 SMBDATA_DDR R175 33R0402 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 68 53 167 79 48 49 187 198 120 240 236 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 DDR3 SMBCLK 11,12,15,19,21,30,35,36 SMBDATA 11,12,15,19,21,30,35,36 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 39 40 45 46 158 159 164 165 DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 MEM_MA_DM0 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MA_ODT2 MEM_MA_ODT3 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_CS_L2 MEM_MA_CS_L3 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L DDR3_DRAMRST#A CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_A VREF_CA_A SMBCLK_DDR SMBDATA_DDR MSI Must stuff R173 R175 C MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 B MEM_MA_ODT2 MEM_MA_ODT3 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_CS_L2 MEM_MA_CS_L3 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 C116 C0.1u16Y0402 VCC3 7 7 C247 C0.1u16Y0402 DDEIII-240_PINK-R A DIMM2(CHANNEL-A) ADDRESS = 0:1 [SA1:SA0] MS-7588 Size Custom Document Description Rev 1.3 DDR3 Chanel-A DIMM1/2 Sheet Date: Friday, March 19, 2010 D MICRO-STAR INT'L CO.,LTD X_UP6262AMA8_SOT23-8-RH NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 39 40 45 46 158 159 164 165 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 10 MEM_MA_DATA4 122 MEM_MA_DATA5 123 MEM_MA_DATA6 128 MEM_MA_DATA7 129 MEM_MA_DATA8 12 MEM_MA_DATA9 13 MEM_MA_DATA10 18 MEM_MA_DATA11 19 MEM_MA_DATA12131 MEM_MA_DATA13132 MEM_MA_DATA14137 MEM_MA_DATA15138 MEM_MA_DATA16 21 MEM_MA_DATA17 22 MEM_MA_DATA18 27 MEM_MA_DATA19 28 MEM_MA_DATA20140 MEM_MA_DATA21141 MEM_MA_DATA22146 MEM_MA_DATA23147 MEM_MA_DATA24 30 MEM_MA_DATA25 31 MEM_MA_DATA26 36 MEM_MA_DATA27 37 MEM_MA_DATA28149 MEM_MA_DATA29150 MEM_MA_DATA30155 MEM_MA_DATA31156 MEM_MA_DATA32 81 MEM_MA_DATA33 82 MEM_MA_DATA34 87 MEM_MA_DATA35 88 MEM_MA_DATA36200 MEM_MA_DATA37201 MEM_MA_DATA38206 MEM_MA_DATA39207 MEM_MA_DATA40 90 MEM_MA_DATA41 91 MEM_MA_DATA42 96 MEM_MA_DATA43 97 MEM_MA_DATA44209 MEM_MA_DATA45210 MEM_MA_DATA46215 MEM_MA_DATA47216 MEM_MA_DATA48 99 MEM_MA_DATA49100 MEM_MA_DATA50105 MEM_MA_DATA51106 MEM_MA_DATA52218 MEM_MA_DATA53219 MEM_MA_DATA54224 MEM_MA_DATA55225 MEM_MA_DATA56108 MEM_MA_DATA57109 MEM_MA_DATA58114 MEM_MA_DATA59115 MEM_MA_DATA60227 MEM_MA_DATA61228 MEM_MA_DATA62233 MEM_MA_DATA63234 VTT VTT CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 MEM_MA_ADD[15 0] VDDSPD 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 120 240 236 68 53 167 79 48 49 187 198 NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 VTT VTT VDDSPD 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 DDR3 DIMM2 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 A VCC_DDR VREF_DQ_A DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 Place close to DIMM1 VCC_DDR B VCC3 VTT_DDR 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 C0.1u16Y0402 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 10 MEM_MA_DATA4 122 MEM_MA_DATA5 123 MEM_MA_DATA6 128 MEM_MA_DATA7 129 MEM_MA_DATA8 12 MEM_MA_DATA9 13 MEM_MA_DATA10 18 MEM_MA_DATA11 19 MEM_MA_DATA12131 MEM_MA_DATA13132 MEM_MA_DATA14137 MEM_MA_DATA15138 MEM_MA_DATA16 21 MEM_MA_DATA17 22 MEM_MA_DATA18 27 MEM_MA_DATA19 28 MEM_MA_DATA20140 MEM_MA_DATA21141 MEM_MA_DATA22146 MEM_MA_DATA23147 MEM_MA_DATA24 30 MEM_MA_DATA25 31 MEM_MA_DATA26 36 MEM_MA_DATA27 37 MEM_MA_DATA28149 MEM_MA_DATA29150 MEM_MA_DATA30155 MEM_MA_DATA31156 MEM_MA_DATA32 81 MEM_MA_DATA33 82 MEM_MA_DATA34 87 MEM_MA_DATA35 88 MEM_MA_DATA36200 MEM_MA_DATA37201 MEM_MA_DATA38206 MEM_MA_DATA39207 MEM_MA_DATA40 90 MEM_MA_DATA41 91 MEM_MA_DATA42 96 MEM_MA_DATA43 97 MEM_MA_DATA44209 MEM_MA_DATA45210 MEM_MA_DATA46215 MEM_MA_DATA47216 MEM_MA_DATA48 99 MEM_MA_DATA49100 MEM_MA_DATA50105 MEM_MA_DATA51106 MEM_MA_DATA52218 MEM_MA_DATA53219 MEM_MA_DATA54224 MEM_MA_DATA55225 MEM_MA_DATA56108 MEM_MA_DATA57109 MEM_MA_DATA58114 MEM_MA_DATA59115 MEM_MA_DATA60227 MEM_MA_DATA61228 MEM_MA_DATA62233 MEM_MA_DATA63234 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 VCC3 C183 VCC3 VTT_DDR VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD DIMM1 D C DDRIII DIMM_A2 VCC_DDR MEM_MA_DATA[63 0] MEM_MA_DATA[63 0] C75 1 10 of 38 D-Sub Level shift PLACE CLOSE TO VGA CONNECTOR, WITHIN 750 MIL OF PIN D VCC3 14 VCC5 R230 2.2K S 14 R236 2.2K R615 150R 14 S C 5VDDCDA D R242 150R C162 10p/25N L4 R604 150R G RGB_DDC_DATA 14 RGB_DDC_DATA 82nH300mA C156 10p/25N VGA_B VGA_B 82nH300mA C167 10p/25N L5 VCC5 R234 2.2K VCC3 VGA_G VGA_G 5VDDCCL D Q38 2N7002S VCC3 L6 C168 10p/25N R247 150R R620 150R G RGB_DDC_CLK 14 RGB_DDC_CLK VGA_R VGA_R R228 2.2K VCC3 D 82nH300mA C148 10p/25N R241 150R C155 10p/25N C Q39 2N7002S Close to PCH within 250 mils D10 A VCC5 VGAFS1 C S-1N5817_DO214AC C157 VCC5 VGA_R VGA_G VGA_15 D8 ESD-IP4220 17 X_0.1u/16Y VGA_B B C140 0.1u/16Y C106 X_0.1u/16Y D11 F-MICROSMD110 5VDDCCL VGA_12 ESD-IP4220 14 HSYNC 13 R233 100R/1% VGA_12 C122 C126 C114 X_10p/50N X_10p/50N 10p/50N C127 X_0.1u/16Y VSYNC/HSYNC:HVCMOS CRB pull VCC3 D9 15 14 C110 10p/50N VCC3 VGA_15 100R/1% VSYNC 5VDDCDA VSYNC R229 14 10 12 11 B VGA_BLUE VGA_GREEN VGA_RED 16 VCC3 OPT11 VGA_DVI1A PCB VGA_DVI-RH-4 vga connector HSYNC ESD-IP4220 A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Rev 1.3 VGA Date: Friday, March 19, 2010 Sheet 24 of 38 DVI level shifter R284 0R R277 X_4.7K VCC5 reserve VCC3 DVI_DDPB_CLK_N DVI_DDPB_CLK_P C189 0.1u/16X C188 0.1u/16X DVI_C_CLK_N DVI_C_CLK_P 38 39 IN_D1IN_D1+ OUT_D1OUT_D1+ 23 22 DVI_DATA_CLK_DN DVI_DATA_CLK_DP DVI_DDPB_TXN0 DVI_DDPB_TXP0 C187 0.1u/16X C185 0.1u/16X DVI_C_DATA2_N DVI_C_DATA2_P 41 42 IN_D2IN_D2+ OUT_D2OUT_D2+ 20 19 DVI_DATA2_DN DVI_DATA2_DP DVI_DDPB_TXN1 DVI_DDPB_TXP1 C182 0.1u/16X C181 0.1u/16X DVI_C_DATA1_N DVI_C_DATA1_P 44 45 IN_D3IN_D3+ OUT_D3OUT_D3+ 17 16 DVI_DATA1_DN DVI_DATA1_DP DVI_DDPB_TXN2 DVI_DDPB_TXP2 C179 0.1u/16X C178 0.1u/16X DVI_C_DATA0_N DVI_C_DATA0_P 47 48 IN_D4IN_D4+ OUT_D4OUT_D4+ 14 13 DVI_DATA0_DN DVI_DATA0_DP D12 DVI_DDC_DATA_R DVI_HOT_DET X_ESD-IP4220 33 46 40 26 21 15 DVI_DDC_CLK_R VCC VCC VCC VCC VCC VCC U12 VCC 11 DVI_DDPB_TXP0 DVI_DDPB_TXN0 DVI_DDPB_TXP1 DVI_DDPB_TXN1 DVI_DDPB_TXP2 DVI_DDPB_TXN2 DVI_DDPB_CLK_P DVI_DDPB_CLK_N VCC 14 14 14 14 14 14 14 14 VCC3 D D SDA SCL SDA_SINK SCL_SINK 29 28 DVI_DDC_DATA_R DVI_DDC_CLK_R HPD HPD_SINK 30 DVI_HOT_DET OC_0_DVI OC_1_DVI PC0 PC1 EQ_0_DVI EQ_1_DVI 25 32 10 DVI_OE# DVI_DDC_EN DVI_RT_EN# 34 35 OE# DDC_EN RT_EN# DVI_REXT DDCBUF_EN CFG DS 建议1.5Kohn R275 2.2K DVI_DDC_CLK_R R274 2.2K DVI_DDC_DATA_R R276 4.7K DVI_DDC_EN R252 4.7K OC_0_DVI R251 X_4.7K R244 4.7K OC_1_DVI R250 X_4.7K R285 X_4.7K EQ_0_DVI R278 X_4.7K R279 X_4.7K EQ_1_DVI R280 X_4.7K DVI_REXT R249 374R/1% DVI_RT_EN# R248 1K/1% VGA_DVI1B 25 DVI_TXD2DVI_TXD2+ DVI_TXD1DVI_TXD1+ PS8101 R283 X_4.7K R273 0R DVI_PWR_5V VCC3 DVI_HOT_DET DVI_TXD0DVI_TXD0+ PARADE　腹:B0B-081010C-P97 VCC3 Shell D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 DVI_DDC_CLK_R DVI_DDC_DATA_R GND 27 GND GND 49 43 GND GND 37 36 GND GND VCC5 31 C GND REXT 24 GND PC1/PC0 可以由gpio来控制。 18 14 DVI_DDPB_HPD GND 14 DVI_DDPB_CTRLDATA 14 DVI_DDPB_CTRLCLK GND PCH signal Mappings DG P156 12 差分阻抗为100ohm DVI_TXC+ DVI_TXC- DATA2 DATA2 SHIELD24 DATA4 DATA4 DDCCLK DDCDATA NC DATA1 DATA1 SHIELD13 DATA3 DATA3 VCC5 GND5 HPDET DATA0 DATA0 SHIELD05 DATA5 DATA5 SHIELDCLK CLK CLK 26 C Shell1 VGA_DVI-RH-4 VCC5 VCC3 R266 4.7K DVI_OE# D R529 X_8.2K DVI_HOT_DET Q47 2N7002S G S C170 X_2.2u/6.3X B B R271 X_100K/1% "0" "1" note DDC_EN DDC level shifter disable DDC level shifter enable i ter a u -u at ~500K h RT_EN# Input 50 ohm termination resistor enable the input termination ; resistors are set to high impedances i ter a u -d w at ~500K h OE# enable the chip is power down and input termination resistors will be at high impedance i ter a u -d w at ~500K h HPD_SINK disable enable D7 A VCC5 C S-1N5817_DO214AC DVIFS1 DVI_PWR_5V F-MICROSMD110 DVI_PWR_5V DDCBUF_EN i ter a u -d w at ~200K h ; 5V t era t i ter a u -d w at ~500K h F r DDC eve shifit g c figurati , ease refer t Tab e REXT EMI DVI_TXC- DVI_TXC+ DVI_TXD1- a a g curre t ge erati DVI_TXD1+ A [DDC_EN, DDCBUF_EN, OE#] DDC Passive Switch DDC Active Buffer On Off 00 dB Off On 01 dB 1, 1, Off Off 10 12 dB Off 11 RN8 X_0R/8P4R DVI_TXC5 DVI_TXC+ DVI_TXD21 DVI_TXD2+ R259 221R/1% DVI_TXD2- 1, 1, Off DVI_DATA_CLK_DN DVI_DATA_CLK_DP DVI_DATA2_DN DVI_DATA2_DP C107 0.01u/16X dB i ter a u -d w at ~500K h The 4-dB equalization setting is recommended for PC motherboard level shifting to compensate PCB trace losses DVI_TXD2+ R263 221R/1% C406 1u/6.3Y DVI_DATA0_DP DVI_DATA0_DN DVI_DATA1_DP DVI_DATA1_DN RN7 C104 0.1u/25Y C105 10u/10Y/8 VCC3 note PC1, PC0 1, 0, X 0, X, X R264 221R/1% C412 1u/6.3Y C583 1u/6.3Y C389 0.1u/25Y C582 0.01u/16X C434 C436 0.1u/25Y 0.1u/25Y Close IC power pin X_0R/8P4R DVI_TXD0+ DVI_TXD03 DVI_TXD1+ DVI_TXD1- A MICRO-STAR INT'L CO.,LTD DVI_TXD0- DVI_TXD0+ MSI R254 221R/1% MS-7636 Size Custom Document Description Rev 1.3 DVI transfer Date: Friday, March 19, 2010 C432 0.1u/25Y Sheet 25 of 38 HDMI level shifter 0R R834 X_4.7K reserve VCC3 VCC5 33 38 39 IN_D1IN_D1+ OUT_D1OUT_D1+ 23 22 HDMI_DATA_CLK_DN HDMI_DATA_CLK_DP HDMI_DDPD_TX1_N HDMI_DDPD_TX1_P C573 0.1u/16X C574 0.1u/16X HDMI_C_DATA1_N HDMI_C_DATA1_P 41 42 IN_D2IN_D2+ OUT_D2OUT_D2+ 20 19 HDMI_DATA1_DN HDMI_DATA1_DP HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N C570 0.1u/16X C594 0.1u/16X HDMI_C_DATA2_P HDMI_C_DATA2_N 44 45 IN_D3IN_D3+ OUT_D3OUT_D3+ 17 16 HDMI_DATA2_DP HDMI_DATA2_DN HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N C575 0.1u/16X C571 0.1u/16X HDMI_C_DATA0_P HDMI_C_DATA0_N 47 48 IN_D4IN_D4+ OUT_D4OUT_D4+ 14 13 HDMI_DATA0_DP HDMI_DATA0_DN 14 HDMI_DDPD_CTRLDATA 14 HDMI_DDPD_CTRLCLK SDA SCL SDA_SINK SCL_SINK 29 28 HDMI_DDC_DATA_R HDMI_DDC_CLK_R 14 HDMI_DDPD_HPD HPD HPD_SINK 30 HDMI_HOT_DET OC_0_HDMI OC_1_HDMI PC0 PC1 EQ_0_HDMI EQ_1_HDMI 25 32 10 HDMI_OE# HDMI_DDC_EN HDMI_RT_EN# 34 35 OE# DDC_EN RT_EN# HDMI_TXD1HDMI_TXD0+ HDMI_TXD0HDMI_TXC+ HDMI_TXC- PS8101 R823 2.2K HDMI_DDC_CLK_R R833 X_4.7K R822 2.2K HDMI_DDC_DATA_R R832 0R HDMI_DDC_CLK_R HDMI_DDC_DATA_R VCC3 HDMI_PWR_5V HDMI_HOT_DET PERICOM　腹:B0B-411LS2C-P22 PARADE　腹:B0B-081010C-P97 VCC3 4.7K HDMI_DDC_EN R826 4.7K OC_0_HDMI R818 X_4.7K R821 4.7K OC_1_HDMI R825 X_4.7K R827 X_4.7K EQ_1_HDMI R830 X_4.7K R828 X_4.7K EQ_0_HDMI R819 X_4.7K HDMI_REXT R829 402R/1% HDMI_RT_EN# R824 X_1K/1% C853 2.2u/6.3X D30 A C RT_EN# Input 50 ohm termination resistor enable the input termination ; resistors are set to high impedances i ter a u -d w at ~500K h OE# enable the chip is power down and input termination resistors will be at high impedance i ter a u -d w at ~500K h HPD_SINK disable enable i ter a u -d w at ~200K h ; 5V t era t i ter a u -d w at ~500K h F r DDC eve shifit g c figurati , ease refer t Tab e REXT C580 1u/6.3Y HDMI_TXC+ R839 100R/1% HDMI_TXD1- On Off 00 dB Off On 01 dB 1, 1, Off Off 10 12 dB 11 RN41 X_0R/8P4R HDMI_TXC6 HDMI_TXC+ HDMI_TXD12 HDMI_TXD1+ i ter a u -d w at ~500K h dB C578 0.01u/16X HDMI_TXD2+ HDMI_TXD0+ VCC3 HDMI_HOT_DET R835 4.7K R562 X_100K/1% R838 100R/1% HDMI_DATA0_DN HDMI_DATA0_DP HDMI_DATA2_DN HDMI_DATA2_DP RN40 X_0R/8P4R HDMI_TXD06 HDMI_TXD0+ HDMI_TXD22 HDMI_TXD2+ A MICRO-STAR INT'L CO.,LTD MSI R837 100R/1% HDMI_OE# Q80 2N7002S G MS-7587 Size Custom Document Description Rev 1.3 HDMI Date: Friday, March 19, 2010 C581 0.1u/25Y R561 X_8.2K R836 100R/1% HDMI_TXD0- Off VCC5 HDMI_DATA_CLK_DN HDMI_DATA_CLK_DP HDMI_DATA1_DN HDMI_DATA1_DP HDMI_TXD2- 1, 1, C579 1u/6.3Y HDMI_TXC- note 1, 0, X Off C569 1u/6.3Y EMI HDMI_TXD1+ PC1, PC0 B Close IC power pin a a g curre t ge erati DDC Active Buffer C595 10u/10Y/8 D i ter a u -u at ~500K h C577 0.1u/25Y VCC3 note DDC level shifter enable 0, X, X HDMI_PWR_5V HDMI_PWR_5V "1" DDC Passive Switch HDMIFS1 S-1N5817_DO214AC F-MICROSMD110 DDC level shifter disable [DDC_EN, DDCBUF_EN, OE#] C N5I-19M0161-L06 VCC5 DDC_EN DDCBUF_EN D X_ESD-IP4220 CONN-HDMI19P_BLACK-RH-10 HDMI1 SHELL1 21 D2+ D2 Shield D24 D1+ D1 Shield D17 D0+ D0 Shield D0MEC1 10 CK+ 11 CK Shield 12 CK13 CE Remote 14 NC 15 DDC CLK 16 DDC DATA 17 GND 18 +5V 19 HP DET SHELL2 20 C576 0.01u/16X "0" HDMI_HOT_DET S R820 B A HDMI_TXD2HDMI_TXD1+ HDMI_REXT D38 HDMI_DDC_DATA_R HDMI_TXD2+ GND 27 GND GND 49 43 GND 37 GND 36 GND 31 GND GND 24 GND GND 18 VCC5 REXT 12 GND DDCBUF_EN CFG HDMI_DDC_CLK_R 46 40 26 21 15 11 R831 VCC VCC VCC VCC VCC HDMI_C_CLK_N HDMI_C_CLK_P VCC C568 0.1u/16X C572 0.1u/16X VCC HDMI_DDPD_CLK_N HDMI_DDPD_CLK_P VCC U38 C HDMI_DDPD_CLK_P HDMI_DDPD_CLK_N HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N HDMI_DDPD_TX1_P HDMI_DDPD_TX1_N HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N HDMI_DDPD_CLK_P HDMI_DDPD_CLK_N HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N HDMI_DDPD_TX1_P HDMI_DDPD_TX1_N HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N VCC3 D 14 14 14 14 14 14 14 14 Sheet 26 of 38 FAN-COUNTROL CIRCUIT SATA connector (color:Black) ST_RX#0 ST_RX0 C450 0.01u/16X C449 0.01u/16X SATA_RX#0 SATA_RX0 SATA_RX#0 SATA_RX0 14 14 ST_TX1 ST_TX#1 C440 0.01u/16X C439 0.01u/16X SATA_TX1 SATA_TX#1 SATA_TX1 SATA_TX#1 14 14 ST_RX#1 ST_RX1 C448 0.01u/16X C447 0.01u/16X SATA_RX#1 SATA_RX1 SATA_RX#1 SATA_RX1 14 14 SATA1_2 C489 0.01u/16X C488 0.01u/16X SATA_TX3 SATA_TX#3 SATA_TX3 SATA_TX#3 14 14 ST_RX#3 ST_RX3 C499 0.01u/16X C498 0.01u/16X SATA_RX#3 SATA_RX3 SATA_RX#3 SATA_RX3 14 14 18 SIO_SYS1_FAN R417 SYS1_FAN6 0R ST_TX1 ST_TX#1 + - SATA5 SATA14PM_BLACK-ST-RH C G LM358D_SOIC8 FAN1X3 Q59 P06P03LCG_SOT89 C495 0.01u/16X C496 0.01u/16X SATA_TX4 SATA_TX#4 SATA_TX4 SATA_TX#4 14 14 ST_RX#4 ST_RX4 C509 0.01u/16X C510 0.01u/16X SATA_RX#4 SATA_RX4 SATA_RX#4 SATA_RX4 14 14 R412 3.9K/1% EC38 CD100u16SO C D13 1N4148S SYSFAN2 FAN2_TAC A SATA7PM_BLACK-P-RH SATA_RX#2 SATA_RX2 14 14 SATA_TX5 SATA_TX#5 SATA_TX5 SATA_TX#5 14 14 ST_RX#5 ST_RX5 C501 0.01u/16X C500 0.01u/16X SATA_RX#5 SATA_RX5 SATA_RX#5 SATA_RX5 14 14 18 SIO_SYS2_FAN R426 SYS2_FAN2 0R - S C491 0.01u/16X C490 0.01u/16X U20A G LM358D_SOIC8 R409 FAN1X3 Q50 P06P03LCG_SOT89 R291 4.7K R300 27K SYS2_FANTAC 14,18 C200 X_0.1u/16Y R294 10K/1% 10K/1% SATA_RX#2 SATA_RX2 ST_TX5 ST_TX#5 + R402 3.9K/1% SATA7PM_BLACK-P-RH C455 0.01u/16X C456 0.01u/16X 14 14 D ST_RX#2 ST_RX2 SATA_TX2 SATA_TX#2 R440 10K/1% +12V SATA_TX2 SATA_TX#2 RX+ TX+ GND RX- TXGND GND GND GND RX+ TX+ GND RX- TXGND GND GND GND C445 0.01u/16X C446 0.01u/16X SYS1_FANTAC 14,18 + B ST_TX2 ST_TX#2 27K C312 X_0.1u/16Y ST_TX4 ST_TX#4 SATA6 R437 10K/1% SATA7PM_BLACK-P-RH SATA3 R441 4.7K R404 D17 1N4148S SYSFAN1 FAN1_TAC C ST_RX#1 ST_RX1 U20B 10 11 12 13 14 16 D ST_TX3 ST_TX#3 SATA7PM_BLACK-P-RH RX+ TX+ GND RX- TXGND GND GND GND ST_RX#0 ST_RX0 GND GND HT+1 HT+2 HT-1 HT-2 GND GND HR-1 HR-2 HR+1 HR+2 GND GND MEC2MEC1 + 15 ST_TX0 ST_TX#0 +12V SATA4 C 14 14 A SATA_TX0 SATA_TX#0 S SATA_TX0 SATA_TX#0 D C442 0.01u/16X C441 0.01u/16X ST_TX0 ST_TX#0 RX+ TX+ GND RX- TXGND GND GND GND D EC36 CD100u16SO B VCC5 VCC5 R130 2.2KR/2 R129 18 SIO_CPU_FAN R128 X_0R 0R R115 2.2K Q15 G2 S2 G1 S1 D2 D1 R101 14,18 CPU_FANTAC +12V R77 4.7K CPUFAN_PWM 27K + R84 10K/1% NN-2N7002D +12V 14 PCH_CPU_FAN R94 2.2KR/2 C33 X_0.1u/16Y VCC5 EC3 CD100u16SO CPUFAN MEC1 BH1X4B_WHITE-3.3MM-RH A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Sheet Date: Friday, March 19, 2010 Rev 1.3 SATA & e-SATA Ports and Fan Control 27 of 38 Closed Pin2 5VDIMM Closed Pin2 FUSB_VCC2 FUSB_VCC1 C523 X_0.1u/10X EC52 CD470u6.3SO USB_MODE R218 9.76KST/4 NEAR CONNECTOR R808 27K R812 27K OC#0_C OC#1_C R810 51K FUSB_VCC3 RUSB_VCC3 R815 51K R117 27K R288 27K OC#2_C OC#6_C OC#4_C OC#5_C R185 51K R103 51K SBD1- SBD1+ SBD1SBD1+ SBD0SBD0+ VCC USB0USB0+ GND VCC USB1USB1+ GND USBOC 10 SBD1SBD1+ 13 13 13 13 RN5 USB13+ USB13USB12+ USB12- 13 13 USB3USB3+ SBD3SBD3+ 13 13 USB2USB2+ SBD2SBD2+ 13 13 USB12USB12+ 13 13 USB13USB13+ 0R/8P4R/6 SBD13+ SBD13SBD12+ SBD12- SBD12SBD12+ D26 SBD2- SBD3- SBD2+ SBD3+ SBD2SBD2+ VCC USB0USB0+ GND ESD-IP4220 VCC USB1USB1+ GND USBOC 10 SBD3SBD3+ SBD13SBD13+ 13 13 13 13 RN4 USB9+ USB9USB8+ USB8- 0R/8P4R/6 USB4USB4+ USB_MODE EN SBD4SBD4+ 5VCC 5VSB GND +1 C196 X_0.1u/10X EC35 CD470u6.3SO D NEAR CONNECTOR VOUT C81 X_0.1u/10X EC11 CD470u6.3SO UP7533A_SOT23-8 NEAR CONNECTOR C HDMI_USB1 D5 SBD12- SBD13- SBD12+ SBD13+ ESD-IP4220 31 32 33 34 21 22 23 24 SBD12SBD12+ SBD13SBD13+ PWR GND USBUSB+ GND UP GND PWR USBGND USB+ GND DOWN GND 35 36 OPT5 25 PCB 26 USBAM_BLACK-RH-20 connector 13 13 USB8USB8+ SBD8SBD8+ 13 13 USB9USB9+ SBD9SBD9+ USB1 D4 SBD8- SBD9- SBD8+ SBD9+ ESD-IP4220 SBD4+ 1 10 DOWN SBD5- SBD5+ SBD4SBD4+ VCC USB0USB0+ GND ESD-IP4220 NEAR CONNECTOR SBD8SBD8+ 12 N58-14M0031-L06 B RUSB_VCC1 RUSB_VCC1 D6 UP X_CMC-L12-121D017-LF FUSB_VCC3 SBD4- 11 SBD9SBD9+ NEAR CONNECTOR VCC USB1USB1+ GND USBOC 10 H2X5[9]M_BLACK-RH-2 N58-14M0031-L06 X_CMC-L12-121D017-LF SBD5SBD5+ 13 13 13 13 USB11+ USB11USB10+ USB10- RN11 0R/8P4R/6 SBD11+ SBD11SBD10+ SBD10- SBD10- SBD10+ USB5USB5+ 13 13 SBD5SBD5+ RUSB_VCC2 SBD9+ SBD9SBD8+ SBD8- L1 H2X5[9]M_BLACK-RH-2 NEAR CONNECTOR 13 13 VOUT UP7533A_SOT23-8 RUSB_VCC3 VOUT REAR USB PORT8,9 L3 EN RUSB_VCC2 JUSB3 SBD4+ SBD4SBD5+ SBD5- NEAR CONNECTOR NEAR CONNECTOR FUSB_VCC3 0R/8P4R/6 USB_MODE UP7533A_SOT23-8 REAR USB PORT8,9 FUSB_VCC1 Front USB PORT 4,5 RN6 USB_MODE X_CMC-L12-121D017-LF X_CMC-L12-121D017-LF USB4+ USB4USB5+ USB5- 18 RUSB_VCC1 VOUT RUSB_VCC3 L2 H2X5[9]M_BLACK-RH-2 JUSB1 SBD2+ SBD2SBD3+ SBD3- EC6 CD470u6.3SO RUSB_VCC3 ESD-IP4220 NEAR CONNECTOR RN32 0R/8P4R/6 L13 13 13 13 13 S3# OC# 5 SBD0SBD0+ FUSB_VCC1 B USB_MODE 6 SBD0+ FRONT USB PORT 2,3 USB2+ USB2USB3+ USB3- 18 OC#6_C R287 51K X_CMC-L12-121D017-LF 13 13 13 13 23,30 5VDRV1_EN 13 OC#6_C R184 27K D27 SBD0- S3# OC# Closed Pin2 USB0USB0+ SBD0+ SBD0SBD1+ SBD1- C194 10u/10Y/8 R222 27K R220 51K C55 X_0.1u/10X OC#5_C 23,30 5VDRV1_EN 13 OC#5_C 10u/10Y/8 5VSB RUSB_VCC1 USB1USB1+ VCC5 RUSB_VCC2 JUSB2 L12 13 13 VOUT REAR USB PORT 12,13 RN27 0R/8P4R/6 13 13 VOUT EN U13 USB POWER FOR PORT 10,11 FUSB_VCC2 FUSB_VCC2 USB_MODE NEAR CONNECTOR FRONT USB PORT 0,1 USB0+ USB0USB1+ USB1- 2 18 UP7533A_SOT23-8 USB_MODE U9 R219 X_5.1KST/4 UP7533A_SOT23-8 C 13 13 13 13 EC19 CD470u6.3SO VOUT +1 EN VOUT C94 X_0.1u/10X FUSB_VCC1 5VCC 5VSB USB_MODE USB_MODE S3# OC# 18 S3# OC# +1 5VSB GND U37 OC#1_C VOUT USB_MODE for USB voltage H:Follow 5VSB L:Always off C525 10u/10Y/8 23,30 5VDRV1_EN 13 OC#1_C EN UP7533A_SOT23-8 USB POWER REAL PORT 2,3 VCC5 OC#4_C USB_MODE 23,30 5VDRV1_EN 13 OC#4_C 5VCC 5VSB USB_MODE Closed Pin2 C54 RUSB_VCC2 GND 18 EC51 CD470u6.3SO U7 VOUT 5VSB 10u/10Y/8 C517 X_0.1u/10X S3# OC# C79 GND VCC5 Closed Pin2 FUSB_VCC3 5VCC 5VSB VOUT OC#2_C EN 23,30 5VDRV1_EN 13 OC#2_C +1 U10 10u/10Y/8 GND USB_MODE VOUT USB_MODE S3# OC# 18 5VCC 5VSB D OC#0_C GND U34 23,30 5VDRV1_EN 13 OC#0_C C95 USB POWER FOR PORT 8,9 5VSB C516 10u/10Y/8 FUSB_VCC2 VCC5 +1 Closed Pin2 USB POWER FOR PORT 6,7 5VSB 5VCC 5VSB VCC5 +1 USB POWER FOR PORT 4,5 5VSB USB POWER FOR PORT 0,1 VCC5 Front USB Connector Rear USB Connector L7 13 13 USB10USB10+ SBD10SBD10+ 13 13 USB11USB11+ SBD11SBD11+ X_CMC-L12-121D017-LF LAN_USB1A D14 SBD11- SBD11+ ESD-IP4220 NEAR CONNECTOR SBD10SBD10+ SBD11SBD11+ PWR USBUSB+ GND GND GND GND GND 23 24 25 26 GND PWR GND USBUSB+DOWN GND GND GND 27 28 29 30 UP RJ45_USBX2_LEDX2_TX-GIGA-RH-5 A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Date: Friday, March 19, 2010 Rev 1.3 USB Connectors-10 ports Sheet 28 of 38 ATX POWER CONNECTOR FRONT PANNEL D18 1N4148S C JFP2 D 18,36 -12V C176 X_0.1u/16Y PSON# C137 X_0.1u/16Y VCC5 C86 X_0.1u/16Y 13 3.3V 3.3V 14 15 -12V 3.3V GND GND 16 P_ON 17 GND 18 GND 5V 19 GND GND 20 -5V POK 21 5V 5VSB 22 5V +12V 10 +12V 11 3.3V 12 23 5V 24 GND 5V GND VCC3 C88 0.1u/16Y SLED PWR_LED BUZ+ BUZ- VCCSPK PLED R796 X_0R VCC5 BUZ1 BUZZER-LF IDE_LED RN13 150R/8P4R H2X4[7]M_BLACK-RH C528 X_0.1u/16Y VCC5 C129 0.1u/16Y SPEAKER Z X_0.1u/16Y GND D24 S-BAT54A_SOT23 C R239 10K/1% C73 25 VCC3 SUS_LED A Q72 C520 2N3904 X_0.1u/16Y VCC5 D B R646 10K/1% SPKR 15 14 SATA_LED_SB# E JPWR1 25 ATX_5VSB VCC5 Y X 23 IDE_LED# R232 4.7K ATX_5VSB C101 0.1u/16Y C96 VCC5 ATX_PWR_OK 18,30 C113 X_0.1u/16Y R814 330R/6 +12V 0.1u/16Y C526 X_0.1u/16Y C163 X_0.1u/16Y PWRCONN24P_BLACK-RH-2 VCC3 12,18,30 6,15,36 WDT# R804 X_0R FP_RST# R805 33R HDD+ IDE_LED HDD- FP_RST#_R C521 0.1u/16X 3VSB JFP1 HDD+ PLED PWR_LED SLED 4SUS_LED RESET- PWSW+ RESET+ PWSW- NC C527 X_0.1u/16Y H2X5[10]M_BLACK-RH R803 X_4.7K C524 X_0.1u/16Y PSIN#_R R806 X_100R/1% PWRBTIN C522 X_0.1u/16Y R800 0R PWRBTIN_NCT 21,36 18,36 C C LED ( for Fintek 71889) Update 1013 If use N3016Y LED Ctrl, SIO LED_VCC / LED_VSB can not to use 5VDIMM SUS_LED 36 PWR_LED Q79 SUS_LED PWR_LED R801 X_4.7K R794 X_4.7K X_NN-CMKT3904_SOT363-6-RH R813 X_330R/6 B 3VSB 13 TPM_CLK 18,21 PLTRST_BU3# 15,18 LPC_AD0 15,18 LPC_AD1 15,18 LPC_AD2 15,18 LPC_AD3 15,18 LPC_FRAME# R802 X_1K/1% R809 X_330R/6 36 TPM 3VSB 18 LED_VCC 18 JTPM1 11 13 VCC3 SERIRQ_R R807 0R SERIRQ VCC5 14,18 12 14 H2X7[10]M-2PITCH_BLACK-RH R792 1K/1% 3VSB 5VDIMM LED_VSB TPM_CLK PLTRST_BU3# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# Reserve pull high to 5VDIMM if PM don't want PLED light in deep mode B PS2 KEYBOARD & MOUSE CONNECTOR C5 X_0.1u/16Y KB_MS1 CONN-KB_MS R16 X_1K 16 17 RN1 4.7K/8P4R MSDAT 18 MSCLK 18 KBDAT 18 KBCLK MSDAT SP1 X_Short PAD MS_DT MSCLK SP2 X_Short PAD MS_CK KBDAT SP3 X_Short PAD KB_DT KBCLK SP4 X_Short PAD KB_CK 10 MS C31 C24 C18 C13 180P/50N 180P/50N 180P/50N 180P/50N A 11 12 RUSB_VCC3 C6 0.1u/16X KB 13 14 15 18 CP1 A X_COPPER FB1 X_FB80ohm_3A_0805 MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description ATX PWR-Connector & Front Panel & EMI Date: Friday, March 19, 2010 Sheet 29 of Rev 1.3 38 EN D 0R 5VCC_DRV R150 0R 5VDRV1 uP7501 Used SLP_S5# for AMT C62 22n/16X R418 16K R413 C258 4.7u/10Y/8 10K/1% C241 0.1u/16X U17A + - 0.8*(R320+R315/R315) VCC5 V1_8SET V1_8SET R410 12.7K/1% R382 100K/1% R392 1K/1% R399 X_1K/1% 1.8V SFR/PCH/NVM VR Linear, 1.6A TDC +/- 5% DC+AC VCC3 3VSB VID before PWROK >3ms R772 X_4.7K R780 X_4.7K CHIP_PWGD 14,15 Q77 R769 12,15,35 VRM_PGD X_4.7K cpuvtt & pch vore wait 1.8v 5VSB PHASE 3VSB_PHASE POK/EN LG 3VSB_LG GND FB 6107_EN R502 20KR0402-2 B PWOK_SIO R768 0R CHOKE8 3VSB_UG CH-3.3u8A6.0m-HF 3VSB_PHASE 3VSB_LG NN-PHKD6N02LT_SO8 R661 42.2KR1%0402 R619 2.2R0805 ATX_5VSB 3VSB_FB R677 1.5KR-RH R515 10KR1%0402 5VDRV2 R670 S C X_4.7KB Q55 X_2N3904 VCC3 C150 1u/6.3Y R111 X_27KR0402 R108 X_47KR0402 Q19 Q18 G X_N-2N7002LT1G_SOT23 C47 X_C1u6.3Y0402-RH C191 1u/6.3Y X_N-2N7002LT1G_SOT23 R144 C186 1u/6.3Y C252 0.1u/25Y C202 0.01u/16X C244 0.1u/25Y C218 C415 0.1u/25Y 0.1u/25Y Use A control and reserve B G R122 X_4.99KR1%0402 C Q57 X_2N7002 VCC5 R114 X_1KR0402 4.7KR0402 C586 X_0.1u/25Y NN-3904 5VDIMM_5V R112 X_47KR0402 VCC3 EC44 CD470u6.3SO-RH C585 C3300p50X0402 3VSB R366 VTT_PGD 20K/1% CHIP_PWGD D D Q64 3VSB_UG UP6107M8_SOT23-8-RH C1u6.3Y0402-RH Q63 P-PMBS3906_SOT23-RH G C E R496 4.7KR0402 5VSBDRV2 S N-2N7002LT1G_SOT23 B BOOT C584 Q71 UG VCC 3VSB_BT R776 6,35 Q78 D 10KR1%0402 3VSB_WAKE S R683 3VSB_VC R779 4.7K CLOCK GEN Watch dog C587 C0.1u25Y0402-RH U31 X_20K/1% 12,18,29 WDT# +1 2.2R0805 0R0402 R761 PWOK_SIO R770 10K/1% R665 R674 R393 X_4.7K G E C10u10Y0805 18 EC45 CD470u6.3SO-RH NP-P5003QVG_SOIC8-RH C390 C0.018u16X0402-RH 5VSBDRV2 VCC1_8REFA D C422 5VDUAL D19 S-1N5817_DO214AC A C Q76 X_2N7002 VCC3 G S PD PD X_20K/1% S PS PG +1 ND ND 5VDRV2 R760 18,29 ATX_PWR_OK 5VDUAL U30 NS NG EC37 CD470u6.3SO X_NN-3904 Deep Mode WOL LAN Power CTRL Circuit ATX_5VSB VCC5 D VCC1_8 C236 X_0.1u/16Y +12V PWROK DELAY C Q53 N-3023_TO252 G LM358D_SOIC8 + 7501 Mode H:Support S0/S3/S5 L:Support S0/S3 C253 X_0.1u/16Y V1_8REF S1 R146 1K/1%/6 near U24 Pin3 VCC1_8REF C69 0.1u/25Y G1 D VOUT MODE 5VSB_DRV 5VSBDRV1 C70 C477 1u/6.3X G2 18n/16X uP7707 VIN 5VCC 5VSB S3# S5# 0R U21 D R174 31,36 SLP_S5_LCH# D X_0R Q31 R166 5VDIMM S2 EMA60D03A VCC3 VCC1_8REFA NC U8 15,18,32,35,36 SLP_S3# R494 12,15,31,36 SLP_S4# ATX_5VSB 5VDIMM_5VSB C74 0.1u/16X VCC1_8 VCC1_8REF GND 10K/1% 5VDIMM_5V +12V VCC3 ATX_5VSB R163 10R R176 510R GND 18,29 ATX_PWR_OK R170 S VCC1_8REF 5VDIMM FOR DDR VCC5 4 TYPE B ATX_5VSB B X_0R0402 VCC3 R847 X_20K/1% R145 X_0R0402 G2 For power 700W solution The power supply VCC3 delay 12ms after VCC5 assert The chip U7501 5VDRV1 work when the VCC5 ready (When VCC5 up to 4.2V and the 5VDRV1 delay 6ms assert), but VCC3 not ready and let the 3VSB sequence fail Q82 X_NN-2N7002D 6107_EN D2 D1 S2 G1 S1 3VSB_LAN_EN# Follow NCT3016Y-1012 EN VTT_0_9_REF VTT_0_9_REF 18,33 1.2V PCH_1_2_REF_A R305 X_0R PCH_0_9_REF PCH_0_9_REF 18,32 X_UP6264B ATX_5VSB 36 3VSB_LAN_EN# R120 56K/1% 5VSB R102 X_11K/1%DDR_1_5_REF_A C46 X_0.1u/25Y VCC5 R87 X_11K/1%VTT_0_9_REF_A C41 X_0.1u/25Y PCH_1_2_REF_A C28 X_0.1u/25Y R845 X_4.7K R846 0R TYPE A S3# S5# MODE 5VSB_DRV 5VCC_DRV 5VSBDRV2 5VDRV2 UP7501M8_SOT23-8-RH R466 1KR1% H1X2M-2PITCH_BLACK-RH C588 C0.022u16X0402-RH MS-7636 Size Custom Document Description Rev 1.3 ACPI controller UPI Date: Friday, March 19, 2010 A MICRO-STAR INT'L CO.,LTD MSI +12V X_0R R86 VTT_0_9_REF_A 6 15,18,32,35,36 SLP_S3# 12,15,18 SLP_S5# 0.9V U26 DDR_0_9_REF 18,31 DDR_0_9_REF J1 2 CHIP_PWGD X_0R GND 200K/1% R63 R118 5VDRV1 DDR_1_5_REF_A 1.5V 5VCC 5VSB 23,28 5VDRV1_EN VCC SDA GND SCL ATX_5VSB 0.01u/16X X_0R 10R0402 X_CD470u6.3SO X_0R R76 R521 +12V CD470u6.3SO R93 SMBDATA 10KR1%0402 C371 C0.1u16X0402-2 CD470u6.3SO SMBCLK 510R0402 R539 CD470u6.3SO A U5 R559 VCC3 C232 18,29 ATX_PWR_OK VCC5 EC43 + VCC5 R119 X_10R REF_PWR C52 X_0.1u/25Y 5VSB 5VSB +1 SMBDATA SMBCLK SMBDATA EC33 + 10,11,12,15,19,21,35,36 10,11,12,15,19,21,35,36 EC53 + 0x50 EC54 Voltage console SMBCLK Sheet 30 of 38 DDR3_1.5V 21.25A=6A+8A+0.75A+6.5A 5VDIMM_IN R17 Iripple=2.63A 1.49*2*1=2.98A>2.63A C8 2.2R/8 C82 10u/10Y/8 1u/25X/8 C91 0.1u/25Y EC12 CD470u6.3SO +1 5VDIMM D1 S-BAT54C_SOT23 X Y Z +12V +1 DDR DRAM Imax=8A V1.5DDQS3: DDR I/O (6A) D EC7 CD470u6.3SO CHOKE2 D 5VDIMM CH-1.2U15A C72 0.1u/25Y/6 PHASE UG LG 6103_DDR_PH1 6103_DDR_UG1 6103_DDR_LG1 R78 R64 X_0R/6 2K/1% C21 0R/6 C43 0.1u/25Y 6103_DDR_PH1 UP6103S8_SOP8-RH 5VDIMM_IN D 6103_DDR_UG1 R79 3K/1% VCC_DDR CHOKE5 CH-1.1u27A1.7m R221 2.2R/8 DDR3_FB X_0.01u/16X C R99 C37 1u/6.3Y EC27 CD560u4SO +1 C25 X_0.01u/16X FB 6103_DDR_BOOT1 EC24 CD560u4SO C39 X_0.01u/16X +1 R100 X_0R/6 BOOT R51 X_15K/1% Vref C40 0.1u/25Y U3 +1 DDR_REF 3K/1% VCC R50 GND DDR_0_9_REF 18,30 DDR_0_9_REF SIO 　ㄓ琌 0.9VREF 6264 　ㄓ琌 1.5VREF EC23 CD560u4SO C93 3.3n/50X Q33 N-NTD4809NT4G_DPAK3-RH G S C 6103_DDR_PH1 D 6103_DDR_LG1 Q35 G S N-NTD4806NT4G_DPAK3-RH R223 10K/1% B B DDR VTT Power DDR3_FB R69 9.09K/1% To CPU Copper trace width > 250mils , Fill island behind DIMM > 400mils DDR_REF 5VSB D VCC5 R52 4.7K Q6 2N7002 G R4 0R R5 X_0R VCC_DDR D Modify ATX_5VSB-2009.8.12 ATX_5VSB R10 10K/1% Q5 2N7002 G VTT_VCC S C14 X_0.1u/10X C7 0.1u/25Y VREF2 ENABLE VCNTL BOOT_SEL DDRVTT_VREF R90 1K/1% C SLP_S4# R31 X_4.7K R42 20K C68 1u/25X/8 C63 0.1u/25Y EC4 CD820u2.5SO A Q4 2N3904 B E 12,15,30,36 SLP_S4# 1K/1% + VIN GND VREF1 VOUT GND VTT_DDR VTT_DDR:0.75A R91 uP7711 A VCC_DDR U2 DDR3_A DDR3_A S 18 30,36 SLP_S5_LCH# MICRO-STAR INT'L CO.,LTD Only for meet Intel power down sequence MSI MS-7636 Size Custom Document Description Date: Friday, March 19, 2010 Rev 1.3 DDR POWER - UPI6103_1-Phase Sheet 31 of 38 PCH Core 6.8A D V1.05PCHS0: Vcc, VccExp, VccDMI, VccSATA, VccSATAPLL, VccAUPLL, VccSSC, VccDIFFCLK, VccDIFFCLKN, VccUSBCORE, VccDPLL, VccDPLL_EXP,VccDPLL_FDI (4.5A) V1.05MEM: VccMEW, VccAUX, VccME (2.3A) D VCC_DDR 3VSB C C C305 C0.1u25Y0402 R422 X_16.5KR1%0603 0R/6 EC39 CD560u4SO 5VSB 3KR1%0402 C242 X_C0.1u16Y0402 D 105_G G Q60 PCH_1P05 Iripple=1.6A 1.87*1*1=1.87A>1.6A C245 X_1u/16Y/6 R424 X_10KR1%0402 LM358D_SOIC8 R391 10KR1%0402 Q61 G EC41 CD820u2.5SO-RH-1 + R395 18KR1%0402 105_G EC40 CD820u2.5SO-RH-1 + R400 - U17B + S C254 0.1u/16X S N-APM3023NUC-TRL_TO252 C260 X_C2.2U6.3Y0603 0R/6 N-APM3023NUC-TRL_TO252 R430 X_7.87KR1%0402 R431 V1P05PCH_CNTRL_INPUT D 18,30 PCH_0_9_REF R433 +1 +12V PCH_0_9_REF B B Q58 15,18,30,35,36 SLP_S3# R429 X_10KR0402 C256 C0.1u25Y0402 V1P05PCH_CNTRL_INPUT X_NN-CMKT3904_SOT363-6-RH A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Date: Friday, March 19, 2010 Rev 1.3 PCH POWER - UPI6103_1-Phase Sheet 32 of 38 VTTPWRGD LEVEL SHIFT CPU_VTT VTTS0: 1.1V/1.05V CPU Uncore, MCP I/O Iripple=8.28A (30A) 6.1*2*1=12.2A>8.28A D D +12V CPU_VTT_VCC12_IN C N-NTD4806NT4G_DPAK3-RH S N-NTD4806NT4G_DPAK3-RH C +1 1 2 R12 3.6KR1%0402 C12 X_C0.01u16X0402 E C60 C3300p50X0402 C533 X_C22u6.3X/8 X_0R 42.2KR1%0402 Q14 C544 X_C22u6.3X/8 B Q2 N-SST3904_SOT23 D G C539 X_C22u6.3X/8 R34 4.7KR0402 D G S R98 C538 X_C22u6.3X/8 R43 C3 C0.1u25Y0402-RH Q25 背面 C77 CD820u2.5SO-RH-1 VTT_SELECT C4 X_C0.01u16X0402 6103_CPU_VTT_BOOT1 R6 0R 6103_CPU_VTT_LG1 CH-0.5u40A0.81m-RH EC8 + 3.09KR1%0402 UP6103S8_SOP8-RH R141 2.2R0805 CD820u2.5SO-RH-1 R21 6103_CPU_VTT_PH1 6103_CPU_VTT_UG1 6103_CPU_VTT_LG1 EC9 + R26 1KR1%0402 EC17 CD820u2.5SO-RH-1 + C9 X_C0.01u16X0402 FB BOOT PHASE UG LG CPU_VTT CHOKE3 EC16 CD820u2.5SO-RH-1 R28 34.8KR1% Vref 6103_CPU_VTT_PH1 C1u16Y R13 X_0R R3 4.99KR1%0402 6103_CPU_VTT_BOOT1 X_H1X2M-2PITCH_BLACK-RH 2.49KR1% VCC U1 CPU_VTT C C0.1u25Y0402-RH CPU_VTT_FB 18,30 VTT_0_9_REF N-NTD4809NT4G_DPAK3-RH C10u16X51206-RH-1 R70 10K/1% GND C2 VTT_0_9_REF R7 C20 C0.1u25Y0402-RH +1 C27 Q13 S +1 D G 2.2R0805 CPU_VTT1 CH-1.2u15A1.7m-RH C32 C0.1u25Y CD270u16SO-RH-2 + R68 EC2 6103_CPU_VTT_UG1 CHOKE1 CD270u16SO-RH-2 C1u25X0805-RH X_CD270u16SO-RH-2 C17 EC5 EC1 R49 2.2R0805 +12V CPU_VTT H:1.05 L:1.1 CPU_VTT B R9 1KR1%0402 VTT_SELECT R8 E C R44 0R0402 SIO_GPIO24 18 0R0402 Q3 N-SST3904_SOT23 B B A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Date: Friday, March 19, 2010 Rev 1.3 CPU_VTT - UPI6103_1-Phase Sheet 33 of 38 GFX 12V VIN CPU_VTT R351 2.2R0805 C215 C1u16X0603 U14 GFX_VR_EN_R H_GFX_VID7_R H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID0_R C 17 32 25 26 27 28 29 30 31 C210 C1u16X0603 18 680R0402 VCC R326 CPU_VTT PGOOD EN VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 PVCC 19 BOOT 22 AXG_BOOTR342 UGATE PHASE LGATE 23 24 21 AXG_UGATE AXG_PHASE AXG_LGATE 16 15 AXG_ISEN_PLUS ISEN-15 ISEN+ ISEN- 0R0805 ISENNO 14 GFX 1PHASE OUTPUT C207 AXG_PHASE +12VP_GPU C0.22u16X0603 AXG_ISEN_N 35 C225 X_C10p50N0402 R386 37.4KR1%0402 AXG_ISENO R385 100KR1%0402 C227 C4700p16X0402 C RT3 100KRT1%0603 R374 1.82KR1%0402 AXG_UGATE 12 VSEN 11 RGND 10 DVC AXG_RCOMP FB AXG_CPUFB C212 C4700p16X0402 OFS COMP AXG_COMP REF FS APA R339 100KR1%0402 SS 33 R343 63.4KR1%0402 AXG_APA R354 4.99KR1%0402 R347 X_174KR1%0402 R350 23.7KR1%0402 GND V_6334_GPU 100R1%0402 ISL6314CRZ_QFN32 C216 C0.01u25X0402 X_COPPER AXG_PHASE R389 0R0402 R289 2.2R0805 R265 0R0805 LG D Q43 G S LG D CHOKE6 CH-1.1u27A1.7m Q46 CP12 C165 G S N-NTD4806NT4G_DPAK3-RH N-NTD4806NT4G_DPAK3-RH C1000p16X0402 C192 AXG_ISEN_PLUS GPU_CORE X_COPPER R388 100R1%0402 B R372 EC34 CD820u2.5SO-RH-1 + GFX_VSS_SENSE VDIFF AXG_ISEN_N EC31 CD820u2.5SO-RH-1 49.9/1% 20 Q49 C1u16Y GFX_VCC_SENSE R373 NC D G N-NTD4809NT4G_DPAK3-RH R293 10KR0603 R390 49.9KR1%0402 AXG_LGATE R384 100R1%0402 1R0805 S GPU_CORE R398 0R0402 R302 CP11 C161 X_C22u6.3X1206 AXG_OCSET C4.7u35Y1206 C10u16Y1206 C226 C0.1u25Y0402 C195 X_C22u6.3X1206 OCSET 13 C89 C199 Ripplecur=2800mA GPU_VSEN GPU_VSEN R346 2.2R0805 V_6334_GPU X_0R R357 CD270u16SO CD270u16SO 12VP VCC5 +1 NN-3904 EC29 EC32 R367 1K/1% C87 C10u16Y1206 GFX_VR_EN D CH-1.2U15A GFX_VR_EN_R + + Q56 12VP R355 1K/1% D +12VP_GPU CHOKE4 R397 4.7K VCC3 B R371 1KR1%0402 R360 22.6KR1%0402 C230 C1200p50X C219 C1200p50X C231 C1200p50X R370 X_1KR1%0402 C224 C22p50N0402 R387 20KR1%0402 C233 X_C0.01u25X0402 RN9 H_GFX_VID[6 0] H_GFX_VID5 H_GFX_VID4 H_GFX_VID3 CPU_VTT H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R R307 R314 R313 R312 R311 R310 R309 R308 8P4R-0R0603 H_GFX_VID2 H_GFX_VID1 H_GFX_VID0 H_GFX_VID6 RN10 H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID7_R 8P4R-0R0603 X_1KR0402 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 H_GFX_VID7_R H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID0_R R327 R334 R333 R332 R331 R330 R329 R328 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 1KR0402 demo board Used GFX VR (Clarkdale Only) Switcher (7 VID), 16A TDC, 25A Imax A A MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Sheet Date: Friday, March 19, 2010 Rev 1.3 GPU PowerISL6117_1-Phase 34 of 38 VRMPWRGD LEVEL SHIFT VCC5 C11 VTT_ENABLE R109 0R0402C48 C470p50X0402 C38 R105 R95 R121 0R0402 X_C1u25X0805 SDA OUT1 5VDIMM OUT2 GPU_VSEN R61 VCC5 SCL VCC5 0R0402 SMBCLK R106 UP6262AMA8_SOT23-8-RH R127 10KR1%0402 X_10KR1%0402 R60 CPU_VTT VCC5 X_10KRT1% 200KR1%-1 R54 X_56KR1% R25 47KR1%0402-RH C0.015u16X0402 X_C0.033u10X0402 10KR1%0402 SMBDATA SMBDATA R2 X_4.7KR0402 X_10KR1%0402 B C1 E VCCP_IMAX C53 C1u6.3X50402-HF Q21 B 10KR1%0402 G Defaul Low EAP 21 TM 11 OFS 17 RT SS 48 VR_RDY 22 VRHOT PSI PSI2 10 IMAX ISEN1 R55 CS1- R116 BOOT2 0R0805 R227 R18 R19 R20 R71 0R0805 CSP CSN R65 ISEN1 16 ISEN1 ISEN2 15 ISEN2 ISEN3 14 ISEN4 13 PWM4 23 C22 C1u25X0805 CS1- 2KR0402 C15 C0.1u25X 2.43KR1% CS1+ 2.43KR1% CS2+ 2.43KR1% CS3+ R81 X_10KR0402 RT2 X_10KRT1% R82 X_10KR0402 CS2+ R66 BOOT3 0R0805 C19 X_C0.1u10X0402 R243 18 SIO_GPIO21 ISEN3 R57 SP11 10.5KR1% R45 CS3+ VCC5 R40 CS1- R24 1R1% VTT_PGD 0R0402 R46 X_1KR SIO_GPIO23 R41 R80 R47 PWM_LED3 1 1 2 1R2 VCCP X_1KR VCC5 R96 X_LED04-B-20mA3.8V_1608-RH-1 LGATE2_L X_3.3KR 12VP CH-1.2u15A3.0m-RH VCC5 3.3KRLGATE3_L X_0R0402 LED3 VCCP Enable PSI function S SIO_GPIO21 LED04-B-20mA3.8V_1608-RH-1 D C SP10 PSI1 R11 13KR1% PSI2 R123 25.5KR1% 6,30 D 18 SIO_GPIO40 C44 C0.1u10X0402 C109 C0.1u25Y C90 C0.1u25Y C159 C0.1u25Y C85 C0.1u25Y G S GPIO11:H D Q23 N-2N7002_SOT23 G S EC14 CD820u2.5SO-RH-1 + E Q37 S EC20 CD820u2.5SO-RH-1 + R97 1KR0402 C34 C1u6.3X50402-HF NN-CMKT3904_SOT363-6-RH D G N-NTD4806NT4G_DPAK3-RH C146 C1000p50X0402 EC26 CD820u2.5SO-RH-1 + R72 10KR1%0402 Q40 EC15 CD820u2.5SO-RH-1 + R186 X_0R D G EC13 CD820u2.5SO-RH-1 + H_VID0 COIL4 CH-0.5u40A0.81m-RH R240 2.2R0805 EC28 CD820u2.5SO-RH-1 + X_H1X3M-2PITCH-1MM_BLACK-RH H_VID0 Q41 N-NTD4809NT4G_DPAK3-RH EC22 CD820u2.5SO-RH-1 + S X_0R0402 PWM_LED2 JPWR2 PWRCONN4P_CREAM-RH-1 COIL1 EC10 CD1000u16EL20-RH-3 + R187 X_0R R180 0R R39 LED2 EC25 CD1000u16EL20-RH-3 + H_VID1 D G 10KR R226 0R0805 LGATE3 PWM_LED1 GND H_VID1 R181 0R SIO_GPIO22 VCCP 1R1% C98 C10u16X51206-RH C100 C1u16Y R245 2.2R0805 UGATE3_R LED1 12VP Q12 C23 C0.1u25X UGATE3 18 SIO_GPIO22 12V R85 1KR0402 JB2 R14 S2 CPU_VTT R75 10KR1%0402 H_VID0_R JB1 C R27 0R0402 12V H_VID1_R A SP9 15.4KR1%-RH X_LED04-B-20mA3.8V_1608-RH-1X_1KR 12VIN 3VSB SP8 Auto Phase Select MIN:100ns CPU_VTT R224 2.2R0805 Q32 S S +CPU_VTT STABLE TO VTTWRGOOD ASSERTION Q11 N-SST3904_SOT23 D G N-NTD4806NT4G_DPAK3-RH C99 C1000p50X0402 CS1- GND 4.7KR0402 Q34 S ISEN3 EC18 X_CD1000u16EL20-RH-3 + B D G N-NTD4806NT4G_DPAK3-RH N-NTD4806NT4G_DPAK3-RH EC21 CD1000u16EL20-RH-3 + R74 COIL3 CH-0.5u40A0.81m-RH ISEN2 R56 18 SIO_GPIO23 15,18,30,32,36 SLP_S3# Q36 N-NTD4809NT4G_DPAK3-RH PHASE3 R53 10KR1%0402 Q16 N-2N7002LT1G_SOT23 S B G1 IMON_CTL 1R1% C10u16X51206-RH C1u16Y VCC5 UP6206_ VQFN-48L-RH C71 C0.01u25X0402 G D G 10KR R208 0R0805 LGATE2 LGATE2_L 60.4KR1%0402 VCC5 R37 12VIN 5VSB R88 10KR1%0402 C78 C76 R225 2.2R0805 UGATE2_R UGATE2 R59 10KR1%0402 Q10 NN-2N7002DW-7-F_SOT363-6-RH G2 D2 18 C51 C0.1u25X LGATE3_L 60.4KR1%0402 Q9 N-2N7002LT1G_SOT23 22KR1%-RH PHASE2 SP7 12VIN BOOT3 UGATE3 PHASE3 LGATE3_L 24 25 26 27 D SP6 CS1+ BOOT2 UGATE2 PHASE2 LGATE2_L R73 D1 C66 N-SST3904_SOT23 X_C0.1u10X0402 32 31 30 29 Q27 S VRM_IMAX_R 60.4KR1%0402 VTT_ENABLE Q22 N-SST3904_SOT23 C61 C0.1u10X0402 BOOT2 UG2 PHASE2 LG2 BOOT3 UG3 PHASE3 LG3 S1 10KR1%0402 B E C R161 E R113 VTT_PGD R23 D C R162 R142 1KR1%0402 4.7KR0402 6,30 VCCP_IMAX IMON_CTL 18 IMON_CTL D G N-NTD4806NT4G_DPAK3-RH C84 C1000p50X0402 BOOT1 UGATE1 PHASE1 LGATE1_L S 12VP R125 6.2KR1%0402 Delay 10us DAC 12 R58 3VSB B PSI2 X_0R0402 37 36 35 34 FBRTN PSI1 R30 18 VCCP_IMON_SIO FB C26 X_N-SST3904_SOT23 X_0R0402 COMP X_0R0402 Q8 X_C0.1u10X0402 R38 TB X_0R0402 S C R33 PSI# 19 BOOT1 UG1 PHASE1 LG1 R32 X_56KR1%0402 VOUT R124 Q1 X_N-2N7002LT1G_SOT23 G 20 C0.01u25X0402 R48 X_1KR0402 EN R22 D CPU_VTT VRSEL 46 3KR1% R36 C49 CPU_VSS_SENSE C50 VRM_PGD_R SMBCLK 10,11,12,15,19,21,30,36 SMBCLK 47 56KR1%0402 RT1 OUT3 15.4KR1%-RH C57 X_C0.1u10X0402 CPU_VSS_SENSE R160 100R0402 R107 34 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 C10p50N R104 0R0603 C45 X_C0.01u25X0402 GPU_VSEN R126 10,11,12,15,19,21,30,36 C35 CPU_VSS_SENSE 6206_CPU GND BUS_SELVCC SMBDATA C4700p50X-3 R89 1KR1% X_100KR0402 5VDIMM U6 C36 C470p50X 6206_CPU 0x60:RH=10K,RL=NC Q28 N-NTD4806NT4G_DPAK3-RH 49.9/1% D G R189 2.2R0805 R83 CPU_VCC_SENSE 38 39 40 41 42 43 44 45 2.2KR1%0402 CPU_VCC_SENSE R62 C16 UPI VOLTAGE CONSOLE(1) R206 0R0805 LGATE1 100R0402 U4 COIL2 CH-0.5u40A0.81m-RH PHASE1 R92 S 10KR VCCP Q29 N-NTD4809NT4G_DPAK3-RH R135 10KR1%0402 C56 CPU_VSS_SENSE X_C0.1u10X0402 VCCP R198 D G S C65 X_C1000p50X0402 demo board Used C130 C10u16X51206-RH C145 C1u16Y R205 2.2R0805 UGATE1_R UGATE1 1KR0402 1KR0402 X_1KR0402 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 1KR0402 12VP C59 C1u25X0805 Y BOOT1 C64 C0.1u25X R131 R132 R136 R137 R138 R139 R140 R134 Z 12VIN R167 BOOT1 0R0805 LGATE1_L H_VID7_R H_VID6_R H_VID5_R H_VID4_R H_VID3_R H_VID2_R H_VID1_R H_VID0_R V_6206 C C1u25X0805 H_VID3_R H_VID2_R Y BOOT3 2 8P4R-0R H_VID7_R X_1KR0402 H_VID6_R X_1KR0402 1KR0402 H_VID5_R H_VID4_R X_1KR0402 1KR0402 H_VID3_R 1KR0402 H_VID2_R 1KR0402 H_VID1_R H_VID0_R X_1KR0402 X_S-BAT54A_SOT23 X NN-CMKT3904_SOT363-6-RH CPU_VTT R151 R152 R153 R154 R155 R156 R158 R159 D3 RN3 R143 2.2R0805 VBOOT 8P4R-0R H_VID3 H_VID2 X_C1u6.3Y0402-RH 2.2R0805 12VP C1u25X0805 100KR1%0402-RH C67 R15 R29 2.2R0805 D R168 C42 12VP 4.7KR0402 C58 X_C0.1u25Y0402-RH H_VID7_R H_VID6_R H_VID5_R H_VID4_R VCC12_1 R149 18 VRM_PGD_R 12,15,30 2.2R0805 C10 C1u25X0805 VRM_PGD Q24 H_VID7 H_VID6 H_VID5 H_VID4 H_VID[7 2] R67 33 V_6206 RN2 28 R148 10KR1%0402 X_S-BAT54A_SOT23 X BOOT2 Z 1KR1%0402 5VCC R133 X_4.7KR0402 VCC3 R169 VCC12_2 R157 1KR0402 3VSB GND VCCP 49 CPU_VTT D2 A Q20 N-2N7002_SOT23 X_H1X3M-2PITCH-1MM_BLACK-RH MICRO-STAR INT'L CO.,LTD MSI MS-7636 Size Custom Document Description Date: Friday, March 19, 2010 Rev 1.3 VRD11.1 - uPI 6206_3-Phase Sheet 35 of 38 Reserve debug port 5020 D 6 6 6 6 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 TP16 TP15 10,11,12,15,19,21,30,35 SMBDATA 10,11,12,15,19,21,30,35 SMBCLK TP18 TP17 TP22 TP23 TP19 TP25 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 11 15 17 OBSFN_A0 OBSFN_A1 OBSDATA_A_0 OBSDATA_A_1 OBSDATA_A_2 OBSDATA_A_3 H_MCP_CFG17A H_MCP_CFG16A XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 21 23 27 29 33 35 OBSFN_B0 OBSFN_B1 OBSDATA_B_0 OBSDATA_B_1 OBSDATA_B_2 OBSDATA_B_3 51 53 10 12 16 18 SDA SCL OBSFN_C0 OBSFN_C1 OBSDATA_C_0 OBSDATA_C_1 OBSDATA_C_2 OBSDATA_C_3 22 24 28 30 34 36 OBSFN_D_0 OBSFN_D_1 OBSDATA_D_0 OBSDATA_D_1 OBSDATA_D_2 OBSDATA_D_3 R172 R165 H_MCP_CFG8A H_MCP_CFG9A H_MCP_CFG0A H_MCP_CFG1A H_MCP_CFG2A H_MCP_CFG3A X_0R0402 X_0R0402 H_MCP_CFG4A H_MCP_CFG5A H_MCP_CFG10A H_MCP_CFG11A H_MCP_CFG6A H_MCP_CFG7A TP24 TP26 TP28 TP20 TP27 TP21 61 TCK1 TCK0 TDO TRSTn TDI TMS 55 57 52 54 56 58 HOOK0 HOOK1 HOOK2 HOOK3 ITPCLK/HOOK4 ITPCLKB/HOOK5 RESETB/HOOK6 DBRB/HOOK7 39 41 45 47 40 42 46 48 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 13 19 25 31 37 49 59 14 20 26 32 38 50 GND18_XDP_PRESENTB 60 62 62 VCC_OBS_AB VCC_OBS_CD 61 CPU_TCK CPU_TDO CPU_TRST# CPU_TDI CPU_TMS CPU_TCK CPU_TDO CPU_TRST# CPU_TDI CPU_TMS XDP_PWRGD XDP_PLRST# XDP_CPU_PWRGD 6 6 X_0R R171 1.5KR0402-1 XPD_CPURST# X_0R0402 X_0R0402 R216 R215 XDP_CPU_CLK_R_P XDP_CPU_CLK_R_N XDP_CPU_CLK_R_P XDP_CPU_CLK_R_N XPD_CPURST# FP_RST# X_1KR0402 6,15,29 EN#/VSB Discharge NCT_XIN C404 R588 10M/4 NCT_XOUT C20p50N Y3 EN# circuit 32.768KHZ12.5P_D-LF R590 330K/4 C405 C C39p50N Enable ASIC Timer Circuit 12,15,30,31 SLP_S4# PANEL SWITCH NCT_SCL VSB GND 12 SCLK NCT3016Y R596 0/4 NCT_SDA 11 R572 0/4 SLP_S3#/GPIO3 R582 0/4 SLP_S5# PLED1 PLED1/GPIO9/Ctl1/Wake1 PLED2 10 PLED2/GPIO10/Ctl2/Wake2 SDA SYS5VSB_OFF 15 Mode_sel/SLP_S5#_lch/GPIO18 18 EN#/AC_LOSS#/GPIO17 17 NCT_XOUT SYS5VSB_OFF NCT_WAKE# R598 0/4 3VSB_LAN_EN# 30 NC_WAKE# NCT_PSIN# R555 33/4 21 PS_ON#/GPIO13 0/4 13 NCT_PSON# X_0/4 R579 PWRBTIN 18,29 PSON# 18,29 1.Set Lock_GPIO_Mode =1 Link to ATX COON PSON# ,But doesn't use it 3.Set GPIO16 port as output by open-drain mode ATX_5VSB 3VSB ATX_5VSB X_4.7K/4 SLP_S5_LCH# R542 Update- 2009.10.22 If RSMRST# use to GPIO function, please pull high to ATX_5VSB else pull high to 3VSB 10K/4 X_8.2K/4 3VSB R569 1K/4 SLP_S5_LCH# (SimpleMode_Sel): 8-PIN Function: Pull-high 10k 20-PIN Full Function: Floating (Internal Pull-Down) NCT_PSOUT# 18 SimpleMode_Sel 4.7K/4 VCC3 R518 X_4.7K/4 R517 Full function Modify2009.10.22 HW default support deep_s5 ATX_5VSB X_4.7K/4 NCT_PSON# PLED1 R605 0/4 PLED2 R606 0/4 PWR_LED 29 SUS_LED 29 5VSB Trace Width 80mils R256 R255 use DIP CAP 10uF or 22uF NCT_PWROK 3VCC_DET R841 330R/6 5VSB Power Switch A X_0R1206 X_0R1206 Modify - 2009.8.12 3VCC_DET must used 1K　 resistance and connect to 3VCC power source for power detect S R272 249K/4 ATX_5VSB Simple Mode R580 R599 1K/4 NCT_PSOUT# must used 1K　 resistance and connect to SYS_3VSB or 3VDual power source for power detect New future for WAKE support wake up event.It's HW strap pin Pull High : Wake + POWER ON STRAPPING PIN PIN Name R504 R840 330R/6 Modify ATX_5VSB-2009.10.21 Modify ATX_5VSB-2009.8.12 ATX_5VSB Update- 2009.8.24 NCT_GPIO16 Modify ATX_5VSB-2009.8.12 A 5.Waiting CPU_PWRGD from low to high and setting GPIO16_Data =1 when resume from deep_s3 GPIO16 always keep high except for deep_s3 R519 R592 ATX_5VSB 4.Porting GPIO16_Data =0 before system into deep_s3 NCT3016Y-A-RH Pull-High N3016Y Power LED Control 2.Set GPIO16_Data =1 Update- 2009.10.22 GPIO16 Use for MEM_PWRGD Patch Circuit 20 3VCC_DET B Hardware default = high NCT_GPIO16 15 XI / NC Strapping PIN C382 0.1u/16V/Y/4 Power On 14 NCT_PSOUT# R570 16 3VCC/GPIO20 PWRBTIN_NCT 21,29 NCT_GPIO16 NCT_PSIN# PS_IN# PS_OUT# R534 10K/4/1 SLP_S5_LCH# 30,31 0/4 19 NCT_PWROK PWROK/GPIO19 XOUT/ NC SYS5VSB_OFF 21 3VSB_LAN_EN#_R R511 ATXPG/GPIO8 RSMRST#/GPIO16 NCT_XIN ATX_5VSB 21 NC SYS5VSB_OFF R281 0/4 G 15,18,30,32,35 SLP_S3# B Please not change the ASIC timer component C372 0.1u/16V/4 SMBDATA 3VSB_LAN_EN#_R 4.7K/4 U27 0/6 0/4 update 0903 ATX_5VSB Disable ASIC Timer Circuit R587 XDP_PLRST# 1KR0402 CPU_RESET_OUT# ASIC Timer Clock NCT3016Y SMBCLK R194 6,15,18 PLTRST# R200 FP_RST# R589 X_4.7K/4 R508 D R191 X_3KR1%0402 XDP_CPU_PWRGD NCT_XIN ATX_5VSB XDP_PWRGD 0R0402 CPU_VTT R522 Modify ATX_5VSB-2009.8.12 R164 XDP_CPU_PWRGD XDP_CPU_BCLK_P XDP_CPU_BCLK_N XDP_CPU_BCLK_P XDP_CPU_BCLK_N X_BTB60PF-RH C R195 6,15,18 PLTRST# FROM CPU 43 44 XDP_CPU_PREQ# XDP_CPU_PRDY# XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 CPU XDP CLOCK JXDP1 CPU_VTT CPU_VTT R282 D Q42 P06P03LCG_SOT89 EC30 SMD10U/10V 10KR change to 0603 10K ohm Soft Start use X7R or X5R MICRO-STAR INT'L CO.,LTD C190 1u/10V/6 MSI MS-7636 Size Custom Document Description Rev 1.3 CPU XDP Sheet Date: Friday, March 19, 2010 36 of 38 +12VIN UP6103 PE Slot x16 (5.5A) PEX1 Slot x3(1.5A) PCI Slot x3 (1.5A) 1394 Connect x2 (3A) D VCCP Intel 1156 CPU (86A) 95W(TDP) Up6213 +12V CPU_VTTD 30A 3VSB and 3VSB_WAKE POWER MAP Add- 2009.9.28 Intel 1156 CPU (30A) PCI-E LAN ATX_5VSB AVDD5 0.2A LT1087S ALC888S-VC2 D 3VSB_WAKE PCI-E SLOT uP6107 or uP7706 (200mA) FAN x3 (0.6A) PCI SLOT Power Delivery 5VSB uP7704 3VSB SB OTHER PCI Slot x3 C (10A) ヘ玡(2Ax3=6A) VCC5 5VSB uP7501 5VDIMM 3.8A UP6103 VCC_DDR 21.25A DDRIII x2(3.6A) W83310DS up7706&Linear uP7533 x5 PCH 1P05V LDO FUSB_VCC RUSB_VCC 5.5A 3VSB 4.081A PCH (6.5A) C Intel 1156 CPU (2.8A) VTT_DDR DDRIII x4(0.75A) PCH (1A) PE Slot (0.375mA X5) PCI Slot (0.375mA X2) RTL8111DL LAN (58mA+289mA) Fron USB x4 (2A) REAL USB x6 (3A) PS2 KB/MS(500mA) B B VCC3 (18.6A) OP+MOS PCH1_8V 1.6A PCH 1.8V/CPU1.8V uP7706 JMB368_1.8V 361.3mA JMB363 (361.3mA) (1.6A) PE Slot x16 (3.0A) PEX1 Slot x2(2.0X3A=6) PCI Slot x1 (7.6AX1=7.6) ヘ玡(2Ax3=6A) A A 3.3V 58mA+289mA RTL8111DL LAN (58mA+289mA) MICRO-STAR INT'L CO.,LTD MSI MS-7588 Size Custom Document Description Rev 1.3 Power Map Date: Friday, March 19, 2010 Sheet 37 of 38 PCB CPU SOCKET PCB1 MS-7636-1.0 XU1_X1 CPU SOCKET D D LGA1156 Simulation SIP1 HDMI logo SIP2 VCC5 SIM1 BATTERY SIM2 X_PIN1*2 X_PIN1*2 C C HDMI_L BAT1_X1 Optical Fiducial Marks-120 HS_PCH1 PCB MEC1 MEC1 FM12 FM2 FM14 FM4 FM7 FM5 FM3 FM8 X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM HDMI_LOGO BAT-BCR2032P-RH Optical Fiducial Marks-100 FM10 MEC2 MEC2 FM6 FM13 X_OPTICS X_OPTICS FM16 FM11 FM9 FM15 X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS HS-0404591-RH H55EB3:3孔audio（888S VC2） ,GB LAN, OC-switch 不上, DVI,HDMI 不上, JMB368 不上(IDE 也不上), APS LED 不上（SW APS） 半固 H55SG6DVI:Full spec MH6 6 X_MH001 X_MH001 X_MH001 MH7 MH9 MH8 6 X_MH001 X_MH001 X_MH001 A MICRO-STAR INT'L CO.,LTD MS-7636 Size Custom Document Description Rev 1.3 Manual & Option parts Date: Friday, March 19, 2010 4 MH2 MSI 9 MH1 X_MH001 E26-7636010 E26-7636010 G51-M1SP644 rubber rubber G51-M1SP632 X_CD1000uF X_CD100uF X_MH001 X_CD10uF X_MH001 X_CD470u6.3V4SO-2 PCB bottom_label PCB bottom_EC54 PCB LABEL2 PCB Rubber2 PCB Rubber1 PCB LABEL1 PCB MH3 OPT4 PCB OPT3 PCB MH4 OPT2 PCB A OPT1 B MH5 EL CAP B Mounting Holes Sheet 38 of 38 ... MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 D 11 11 11 11 11 11 11 11 MEM_MB_DATA[ 63 0] 11 C B DDR3_DRAMRST#A 10 C... 93 10 3 10 2 11 2 11 1 43 42 10 12 2 12 3 12 8 12 9 12 13 18 19 13 1 13 2 13 7 13 8 21 22 27 28 14 0 14 1 14 6 14 7 30 31 36 37 14 9 15 0 15 5 15 6 81 82 87 88 200 2 01 206 207 90 91 96 97 209 210 215 216 99 10 0 10 5... MEM_MB_ADD12 MEM_MB_ADD 13 MEM_MB_ADD14 MEM_MB_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A 11 A12 A 13 A14 A15 10 7 11 0 11 3 11 6 11 9 12 1 12 4 12 7 13 0 13 3 13 6 13 9 14 2 14 5 14 8 15 1 15 4 15 7 16 0 16 3 16 6 19 9