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Tiêu đề: |
On the scaling limit of ultrathin SOI MOSFETs,” "IEEE Trans. Electron Devices |
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Tiêu đề: |
Device scaling limits of Si MOSFETs and their application dependencies,” "Proc. of the IEEE |
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Tiêu đề: |
Lithography till the end of Moore’s law,” in "Proceedings of the 2012 ACM International Symposium on Physical Design |
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Tiêu đề: |
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[6] W. Y. Choi, B.-G. Park, J. D. Lee, and T.-J. K. Liu, “Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec,” IEEE Electron Device Lett., vol. 28, no. 8, pp. 743-745, Aug. 2007 |
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Tiêu đề: |
Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec,” "IEEE Electron Device Lett |
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Tiêu đề: |
Vertical Si-nanowire n-type tunneling FETs with low subthreshold swing (≤50 mV/decade) at room temperature,” "IEEE Electron Device Lett |
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Sách, tạp chí |
Tiêu đề: |
CMOS-compatible vertical-silicon-nanowire gate-all-around p-type tunneling FETs with ≤50-mV/decade subthreshold swing,” "IEEE Electron Device Lett |
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Tiêu đề: |
Germanium-source tunnel field effect transistors with record high ION/IOFF,” in "VLSI Symp. Tech. Dig |
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Tiêu đề: |
High performance FDSOI MOSFETs and TFETs using SiGe channels and raised source and drain,” in "Proceedings of the International Silicon-Germanium Technology and Device Meeting |
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Tiêu đề: |
A silicon tunnel field-effect transistor with an in situ doped single crystalline Ge source for achieving sub-60 mV/decade subthreshold swing,” "Chin. Phys. Lett |
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Tiêu đề: |
Experimental staggered-source and N+pocket-doped Channel III–V tunnel field-effect transistors and their scalabilities,” "Appl. Phys. Exp |
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Sách, tạp chí |
Tiêu đề: |
Fabrication, characterization, and physics of III-V heterojunction tunneling field effect transistors (H-TFET) for steep sub-threshold swing,” in "IEDM Tech. Dig |
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Tiêu đề: |
Band-to-band tunneling in carbon nanotube field-effect transistors,” "Phys. Rev. Lett |
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Tiêu đề: |
Double-gate tunnel FET with high-κ gate dielectric,” "IEEE Trans. Electron Devices |
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Sách, tạp chí |
Tiêu đề: |
Tunnel field effect transistor with increased ON current, low-"k" spacer and high-"k" dielectric,” "Appl. Phys. "Lett |
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Tiêu đề: |
Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications,” "J. Appl. Phys |
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Tiêu đề: |
Low-subthreshold swing tunnel transistors,” "IEEE Electron Device Lett |
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Tiêu đề: |
Tunnel field-effect transistor without gate-drain overlap,” "Appl. Phys. Lett |
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[21] A. Chattopadhyay and A. Mallik, “Impact of a spacer dielectric and a gate overlap/underlap on the device performance of a tunnel field-effect transistor,” IEEE Trans. Electron Devices, vol. 58, no. 3, pp. 677-683, Mar. 2011 |
Sách, tạp chí |
Tiêu đề: |
Impact of a spacer dielectric and a gate overlap/underlap on the device performance of a tunnel field-effect transistor,” "IEEE Trans. Electron Devices |
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[22] N. Cui, R. Liang, J. Xu, “Heteromaterial gate tunnel field effect transistor with lateral energy band profile modulation,” Appl. Phys. Lett., vol. 98, no. 14, pp.142105-142105-3, Apr. 2011 |
Sách, tạp chí |
Tiêu đề: |
Heteromaterial gate tunnel field effect transistor with lateral energy band profile modulation,” "Appl. Phys. Lett |
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