Design and modeling of tunnel field effect transistors

國立暨南國際大學電機工程學系 博士論文 穿隧電晶體之設計與模型 Design and Modeling of Tunnel Field-Effect Transistors 指導教授：施君興 博士 研究生：阮東見 中華民國 103 年 月 Acknowledgements First and foremost, I would like to express the most gratitude to my advisor, Prof Chun-Hsing Shih, for his valuable advice and strong support throughout my Ph.D years His constant interest in my researches has been unwavering for the past years I have become a better researcher as result of his important guidance, useful suggestions and exciting discussions I will always be indebted to him for giving me the opportunity to work with him in my Ph.D journey Special thanks to my labmates, both former and current, for being very supportive and helpful in simulation method, document procedure and Chinese learning during my stay at the Yuan Ze University and the National Chi Nan University My experience in Taiwan, through the interaction with my lab members and Taiwanese friends, was very enjoyable and unforgettable I would also like to thank the members of my thesis defense committee, Prof Bing-Yue Tsui, Prof Yung-Hsien Wu, Prof Yao-Tsung Tsai, Prof Jyi-Tsong Lin, and Prof Shu-Tong Chang I am grateful to them for their insightful questions, useful comments and valuable suggestions to my dissertation No words would ever be enough to express my deepest gratitude to my parents Their continuous love, sacrifice, support and encouragement have allowed me to pursue my aspirations Taiwan, June 2014 Nguyen Dang Chien i To my beloved little daughter and wife ii 論文名稱：穿隧電晶體之設計與模型 校院系：國立暨南國際大學 科技學院 電機工程學系 畢業時間：中華民國 103 年 月 頁數：145 學位別：博士 研究生：阮東見 指導教授：施君興 博士 論文摘要 對於傳統的金氧半場效電晶體(MOSFETs)而言，次臨界擺幅(Subthreshold Swing) 的物理限制無法再降低，使得電晶體元件的臨界電壓與功率耗損，無法隨元件微縮而 下降。穿隧電晶體(Tunnel Field-Effect Transistors, TFETs)因利用閘極偏壓控制能帶間 穿隧(Band-to-Band Tunneling)來進行元件操作，使其電晶體元件的次臨界擺幅，能突 破傳統金氧半電晶體下限，成為未來極具潛力的綠能電晶體元件架構。本論文藉由二 維元件模擬及適當的物理模型與參數，探討新穎穿隧電晶體之相關元件設計及發展解 析的穿隧電晶體物理模型。 由於操作電流及短通道效應在同質接面或陡異質接面的穿隧電晶體中面臨限 制，因此，於此論文中，提出一種新穎的漸變異質接面(Graded Heterojunction)通道結 構，以提昇穿隧電晶體的操作電流，並改善穿隧電晶體的通道微縮性。操作電流在陡 異質接面穿隧電晶體中的降低，肇因於陡接面的能帶差所造成的熱載子放射，藉由採 用漸變異質接面結構於穿隧電晶體中，能消除相關現象，縮短穿隧距離，有效提高操 作電流。而採用漸變異質接面通道結構的穿隧電晶體，其能帶結構可正確調整，使得 穿隧能障的高度與寬度皆能被閘極偏壓有效地控制，使通道長度微縮至 10 奈米以下 時，穿隧電晶體仍能維持理想的次臨界擺幅。於此論文中，針對漸變異質接面的相關 元件參數，如汲極的摻雜及異質漸變度，亦進行深入的探討，以將此漸變異質接面穿 隧電晶體的操作電流、開關特性及漏電流最佳化。對於次十奈米的短通道漸變異質接 面的穿隧電晶體而言，中度摻雜的汲極及純鍺的源極，能將此綠能元件的特性最佳 iii 化，裨益於低功率及高密度積體電路的未來應用。 結 合 低 能 障 隙 半 導 體 (Low-Bandgap Semiconductors) 材 料 於 線 穿 隧 電 晶 體 (Line-Tunneling TFETs)中，能有效提升穿隧電晶體的操作電流並同時具有低次臨界擺 幅的開關特性。於此論文中，深入探討局部區域與非局部電場(Local and Nonlocal Electric Fields)在穿隧過程中之影響，以正確地瞭解於低能障隙半導體其能帶間穿隧 效應的物理機制。對於具有較高能隙的半導體材料而言，與穿隧機率相關的非局部電 場，在穿隧過程中具有主導的地位；而局部電場與入射穿隧電子數量相關，其在低能 隙半導體材料中扮演重要角色。藉由以局部與非局部電場在穿隧發生率(Tunneling Generation Rate)解析式的分離表示方法，此論文正確地解析敘述低能障隙半導體其能 帶間穿隧效應的物理機制。利用此一新穿隧發生率解析方法，發展可用於低能隙半導 體的線穿隧電晶體之穿隧電流物理模型，並對相關的元件設計與穿隧機制深入探討。 透過最短穿隧路徑(Minimum Tunnel Path)的描述，穿隧電晶體的電流能以清晰易懂的 解析式加以表示，作為有用的元件設計準則。而線穿隧電晶體的源極摻雜濃度與閘氧 層厚度這兩項主要的設計參數，也分別以數學解析及數值模擬方式加以驗證討論，研 究結果顯示穿隧電晶體的最短穿隧路徑值可作為其元件特性的有效參考指標。 關鍵詞：元件設計、解析模型、低能障隙半導體、低功率應用、漸變異質接面、線穿 隧、點穿隧、能帶間穿隧、穿隧電晶體、二維元件模擬 iv Title of Thesis: Design and Modeling of Tunnel Field-Effect Transistors Name of Institute: Department of Electrical Engineering, College of Science and Technology, National Chi Nan University Graduation Time: 06/2014 Pages: 145 Degree Conferred: Doctor Student Name: Nguyen Dang Chien Advisor Name: Dr Chun-Hsing Shih Abstract The insurmountable limit of 60 mV/decade subthreshold swing at room temperature in traditional metal-oxide-semiconductor field-effect transistors (MOSFETs) leads to the non-scalability of the threshold voltage and associated power consumption Based on the gate-controlled band-to-band tunneling, tunnel field-effect transistors (TFETs) have demonstrated to overcome the MOSFET’s swing limit to serve as a promising candidate for energy-efficient applications Using two-dimensional simulations with appropriate models and parameters, this dissertation explores the design and modeling of the advanced TFET devices to elucidate the physical mechanism, to optimize the operating characteristic, and to extend the potential scalability Owing to the limitations of homojunction and abrupt heterojunction structures in on-current and short-channel effect, a new graded heterojunction approach is proposed to significantly boost the on-current and to further scale down the channel lengths of TFETs The lowering of on-current observed in abrupt heterojunction TFETs is physically attributed to the thermal emission barriers formed by abrupt energy-band offsets By employing graded heterojunctions, the thermal emission barriers for electrons/holes are completely eliminated to narrow the tunnel-barrier widths for enhancing the TFET current With the bandgap engineering of graded heterojunctions, both the height and width of the v tunnel barrier are highly controlled by applying gate voltages to ensure a nearly ideal switching of scaled sub-10 nm TFETs Critical device factors, such as the drain profile and bandgap engineering, are examined to generate favorable characteristics in the on-current, on-off switching, and off-leakage of the very short TFETs A mildly doped drain with a pure Ge source is preferred in designing the short-channel graded TFETs for low-power and high-packing-density integrated circuits Using low bandgap semiconductors in line-tunneling TFETs has demonstrated an excellent combination to simultaneously maximize the on-current and minimize the subthreshold swing To better understand the physical principle of band-to-band tunneling in low bandgap semiconductors, the physical properties as well as the roles of local and nonlocal electric fields in tunneling processes are elucidated in this thesis While the nonlocal field related to the tunneling probability dominates in high bandgap materials, the local field associated with the number of incident tunneling electrons plays a more important role in low bandgap semiconductors Based on the new expression of tunneling generation rate reformulated by decoupling the local and nonlocal fields, this work elucidates the design and modeling of line-tunneling TFETs using low-bandgap materials The TFET current is derived in term of the minimum tunnel path with friendly analytical forms for practical use Two prime design factors, the source concentration and gate-insulator thickness, are examined both analytically and numerically, showing the minimum tunnel path can serve as a useful indicator for low-bandgap line-tunneling TFETs Keywords: Device design, analytical modeling, low bandgap semiconductor, low-power application, graded heterojunction, line-tunneling, point-tunneling, band-to-band tunneling, tunnel field-effect transistor (TFET), two-dimensional device simulation vi Table of Contents Acknowledgements i 論文摘要 iii Abstract v Table of Contents vii List of Figures x List of Tables xvi Chapter : Introduction .1 1.1 Transistors for Low Power Applications 1.2 Subthreshold Swing Limit of Traditional MOSFETs .2 1.3 TFETs with Sub-60 mV/decade Subthreshold Swing .3 1.4 Challenges of TFET Devices 1.5 Thesis Objective and Organization Chapter : Overview of Band-to-Band Tunneling Theories .9 2.1 WKB Approximation 2.2 Two-Band Kane Models 11 2.3 BTBT Generation Rates 14 2.3.1 Density of states 14 2.3.2 Velocity in k-space .15 2.3.3 Incident electron flux 15 2.3.4 Transmission factors 16 2.3.5 Tunneling rates 17 2.4 TCAD Simulation Models 18 Chapter : TFET Operation and Model Verification .22 vii ... 隧、點穿隧、能帶間穿隧、穿隧電晶體、二維元件模擬 iv Title of Thesis: Design and Modeling of Tunnel Field- Effect Transistors Name of Institute: Department of Electrical Engineering, College of Science and Technology, National... 3×1018 cm-3 and p-type of 1.8×1019 cm-3 [76] 117 Fig 6.5: Results of modeling and simulated tunneling currents in high-bandgap Ge 118 Fig 6.6: Modeling and simulated results of tunneling... bandgap semiconductors Based on the new expression of tunneling generation rate reformulated by decoupling the local and nonlocal fields, this work elucidates the design and modeling of line-tunneling