Compal NIWE2 LA 5752p rev 1 0

A B C D E 1 Compal Confidential NIWE2 Schematics Document Arrandale with Intel IBEX PEAK-M core logic 3 REV:0.3 4 Issued Date Compal Electronics,Ltd Compal Secret Data Security Classification 2008/03/25 Deciphered Date 2008/04/ Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B www.vinafix.vn C D Cover Sheet Size Document Number Custom Rev 0.3 LA-5752P Date: Thursday, October 29, 2009 Sheet E of 51 A B C D Compal confidential POWER BD: LS-5754P POWER BT NOVO BT POWER MANAGE BT File Name : Z ZZ intel Arrandale (UMA/DIS) VRAM 64*16 DDR3*4 15.6W_PCB_LA5752P page20 PCI-E X16 Clock Generator E CAP SENSOR BD:LS-5752P VOLUME UP VOLUME DOWN MUTE AUDIO ENHANCE BUTTON & LED CARD READER BD: LS-5753P RTS5138 HP JACK MIC JACK ICS9LRS3199AKLFT page12 Socket-rPGA989 37.5mm*37.5mm NVidia N11M-GE1 page19~23 level shift IC ASM1442 HDMI CONN DDR3-SO-DIMM X2 BANK 0, 1, 2, page5~9 100MHz 2.7GT/s page25 page24 FDI *8 Dual Channel DDR3-800(1.5V) DDR3-1067(1.5V) DMI *4 page 10,11 UP TO 8G 2Channel Speaker page33 CRT Connector Intel Ibex Peak M page26 LVDS Connector Audio Codec AZALIA page27 Conexant CX20671 FCBGA 951 PCI Express Mini card Slot Analog MIC_Int page33 page33 25mm*25mm 6*PCI-E BUS CMOS Camera 14*USB2.0 page28 page27 PCI Express Mini card Slot BlueTooth CONN 6*SATA serial page 13~18 page37 page28 USB CONN X1(Right) SPI ROM BIOS page13 page37 LPC BUS USB PORT X1(Left) SIM Card page28 page37 USB(WWAN) EC RTL8111DL-VB-GR 10/100/1G LAN New Card X1 ENE KB926D page29 Card Reader/Audio Jack SB CONN page28 page34 WWAN Realtek 5138 MS/MS pro/SD/SD pro/mmc/XD page28 Int.KBD RJ45 CONN page30 page35 Touch Pad page35 SPI ROM page36 HP X 1+ MIC_Ext X1 page38 ESATA HDD AND USB CONN page37 SATA HDD CONN page32 SATA ODD CONN 4 page32 Compal Secret Data Security Classification 2008/03/24 Issued Date 2008/04/ Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B www.vinafix.vn C D Title Compal Electronics, Inc MB Block Diagram Size Document Number Custom R ev 0.3 LA-5752P Date: Thursday, October 29, 2009 Sheet E of 51 A B C D E DDR3 Voltage Rails SMBUS Control Table SOURCE +5VS power plane +5VALW +1.5V +B +3VALW State +3VS SMB_EC_CK1 +1.5VS SMB_EC_DA1 +VCCP SMB_EC_CK2 +CPU_CORE SMB_EC_DA2 +VGA_CORE SMBCLK +1.8VS SMBDATA +0.75VS SML0CLK +1.05VS SML0DATA SML1CLK SML1DATA S0 O O O O S3 O O O X S5 S4/AC O O X X X X X X X X S5 S4/ Battery only O S5 S4/AC & Battery don't exist X @ FUNCTION 45@ 100@ GIGA@ UMA_HDMI@ HDMI@ 3G@ X76@ ESATA@ CMOS@ BT@ 10M@ 11M@ UMA@ DIS@ VGA@ HYBRID@ HU@ HD@ EVT (45 BOM) 10/100 LAN GIGA LAN FOR UMA HDMI components FOR HDMI components 3G(WWAN) function (X76 BOM) ESATA function Camera function Blue Tooth FOR 10M CHIP FOR 11M CHIP UMA only (Arranddale) DIS only (Arranddale) FOR NVIDIA PART FOR SWITCHABLE KB926 +3VALW KB926 +3VALW PCH +3VALW PCH +3VALW PCH +3VALW RAM M2 N10x Thermal Sensor N10x Cap sensor board X X X X X X X X X X X WLAN CLK CHIP WWAN BATT KE926 SODIMM V X X X X X X X V X X X X X X X +3VALW +3VALW +3VS +3VS V X X X X X X X X X X V X X X V X +3VALW V Arrandale(dGPU) DEVICE HEX ADDRESS DDR SO-DIMM A0 10100000 DDR SO-DIMM A4 10100100 CLOCK GENERATOR (EXT.) D2 11010010 X V V X X X X V X X +3VS +3VS +3VALW NON-USE PCIE PORT LIST PORT USB PORT LIST DEVICE PORT 10 11 12 13 WLAN LAN 3G NEW CARD SWITCHABLE or UMA only SWITCHABLE or DIS only DIS@ / 100@ PCH I2C / SMBUS ADDRESSING SKU +3VS NEW CARD DEVICE RIGHT SIDE LEFT SIDE CMOS LEFT SIDE RIGHT SIDE CARD READER WIRELESS NEW CARD BT 3G for EVT DIS only Arrandale(iGPU) UMA@ / 100@ for EVT UMA only Arrandale(iGPU+dGPU) VGA@+HD@+HU@+HYBRID@ Compal Secret Data Security Classification SWITCHABLE 2008/03/24 Issued Date 2008/04/ Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B www.vinafix.vn C D Title Compal Electronics, Inc MB Notes List Size B Date: Document Number R ev 0.3 LA-5752P Thursday, October 29, 2009 Sheet E of 51 A B VGA and DDR3 Voltage Rails C (N10x GPIO) GPIO I/O ACTIVE GPIO0 N/A N/A GPIO1 IN - Hot plug detect for IFP link C GPIO2 OUT H Panel Back-Light brightness(PWM capable) GPIO3 OUT H Panel Power Enable GPIO4 OUT H Panel Back-Light On/Off (PWM) GPIO5 OUT - GPU VID0 GPIO6 OUT - GPU VID1 GPIO7 OUT - GPU VID2 GPIO8 I/O L Thermal Catastrophic Overtemp GPIO9 OUT L Thermal Alert GPIO10 OUT D E Performance Mode P0 TDP at Tj = 102 C* (DDR3) GPU (4) Mem (1,5) NVCLK /MCLK Products (W) (W) (MHz) (V) N10P-GS 128bit 1024MB DDR3 21.07 6.67 TBD N10P-GE 128bit 1024MB DDR3 20.97 6.73 N10P-LP 128bit 1024MB DDR3 15.48 6.44 Function Description FBVDD (1.5V) NVVDD (A) (W) FBVDDQ (GPU+Mem) (1.5V) PCI Express I/O and (1.05V) PLLVDD (6) (1.8V) I/O and PLLVDD (1.05V) Other (3.3V) (A) (W) (A) (W) (mA) (W) (mA) (W) (mA) (W) (mA) (W) TBD 18.25 17.34 2.06 3.09 4.09 6.14 850 0.89 75 0.14 63 0.07 55 0.18 TBD TBD 19.17 17.25 2.03 3.05 4.09 6.14 840 0.88 75 0.14 63 0.07 55 0.18 TBD TBD 13.95 11.86 1.90 2.85 3.99 5.99 810 0.85 75 0.14 63 0.07 55 0.18 Performance Mode P0 TDP at Tj = 102 C* (DDR3) Memory VREF switch GPIO11 I/O L SLI raster sync GPIO12 IN - AC power detect pin GPIO13 OUT - MEM_VID orPower supply control GPIO14 OUT - Power supply control GPIO15 IN - Hot plug detect for IFP Link E GPIO16 OUT - Programmable Fan Control GPIO17 IN - GPIO18 IN - GPIO19 IN - GPIO20 IN - GPIO21 IN - Hot plug detect for IFP link F GPIO22 IN - SLI swap ready signal GPIO23 I/O GPU (4) Mem (1,5) NVCLK /MCLK Products (W) (W) (MHz) (V) N10M-GE 64bit 512MB DDR3 13.36 2.93 TBD N10M-GS 64bit 512MB DDR3 14.29 3.10 N10M-LP 64bit 512MB DDR3 8.28 2.91 FBVDD (1.5V) NVVDD (A) (W) FBVDDQ (GPU+Mem) (1.5V) PCI Express I/O and (1.05V) PLLVDD (6) (1.8V) I/O and PLLVDD (1.05V) Other (3.3V) (A) (W) (A) (W) (mA) (W) (mA) (W) (mA) (W) (mA) (W) TBD 11.89 10.70 0.66 0.99 2.16 3.24 792 0.83 75 0.14 63 0.07 100 0.33 TBD TBD 11.53 11.53 0.70 1.05 2.28 3.42 817 0.86 75 0.14 63 0.07 100 0.33 TBD TBD 0.62 0.93 2.20 3.3 782 0.82 75 0.14 63 0.07 100 0.33 6.60 5.61 The ramp time for any rail must be more than 40us Power Sequence Hot plug detect for IFP Link D (+3VS) VDD33 PEX_VDD can ramp up any time (1.05VS)PEX_VDD tNVVDD 3 (+VGA_CORE) NVVDD GPIO6 GPIO5 N10M-GS N10P-GS GPU_VID1 GPU_VID0 VGA_CORE 0 0.8V 0.85V 12 0.9V 0,10 1 tNV-IFPAB_IOVDD P-State (1.8VS)IFPAB_IOVDD 12 tNV-FBVDDQ (1.5VS) FBVDDQ 1.0V (N10M-GS) 0.925V (N10P-GS) 4 Compal Secret Data Security Classification 2009/03/16 Issued Date 2010/03/15 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B www.vinafix.vn C D Title Compal Electronics, Inc VGA Notes List Size B Date: Document Number R ev 0.3 LA-5752P Thursday, October 29, 2009 Sheet E of 51 DDR3 Compensation Signals SM_RCOMP0 R5 67 R5 66 R5 65 SM_RCOMP1 SM_RCOMP2 ： D 2 100_0402_1% 24.9_0402_1% 130_0402_1% Layout Note:Please these resistors near Processor Layout rule 10mil width trace length < 0.5", spacing 20mil D J C PU1B COMP3 2COMP2 AT24 COMP2 49.9_0402_1% R5 48 2COMP1 G16 COMP1 49.9_0402_1% R5 57 2COMP0 AT26 COMP0 TP_SKTOCC# 49.9_0402_1% H_ PECI H _CATERR# R 163 R 564 0_0402_5% H_PECI_ISO R5 69 + VCCP AK14 AT15 SKTOCC# CATERR# THERMAL + VCCP AH24 PECI 68_0402_5% H _PROCHOT# H _PROCHOT# H_THERMTRIP# H_THERMTRIP# AN26 AK15 PROCHOT# THERMTRIP# A16 B16 C LK_CPU_BCLK CLK_CPU_BCLK# BCLK_ITP BCLK_ITP# AR30 AT30 CLK_CPU_ITP CLK_CPU_ITP# PEG_CLK PEG_CLK# E16 D16 CLK_EXP CLK_EXP# DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 BCLK BCLK# CLOCKS 2COMP3 AT23 R5 58 H_ CPURST#_R R1 35 AP26 RESET_OBS# H_P M_SYNC_R 0_0402_5% AL15 PM_SYNC R1 87 R1 90 V CC PWRGOOD_1 AN14 0_0402_5% H_CP UP W RGD PM_DRAM_PWRGD SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 PM_EXT_TS#[0] PM_EXT_TS#[1] AN15 AP15 PM_EXTTS#0 PM_EXTTS#1 PRDY# PREQ# AT28 AP27 XDP_PRDY# XDP _PREQ# TCK TMS TRST# AN28 AP28 AT27 X DP_TCK XDP_TMS XDP_TRST# TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 XDP_TDI X DP_TDO R 555 DBR# AN25 XDP _DBRESET# SM_DRAMPWROK BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7 VTT_POK AM15 R 183 560_0402_5% BUF_PLT_RST# VTTPWRGOOD AM26 TAPPWRGOOD AL14 RSTIN# R1 85 PLT_RST#_R 1.5K_0402_5% R5 63 0_0402_5% T19 PM_EXTTS#1_R 2 10K_0402_5% XDP _PREQ# R 136 @ 51_0402_1% XDP_TMS R 138 @ 51_0402_1% XDP_TDI R 556 @ 51_0402_1% X DP_TDO R 134 X DP_TCK R57 51_0402_5% @ XDP_TRST# R 133 P AD 10K_0402_5% XDP _DBRESET# 51_0402_1% 51_0402_5% R1 37 @ 1K_0402_5% C +3VS CHECK INTEL DOCUMENT #385422 Debug Port Design Guide Rev1.3 0_0402_5% FROM POWER VTT POWER GOOD SIGNAL VCCPWRGOOD_0 R1 91 V DDP W RGOOD_R AK13 0_0402_5% 2 R 184 1K_0402_1% VCCP_POK VCCPWRGOOD_1 R1 39 V CC PWRGOOD_0 AN27 0_0402_5% JTAG & BPM 68_0402_5% PWR MANAGEMENT + VCCP H_ PM_SYNC R5 61 R5 62 PM_EXTTS#1 pins unused by Clarksfield on the rPGA989 Package AL1 AM1 AN1 C + VCCP PM_EXTTS#0 P AD P AD CLK_EXP CLK_EXP# SM_DRAMRST# SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] C LK_CPU_BCLK CLK_CPU_BCLK# T17 T18 F6 SM_DRAMRST# DDR3 MISC R5 60 20_0402_1% MISC 20_0402_1% I C,AUB_CFD_rPGA,R1P0 ME@ R 186 750_0402_1% B B +1.5V G @ DRA M_PWRGD D PCH GPIO CONTROL DRAMRST_CNTRL_PCH DRAMRST_CNTRL_EC 2 R 300 SM_DRAMRST# Q27 2N7002_SOT23 R 192 3K_0402_1% @ 750_0402_1% +5VALW DRAMRST# DRAMRST# V DDP W RGOOD_R 1.5K_0402_1% MC74VHC1G08DFT2G SC70 5P R 194 0_0402_5% DDR3 CONNECTER R1 95 Y A U8 P B R 193 1.1K_0402_1% @ R2 83 G +3VALW R3 01 1K_0402_1% S +1.5V VCCP_POK For Intel S3 Power Reduction For Intel S3 Power Reduction R2 81 DRAMRST_CNTRL_R 0_0402_5% R2 82 @ 0_0402_5% EC GPIO CONTROL 1 100K_0402_5% 0.01U_0402_16V7K C 338 A R6 10 10K_0402_5% A S3_0.75V_EN S3_0.75V_EN VCCP_P OK Issued Date G Q42 2N7002_SOT23 Compal Secret Data Security Classification D S 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC www.vinafix.vn Title Compal Electronics, Inc Arrandale(1/5)-Thermal/XDP Size D ocument Number Cus tom Dat e: Rev 0.3 LA-5752P Thursday, October 29, 2009 Sheet of 51 ： Layout rule trace length < 0.5" J C PU1A DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 B24 D23 B23 A22 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 D24 G24 F23 H23 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 D25 F24 E23 G23 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] C FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] FDI_FS Y NC0 FDI_FS Y NC1 FDI_FS Y N C0 FDI_FS Y N C1 F17 E17 FDI_FSYNC[0] FDI_FSYNC[1] FDI_ INT FDI _INT C17 FDI_INT FDI_LS Y NC0 FDI_LS Y NC1 FDI_LS Y NC0 FDI_LS Y NC1 F18 D17 Intel(R) FDI J C PU1E FDI_LSYNC[0] FDI_LSYNC[1] E XP_ICOMPI R 544 49.9_0402_1% E XP_RBIAS R 545 750_0402_1% PCIE_CRX_GTX_N[0 15] PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS B26 A26 B27 A25 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PCIE_CRX_GTX_P15 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_P0 PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PCIE_CTX _GRX_C_N15 PCIE_CTX _GRX_C_N14 PCIE_CTX _GRX_C_N13 PCIE_CTX _GRX_C_N12 PCIE_CTX _GRX_C_N11 PCIE_CTX _GRX_C_N10 PCIE_CTX _GRX_C_N9 PCIE_CTX _GRX_C_N8 PCIE_CTX _GRX_C_N7 PCIE_CTX _GRX_C_N6 PCIE_CTX _GRX_C_N5 PCIE_CTX _GRX_C_N4 PCIE_CTX _GRX_C_N3 PCIE_CTX _GRX_C_N2 PCIE_CTX _GRX_C_N1 PCIE_CTX _GRX_C_N0 C5 27 C5 40 C5 29 C5 42 C5 31 C5 44 C5 33 C5 46 C5 35 C5 62 C5 64 C5 55 C5 57 C5 61 C5 48 C5 59 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K PCIE_CTX_GRX_N15 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N0 PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 PCIE_CTX_GRX_C_P15 PCIE_CTX_GRX_C_P14 PCIE_CTX_GRX_C_P13 PCIE_CTX_GRX_C_P12 PCIE_CTX_GRX_C_P11 PCIE_CTX_GRX_C_P10 PCIE_CTX_GRX_C_P9 PCIE_CTX_GRX_C_P8 PCIE_CTX_GRX_C_P7 PCIE_CTX_GRX_C_P6 PCIE_CTX_GRX_C_P5 PCIE_CTX_GRX_C_P4 PCIE_CTX_GRX_C_P3 PCIE_CTX_GRX_C_P2 PCIE_CTX_GRX_C_P1 PCIE_CTX_GRX_C_P0 C5 28 C5 41 C5 30 C5 43 C5 32 C5 45 C5 34 C5 47 C5 36 C5 63 C5 65 C5 56 C5 58 C5 60 C5 49 C5 50 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K PCIE_CTX_GRX_P15 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P0 PCIE_CRX_GTX_N15 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_N9 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_N0 AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 PCIE_CRX_GTX_P[0 15] CFG0 R5 36 DI S@ 1K_0402_5% FDI _INT R5 34 DI S@ 1K_0402_5% FDI_LS Y NC0 R5 33 DI S@ 1K_0402_5% FDI_LS Y NC1 R5 35 DI S@ 1K_0402_5% CFG7 FOR ES1 SAMPLE ONLY R5 47 0_0402_5% @ @ H_R SVD17_R H_R SVD18_R R5 46 0_0402_5% PCIE_CTX_GRX_P[0 15] AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 CFG Straps for PROCESSOR R58 @ 3.01K_0402_1% PCI-Express Configuration Select 1: Single PEG CFG0 0: Bifurcation enabled Not applicable for Clarksfield Processor CFG3 RSVD15 RSVD16 A20 B20 RSVD17 RSVD18 U9 T9 RSVD19 RSVD20 AC9 AB9 RSVD21 RSVD22 RSVD32 RSVD33 AJ13 AJ12 RSVD34 RSVD35 AH25 AK26 RSVD36 RSVD_NCTF_37 AL26 AR2 RSVD38 RSVD39 AJ26 AJ27 RSVD_NCTF_40 RSVD_NCTF_41 AP1 AT2 RSVD_NCTF_42 RSVD_NCTF_43 AT3 AR1 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 E15 F15 A2 D15 C15 AJ15 AH15 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 RSVD_NCTF_23 RSVD_NCTF_24 J29 J28 RSVD26 RSVD27 A34 A33 RSVD_NCTF_28 RSVD_NCTF_29 C35 B35 RSVD_NCTF_30 RSVD_NCTF_31 VSS 11=1*16 PEG 10=2*8 PEG R61 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86 B19 A19 C1 A3 CFG[1:0] FDI_FS Y N C1 3.01K_0402_1% PCIE_CTX_GRX_N[0 15] I C,AUB_CFD_rPGA,R1P0 ME@ DI S@ 1K_0402_5% @ R 59 VGA@ CFG0 R5 32 CFG3 CFG4 PCIE Lane Numbers Reversed CFG3-PCI Express Static Lane Reversal B FDI_FS Y N C0 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14 RESERVED A24 C23 B22 A21 PCI EXPRESS GRAPHICS DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI D D C R 189 0_0402_5% RS VD64_R @ RS VD65_R @ R 188 0_0402_5% 1 B AP34 I C,AUB_CFD_rPGA,R1P0 ME@ 3.01K_0402_1% CFG3-PCI Express Static Lane Reversal 1: Normal Operation CFG3 0: Lane Numbers Reversed 15 -> 0, 14 ->1, @ CFG4 R60 3.01K_0402_1% CFG4-Display Port Presence 1: Disabled; No Physical Display Port attached to Embedded Display Port CFG4 0: Enabled; An external Display Port device is connected to the Embedded Display Port A A Compal Secret Data Security Classification Issued Date 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC www.vinafix.vn Title Compal Electronics, Inc Arrandale(2/5)-DMI/PEG/FDI Size D ocument Number Cus tom Dat e: Rev 0.3 LA-5752P Thursday, October 29, 2009 Sheet of 51 J CP U1D J CP U1C DDR_A _D0 DDR_A _D1 DDR_A _D2 DDR_A _D3 DDR_A _D4 DDR_A _D5 DDR_A _D6 DDR_A _D7 DDR_A _D8 DDR_A _D9 DDR_ A_D10 DDR_ A_D11 DDR_ A_D12 DDR_ A_D13 DDR_ A_D14 DDR_ A_D15 DDR_ A_D16 DDR_ A_D17 DDR_ A_D18 DDR_ A_D19 DDR_ A_D20 DDR_ A_D21 DDR_ A_D22 DDR_ A_D23 DDR_ A_D24 DDR_ A_D25 DDR_ A_D26 DDR_ A_D27 DDR_ A_D28 DDR_ A_D29 DDR_ A_D30 DDR_ A_D31 DDR_ A_D32 DDR_ A_D33 DDR_ A_D34 DDR_ A_D35 DDR_ A_D36 DDR_ A_D37 DDR_ A_D38 DDR_ A_D39 DDR_ A_D40 DDR_ A_D41 DDR_ A_D42 DDR_ A_D43 DDR_ A_D44 DDR_ A_D45 DDR_ A_D46 DDR_ A_D47 DDR_ A_D48 DDR_ A_D49 DDR_ A_D50 DDR_ A_D51 DDR_ A_D52 DDR_ A_D53 DDR_ A_D54 DDR_ A_D55 DDR_ A_D56 DDR_ A_D57 DDR_ A_D58 DDR_ A_D59 DDR_ A_D60 DDR_ A_D61 DDR_ A_D62 DDR_ A_D63 C B A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] D DR_A_BS0 D DR_A_BS1 D DR_A_BS2 AC3 AB2 U7 SA_BS[0] SA_BS[1] SA_BS[2] DD R_A_CAS# DD R_A_RAS# DDR_ A_WE# AE1 AB3 AE9 SA_CAS# SA_RAS# SA_WE# DDR SYSTEM MEMORY A DDR_A _D[0 63] DDR_B _D[0 63] SA_CK[0] SA_CK#[0] SA_CKE[0] AA6 AA7 P7 M _CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_DIMMA SA_CK[1] SA_CK#[1] SA_CKE[1] Y6 Y5 P6 M _CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA SA_CS#[0] SA_CS#[1] AE2 AE8 DDR_CS0_DIMMA# DDR_CS1_DIMMA# SA_ODT[0] SA_ODT[1] AD8 AF9 M_ODT0 M_ODT1 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] B9 D7 H7 M7 AG6 AM7 AN10 AN13 DD R_A_DM0 DD R_A_DM1 DD R_A_DM2 DD R_A_DM3 DD R_A_DM4 DD R_A_DM5 DD R_A_DM6 DD R_A_DM7 SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] C9 F8 J9 N9 AH7 AK9 AP11 AT13 DD R_A_DQS#0 DD R_A_DQS#1 DD R_A_DQS#2 DD R_A_DQS#3 DD R_A_DQS#4 DD R_A_DQS#5 DD R_A_DQS#6 DD R_A_DQS#7 SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] C8 F9 H9 M9 AH8 AK10 AN11 AR13 DDR _A_DQS0 DDR _A_DQS1 DDR _A_DQS2 DDR _A_DQS3 DDR _A_DQS4 DDR _A_DQS5 DDR _A_DQS6 DDR _A_DQS7 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 DDR_A_M A0 DDR_A_M A1 DDR_A_M A2 DDR_A_M A3 DDR_A_M A4 DDR_A_M A5 DDR_A_M A6 DDR_A_M A7 DDR_A_M A8 DDR_A_M A9 DDR_A_MA 10 DDR_A_MA 11 DDR_A_MA 12 DDR_A_MA 13 DDR_A_MA 14 DDR_A_MA 15 DDR_B _D0 DDR_B _D1 DDR_B _D2 DDR_B _D3 DDR_B _D4 DDR_B _D5 DDR_B _D6 DDR_B _D7 DDR_B _D8 DDR_B _D9 DDR_ B_D10 DDR_ B_D11 DDR_ B_D12 DDR_ B_D13 DDR_ B_D14 DDR_ B_D15 DDR_ B_D16 DDR_ B_D17 DDR_ B_D18 DDR_ B_D19 DDR_ B_D20 DDR_ B_D21 DDR_ B_D22 DDR_ B_D23 DDR_ B_D24 DDR_ B_D25 DDR_ B_D26 DDR_ B_D27 DDR_ B_D28 DDR_ B_D29 DDR_ B_D30 DDR_ B_D31 DDR_ B_D32 DDR_ B_D33 DDR_ B_D34 DDR_ B_D35 DDR_ B_D36 DDR_ B_D37 DDR_ B_D38 DDR_ B_D39 DDR_ B_D40 DDR_ B_D41 DDR_ B_D42 DDR_ B_D43 DDR_ B_D44 DDR_ B_D45 DDR_ B_D46 DDR_ B_D47 DDR_ B_D48 DDR_ B_D49 DDR_ B_D50 DDR_ B_D51 DDR_ B_D52 DDR_ B_D53 DDR_ B_D54 DDR_ B_D55 DDR_ B_D56 DDR_ B_D57 DDR_ B_D58 DDR_ B_D59 DDR_ B_D60 DDR_ B_D61 DDR_ B_D62 DDR_ B_D63 DDR _A_DM[0 7] DDR _A_DQS#[0 7] DDR _A_DQS[0 7] DDR_A_MA[0 15] B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] D DR_B_BS0 D DR_B_BS1 D DR_B_BS2 AB1 W5 R7 SB_BS[0] SB_BS[1] SB_BS[2] DD R_B_CAS# DD R_B_RAS# DDR _B_WE# AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# SB_CK[0] SB_CK#[0] SB_CKE[0] W8 W9 M3 M _CLK_DDR2 M _CLK_DDR#2 DDR_CKE2_DIMMB SB_CK[1] SB_CK#[1] SB_CKE[1] V7 V6 M2 M _CLK_DDR3 M _CLK_DDR#3 DDR_CKE3_DIMMB SB_CS#[0] SB_CS#[1] AB8 AD6 DDR_CS2_DIMMB# DDR_CS3_DIMMB# SB_ODT[0] SB_ODT[1] AC7 AD1 M_ODT2 M_ODT3 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] D4 E1 H3 K1 AH1 AL2 AR4 AT8 D DDR _B_DM[0 7] DD R_B_DM0 DD R_B_DM1 DD R_B_DM2 DD R_B_DM3 DD R_B_DM4 DD R_B_DM5 DD R_B_DM6 DD R_B_DM7 C DDR SYSTEM MEMORY - B D SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] D5 F4 J4 L4 AH2 AL4 AR5 AR8 DD R_B_DQS#0 DD R_B_DQS#1 DD R_B_DQS#2 DD R_B_DQS#3 DD R_B_DQS#4 DD R_B_DQS#5 DD R_B_DQS#6 DD R_B_DQS#7 SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] C5 E3 H4 M5 AG2 AL5 AP5 AR7 DDR _B_DQS0 DDR _B_DQS1 DDR _B_DQS2 DDR _B_DQS3 DDR _B_DQS4 DDR _B_DQS5 DDR _B_DQS6 DDR _B_DQS7 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8 DDR_B_M A9 DDR_B_MA 10 DDR_B_MA 11 DDR_B_MA 12 DDR_B_MA 13 DDR_B_MA 14 DDR_B_MA 15 DDR _B_DQS#[0 7] DDR_ B_DQS[0 7] DDR_B_MA[0 15] B I C,AUB_CFD_rPGA,R1P0 ME@ I C,AUB_CFD_rPGA,R1P0 ME@ A A Compal Secret Data Security Classification Issued Date 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC www.vinafix.vn Title Compal Electronics, Inc Arrandale(3/5)-DDR III Size D ocument Number Cus t om Dat e: Rev LA-5752P Thursday, October 29, 2009 Sheet of 51 R1 32 GFX _IMON 1K_0402_5% DI S@ +CP U_CORE AS NO CONNECT +GFX_CORE J CP U1F J C PU1G C 189 UMA@ C1 59 UMA@ C5 91 C5 92 UMA@ 2 UMA@ 2 R 559 0_0402_5% DI S@ + VCCP AR25 GFX_V R_EN AT25 AM24 GFX _IMON R1 41 0_0402_5% 1 2 1.1V H_V I D[0 6] H_V ID0 H_V ID1 H_V ID2 H_V ID3 H_V ID4 H_V ID5 H_V ID6 PM_DPRSLP VR_R R56 VCCPLL1 VCCPLL2 VCCPLL3 L26 L27 M26 G15 VTT_SELECT IC,AUB_CFD_rPGA,R1P0 ME@ P ROC_DPRSLPVR +1.5V + 1.5V_DDR3 J3 2 Modify for cost revew 09/16/2009 C 2 2 2 B For Intel S3 Power Reduction @ VTT_SELECT +1.8VS 0_0402_5% C 170 4.7U_0603_6.3V6K 1.8V 0.6A C 169 10U_0805_10V4K POWER C 168 2.2U_0603_6.3V4Z CPU VIDS GFXVR_EN GFXVR_DPRSLPVR GFXVR_IMON +VCCP C 218 10U_0805_10V4K VTT_SELECT UMA@ + VCCP C 149 1U_0603_10V4Z AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 2 4.7K_0402_5% C 257 1U_0603_10V4Z J22 J20 J18 H21 H20 H19 C 167 1U_0603_10V4Z VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR PSI# VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 PEG & DMI AN33 C2 40 10U_0805_10V4K PSI# C2 72 10U_0805_10V4K C2 15 10U_0805_10V4K 1K_0402_5% GFX_V R_EN C 213 10U_0805_10V4K VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 @ + 2 C2 14 10U_0805_10V4K R 608 R 140 C2 12 10U_0805_10V4K P10 N10 L10 K10 C 255 1U_0603_10V4Z VTT0_59 VTT0_60 VTT0_61 VTT0_62 C2 73 10U_0805_10V4K AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 C2 58 22U_0805_6.3V6M VTT1_45 VTT1_46 VTT1_47 3A VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 + VCCP K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 UMA@ GFX_VR_EN GFX_DPRSLPVR GFX_IMON C2 52 22U_0805_6.3V6M D GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 C2 68 220U_B2_2.5VM_R35 J24 J23 H25 FDI C2 11 10U_0805_10V4K C2 10 10U_0805_10V4K C2 09 10U_0805_10V4K C2 08 10U_0805_10V4K AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 AM22 AP22 AN22 AP23 AM23 AP24 AN24 DESIGN GUIDE REV1.1 + 1.5V_DDR3 + VCCP VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] (~15MW) MAYBE WASTED C 253 1U_0603_10V4Z VAXG_SENSE VSSAXG_SENSE C 256 1U_0603_10V4Z 15A VCC_AXG_SENSE VSS_AXG_SENSE C 254 1U_0603_10V4Z SENSE LINES GRAPHICS VIDs C 190 @ C2 07 10U_0805_10V4K 2 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0805_6.3V6M C2 74 10U_0805_10V4K C2 17 10U_0805_10V4K C2 19 10U_0805_10V4K C1 91 @ - 1.5V RAILS 1 AR22 AT22 DDR3 + C1 60 @ VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 GRAPHICS @ 2 C5 54 C2 00 330U_D2_2.5VY_R9M 10U_0805_10V4K 1 C1 82 10U_0805_10V4K @ C1 81 10U_0805_10V4K 1 C2 16 10U_0805_10V4K 2 C2 70 10U_0805_10V4K 1 C1 98 10U_0805_10V4K C1 99 10U_0805_10V4K C2 71 10U_0805_10V4K IMVP_IMON V CCSENSE VSSSENSE SI4800BDY-T1-E3_SO8 R2 68 20K_0402_5% VTT_SENSE @ P AD T15 1.5V_DDR3_GATE VCCSENSE VSS SENSE R 552 R 551 Q23 2N7002_SOT23 S 2 2 SUSP R2 33 220_0402_5% D S Q19 BSS138_NL_SOT23-3 G R2 67 0_0402_5% @ A C 325 0.1U_0603_25V7K For Intel S3 Power Reduction +C PU_CORE Compal Secret Data Security Classification 100_0402_1% 100_0402_1% Issued Date 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC I C,AUB_CFD_rPGA,R1P0 ME@ + 1.5V_DDR3 1 D G SUSP Close to CPU C2 86 0.1U_0402_10V6K 0_0402_5% VCCSENSE VSS SENSE 0_0402_5% @ C2 87 0.1U_0402_10V6K 2 S S S G C2 88 0.1U_0402_10V6K VTT_SENSE VSS_SENSE_VTT B15 A15 R 554 R 553 D D D D C2 89 0.1U_0402_10V6K VCC_SENSE VSS_SENSE AJ34 VCC_SENSE AJ35 VSS _SENSE U11 +5VALW AN35 C2 69 0.1U_0402_10V6K ISENSE JUMP_43X118 +1 5V_DDR3 +1.5V @ H_VTTVID1 = High, 1.05V FOR Auburndale 12 H_VTTVID1 = Low, 1.1V FOR Clarksfiel JUMP_43X118 J2 2 1 CPU A VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 C1 61 @ AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 + VCCP CPU CORE SUPPLY B VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 C2 01 10U_0805_10V4K C AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 SENSE LINES D + VCCP 18A 1.1V RAIL POWER 48A BUT A SMALL AMOUNT OF POWER 10U_0805_6.3V6M POWER 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M www.vinafix.vn Title Compal Electronics, Inc Arrandale(4/5)-PWR Size D ocument Number Cus tom Dat e: Rev 0.3 LA-5752P Thursday, October 29, 2009 Sheet of 51 CPU CORE +C PU_CORE J CP U 1H 2 C5 71 22U_0805_6.3V6M C5 72 22U_0805_6.3V6M C5 77 22U_0805_6.3V6M C5 83 22U_0805_6.3V6M C5 78 22U_0805_6.3V6M C5 84 22U_0805_6.3V6M C5 73 22U_0805_6.3V6M C5 74 22U_0805_6.3V6M C5 79 22U_0805_6.3V6M Inside cavity D 2 + + 2 2 C1 29 22U_0805_6.3V6M + C 87 22U_0805_6.3V6M C 90 22U_0805_6.3V6M + C 91 22U_0805_6.3V6M between Inductor and socket C1 64 470U_D2T_2VM 2 C 92 470U_D2T_2VM 1 C 75 470U_D2T_2VM 2 C 76 470U_D2T_2VM 1 C 194 10U_0805_6.3V6M 2 C 165 10U_0805_6.3V6M 1 C1 97 10U_0805_6.3V6M 2 C 148 10U_0805_6.3V6M 1 C 89 10U_0805_6.3V6M 2 C 166 10U_0805_6.3V6M 1 C1 80 10U_0805_6.3V6M 2 C 193 10U_0805_6.3V6M 1 C1 96 10U_0805_6.3V6M 2 C 88 10U_0805_6.3V6M 1 C 179 10U_0805_6.3V6M C 162 10U_0805_6.3V6M C1 92 10U_0805_6.3V6M IC,AUB_CFD_rPGA,R1P0 ME@ Under cavity VSS 470uF 4.5mohm C NCTF VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 C5 80 22U_0805_6.3V6M K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 C 163 10U_0805_6.3V6M AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 C5 85 22U_0805_6.3V6M VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 C1 95 10U_0805_6.3V6M B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 C 147 10U_0805_6.3V6M C J CP U 1I C5 68 22U_0805_6.3V6M D AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 VSS_NCTF1_R VSS_NCTF2_R VSS_NCTF3_R VSS_NCTF4_R VSS_NCTF5_R VSS_NCTF6_R VSS_NCTF7_R B I C,AUB_CFD_rPGA,R1P0 ME@ A A Compal Secret Data Security Classification Issued Date 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC www.vinafix.vn Title Compal Electronics, Inc Arrandale(5/5)-GND/Bypass Size D ocument Number Cus tom Dat e: Rev 0.3 LA-5752P Thursday, October 29, 2009 Sheet of 51 +1.5V 3A@ 1.5V DDR_A _D2 DDR_A _D3 DDR_A _D8 DDR_A _D9 DD R_A_DQS#1 DDR _A_DQS1 DDR_ A_D10 DDR_ A_D11 DDR_ A_D16 DDR_ A_D17 DD R_A_DQS#2 DDR _A_DQS2 DDR_ A_D18 DDR_ A_D19 DDR_ A_D24 DDR_ A_D25 DD R_A_DM3 DDR_ A_D26 DDR_ A_D27 C DDR_CKE0_DIMMA DDR_CKE0_DIM MA DDR_A_BS2 D DR_A_BS2 DDR_A_MA 12 DDR_A_M A9 DDR_A_MA8 DDR_A_M A5 DDR_A_M A3 DDR_A_M A1 M _CLK_DDR0 M_CLK_DDR#0 M _CLK_DDR0 M _CLK_DDR#0 DDR_A_BS0 DDR_A_MA 10 D DR_A_BS0 DDR _A_WE# DD R_A_CAS# DDR _A_WE# DD R_A_CAS# DDR_CS1_DIMMA# DDR_A_MA 13 DDR_CS1_DIMM A# B DDR_ A_D34 DDR_ A_D35 DDR_CKE1_DIMMA C DDR_A_MA 15 DDR_A_MA 14 DDR_A_MA11 DDR_A_M A7 DDR_A_MA6 DDR_A_M A4 DDR_A_M A2 DDR_A_M A0 M _CLK_DDR1 M _CLK_DDR#1 M _CLK_DDR1 M_CLK_DDR#1 D DR_A_BS1 DD R_A_RAS# DDR_A_BS1 DD R_A_RAS# DDR_CS0_DIMM A# M _ODT0 DDR_CS0_DIMMA# M_ODT0 M _ODT1 M_ODT1 DDR_ A_D36 DDR_ A_D37 DD R_A_DM4 DDR_ A_D38 DDR_ A_D39 +VREF_DQ_DIMMA Layout Note: Place near DIMM B +1.5V 2 6*0603 10uf (PER CONNECTOR) DD R_A_DM6 2 2 + C5 69 220U_B2_2.5VM_R35 VTT(0.75V) = DDR_ A_D54 DDR_ A_D55 3*0805 10uf 4*0402 1uf VREF = DDR_ A_D60 DDR_ A_D61 1*0402 0.1uf DD R_A_DQS#7 DDR _A_DQS7 +0.75VS 1*0402 2.2uf VDDSPD (3.3V)= 2 2 1U_0603_10V4Z C3 01 PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3 1U_0603_10V4Z PM_EXTTS#1_R S MB_DATA_S3 SMB _CLK_S3 1*0402 2.2uf 1U_0603_10V4Z 1*0402 0.1uf DDR_ A_D62 DDR_ A_D63 A +0.75VS 65A@0.75V FOX_AS0A626-U4SN-7F ME@ Compal Secret Data Security Classification Issued Date 2008/10/31 Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C 316 0.1U_0402_10V6K C 317 0.1U_0402_10V6K C 315 0.1U_0402_10V6K C 314 0.1U_0402_10V6K C 308 @ 10U_0603_6.3V6M 3*330uf / 12m ohm (TOTAL FOR SO-DIMMs) DDR_ A_D52 DDR_ A_D53 10U_0603_6.3V6M @ C 570 VDDQ(1.5V) = DDR_ A_D46 DDR_ A_D47 C 309 DD R_A_DQS#5 DDR _A_DQS5 10U_0603_6.3V6M DDR_ A_D44 DDR_ A_D45 C3 00 DDR_CKE1_DIM MA 10U_0603_6.3V6M DDR_ A_D30 DDR_ A_D31 C6 06 206 DD R_A_DQS#3 DDR _A_DQS3 C 310 G2 DDR_ A_D28 DDR_ A_D29 1U_0603_10V4Z G1 DDR_ A_D22 DDR_ A_D23 C6 07 205 DD R_A_DM2 1U_0603_10V4Z R5 71 10K_0402_5% C 617 0.1U_0402_10V6K C 608 2.2U_0603_6.3V4Z +3VS A For Arranale only +VREF_DQ_DIMMA supply from a external 1.5V voltage divide circuit 07/17/2009 DDR_ A_D20 DDR_ A_D21 C6 05 DDR_ A_D58 DDR_ A_D59 R5 70 10K_0402_5% DRAMRST# DDR_ A_D14 DDR_ A_D15 10U_0603_6.3V6M DD R_A_DM7 DD R_A_DM1 DRAMRST# C 581 DDR_ A_D56 DDR_ A_D57 D C 586 DDR_ A_D50 DDR_ A_D51 +VREF_DQ_DIMMA R3 05 1K_0402_1% DDR_ A_D12 DDR_ A_D13 10U_0603_6.3V6M DD R_A_DQS#6 DDR _A_DQS6 DDR_A _D6 DDR_A _D7 C 588 DDR_ A_D48 DDR_ A_D49 DD R_A_DQS#0 DDR _A_DQS0 10U_0603_6.3V6M DDR_ A_D42 DDR_ A_D43 DDR_A_MA[0 15] C 589 DD R_A_DM5 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 R 297 1K_0402_1% DDR _A_DQS#[0 7] 10U_0603_6.3V6M DDR_ A_D40 DDR_ A_D41 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 DDR_ A_DQS[0 7] DDR_A _D4 DDR_A _D5 C 355 2.2U_0603_6.3V4Z DD R_A_DQS#4 DDR _A_DQS4 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 C 346 0.1U_0402_10V6K DDR_ A_D32 DDR_ A_D33 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 DD R_A_DM0 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 C 347 2.2U_0603_6.3V4Z D C 303 0.1U_0402_10V6K 1 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 +1.5V DDR _A_DM[0 7] JDIMM1 DDR_A _D0 DDR_A _D1 DDR_A _D[0 63] DDR3 SO-DIMM A +VREF_DQ_DIMMA +1.5V +VREF_DQ_DIMMA www.vinafix.vn Title Compal Electronics, Inc DDRIII-SODIMM SLOT1 Size D ocument Number Cus t om Dat e: Rev LA-5752P Thursday, October 29, 2009 Sheet 10 of 51 A B C D +USB_VCCA +USB_VCCA USB_ON# GND IN IN EN OUT OUT OUT OC# + C430 RIGHT USB PORT X1 150U_B2_6.3VM_R35M USB_OC#1 W=80mils +USB_VCCA 1 U19 C421 0.1U_0402_16V4Z USB_ON# 2 JUSB1 USB20_N3 USB20_P3 USB20_N3 USB20_P3 C432 470P_0402_50V7K APL3510BKI_SO8 C429 @ 1000P_0402_50V7K W=80mils JUSB2 USB_ON# GND IN IN EN OUT OUT OUT OC# C615 150U_B2_6.3VM_R35M USB_OC#0 + C622 470P_0402_50V7K C610 @ 1000P_0402_50V7K SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4 USB20_N1 SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4 USB20_N1 USB20_P1 SATA_ITX_DRX_P4_CONN SATA_ITX_DRX_N4_CONN ESATA@ C624 SATA_DTX_IRX_N4 C623 SATA_DTX_IRX_P4 ESATA@ SATA_ITX_DRX_P4_CONN SATA_ITX_DRX_N4_CONN 0.01U_0402_16V7K 2 0.01U_0402_16V7K D10 @ +5VALW BT@ C353 R616 100K_0402_5% BT@ 10 11 GND A+ ESATA AGND BB+ GND 12 13 14 15 GND GND GND GND USB A+ = RXP A- = RXN B- = TXN B+ = TXP 0.1U_0402_16V4Z BT@ OUT R304 100K_0402_5% USB VBUS DD+ GND TYCO_1759576-1 ME@ BT MODULE CONN 1 PJDLC05_SOT23-3 USB20_P1 JESAT1 USB20_N1 USB20_P1 APL3510BKI_SO8 Low Active SUYIN_020173MR004S558ZL ME@ W=80mils +USB_VCCB E-SATA COMBO LEFT USB PORT D7 @ GND GND GND GND +USB_VCCB +USB_VCCB C237 470P_0402_50V7K ESATA and USB Conn +5VALW USB20_N0 USB20_P0 USB20_N0 USB20_P0 U27 Left USB Conn +USB_VCCB C621 0.1U_0402_16V4Z USB_ON# G5 G6 ACES_85205-04001 ME@ Low Active PJDLC05_SOT23-3 E Right USB Conn +5VALW IN +3VS Q32 AO3413_SOT23-3 +3VS_BT D Q31 DTC124EKAT146_SC59-3 BT@ S GND BT_OFF# 30mils 1 BT@ G BT_LED# Q29 DTC124EKAT146_SC59-3 BT@ IN JP7 USB20_P11 USB20_N11 BT_ACTIVE USB20_P11 USB20_N11 BTON_LED BT_ACTIVE G1 G2 ACES_87213-0600G ME@ GND OUT 0.1U_0402_16V4Z C354 BT@ 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/18 Deciphered Date 2007/8/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B www.vinafix.vn C D USB ports/BT/E-SATA Size Document Number Custom Date: R ev 0.3 LA-5752P Thursday, October 29, 2009 Sheet E 37 of 51 ON/OFF switchSW Power Bottom Board Conn 8pin SMT1-05_4P Power Button TOP Side +3VALW ME@ +5VS J5 ACES_85201-08051 SHORT PADS Bottom Side Cap Sensor Board Conn 6pin ENE SB3534 @ R272 100K_0402_5% D14 ON /OFFBTN# ON/O FF# 51_ON# ON/OFF# NUM_LED# CAPS_LED# PM_BTN# 10 PM_BTN# NOVO_BTN# ON /OFFBTN# 51_ON# DAN202UT106_SC70-3 GND GND I2C_INT ESB_DAT ESB_CLK RST# +5VS @ C1 33P_0402_50V8J S 1 @ C2 33P_0402_50V8J D20 PJSOT24C 3P C/A SOT-23 @ 51_ON# PM_BTN# ON /OFFBTN# D19 PJSOT24C 3P C/A SOT-23 @ D13 NOVO# NOVO_BTN# R296 100K_0402_5% 51_ON# R603 100K_0402_1% +3VALW GND GND JP1 ME@ +3VS PM_BTN# NOVO# 0_0402_5% I2C_ INT_R 0_0402_5% 0_0402_5% D R302 10K_0402_5% 1 1 2 G Q28 2N7002_SOT23-3 E C_ON EC_ON R3 R2 R1 +3VS ACES_85201-08051 10 JP3 NOVO_BTN# DAN202UT106_SC70-3 EMI REQUEST 1ST = SCA00000E00 2ST = SCA00000R00 Card Reader/Audio Jack SB CONN JP8 +3VALW PLUG_IN HP_OUTR HP_OUTL PLU G_IN HP_OUTR HP_OUTL MIC_JD EXT_MIC_L EXT_MIC_R MIC_ JD EXT_MIC_L EXT_MIC_R USB20_P5 USB20_N5 USB20_P5 USB20_N5 10 11 12 10 11 12 GND GND 13 14 ACES_85201-1205N ME@ Issued Date Compal Electronics,Ltd Compal Secret Data Security Classification 2008/03/25 Deciphered Date 2008/04/ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC www.vinafix.vn Title Audio Jack & SW connector Size Document Number C ustom D ate: Thursday, October 29, 2009 R ev 0.3 LA-5752P Sheet 38 of 51 A B C +5VALW TO +5VS D +3VALW TO +3VS E +1.5V to +1.5VS B+ R202 470_0603_5% @ C134 10U_0805_10V4Z C135 1U_0603_10V4Z B+ D +1.8VS 100K_0402_5% R312 C278 0.1U_0603_25V7K SUSP +1.5V +VCCP D R88 0_0402_5% Q9 2N7002_SOT23 G +0.75VS S @ Q33 C144 0.1U_0603_25V7K D G 2N7002_SOT23S SUSP G Q34 2N7002_SOT23 @ 1.5VS_GATE 1 DIS@ C373 C361 0.1U_0603_25V7K 2 0.1U_0603_25V7K R313 0_0402_5% SUSP S S 1 15VS_GATE_R 10K_0402_5% Q20 2N7002_SOT23 D G 5VS_GATE2 R228 SUSP S R89 47K_0402_5% SUSP G Q6 2N7002_SOT23 @ R314 470_0603_5% @ D B+ D SUSP G Q16 2N7002_SOT23 @ 3 S R229 20K_0402_5% R87 470_0603_5% @ C276 1U_0603_10V4Z 2 SI4800BDY-T1-E3_SO8 C277 10U_0805_10V4Z 1 1 1 S S S G 2 D D D D C279 10U_0805_10V4Z U4 D S D S D S C127 D G 10U_0805_10V4Z SI4800BDY-T1-E3_SO8 U10 +1.5VS U16 D S 1 D S D S C389 C362 C363 G 10U_0805_10V4Z D 10U_0805_10V4Z 1U_0603_10V4Z 2 SI4800BDY-T1-E3_SO8 +3VS +3VALW +5VS +1.5V +5VALW @ +1.05VS S S D SUSP G Q15 2N7002_SOT23 @ R143 470_0603_5% @ D SUSP G Q40 2N7002_SOT23 S D SYSON# G Q35 2N7002_SOT23 @ R568 22_0603_5% R174 470_0603_5% @ 1 S 3 S D SUSP G Q10 2N7002_SOT23 @ D R342 470_0603_5% @ R142 470_0603_5% @ 2 2 SUSP G Q11 2N7002_SOT23 @ For Intel S3 Power Reduction RTCVREF +5VALW @ R5 100K_0402_5% SYSON IN SYSON IN GND SUSP# OUT SYSON# Q2 DTC124EKAT146_SC59-3 @ OUT Q1 DTC124EKAT146_SC59-3 GND @ R6 100K_0402_5% SUSP R4 100K_0402_5% SUSP 1 +5VALW 4 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2007/8/18 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C www.vinafix.vn D Title DC Interface Size Document Number Custom Date: R ev 0.3 LA-5752P Sheet Thursday, October 29, 2009 E 39 of 51 B C D ACIN VIN PQ26 TP0610K-T1-E3_SOT23-3 PR38 1K_1206_5% PR31 1K_1206_5% PR143 100K_0402_1% PD13 RLS4148_LL34-2 V IN VS ACOFF PQ11 2 PC12 0.01U_0402_25V7K 2 PR22 499K_0402_1% G PR136 47K_0402_5% PACIN VS - JRTC +RTCBATT @ MAXEL_ML1220T10 +CHGRTC RB751V-40_SOD323-2 RTC Battery PC91 10U_0603_6.3V6M + PR123 200_0603_5% 2CHGRTCIN IN GND PQ25 DTC115EUA_SC70-3 PD8 PC90 1U_0805_25V6K Issued Date Compal Electronics, Inc Compal Secret Data Security Classification OUT +5VALW 51ON-3 PU8 G920AT24U_SOT89-3 3.3V PQ3 SSM3K7002F_SC59-3 PC16 0.1U_0603_25V7K +CHGRTC 2009/01/06 Deciphered Date www.vinafix.vn 2010/01/06 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A D 3 1 RTCVREF PR125 PR124 560_0603_5% 560_0603_5% 2RTCVREF-1 PR17 10K_0402_5% RTCVREF PC4 0.22U_0603_25V7K 2 PR16 22K_0402_1% - S 51ON-2 PR15 100K_0402_1% 51_ON# PR140 68_1206_5% PR141 PQ4 68_1206_5% TP0610K-T1-E3_SOT23-3 PR122 200_0603_5% CHGRTCP 2 51ON-1 1 PD12 LL4148_LL34-2 1 BATT+ + O PC98 0.1U_0603_25V7K PD2 LL4148_LL34-2 P PU10B LM393DG_SO8 ACON G VIN PD10 RB715F_SOT323-3 MAINPWON PR24 499K_0402_1% VS 3.3V PR25 2.2M_0402_5% VL PR23 205K_0402_1% PC99 0.01U_0402_25V7K PACIN PC11 1000P_0402_50V7K PR137 100K_0402_1% RTCVREF AC IN PR19 10K_0402_5% PD9 LLZ4V3B_LL34-2 PR20 10K_0402_5% B+ PQ12 DTC115EUA_SC70-3 PACIN O PU10A LM393DG_SO8 DTC115EUA_SC70-3 PR18 10K_0402_1% 2 P - G + 2 PR135 20K_0402_1% VINDE-3 PC13 0.1U_0402_16V7K PR27 22K_0402_1% VINDE-1 PC14 1000P_0603_50V7K 2 PR134 84.5K_0402_1% PR21 10K_0805_5% PC97 0.01U_0402_25V7K PRG++ VINDE-2 V IN PR26 1M_0402_1% 2 1 Max 18.384V 17.728V 1 Vin Detector Min typ L >H 17.430V 17.901V H >L 16.976V 17.262V PR142 1K_1206_5% 2 PC5 1000P_0402_50V7K PC6 100P_0402_50V8J PC7 0.1U_0603_25V7K 2 @ 4602-Q04C-09R 4P P2.5 J DC IN PC10 100P_0402_50V8J 1 2 PL2 SMB3025500YA_2P PC9 1000P_0402_50V7K PF1 7A_24VDC_429007.W RML APDIN APDIN1 PC8 0.1U_0603_25V7K PR138 100K_0402_1% DC030006J00 BATT ONLY Precharge detector Min typ Max L >H 7.196V 7.349V 7.505V H >L 6.138V 6.214V 6.056V Precharge detector Min typ Max L >H 14.991V 15.381V 15.782V H >L 13.860V 14.247V 14.621V VIN PR39 100K_0402_1% A B C Title DCIN & DETECTOR Size Document Number Custom Date: R ev 0.1 Thursday, October 29, 2009 D Sheet 40 of 51 A B C D 1 VMB VS PH1 100K_0402_1%_TSM0B104F4251RZ PR84 47K_0402_1% TM-2 TM-1 + O - 1 D S PQ20 SSM3K7002FU_SC70-3 G PU4A LM393DG_SO8 VL PR85 100K_0402_1% PR86 100K_0402_1% + - O G A/D BATT_TEMP P 2 TM-3 PR5 10K_0402_5% +3VALW PC64 1000P_0402_50V7K PR6 6.49K_0402_1% PC63 0.22U_0603_25V7K EC_SMB_DA1 PR88 15.4K_0402_1% TM_REF1 EC_SMB_CK1 MAINPW ON PR87 13.7K_0402_1% PR83 47K_0402_1% 1 PC109 0.01U_0402_25V7K VL 2 PC110 1000P_0402_50V7K TYCO_1775789-1 @ PR3 100_0402_1% 1 EC_SMCA EC_SMDA VL BATT+ PL3 SMB3025500YA_2P P PR4 100_0402_1% 2 GND GND G PF2 12A_65V_451012MRL JBATT PC62 0.01U_0402_25V7K VMB2 PH1 under CPU botten side : CPU thermal protection at 92 degree C Recovery at 56 degree C PU4B LM393DG_SO8 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/01/06 Deciphered Date www.vinafix.vn 2010/01/06 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C Title BATTERY CONN / OTP Size Date: Document Number R ev 0.1 Thursday, October 29, 2009 D Sheet 41 of 51 B+ P3 P2 PR152 0.02_1206_1% CHG_B+ PJ11 PR28 47K_0402_1% 2 1 18 VREF UGATE 17 CHLIM BOOT 16 10 ACLIM VDDP 15 11 VADJ LGATE 14 12 GND PGND 13 DH_CHG PR157 2.2_0402_5% BST_CHG PC120 0.1U_0603_25V7K BST_CHGA DL_CHG PD14 RB751V-40TE17_SOD323-2 6251_VDDP PR2 31.6K_0402_1% 26251_VDD PR163 4.7_0402_5% PC122 4.7U_0805_6.3V6K ISL6251AHAZ-T_QSOP24 Connect to EC A/D Pin CHGVADJ=(Vcell-4)/0.10627 CHGVADJ BATT+ + - BATT_OVP + - 4 PR11 @ 105K_0402_1% 2 PR12 100K_0402_1% A PQ38 DTC115EUA_SC70-3 FSTCHG SUSP# PD1 RB715F_SOT323-3 FSTCHG 2007/6/22 Issued Date www.vinafix.vn 1 PR177 @ 0_0402_5% BATT_SEL_EC PQ1B @ 2N7002KDW -2N_SOT363-6 A Compal Electronics, Inc 2008/6/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PQ1A @ 2N7002KDW -2N_SOT363-6 Compal Secret Data Security Classification SUSP# PR176 0_0402_5% 2 PU1A @ LM358DT_SO8 PR139 @ 10K_0402_1% CELLS PR10 @ 499K_0402_1% 6251_DCIN PU1B @ LM358DT_SO8 P PR14 10_0603_5% Per cell=3.5V G PR13 100K_0402_1% P3 TP0610K-T1-E3_SOT23-3 BATT-OVP=0.1112*VMB P PQ2 LI-3S :13.5V BATT-OVP=1.5012V G VCHLIM need over 95mV PC100 @0.01U_0402_25V7K DIS CP mode Vaclim=2.39*{(31.6K//514K)/((31.6K//514K)+(21K//514K))}=1.425V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) VS where Vaclim=1.425V, Iinput=4A IREF=1.016*Icharge IREF=0.254V~3.048V PR168 PR178 @ 100K_0402_1% @ 100K_0402_1% PR9 @ 340K_0402_1% VS 6251_VDD VMB2 CC=0.25A~3A B 6251_VDD PR1 31.6K_0402_1% 3.2935V UMA CP mode Vaclim=2.39*{(2.26K//514K)/((2.26K//514K)+(21K//514K))}=0.239V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.239V, Iinput=2.75A 1.882V PC101 @0.01U_0402_25V7K 4.35V 4.2V CHGVADJ 0V 4V C1HG PR171 15.4K_0402_1% 2 Vcell B PR151 0.02_1206_1% C PC105 10U_1206_25V6M PHASE ICM PL5 10U_LF919AS-100M-P3_4.5A_20% PQ5 2N7002KW _SOT323-3 PC103 10U_1206_25V6M 19 CSIP PACIN G S VCOMP V IN D PC106 10U_1206_25V6M PC121 0.1U_0603_25V7K 20 CSIN ICOMP CSOP PR162 200K_0402_1% 2 PR154 4.7_1206_5% 21 PD3 RB715F_SOT323-3 CSOP PQ29 SIS412DN-T1-GE3 _PAK1212-8 CELLS CSON PC124 0.047U_0402_16V7K PR160 20_0402_5% PR159 PC123 20_0402_5% 0.1U_0402_16V7K PR158 2.2_0402_5% LX_CHG 22 CSON 2 PR167 100K_0402_1% EN PR174 100_0402_1% 6251_VREF PC1 0.1U_0402_16V7K PR172 21K_0402_1% 6251_VREF ACOFF PC118 680P_0603_50V7K IREF PR161 20_0402_5% PQ31 SI7716ADN-T1-GE3 _PAK1212-8 ACOFF ADP_I PR173 154K_0402_1% 23 PC130 @ 100P_0402_50V8J ACSET ACPRN 1 ACOFF VIN PQ32 DTC115EUA_SC70-3 0.01U_0402_25V7K 6.81K_0402_1% 2 1 ACON PQ10 DTC115EUA_SC70-3 PR175 24 PC3 G 6800P_0402_25V7K DCIN S PC131 VDD PQ9 D 2N7002KW _SOT323-3 PC2 0.01U_0402_25V7K PACIN CELLS C PR37 3K_0402_1% PACIN 6251_EN PC125 0.1U_0603_25V7K 6251_DCIN2 S G PR8 PR29 150K_0402_1% PQ8 D 2N7002KW _SOT323-3 PC132 0.1U_0402_16V7K PU11 FSTCHG D PR7 10K_0402_1% 100K_0402_1% PQ28 DTC115EUA_SC70-3 PR155 10K_0402_1% PC128 2.2U_0603_6.3V6K PD15 RB751V-40TE17_SOD323-2 6251_VDD 2 PC111 2200P_0402_50V7K CS IN CSIP PC113 4.7U_1206_25V6K 2 @ JUMP_43X118 PC107 0.1U_0603_25V7K PR30 200K_0402_1% PQ7 PQ34 FDS6675BZ_SO8 1 PC114 4.7U_1206_25V6K 2 2 PC112 4.7U_1206_25V6K 2 4 PR145 47K_0402_5% DTA144EUA_SC70-3 D VIN PQ6 FDS6675BZ_SO8 PC15 470P_0603_50V8J PQ27 FDS6675BZ_SO8 Title CHARGER Size Date: Document Number R ev 0.1 Thursday, October 29, 2009 Sheet 42 of 51 ISL6237_B+ PHASE2 PHASE1 16 LG3 23 LGATE2 LGATE1 18 LG5 FB3 PGND 22 30 OUT2 OUT1 10 FB1 11 BYP SKIP 29 NC POK2 28 EN_LDO POK1 13 EN1 ILIM1 12 ILM1 ILIM2 31 ILIM2 32 VL REF LDOREFIN PC102 0.22U_0603_25V7K PD11 3/5V_EN1 14 PC42 0.22U_0603_25V7K 3/5V_EN2 27 EN2 GND 5V_SKIP 2 21 PU2 ISL6237IRZ-T_QFN32_5X5 PC37 0.1U_0402_25V6 + PC117 150U_B2_6.3VM_R45M C VL 2VREF_ISL6237 PR34 301K_0402_1% PR147 301K_0402_1% B 13/5V_TON PR50 0_0402_5% PR150 @ 0_0402_5% PR149 0_0402_5% PR51 @ 0_0402_5% PR43 0_0402_5% PJ10 +3VALWP 0_0402_5% PC36 2200P_0402_50V7K FB5 2 1 +3VALW @ JUMP_43X118 2VREF_ISL6237 PR33 @ 47K_0402_1% MAINPW ON 2VREF_ISL6237 1 PR32 PC108 0.047U_0402_16V7K RB751V-40_SOD323-2 PC104 0.047U_0402_16V7K PR146 PD4 806K_0603_1% VL B PC28 1U_0603_10V6K 13/5V_NC LLZ5V1B_LL34-2 EN_LDO TON 20 PR44 100K_0402_1% NC EN_LDO-1 PR144 200K_0402_1% 2 PD5 PC25 10U_1206_25V6M PQ33 SI7716ADN-T1-GE3_PAK1212-8 RB751V-40_SOD323-2 VS PC119 680P_0402_50V7K REFIN2 2VREF_ISL6237 PC22 0.1U_0603_25V7K 25 SW SW PR156 4.7_1206_5% 1BST5A-1 PR36 @ 61.9K_0402_1% BST5A2 PR40 2.2_0603_5% +5VALWP HG5 17 15V_SNB 15 BOOT1 PC43 0.1U_0603_25V7K @ UGATE1 19 PQ13 SIS412DN-T1-GE3_PAK1212-8 PL6 4.7UH_PCMC063T-4R7MN_5.5A_20% BOOT2 LDO VCC UGATE2 24 PC40 1U_0603_10V6K PVCC 2 VIN 26 4.7U_0805_6.3V6K PC23 PC41 3/5V_VCC 1U_0603_10V6K 3/5V_VIN UG3 BST3A PR42 2.2_0603_5% D PR35 0_0402_5% 2 TP PQ30 SI7716ADN-T1-GE3_PAK1212-8 PR148 10K_0402_1% C VL PC115 680P_0402_50V7K 2 BST3A-1 13V_SNB 2 + PR153 4.7_1206_5% PR52 0_0402_5% 33 PL4 4.7UH_PCMC063T-4R7MN_5.5A_20% +3VALWP PC27 0.1U_0603_25V7K PQ14 SIS412DN-T1-GE3_PAK1212-8 5 PC39 2200P_0402_50V7K PC26 10U_1206_25V6M PR41 0_0402_5% PC38 0.1U_0402_25V6 PC21 330P_0402_50V7K PJ4 @ JUMP_43X118 2 1 PC116 150U_B2_6.3VM_R45M ISL6237_B+ B+ D @ PJ12 +5VALWP 2 1 +5VALW @ JUMP_43X118 A A 2009/01/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010/01/06 Deciphered Date www.vinafix.vn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 3VALW/5VALW Size Document Number Custom Date: R ev 0.1 Thursday, October 29, 2009 Sheet 43 of 51 PJ20 PU14 TPS51117RGYR_QFN14_3.5x3.5 PC183 4.7U_0805_6.3V6K PC174 2200P_0402_50V7K PC173 0.1U_0402_25V6 + TP PC179 @0.1U_0402_16V7K DRVL B+ +1.5VP LG_1.5V PR241 4.7_1206_5% PC177 10U_0603_6.3V6M +5VALW D PC172 220U_B2_2.5VM_R15M V5DRV 10 SW _1.5V PR245 7.15K_0402_1% PGND PGOOD PC181 PR243 @ 47P_0402_50V8J @ 100K_0402_1% GND 2 PC178 4.7U_0603_6.3V6K 1 1.5V_TRIP 11 1.5V_SNB 12 VFB LL TRIP UG_1.5V @ JUMP_43X79 PC180 680P_0402_50V7K 1.5V_FB PQ48 SI4686DY-T1-E3_SO8 PL13 1UH_PCMB103E-1R0MS_20A_20% TPCA8028-H_SOP-ADVANCE8-5 V5FILT 13 PQ49 VOUT DRVH 1.5V_V5FILT VBST TON 15 PR242 100_0603_1% +5VALW EN_PSV PC184 @0.1U_0402_16V7K 2BST_1.5V-1 PC182 0.1U_0603_25V7K BST_1.5V PR249 2.2_0603_5% 14 1.5V_EN SYSON PR248 0_0402_5% 2 PC175 10U_1206_25V6M PR247 240K_0402_1% 1.5V_TON D 2 PC169 10U_1206_25V6M 1.5V_IN 1.5V_PGOOD PR244 31.6K_0402_1% C C PR246 30.1K_0402_1% PJ16 VCCP_EN B+ @ @ DRVL PU9 @ TPS51117RGYR_QFN14_3.5x3.5 PC92 4.7U_0805_6.3V6K @ + @ 1 LG_VCCP B @ PC135 @ 680P_0402_50V7K PQ40 SI7716ADN-T1-GE3_PAK1212-8 @ 1.05V_PGOOD PR129 13.7K_0402_1% @1 PR181 @ 4.7_1206_5% +5VALW PC137 10U_0603_6.3V6M 10 +1.05VSP PC136 220U_B2_2.5VM_R15M V5DRV VCCP_TRIP PR128 @ 23.7K_0402_1% SW _VCCP 11 12 VBST LL TRIP PR126 100K_0402_1% TP EN_PSV PGOOD PC94 @ 47P_0402_50V8J UG_VCCP VFB 13 DRVH VCCP_FB PGND V5FILT VOUT PL9 @ 2.2UH_PCMC063T-2R2MN_8A_20% 14 15 VCCP_V5FILT TON GND PC93 4.7U_0603_6.3V6K @ B @ VCCP_SNB +3VS PC96 0.22U_0402_6.3V6K @ PR127 100_0603_1% 1@ +5VALW 0.1U_0603_25V7K SUSP# PR131 @ PC95 2.2_0603_5% @ BST_VCCP1 2BST_VCCP-1 PR132 @ 100K_0402_1% @ PC141 2200P_0402_50V7K VCCP_TON @ JUMP_43X79 PC138 0.1U_0402_25V6 PQ41 SIS412DN-T1-GE3_PAK1212-8 @ PR133 240K_0402_1% 2 PC140 10U_1206_25V6M VCCP_IN @ PR130 31.6K_0402_1% @ PJ17 @ JUMP_43X79 1 +1.5V PJ21 GND NC VREF NC VOUT NC TP +1.5VP +3VALW 1 +1.5V @ JUMP_43X118 PC151 1U_0402_6.3V6K PJ14 +1.05VSP 2 PJ19 1 +1.05VS +0.75VSP @ JUMP_43X118 1 +0.75VS @ JUMP_43X79 G2992F1U_SO8 +0.75VSP S PQ46 SSM3K7002FU_SC70-3 PC149 10U_0603_6.3V6M 2009/01/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 1 PC176 0.1U_0402_16V7K PR240 1K_0402_1% PC147 @ 0.1U_0402_16V7K SUSP D 0.75V_REF PR190 0_0402_5% 20.75V_EN G S3_0.75V_EN VCNTL PR250 0_0402_5% @ A VIN 1 PR239 1K_0402_1% PC146 4.7U_0805_6.3V6K 1 PU13 75V_IN 2010/01/06 Deciphered Date www.vinafix.vn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.5V/VCCP/0.75V Size Date: Document Number R ev 0.1 Thursday, October 29, 2009 Sheet 44 of 51 A PJ3 2 VG A_IN +3VS PC185 2200P_0402_50V7K UG_VGA @ PR47 10K_0402_5% BST_VGA PR48 2.2_0603_5% BST_VGA-1 PC49 0.1U_0603_25V7K +5VALW PC186 0.1U_0402_25V6 PC35 10U_1206_25V6M PC24 10U_1206_25V6M @ JUMP_43X79 D PR49 0_0603_5% D B+ 15 2 + PC18 10U_0603_6.3V6M 2 + PC19 10U_0603_6.3V6M PQ36 SI4634DY-T1-E3_SO8 10 C VGA_FB-1 PR179 1.82K_0402_1% PR71 0_0402_5% +VGASENSE PJ2 +VGA_COREP PR180 5.36K_0402_1% 2 1 +VGA_CORE @ JUMP_43X118 PJ13 2 PQ37B 2N7002KDW -2N_SOT363-6 PJ606 +1.8VSP 1 @ JUMP_43X118 PC129 0.01UF_0402_25V7K B 2 +1.8VS @ JUMP_43X39 2 VO Rds=4.0mΩ PR69 42.2K_0402_1% VGA_FB 1VGA_COMP-1 PR68 22.1K_0402_1% PR67 6.04K_0402_1% 1 PC55 FSET_VGA9 0.01U_0402_25V7K PQ37A 2N7002KDW -2N_SOT363-6 @ VFB=0.6V 1GVID0-1 PR170 10K_0402_1% PR72 10K_0402_5% PR63 3.6K_0402_1% 22P_0402_50V8J PC54 6800P_0402_25V7K PR169 22.6K_0402_1% GVID1-2 PC127 0.01UF_0402_25V7K GPU_VID0 B ISEN_VGA1 +VGA_COREP PR165 10K_0402_5% 11 1 GPU_VID1 PC134 GPIO5 GPIO6 N11M-GE1/LP1 1GVID1-1 PR166 10K_0402_1% FSET FB COMP VGA_COMP C GPU_VID0 GPU_VID1 VGA_CORE 0.8V 0 0.85V N11M-GE1/LP1 PR620=22.6k 1 0.9V ISEN EN PC51 1U_0402_6.3V6K 12 PQ39 SI4634DY-T1-E3_SO8 PGND PC20 10U_0603_6.3V6M PC50 2.2U_0603_6.3V6K 2VGA_EN_2 PR62 2.2K_0402_5% VGA_EN PL7 0.88UH_PCMB103E-R88MS_20A_20% SW _VGA TPCA8030-H_SOP-ADV8-5 PC133 330U_D2_2.5VY_R9M 13 PC17 330U_D2_2.5VY_R9M LG PC52 2.2U_0603_6.3V6K LG_VGA PR70 100_0402_5% VCC +VGA_PVCC PR164 4.7_1206_5% BOOT PU3 ISL6268CAZ-T_SSOP16 14 1VGA_SNB 16 UG PVCC VIN PC126 680P_0402_50V7K VGA_VCC PHASE PGOOD GND PQ35 PR46 4.7_0603_5% VGA_VCC PU6 VIN VCNTL GND NC VREF NC VOUT NC TP 2 A LDO_1.8V_REF A G2992F1U_SO8 +1.8VSP PC78 10U_0603_6.3V6M PQ22 SSM3K7002FU_SC70-3 S 2009/01/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification PC77 0.1U_0402_16V7K PR105 1.24K_0402_1% PC76 0.1U_0402_16V7K PC79 1U_0402_6.3V6K 1 D SUSP PR103 100K_0402_1% 2LDO_1.8V_EN G +5VS PR104 1K_0402_1% PC75 4.7U_0805_6.3V6K LDO_1.8V_IN PJ8 @ JUMP_43X39 1 +3VS 2010/01/06 Deciphered Date www.vinafix.vn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title VGA_CORE/1.8VS/1.1VS Size Date: Document Number R ev 0.1 Thursday, October 29, 2009 Sheet 45 of 51 D D PJ9 VTT_B+ +5VS SW_VTT PR112 2.2_0603_5% VTT_BOOT-1 ISEN 11 VO C PR107 4.7_1206_5% + VTT_SNB PC80 1000P_0603_50V7K + @ PR110 10_0402_5% PC82 0.01U_0402_25V7K @ 2 10 Rds=4.0mΩ 4 PR109 3K_0402_1% PQ23 TPCA8028-H_SOP-ADVANCE8-5 +1.1V_VCCPP VTT_COMP-1 1 VFB=0.6V PR121 35.7K_0402_1% VTT_ISEN PL8 0.56UH_MMD-10CZ-R56M-M1_19A_20% PC139 330U_D2E_2.5VM 12 TPCA8030-H_SOP-ADV8-5 PC74 330U_D2E_2.5VM PGND UG BOOT LG 13 PC81 2.2U_0603_6.3V6K LG_VTT PC89 6800P_0402_25V7K PC88 22P_0402_50V8J VTT_COMP VTT_SELECT FB PC87 @ 0.1U_0402_16V7K FSET EN COMP VTT_FSET PR113 42.2K_0402_1% VTT_EN-1 PR117 0_0402_5% PC86 2.2U_0603_6.3V6K PR118 22.1K_0402_1% VTT_FB @ 1.05V_PGOOD C B 14 VCC PQ24 PR108 4.7_0603_5% VTT_VCC VTT_PVCC PVCC PU7 ISL6268CAZ-T_SSOP16 PR106 0_0603_5% VIN SUSP# VTT_VCC PHASE PGOOD GND PR116 0_0402_5% PC84 0.1U_0603_25V7K +5VALW PQ21 TPCA8028-H_SOP-ADVANCE8-5 VTT_BOOT1 UG_VTT 1.1VS_PGOOD VCCP_POK PR114 0_0402_5% 15 PC187 2200P_0402_50V7K PC85 10U_1206_25V6M PC188 0.1U_0402_25V6 PC83 10U_1206_25V6M @ JUMP_43X118 16 PR115 1K_0402_5% 2 B+ H_VTTVID1= Low, 1.1V H_VTTVID1= High, 1.05V PR120 1.58K_0402_1% VTT_FB-1 PR111 0_0402_5% B VTT_SENSE PR119 1.96K_0402_1% PJ15 +1.1V_VCCPP 2 1 +VCCP @ JUMP_43X118 PJ7 2 1 @ JUMP_43X118 PJ1 +1.1V_VCCPP 2 1 +1.05VS @ JUMP_43X118 A A Compal Electronics, Inc Compal Secret Data Security Classification 2009/01/06 Issued Date Deciphered Date 2010/01/06 www.vinafix.vn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +1.1VS_VTT Size Document Number Custom Date: R ev 0.1 Thursday, October 29, 2009 Sheet 46 of 51 D D B+ PR224 @ 0_0402_5% VSS_AXG_SENSE ISUM+ 14 PL12 0.56UH_MMD-10CZ-R56M-M1_19A_20% @ GFX_SN @ + P R81 0_0402_5% 2ISUM-2 PR227 @ 2.61K_0402_1% P C60 @ @ 680P_0402_50V7K + 2 PH 10KB_0603_5%_ERTJ1VR103J @ @ @ P R90 11K_0402_1% @ @ @ @ @ @ @ @ @ @ PC70 0.068U_0402_10V6K P R93 @ 3.01K_0402_1% PR94 82.5_0402_1% 2ISUM-3 GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 GFXVR_EN PR237 P R89 @ 100_0402_1% P C68 @ 0.01U_0402_25V7K ISUM+ 0_0402_5% 2 PR228 PR229 PR231 PR232 PR233 PR234 PR235 PR236 1 1 1 1 2ISUM-4 2 2 2 2 B @ P C69 @ 180P_0402_50V8J @ 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% ISUM-1 @ P C65 0.1U_0402_16V7K @ GFXVR_CLKEN# PR82 3.65K_0402_1% PC158 330U_D2_2.5VY_R9M @ 62881_VID0 62881_VID1 @ P C66 2.2U_0603_6.3V6K P R80 2.2_1206_5% PR225 +5VALW 0_0603_5% 20 19 62881_VCCP1 21 @ 18 LG_GFX VID2 22 VID3 23 VID4 24 VID5 25 VID6 26 +GFX_COREP P C67 17 330U_D2_2.5VY_R9M 16 LX_GFX 11 10 13 IMON VIN VDD RTN BOOT 15 UG_GFX @ SI4686DY-T1-E3_SO8 GFXVR_PWRGD 62881_VID2 B @ 62881_VID3 @ VID1 62881_VID4 @ VID0 CLK_EN# 62881_VID5 P R98 8.06K_0402_1% PR238 10K_0402_1% @ 2 @ PR100 17.8K_0402_1% 1GF X_FB-2 PC73 150P_0402_50V8J PC170 22P_0402_50V8J VCCP PGOOD @ @ LGATE RBIAS +GFX_COREP PR97 1.91K_0402_1% @ VW 62881_VID6 P C71 100P_0402_50V8J VSSP VR_ON @ @ 162881_RBIAS COMP DPRSLPVR PR230 PC171 47K_0402_1% 1000P_0402_50V7K UGATE 27 P R99 825K_0402_1% 2GF X_FB-1 @ P U5 ISL62881HRZ-T_QFN28_4X4 PHASE 62881_VR_ON PR226 10K_0402_1% 2@ PQ47 PC162 0.22U_0603_16V7K @ 62881_VW VSEN FB 2BST_GFX1 62881_COMP @ P R92 2.2_0603_5% C BST_GFX @ 62881_FB ISUM+ @ @ ISUM PC72 330P_0402_50V7K @ 62881_DPR SLPVR 28 29 @ PC167 330P_0402_50V7K AGND PR102 +GFX_COREP 10_0402_5% 2 VCC_AXG_SENSE 1 PC166 1000P_0402_50V7K VSS_AXG_SENSE @ 12 62881_VIN @ ISUM- C @ PQ19 TPCA8028_PSO8 @ 2 PC165 1U_0603_10V6K @ @ GFXVR_IMON @ P R91 22.6K_0402_1% @ @ PR101 10_0402_5% PC163 0.22U_0402_6.3V6K 1_0603_5% 62881_VDD 1 PR96 PC164 0.22U_0603_25V7K P R95 0_0603_5% +5VALW 1 PC161 0.1U_0402_25V6 2 P C59 10U_1206_25V6M GFX_B+ 1 P C61 10U_1206_25V6M @ JUMP_43X118 PC160 2200P_0402_50V7K PJ5 GFXVR_DPRSLPVR ISUM- @ PJ18 +GFX_COREP 2 1 +GFX_CORE @ JUMP_43X118 P J6 A 2 A 1 @ JUMP_43X118 (15A,600mils ,Via NO.= 30) Compal Secret Data Security Classification Issued Date 2009/01/06 Deciphered Date www.vinafix.vn 2010/01/06 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc GFX_CORE Size Date: Document Number R ev Thursday, October 29, 2009 Sheet 47 of 51 H H +3VS VGATE CLK_EN# PR199 PR200 PR209 G VR _ON PR76 1K_0402_5% P R77 1.91K_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% G CPU_B+ 10U_0603_6.3V6M 21 PC148 100U_25V_M PC168 100U_25V_M PC31 10U_1206_25V6M 1 PC30 10U_1206_25V6M 2 PC29 10U_1206_25V6M P C47 2200P_0402_50V7K PC48 0.1U_0402_25V6 PR182 17.8K_0402_1% 1C PU_SNB2 C PU_CSP2 C P U_CSN2 D UGATE_C PU1 PQ15 TPCA8030-H_SOP-ADV8-5 @ TPCA8030-H_SOP-ADV8-5 PL11 0.36UH_PCMC104T-R36MN1R17_30A_20% 4 1C PU_SNB1 @ CPU_CSP1-1 PR185 4.7_1206_5% PQ45 PR186 17.8K_0402_1% PQ16 PQ44 C PU_CSP1 P R64 69.8K_0402_1% PH 100K_0402_1%_TSM0B104F4251RZ CPU_SN-1 PR188 28.7K_0402_1% PC159 0.033U_0402_16V7K C PC143 680P_0402_50V7K TPCA8028-H_SOP-ADVANCE8-5 TPCA8028-H_SOP-ADVANCE8-5 PC34 10U_1206_25V6M BOOT_CPU1 BOOT_CPU1-1 PR187 2.2_0603_5% PC144 UGATE_C PU1 0.22U_0603_10V7K +5VS P D6 1SS355_SOD323-2 C P U_CSN1 PHASE_CPU1 22 PC32 10U_1206_25V6M 23 H _VID0 H _VID1 H _VID2 H _VID4 H _VID3 H _VID5 PSI# H _VID6 CPU_B+ LGATE_CPU1 PR215 P ROC_DPRSLPVR PR214 PSI# PR213 H _VID6 PR208 H _VID5 PR207 H _VID4 PR206 H _VID3 PR205 H _VID2 PR196 H _VID1 PR195 H _VID0 PR194 P ROC_DPRSLPVR 3 +5VS E + VCCP IMVP_IMON 1 24 VID0 VID1 P C53 PR222 69.8K_0402_1% PH 100K_0402_1%_TSM0B104F4251RZ CPU_SN-2 25 20 19 VID3 VID2 18 17 VID4 16 VID5 15 VID6 14 PSI# DRVH1 13 12 11 IMON VR_TT# DPRSLPVR LL1 VBST1 26 + CPU_CORE PR183 28.7K_0402_1% P C56 0.033U_0402_16V7K PC33 10U_1206_25V6M DRVL1 VSNS LGATE_CPU2 GNDSNS 27 PC142 680P_0402_50V7K TPCA8028-H_SOP-ADVANCE8-5 TPCA8028-H_SOP-ADVANCE8-5 BOOT_CPU2-1 2.2_0603_5% PC145 0.22U_0603_10V7K P C45 2200P_0402_50V7K V5IN PGND 28 PHASE_CPU2 CSN1 BOOT_CPU2 PR189 CPU_CSP2-1 PR184 4.7_1206_5% PC46 0.1U_0402_25V6 DRVL2 UGATE_C PU2 29 + F CSN2 30 LL2 P U12 TPS51621RHAR_QFN40_6X6 @ CSP2 THERM VBST2 PL10 0.36UH_PCMC104T-R36MN1R17_30A_20% TPCA8030-H_SOP-ADV8-5 PQ42 DRVH2 GND CSP1 +5VS 2 2 CPU_TRI1PSEL CPU_OSRSEL 32 31 33 OSRSEL TRIPSEL CPU_CLK_EN# C PU_PGOOD 34 PGOOD CLK_EN# C P U_VR_ON 35 VR_ON 38 CPU_TON SEL 36 C PU_ISLEW 37 TONSEL ISLEW V5FILT C P U_DROOP 39 DROOP C P U_VREF 40 41 PQ43 PD 1SS355_SOD323-2 + PQ17 TPCA8030-H_SOP-ADV8-5 CPU_IMON 0_0402_5% 2C PU_DPRSLPVR 0_0402_5% CPU_PSI# 0_0402_5% V ID6 0_0402_5% V ID5 0_0402_5% V ID4 0_0402_5% V ID3 0_0402_5% V ID2 0_0402_5% V ID1 0_0402_5% V ID0 0_0402_5% PR216 +VCCP H_PROCHOT# P C44 0.22U_0402_6.3V6K VSSSENSE P R45 12.4K_0402_1% PR212 0_0402_5% V CCSENSE VREF GND 2CPU_VR_TT# 0_0402_5% 10 68_0402_5% 20K_0402_1% CPU_TH ERM P R53 PR65 0_0402_5% PR66 0_0402_5% C PU_VSNS PR217 2 VSSSENSE B PR198 @ PQ18 @ +5VS B+ UGATE_C PU2 4 PR197 C @ 0_0402_5% D P R79 CPU_CSN2-1 33P_0402_50V8J CPU_CSN1-1 33P_0402_50V8J CPU_CSP1-2 33P_0402_50V8J C PU _GNDSNS 0_0402_5% C PU_CSP1 PR219 PC153 100P_0402_50V8J 470_0402_1% PC157 PC155 PC154 PC152 MODE P R78 C P U_CSN2 PR221 C P U_CSN1 PR220 PC156 100P_0402_50V8J 470_0402_1% 470_0402_1% CPU_CSP2-2 33P_0402_50V8J 0_0402_5% 470_0402_1% PR210 C PU_CSP2 PR223 P R74 2CPU_MODE 0_0402_5% P R73 E 249K_0402_1% P C57 0.22U_0603_10V7K 0_0402_5% F @ 0_0402_5% PC150 2.2U_0603_6.3V6K P C58 68P_0402_50V8J PR218 5.11K_0402_1% +3VS C P U_VREF PR75 @ 1K_0402_5% +5VS PL1 HCB4532KF-800T90_1812 H _VID0 1P R61 @ 1K_0402_5% H _VID0 1PR191 1K_0402_5% H _VID1 1P R60 @ 1K_0402_5% H _VID1 1PR192 1K_0402_5% H _VID2 1P R59 1K_0402_5% H _VID2 1PR193 @ 1K_0402_5% H _VID3 1P R58 1K_0402_5% H _VID3 1PR201 @ 1K_0402_5% H _VID4 1P R57 1K_0402_5% H _VID4 1PR202 @ 1K_0402_5% H _VID5 1P R56 @ 1K_0402_5% H _VID5 1PR203 1K_0402_5% H _VID6 1P R55 @ 1K_0402_5% H _VID6 1PR204 1K_0402_5% 1P R54 P ROC_DPRSLPVR P ROC_DPRSLPVR 10K_0402_5% B 1PR211 @ 1K_0402_5% Clarkfield:VID(0-5):001101 Auburndale:VID(0-5):001110 A A Compal Secret Data Security Classification 2009/01/06 Issued Date Deciphered Date www.vinafix.vn 2010/01/06 Title CPU_CORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Compal Electronics, Inc Size Date: Document Number Thursday, October 29, 2009 R ev Sheet 48 of 51 Version change list (P.I.R List) Item D Page of for PWR Reason for change PG# Modify List Date Phase D C C 10 B B 11 12 13 14 15 16 A 20081022 17 2009/01/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date www.vinafix.vn 2009/01/06 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A Title PIR (PWR) Size Document Number Custom R ev 0.1 Date: Thursday, October 29, 2009 Sheet 49 of 51 NO DATE PAGE MODIFICATION LIST PURPOSE - EVT TO DVT D D C C B B A A Title Compal Electronics, Inc HW PIR Size B Date: www.vinafix.vn Document Number LA-5752P Thursday, October 29, 2009 Rev 0.3 Sheet 50 of 51 D D C C B B A A Title Compal Electronics, Inc HW PIR Size B Date: www.vinafix.vn Document Number LA-5751 Thursday, October 29, 2009 Rev 0.3 Sheet 51 of 51 ... 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K... 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K 0. 1U _04 02 _ 10 V6K... 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1 18 3 18 5 18 7 18 9 19 1 19 3 19 5