a9c8f compal la 9869p r1 0

A B C D E 1 VDKTE Rosetta 10ADT/10ADTG 2 LA-9869P REV 1.0 Schematic AMD APU RICHLAND FP2 / FCH BOLTON-M3 3 2013-03-20 Rev 1.0 4 Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/12 Issued Date Deciphered Date 2014/03/12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Cover Page Size Document Number Custom Rev 1.0 LA-9869P Date: W ednesday, March 20, 2013 Sheet E of 51 A B C D E eDP Conn GCLK SLG3NB283VTR (UMA) page 29 page 20 LVDS Translator RTD2132R LVDS Conn page 20 DP0 (X2) AMD APU FP2 Processor page 19 GCLK SLG3NB302VTR (DIS) page 29 PWM Fan Control page PCI-Express X8 5GHz GPU Sun Pro M2 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2 Dual Channel page 10,11 BANK 0, 1, 2, BGA-827 page 12~18 27mm*31mm HDMI Conn 1.5V DDRIII 1333/1600 MT/s DP2 (X4) page 5,6,7,8,9 page 27 Left USB2.0 DP1 (X4) PCIe X1 1.2V 5GT/s UMI X4 2.5GT/s PCIe X1 Int Camera USB port page 30 1.2V 5GT/s Right USB 3.0 5V 480MHz USB port page 25 Right USB 3.0 USB port 10 page 31 USB2.0 Touch screen USB port page 25 USB port 11 page 31 CRT page 21 PCIeMini Card WLAN + BT USB2.0 5V 480MHz RTL8106E 10/100M RJ45 page 30 USB port APU PCIe port page 28 AMD FCH Hudson M3 SATA port 5V 6GHz(600MB/s) SATA HDD SATA port page 28 APU PCIe port page 30 SATA port 5V 6GHz(600MB/s) Cardreader Conn GL834L in MMC/SD SATA ODD SATA port page 28 FCBGA-656 24.5mm*24.5mm USB2.0 5V 480MHz USB port page 34 USB 3.0 USB 3.0 SPI Bus USB 3.0 3.3V 33 MHz 5GHz LPC Bus USB3.0 port page 31 5GHz page 23,24,25,26,27 HD Audio USB 3.0 USB3.0 port page 31 3.3V 24MHz 3.3V 33 MHz HDA Codec RTC CKT SPI ROM (4MB) page 25 page 19 ALC259/269 page 32 ENE KB9012 page 35 DC/DC Interface CKT Int MIC Conn page 38 Power Circuit DC/DC page 39~50 Touch Pad LAN/USB board LS-9861P page page 36 PWR/B LS-9862P 30 Issued Date Compal Electronics, Inc Compal Secret Data 2013/03/20 2014/03/20 Deciphered Date Title Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 37 Rev 1.0 LA-9869P Date: A page 36 Security Classification Power On/Off CKT JCRIO (HP & page MIC)33 page 33 page 33 Int.KBD page 37 SPK Conn B C D Wednesday, March 20, 2013 Sheet E of 51 DESIGN CURRENT 0.15A DESIGN CURRENT 0A +3VL +5VL B+ Ipeak=12A, Imax=8.4A, Iocp min=14A +5VALW D D SUSP DESIGN CURRENT 4A N-CHANNEL +5VS SI4800 RT8243A Ipeak=8A, Imax=5.6A, Iocp min=10A +3VALW WOL_EN# P-CHANNEL AO-3413 SUSP DESIGN CURRENT 330mA DESIGN CURRENT 4A N-CHANNEL +3V_LAN +3VS LCD_ENVDD SI4800 P-CHANNEL AO-3413 C DESIGN CURRENT 1.5A +LCD_VDD DESIGN CURRENT 60mA +3VS_DGPU DESIGN CURRENT 0.5A 1.8VGSP DESIGN CURRENT 0.75A 2.5VSP C DGPU_PWR_EN P-CHANNEL AO-3413 VGA_PWRGD SY8032 APL5508 SYSON Ipeak=12A, Imax=8.4A, Iocp min=13.8A RT8207M +1.5V SUSP DESIGN CURRENT 2A N-CHANNEL +1.5V_CPU FDS6676AS DESIGN CURRENT 2A PJ1 +1.5VS B B DESIGN CURRENT 1.5A +0.75VS 1.1VPWR_EN Ipeak=5.3A, Imax=3.71A, Iocp min=16A SY8208D +1.1VALWP SUSP# +1.1VS FDS6676 VR_ON Ipeak=7A, Imax=4.9A, Iocp min=16A +1.2VS Ipeak=36A, Imax=25.2A, Iocp min=60A Ipeak=30A, Imax=21A, Iocp min=50A APU_CORE APU_CORE_NB Ipeak=21A, Imax=14.7A, Iocp min=40A VGA_CORE SY8208D VR_ON ISL6277 A A GPU_DPRSLPVR ISL62881 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Deciphered Date 2014/03/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Power Tree Document Number Rev 1.0 LA-9869P Wednesday, March 20, 2013 Sheet of 51 A B Voltage Rails ( O MEANS ON D E X MEANS OFF ) B+ +RTCVCC C VL +5VALW +3VL +3VALW +1.5V BTO Option Table +5VS +3VS +1.5VS FCH APU Function +2.5VS power plane +1.2VS R1 explain +1.1VS +0.75VS GPU Bolton description R3 R3 R1 R3 HUDM3R3@ BOLTONR1@ BTO R1 +APU_CORE +APU_CORE_NB Function 3D sensor +1.1VALW State S0 O O O O O O S1 O O O O O O KB LED Clock UMA/DIS K description explain G-sensor KB LED Green Clock BTO GSENSOR@ KBL@ GCLK@ No Green Clock NOGCLK@ 1G U DIS UMA VGA@ UMA@ Panel Function description S D 2 S3 O O O O O X S5 S4/AC O O O O X X S5 S4/ Battery only O O O X X X S5 S4/AC & Battery don't exist O X X X X X explain LVDS eDP BTO LVDS@ IEDP@ FCH SM Bus Address (SCL0/SDA0) Power Device HEX Address +3VS DDR SO-DIMM A0 H 1010 000X b +3VS DDR SO-DIMM A2 H 1010 001X b +3VS WLAN EC SM Bus1 Address Power Device HEX Address +3VL Smart Battery 16 H 0001 0110 b +3VL Charger 12 H 0001 0010 b EC SM Bus3 Address Power +3VS Device LVDS Translator HEX Address 94 H 1001 0100 b EC SM Bus2 Address Power Device HEX Address +3VL SB-TSI 98 H 1001 1001 b +3VS G-Sensor 40 H 0100 0000 b +3VS VGA Thermal 82H 1000 0010 b SIGNAL STATE Full ON HIGH HIGH S1(Power On Suspend) HIGH HIGH S3 (Suspend to RAM) LOW HIGH S4 (Suspend to Disk) LOW HIGH S5 (Soft OFF) LOW LOW G3 LOW LOW 2013/03/20 Compal Electronics, Inc Compal Secret Data Security Classification Issued Date SLP_S3# SLP_S5# 2014/03/20 Deciphered Date Title Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 LA-9869P Date: A B C D Wednesday, March 20, 2013 Sheet E of 51 A B C D PCIE_GTX_C_ARX_P[0 3] PCIE_ATX_C_GRX_P[0 3] PCIE_GTX_C_ARX_N[0 3] PCIE_ATX_C_GRX_N[0 3] E LAN WLAN AH5 AH6 AG5 AG6 AE6 AE5 AD6 AD5 PCIE_FRX_C_LANTX_P0 PCIE_FRX_C_LANTX_N0 PCIE_FRX_W LANTX_P1 PCIE_FRX_W LANTX_N1 AM10 AN10 AN8 AM8 AP8 AR8 AR7 AP7 UMI_MTX_C_FRX_P0 UMI_MTX_C_FRX_N0 UMI_MTX_C_FRX_P1 UMI_MTX_C_FRX_N1 UMI_MTX_C_FRX_P2 UMI_MTX_C_FRX_N2 UMI_MTX_C_FRX_P3 UMI_MTX_C_FRX_N3 +1.2VS R1 P_ZVDDP 196_0402_1% Close to AR11 AR11 P_GPP_RXP[0] P_GPP_RXN[0] P_GPP_RXP[1] P_GPP_RXN[1] P_GPP_RXP[2] P_GPP_RXN[2] P_GPP_RXP[3] P_GPP_RXN[3] P_UMI_RXP[0] P_UMI_RXN[0] P_UMI_RXP[1] P_UMI_RXN[1] P_UMI_RXP[2] P_UMI_RXN[2] P_UMI_RXP[3] P_UMI_RXN[3] GPP P_GFX_RXP[0] P_GFX_RXN[0] P_GFX_RXP[1] P_GFX_RXN[1] P_GFX_RXP[2] P_GFX_RXN[2] P_GFX_RXP[3] P_GFX_RXN[3] P_GFX_RXP[4] P_GFX_RXN[4] P_GFX_RXP[5] P_GFX_RXN[5] P_GFX_RXP[6] P_GFX_RXN[6] P_GFX_RXP[7] P_GFX_RXN[7] P_GFX_RXP[8] P_GFX_RXN[8] P_GFX_RXP[9] P_GFX_RXN[9] P_GFX_RXP[10] P_GFX_RXN[10] P_GFX_RXP[11] P_GFX_RXN[11] P_GFX_RXP[12] P_GFX_RXN[12] P_GFX_RXP[13] P_GFX_RXN[13] P_GFX_RXP[14] P_GFX_RXN[14] P_GFX_RXP[15] P_GFX_RXN[15] UMI AP1 AP2 AM1 AM2 AK3 AK4 AJ1 AJ2 AH4 AH3 AF2 AF1 AD1 AD2 AB3 AB4 AA1 AA2 Y4 Y3 V2 V1 T1 T2 P3 P4 N1 N2 M4 M3 K2 K1 GRAPHICS UAPUA PCIE_GTX_C_ARX_P0 PCIE_GTX_C_ARX_N0 PCIE_GTX_C_ARX_P1 PCIE_GTX_C_ARX_N1 PCIE_GTX_C_ARX_P2 PCIE_GTX_C_ARX_N2 PCIE_GTX_C_ARX_P3 PCIE_GTX_C_ARX_N3 P_GFX_TXP[0] P_GFX_TXN[0] P_GFX_TXP[1] P_GFX_TXN[1] P_GFX_TXP[2] P_GFX_TXN[2] P_GFX_TXP[3] P_GFX_TXN[3] P_GFX_TXP[4] P_GFX_TXN[4] P_GFX_TXP[5] P_GFX_TXN[5] P_GFX_TXP[6] P_GFX_TXN[6] P_GFX_TXP[7] P_GFX_TXN[7] P_GFX_TXP[8] P_GFX_TXN[8] P_GFX_TXP[9] P_GFX_TXN[9] P_GFX_TXP[10] P_GFX_TXN[10] P_GFX_TXP[11] P_GFX_TXN[11] P_GFX_TXP[12] P_GFX_TXN[12] P_GFX_TXP[13] P_GFX_TXN[13] P_GFX_TXP[14] P_GFX_TXN[14] P_GFX_TXP[15] P_GFX_TXN[15] P_GPP_TXP[0] P_GPP_TXN[0] P_GPP_TXP[1] P_GPP_TXN[1] P_GPP_TXP[2] P_GPP_TXN[2] P_GPP_TXP[3] P_GPP_TXN[3] P_UMI_TXP[0] P_UMI_TXN[0] P_UMI_TXP[1] P_UMI_TXN[1] P_UMI_TXP[2] P_UMI_TXN[2] P_UMI_TXP[3] P_UMI_TXN[3] P_ZVDDP TRINITY-A8-SERIES_BGA813 5745R1@ P_ZVSS AN1 AN2 AM4 AM3 AK2 AK1 AH1 AH2 AF3 AF4 AE1 AE2 AD4 AD3 AB2 AB1 Y1 Y2 V3 V4 U1 U2 T4 T3 P2 P1 M1 M2 K3 K4 J1 J2 PCIE_ATX_GRX_P0 PCIE_ATX_GRX_N0 PCIE_ATX_GRX_P1 PCIE_ATX_GRX_N1 PCIE_ATX_GRX_P2 PCIE_ATX_GRX_N2 PCIE_ATX_GRX_P3 PCIE_ATX_GRX_N3 AG7 AG8 AE7 AE8 AD7 AD8 AB6 AB5 PCIE_FTX_LANRX_P0 PCIE_FTX_LANRX_N0 PCIE_FTX_W LANRX_P1 PCIE_FTX_W LANRX_N1 AN6 AM6 AP6 AR6 AP4 AR4 AP3 AR3 UMI_FTX_MRX_P0 UMI_FTX_MRX_N0 UMI_FTX_MRX_P1 UMI_FTX_MRX_N1 UMI_FTX_MRX_P2 UMI_FTX_MRX_N2 UMI_FTX_MRX_P3 UMI_FTX_MRX_N3 AP11 P_ZVSS R2 1 1 1 1 2 2 2 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ C50 C55 C51 C54 1 1 2 2 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K C59 C60 C61 C62 C122 C123 C120 C121 1 1 1 1 2 2 2 2 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K C1 C15 C17 C11 C7 C14 C13 C8 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0 PCIE_ATX_C_GRX_P1 PCIE_ATX_C_GRX_N1 PCIE_ATX_C_GRX_P2 PCIE_ATX_C_GRX_N2 PCIE_ATX_C_GRX_P3 PCIE_ATX_C_GRX_N3 PCIE_FTX_C_LANRX_P0 PCIE_FTX_C_LANRX_N0 PCIE_FTX_C_W LANRX_P1 PCIE_FTX_C_W LANRX_N1 LAN WLAN UMI_FTX_C_MRX_P0 UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3 196_0402_1% Close to AP11 3 +3VS FAN Control Circuit JFAN R6 10K_0402_5% FANPW M FAN_SPEED1 +FAN1 C4 0.01U_0402_25V7K @ G6 G5 ACES_50273-0040N-001 @ +5VS 1A @ +FAN1 0_0603_5% 1 R3 BAS16_SOT23-3 2013/03/20 Issued Date Deciphered Date 2014/03/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C @ C6 2 10U_0603_6.3V6M 1000P_0402_50V7K Compal Electronics, Inc Compal Secret Data Security Classification C5 D1 D Title AMD Trinity FP2 / GFX / UMI Size Document Number Custom Rev 1.0 LA-9869P Date: W ednesday, March 20, 2013 Sheet E of 51 A B C D E DDR_B_DQS[0 7] DDR_A_DQS[0 7] DDR_B_DQS#[0 7] DDR_A_DQS#[0 7] 1 UAPUC DDR_B_MA[0 15] UAPUB DDR_A_MA[0 15] DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDR_A_DM[0 7] DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 AA28 R29 T30 R28 R26 P26 P27 P30 P29 M28 AB26 M26 M29 AE27 L26 L27 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 AB27 AA29 M30 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7 G17 H17 F22 G22 E26 F26 H30 G30 AL29 AL30 AH25 AJ25 AK20 AL20 AK15 AL15 W29 Y30 W26 W27 U29 V30 U26 U27 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# L29 K30 DDR_A_CKE0 DDR_A_CKE1 D16 D20 E25 F30 AK29 AL25 AM20 AM16 DDR_A_ODT0 DDR_A_ODT1 AD30 AG28 AE26 AG29 DDR_A_SCS0# DDR_A_SCS1# AD26 AE29 AB30 AF30 AB29 AD29 AD28 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# J28 AA26 MEM_MA_RST# MEM_MA_EVENT# R60 +1.5V +MEM_VREF G32 M_ZVDDIO 39.2_0402_1% AJ32 Close to AJ32 MA_ADD[0] MA_ADD[1] MA_ADD[2] MA_ADD[3] MA_ADD[4] MA_ADD[5] MA_ADD[6] MA_ADD[7] MA_ADD[8] MA_ADD[9] MA_ADD[10] MA_ADD[11] MA_ADD[12] MA_ADD[13] MA_ADD[14] MA_ADD[15] MA_BANK[0] MA_BANK[1] MA_BANK[2] MA_DM[0] MA_DM[1] MA_DM[2] MA_DM[3] MA_DM[4] MA_DM[5] MA_DM[6] MA_DM[7] MA_DQS_H[0] MA_DQS_L[0] MA_DQS_H[1] MA_DQS_L[1] MA_DQS_H[2] MA_DQS_L[2] MA_DQS_H[3] MA_DQS_L[3] MA_DQS_H[4] MA_DQS_L[4] MA_DQS_H[5] MA_DQS_L[5] MA_DQS_H[6] MA_DQS_L[6] MA_DQS_H[7] MA_DQS_L[7] MA_CLK_H[0] MA_CLK_L[0] MA_CLK_H[1] MA_CLK_L[1] MA_CLK_H[2] MA_CLK_L[2] MA_CLK_H[3] MA_CLK_L[3] MA_CKE[0] MA_CKE[1] MA0_ODT[0] MA0_ODT[1] MA1_ODT[0] MA1_ODT[1] MA0_CS_L[0] MA0_CS_L[1] MA1_CS_L[0] MA1_CS_L[1] MA_RAS_L MA_CAS_L MA_WE_L MA_DATA[0] MA_DATA[1] MA_DATA[2] MA_DATA[3] MA_DATA[4] MA_DATA[5] MA_DATA[6] MA_DATA[7] MA_DATA[8] MA_DATA[9] MA_DATA[10] MA_DATA[11] MA_DATA[12] MA_DATA[13] MA_DATA[14] MA_DATA[15] MA_DATA[16] MA_DATA[17] MA_DATA[18] MA_DATA[19] MA_DATA[20] MA_DATA[21] MA_DATA[22] MA_DATA[23] MA_DATA[24] MA_DATA[25] MA_DATA[26] MA_DATA[27] MA_DATA[28] MA_DATA[29] MA_DATA[30] MA_DATA[31] MA_DATA[32] MA_DATA[33] MA_DATA[34] MA_DATA[35] MA_DATA[36] MA_DATA[37] MA_DATA[38] MA_DATA[39] MA_DATA[40] MA_DATA[41] MA_DATA[42] MA_DATA[43] MA_DATA[44] MA_DATA[45] MA_DATA[46] MA_DATA[47] MA_DATA[48] MA_DATA[49] MA_DATA[50] MA_DATA[51] MA_DATA[52] MA_DATA[53] MA_DATA[54] MA_DATA[55] MA_DATA[56] MA_DATA[57] MA_DATA[58] MA_DATA[59] MA_DATA[60] MA_DATA[61] MA_DATA[62] MA_DATA[63] F15 E15 H19 F19 E14 H15 E17 D18 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 G20 E20 H23 G23 E19 H20 E22 D22 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 H25 F25 D28 D29 E23 D24 D26 D27 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 G28 G29 H27 J29 E28 F27 H29 H28 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 AH29 AJ30 AM28 AM27 AH27 AH28 AJ29 AK27 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 AK26 AJ26 AK23 AJ23 AM26 AL26 AM24 AL23 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 AK22 AH22 AK19 AH19 AM22 AL22 AJ20 AL19 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 AK17 AJ17 AK14 AH14 AM18 AL17 AH15 AL14 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[0 63] DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDR_B_DM[0 7] DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 Y33 R32 T31 P33 P32 P31 N32 M33 M32 L32 AB31 M31 K32 AF33 K33 J32 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 AB33 AA32 K31 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 C18 B23 C28 D31 AM31 AN30 AR24 AN18 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7 B18 A18 B24 A24 B30 B29 D32 D33 AM32 AM33 AN28 AP29 AP23 AP24 AR18 AP18 W32 Y32 V33 V32 U32 V31 T33 T32 DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1# H32 H33 DDR_B_CKE0 DDR_B_CKE1 DDR_B_ODT0 DDR_B_ODT1 AF31 AH31 AE32 AH33 DDR_B_SCS0# DDR_B_SCS1# AD31 AF32 AC32 AG32 AB32 AD32 AD33 DDR_B_RAS# DDR_B_CAS# DDR_B_WE# H31 Y31 MEM_MB_RST# MEM_MB_EVENT# MA_RESET_L MA_EVENT_L MB_ADD[0] MB_ADD[1] MB_ADD[2] MB_ADD[3] MB_ADD[4] MB_ADD[5] MB_ADD[6] MB_ADD[7] MB_ADD[8] MB_ADD[9] MB_ADD[10] MB_ADD[11] MB_ADD[12] MB_ADD[13] MB_ADD[14] MB_ADD[15] MB_BANK[0] MB_BANK[1] MB_BANK[2] MB_DM[0] MB_DM[1] MB_DM[2] MB_DM[3] MB_DM[4] MB_DM[5] MB_DM[6] MB_DM[7] MB_DQS_H[0] MB_DQS_L[0] MB_DQS_H[1] MB_DQS_L[1] MB_DQS_H[2] MB_DQS_L[2] MB_DQS_H[3] MB_DQS_L[3] MB_DQS_H[4] MB_DQS_L[4] MB_DQS_H[5] MB_DQS_L[5] MB_DQS_H[6] MB_DQS_L[6] MB_DQS_H[7] MB_DQS_L[7] MB_CLK_H[0] MB_CLK_L[0] MB_CLK_H[1] MB_CLK_L[1] MB_CLK_H[2] MB_CLK_L[2] MB_CLK_H[3] MB_CLK_L[3] MB_CKE[0] MB_CKE[1] MB0_ODT[0] MB0_ODT[1] MB1_ODT[0] MB1_ODT[1] MB0_CS_L[0] MB0_CS_L[1] MB1_CS_L[0] MB1_CS_L[1] MB_RAS_L MB_CAS_L MB_WE_L MB_DATA[0] MB_DATA[1] MB_DATA[2] MB_DATA[3] MB_DATA[4] MB_DATA[5] MB_DATA[6] MB_DATA[7] MB_DATA[8] MB_DATA[9] MB_DATA[10] MB_DATA[11] MB_DATA[12] MB_DATA[13] MB_DATA[14] MB_DATA[15] MB_DATA[16] MB_DATA[17] MB_DATA[18] MB_DATA[19] MB_DATA[20] MB_DATA[21] MB_DATA[22] MB_DATA[23] MB_DATA[24] MB_DATA[25] MB_DATA[26] MB_DATA[27] MB_DATA[28] MB_DATA[29] MB_DATA[30] MB_DATA[31] MB_DATA[32] MB_DATA[33] MB_DATA[34] MB_DATA[35] MB_DATA[36] MB_DATA[37] MB_DATA[38] MB_DATA[39] MB_DATA[40] MB_DATA[41] MB_DATA[42] MB_DATA[43] MB_DATA[44] MB_DATA[45] MB_DATA[46] MB_DATA[47] MB_DATA[48] MB_DATA[49] MB_DATA[50] MB_DATA[51] MB_DATA[52] MB_DATA[53] MB_DATA[54] MB_DATA[55] MB_DATA[56] MB_DATA[57] MB_DATA[58] MB_DATA[59] MB_DATA[60] MB_DATA[61] MB_DATA[62] MB_DATA[63] DDR_B_D[0 63] C16 B17 B20 C20 A16 B16 B19 A20 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 B22 C22 A26 B26 B21 A22 C24 B25 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 A28 B28 B31 A32 C26 B27 A30 C30 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 B33 C32 F33 F32 B32 C31 E32 F31 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 AK32 AL32 AP32 AN31 AK31 AK33 AN32 AP33 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 AP30 AR30 AP27 AN26 AR32 AP31 AR28 AP28 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 AP25 AN24 AR22 AP21 AP26 AR26 AN22 AP22 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 AR20 AP19 AP16 AR16 AN20 AP20 AP17 AN16 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 MB_RESET_L MB_EVENT_L TRINITY-A8-SERIES_BGA813 M_VREF 5745R1@ M_ZVDDIO TRINITY-A8-SERIES_BGA813 5745R1@ +1.5V 0.75V Reference Voltage EVENT# pull high 4 R64 1K_0402_1% +1.5V 1K_0402_5% MEM_MA_EVENT# R61 1K_0402_5% MEM_MB_EVENT# +MEM_VREF 1 R65 1K_0402_1% R15 C124 1000P_0402_50V7K Issued Date Compal Electronics, Inc Compal Secret Data Security Classification C125 0.1U_0402_25V6 2013/03/20 2014/03/20 Deciphered Date Title AMD Trinity FP2 DDRIII I/F THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 LA-9869P Date: A B C D Wednesday, March 20, 2013 Sheet E of 51 A B C D E UAPUD ML_VGA_TXP0 ML_VGA_TXN0 ML_VGA_TXP1 ML_VGA_TXN1 CRT (To FCH) ML_VGA_TXP2 ML_VGA_TXN2 ML_VGA_TXP3 ML_VGA_TXN3 C67 C71 1 0.1U_0402_16V7K 0.1U_0402_16V7K DP1_TXP0 DP1_TXN0 E2 E1 C66 C69 1 0.1U_0402_16V7K 0.1U_0402_16V7K DP1_TXP1 DP1_TXN1 D4 D3 C68 C72 1 0.1U_0402_16V7K 0.1U_0402_16V7K DP1_TXP2 DP1_TXN2 D1 D2 C73 C70 1 0.1U_0402_16V7K 0.1U_0402_16V7K DP1_TXP3 DP1_TXN3 C1 C2 B2 A2 UMA_HDMI_TX2+ UMA_HDMI_TX2- B3 A3 UMA_HDMI_TX1+ UMA_HDMI_TX1- HDMI B4 A4 UMA_HDMI_TX0+ UMA_HDMI_TX0UMA_HDMI_TXC+ UMA_HDMI_TXC- B5 A5 clock no test point 100MHz (SS) AL7 AK7 APU_DISP_CLK APU_DISP_CLK# 100MHz (Non-spread spectrum) APU_SVC APU_SVD AL9 AK9 APU_CLK APU_CLK# APU_SVT R31 R32 1 @ @ 0_0402_5% APU_SVC_R E5 0_0402_5% APU_SVD_R E6 R33 @ 0_0402_5% APU_SVT_R D6 AJ11 AH11 APU_SIC APU_SID +1.5V AK11 AH9 APU_RST# APU_PWRGD Close to JHDT APU_PROCHOT# APU_THERMTRIP# APU_ALERT# RPC3 APU_TDI APU_TCK APU_TMS APU_TRST# T15 1K_0804_8P4R_5% R117 APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ# 1K_0402_5% APU_DBREQ# T16 APU_VDD_RUN_FB_L APU_VDDNB_SEN APU_VDD_SEN R212 @ 0_0402_5% VSS_SENSE R214 @ T13 0_0402_5% VDDNB_SENSE @ T21 0_0402_5% VDD_SENSE R215 T28 AL12 AK5 AR10 E11 G11 H12 F11 H11 E8 E7 G6 H6 H5 G7 G5 H7 DP0_TXP[3] DP0_TXN[3] DISPLAY PORT F1 F2 DP0_TXP[2] DP0_TXN[2] DP1_TXP[0] DP1_TXN[0] DP1_TXP[1] DP1_TXN[1] DP1_TXP[2] DP1_TXN[2] DP1_TXP[3] DP1_TXN[3] DP1_AUXP DP1_AUXN DP2_AUXP DP2_AUXN DP3_AUXP DP3_AUXN DISPLAY PORT MISC F4 F3 DP0_TXP[1] DP0_TXN[1] DISPLAY PORT H3 H4 DP2_TXP[0] DP2_TXN[0] DP2_TXP[1] DP2_TXN[1] DP2_TXP[2] DP2_TXN[2] DP2_TXP[3] DP2_TXN[3] CLKIN_H CLKIN_L DISP_CLKIN_H DISP_CLKIN_L DP4_AUXP DP4_AUXN DP5_AUXP DP5_AUXN DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD DP_BLON DP_DIGON DP_VARY_BL DISPLAY PORT DP0_TXP1 DP0_TXN1 DP_AUX_ZVSS TEST6 TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24 TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L TEST31 TEST32_H TEST32_L TEST35 TEST 0.1U_0402_16V7K 0.1U_0402_16V7K CLK IEDP@1 IEDP@1 DP0_AUXP DP0_AUXN SVC SVD SVT SER C58 C75 DP0_TXP[0] DP0_TXN[0] SIC SID RESET_L PWROK PROCHOT_L THERMTRIP_L ALERT_L TDI TDO TCK TMS TRST_L DBRDY DBREQ_L CTRL H2 H1 DMAACTIVE_L TEST4 TEST5 JTAG DP0_TXP0 DP0_TXN0 RSVD DP0_TXP1_C DP0_TXN1_C 0.1U_0402_16V7K 0.1U_0402_16V7K RSVD RSVD RSVD RSVD RSVD M5 M6 DP0_AUXP DP0_AUXN C47 C49 1 0.1U_0402_16V7K 0.1U_0402_16V7K L5 L6 DP1_AUXP DP1_AUXN C57 C52 1 0.1U_0402_16V7K 0.1U_0402_16V7K J5 J6 DP0_AUXP_C DP0_AUXN_C LVDS ML_VGA_AUXP ML_VGA_AUXN CRT (To FCH) UMA_HDMI_CLK UMA_HDMI_DATA HDMI Aux signal are re-configured as I2C signals for DDC APU AUX pin are 3.3V tolerant P5 P6 DP0_AUXP R25 1.8K_0402_5% DP0_AUXN R58 1.8K_0402_5% DP1_AUXP R10 1.8K_0402_5% DP1_AUXN R11 1.8K_0402_5% LVDS_HPD R74 100K_0402_5% FCH_CRT_HPD R75 100K_0402_5% HDMI_HPD R95 100K_0402_5% R5 R6 For 2132R U5 U6 M7 L7 J7 P7 R7 U7 LVDS_HPD FCH_CRT_HPD HDMI_HPD LVDS_HPD FCH_CRT_HPD HDMI_HPD C6 D7 A6 DP0_AUXP C138 680P_0402_50V7K DP0_AUXN C139 680P_0402_50V7K 3.3V Tolerance DP_ENBKL DP_ENVDD DP_INT_PWM B6 DP_AUX_ZVSS R16 AL6 Y23 V23 G9 F9 E9 G8 F12 E12 F14 G12 AJ8 AH8 G14 H14 V25 Y25 AH32 R25 T25 AL5 APU_TEST35 R23 R24 T7 T8 T9 T10 T17 T18 1 510_0402_1% 510_0402_1% APU_TEST18 APU_TEST19 APU_TEST20 APU_TEST24 +1.2VS @ 1K_0402_5% APU_SVC_R R39 @ 1K_0402_5% APU_SVD_R R41 @ 1K_0402_5% RPC2 APU_SIC APU_SID APU_ALERT# DMA_ACTIVE# 1K_0804_8P4R_5% R38 R29 R30 1 T11 T12 300_0402_5% 300_0402_5% @ 1K_0804_8P4R_5% +1.5V 39.2_0402_1% +1.5V DMA_ACTIVE# TEST4 TEST5 R36 RPC1 AP10 T23 R23 APU_SVT_R +1.5V APU_TEST18 APU_TEST19 APU_TEST20 APU_TEST24 TEST25_H TEST25_L APU_TEST31 +1.5V 150_0402_1% Change TEST35 to pull-high for HDMI issue check list recommend mount R29 and R30 @ L8 P8 AH12 AJ12 AK12 APU_RST# R52 300_0402_5% APU_PWRGD R54 300_0402_5% APU_RST# C126 APU_PWRGD C130 ESD@ 1000P_0402_50V7K 180P_0402_50V8J ESD@ VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE SENSE DP0_TXP0_C DP0_TXN0_C LVDS/eDP 1 C56 C48 TRINITY-A8-SERIES_BGA813 5745R1@ 3 +1.5V APU_SVC C127 @ 1000P_0402_50V7K Asserted as an input to force the processor into the HTC-active state APU_SVD C140 @ 1000P_0402_50V7K R55 1K_0402_5% 1 APU_SVT C141 @ 1000P_0402_50V7K APU_PROCHOT# APU_PROCHOT# R136 @ 0_0402_5% H_PROCHOT# R69 10K_0402_5% 2 ESD@ R68 1K_0402_5% 1 Thermal Shutdown Temperature: 115 degree B ESD@ C144 1000P_0402_50V7K For ESD request and close APU +1.5V H_THERMTRIP# +1.5V C142 0.1U_0402_16V7K APU_THERMTRIP# ESD@ 1000P_0402_50V7K @ESD@ C145 D31 CK0402101V05_0402-2 APU_PROCHOT# APU_THERMTRIP# E For ESD request and close Q5 Q5 C H_THERMTRIP# MMBT3904_NL_SOT23-3 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 2014/03/20 Deciphered Date Title AMD Trinity FP2 Display / MISC / HDT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 LA-9869P Date: A B C D Wednesday, March 20, 2013 Sheet E of 51 A B C D E UAPUF +1.5V 1 C131 C103 C100 C119 C118 C117 C102 C97 C96 C95 C94 C93 C92 C91 C90 C89 1 2 4.7U_0603_6.3V6K 180P_0402_50V8J 180P_0402_50V8J 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 2 @ C150 100U_1206_6.3V6K @ VDDP more different +1.2VS 22U_0603_6.3V6M 2 @ 22U_0603_6.3V6M 22U_0603_6.3V6M C655 C77 0.22U_0402_10V4Z 0.22U_0402_10V4Z C632 C132 180P_0402_50V8J 180P_0402_50V8J C152 C106 C105 180P_0402_50V8J 180P_0402_50V8J C109 1000P_0402_50V7K C110 C111 0.22U_0402_10V4Z 0.22U_0402_10V4Z C115 C116 0.01U_0402_16V7K 0.01U_0402_16V7K C149 C137 1 close to APU +1.5V +1.2VS +VDDP_CAP 22U_0805_6.3V6M 0.75A 22U_0805_6.3V6M VDDA VDDA C169 AM13 AM14 1 C168 3.5A VDDP_CAP VDDP_CAP Power Sequence of APU +1.5V +2.5VS TRINITY-A8-SERIES_BGA813 5745R1@ Group A +1.5VS +CPU_CORE +VDDA 4.7U_0603_6.3V6K 0.22U_0402_10V4Z C165 3300P_0402_50V7-K C170 L1 FBMA-L11-201209-300LMA30T C164 +2.5VS AN14 AP14 AP15 AR14 AR15 180P_0402_50V8J Other signals should keep 20 mil away with +VDDA VDDR VDDR VDDR VDDR VDDR 22U_0603_6.3V6M +VDDA 3.5A VDDP VDDP VDDP VDDP VDDP VDDP AA6 AA7 +VDDNB_CAP W33 AA23 AA25 AA27 AA30 AA33 AB28 AC30 AC33 AD23 AD25 AD27 AE28 AE30 AE33 AG23 AG25 AG27 AG30 AG33 C158 +VDDP_CAP AM12 AN12 AP12 AP13 AR12 AR13 3.2A VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO M9 N9 +APU_CORE_NB 22U_0603_6.3V6M +1.2VS VDDR more different C196 VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO +1.2VS C163 +1.5V B11 B12 B13 B14 B15 C8 C10 C12 C14 D8 D10 D12 D14 22U_0603_6.3V6M 30A VDDNB_CAP VDDNB_CAP J33 K23 K25 L28 L30 L33 M27 N23 N25 N30 N33 P28 R27 R30 R33 U28 U30 U33 W28 W30 C63 VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB 22U_0603_6.3V6M VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB C64 36A V17 V19 V20 V22 W8 AA8 AA9 AA11 AA12 AA14 AA15 AA17 AA19 AA20 AA22 AD9 AD11 AD12 AD14 AD15 AD17 AD19 AD20 AD22 AG12 AG14 AG15 AG17 AG19 AG20 AG22 22U_0603_6.3V6M A7 A8 A9 A10 A11 A12 A13 A14 A15 B7 B8 B9 B10 +APU_CORE_NB VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 22U_0603_6.3V6M VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD +APU_CORE UAPUE J12 J14 J15 J17 J19 J20 J22 M11 M12 M14 M15 M17 M19 M20 M22 R8 R9 R11 R12 R14 R15 R17 R19 R20 R22 U8 V9 V11 V12 V14 V15 C65 C74 +APU_CORE A17 A19 A21 A23 A25 A27 A29 A31 B1 C3 C4 C33 D5 D9 D11 D13 D15 D17 D19 D21 D23 D25 D30 E4 E27 E29 E30 E33 F5 F6 F7 F8 F17 F20 F23 F28 F29 G1 G2 G4 G15 G19 G25 G26 G27 G33 H8 H9 H22 H26 J4 J8 J9 J11 J23 J25 J26 J27 J30 K9 K11 K12 K14 K15 K17 K19 K20 K22 L1 L2 L4 M8 M23 M25 N4 N11 N12 N14 N15 N17 N19 N20 N22 R1 R2 R4 T9 T11 T12 T14 T15 T17 T19 T20 T22 U4 W1 W2 W4 W5 W6 W7 Y9 +1.5V Group B +CPU_CORE_NB VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Y11 Y12 Y14 Y15 Y17 Y19 Y20 Y22 AA4 AA5 AB7 AB8 AC1 AC2 AC4 AC9 AC11 AC12 AC14 AC15 AC17 AC19 AC20 AC22 AC23 AC25 AE4 AF9 AF11 AF12 AF14 AF15 AF17 AF19 AF20 AF22 AF23 AF25 AG1 AG2 AG4 AG9 AG11 AG26 AH7 AH17 AH20 AH23 AH26 AH30 AJ4 AJ5 AJ6 AJ7 AJ9 AJ14 AJ15 AJ19 AJ22 AJ27 AJ28 AJ33 AK6 AK8 AK25 AK28 AK30 AL1 AL2 AL4 AL8 AL11 AL27 AL28 AL33 AM5 AM7 AM9 AM11 AM15 AM17 AM19 AM21 AM23 AM25 AM29 AM30 AN3 AN4 AN33 AP5 AP9 AR2 AR5 AR9 AR17 AR19 AR21 AR23 AR25 AR27 AR29 AR31 TRINITY-A8-SERIES_BGA813 5745R1@ +1.2VS Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 2014/03/20 Deciphered Date Title AMD Trinity FP2 PWR / GND THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 LA-9869P Date: A B C D Sheet Wednesday, March 20, 2013 E of 51 +3VS Panel PWM R89 LVDS@ 2.2K_0402_5% R93 LVDS@ 4.7K_0402_5% Q21 LVDS@ MMBT3904_NL_SOT23-3 Q28 LVDS@ 2N7002KW _SOT323-3 SB-TSI R93 4.7K_0402_5% IEDP@ +1.5V R92 47K_0402_5% IEDP@ R92 LVDS@ 47K_0402_5% APU_INVT_PW M D G G @ Q28 2N7002KW _SOT323-3 S IEDP@ C 2 2.2K_0402_5% B Q21 MMBT3904_NL_SOT23-3 E IEDP@ IEDP@ R76 4.7K_0402_5% Q14 2 APU_SID When APU High -> MOS OFF (Vgs < 0.4V ) APU Low -> MOS ON (Vgs > 1.3V) R89 DP_INT_PW M DP_INT_PW M 1 G EC_SMB_DA1 D S APU_SID APU_INVT_PW M 0_0402_5% SUSP D +1.5V_SI R46 S R49 0_0402_5% @ DP_INT_PW M BSH111, the Vgs is: = 0.4V Max = 1.3V 3 @ Q16 AO3413_SOT23 D APU_INVT_PW M D BSH111_SOT23-3 EC_SMB_CK1 C R135 47K_0402_5% IEDP@ BSH111_SOT23-3 APU_SIC D APU_SIC S C +3VS eDP Panel ENVDD Q15 G Vg = 1.607 V R137 4.7K_0402_5% IEDP@ LCD_ENVDD IEDP@ Q29A 2 2.2K_0402_5% B IEDP@ C 2N7002DW -T/R7_SOT363-6 Q26 MMBT3904_NL_SOT23-3 IEDP@ E R141 DP_ENVDD 1 2 R147 100K_0402_5% IEDP@ B B +3VS R144 47K_0402_5% IEDP@ eDP Panel ENBKL R143 4.7K_0402_5% IEDP@ LCD_ENBKL IEDP@ Q29B 2 2.2K_0402_5% B IEDP@ E R146 DP_ENBKL C 2N7002DW -T/R7_SOT363-6 Q27 MMBT3904_NL_SOT23-3 IEDP@ R142 100K_0402_5% IEDP@ A A Compal Secret Data Security Classification 2013/03/20 Issued Date Deciphered Date 2014/03/20 Title AMD Trinity FP2 Singal Level Shifter THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom Rev 1.0 LA-9869P Date: W ednesday, March 20, 2013 Sheet of 51 +1.5V DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 DDR_A_DM3 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 C DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_CLK0 DDR_A_CLK0# DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_A_SCS1# DDR_A_D32 DDR_A_D33 DDR_A_D40 DDR_A_D41 B DDR_A_DM5 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 DDR_A_D56 DDR_A_D57 DDR_A_DM7 +3VS C182 A 0.1U_0402_16V4Z DDR_A_D58 DDR_A_D59 +0.75VS 205 G1 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 G2 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 D DDR_A_DM1 MEM_MA_RST# DDR_A_D14 DDR_A_D15 +1.5V DDR_A_D20 DDR_A_D21 DDR_A_DM2 R79 1K_0402_1% DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 +VREF_DQA DDR_A_DQS#3 DDR_A_DQS3 C156 DDR_A_D30 DDR_A_D31 DDR_A_CKE1 DDR_A_MA15 DDR_A_MA14 @1 C157 R81 1K_0402_1% Close to JDDR3H.1 DDR_A_MA11 DDR_A_MA7 C DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 +1.5V DDR_A_CLK1 DDR_A_CLK1# +1.5V DDR_A_BS1 DDR_A_RAS# C148 100U_1206_6.3V6K DDR_A_SCS0# DDR_A_ODT0 R80 1K_0402_1% SE00000O000 DDR_A_ODT1 +VREF_CAA DDR_A_D36 DDR_A_D37 C162 @1 C161 R82 1K_0402_1% DDR_A_DM4 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 2.2U_0402_6.3V6M DDR_A_D34 DDR_A_D35 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 DDR_A_DM[0 7] DDR_A_D12 DDR_A_D13 0.1U_0402_16V7K DDR_A_DQS#4 DDR_A_DQS4 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 DDR_A_MA[0 15] 2.2U_0402_6.3V6M DDR_A_CKE0 DDR_A_D[0 63] DDR_A_D6 DDR_A_D7 0.1U_0402_16V7K DDR_A_D26 DDR_A_D27 DDR_A_DQS#[0 7] DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D10 DDR_A_D11 DDR_A_DQS[0 7] DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D4 DDR_A_D5 D 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 DDR_A_D8 DDR_A_D9 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 DDR_A_D2 DDR_A_D3 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 DDR_A_DM0 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 1 DDR_A_D0 DDR_A_D1 DDR3 SO-DIMM A Reverse Type JDDR3L +VREF_DQA Layout Note: Place near JDDR3H +1.5V +1.5V Close to JDDR3H.126 C176 10U_0603_6.3V6M C174 10U_0603_6.3V6M C173 10U_0603_6.3V6M DDR_A_DM6 C171 10U_0603_6.3V6M DDR_A_D54 DDR_A_D55 C167 10U_0603_6.3V6M C166 10U_0603_6.3V6M C179 0.1U_0402_16V4Z C178 0.1U_0402_16V4Z C186 0.1U_0402_16V4Z C185 0.1U_0402_16V4Z C205 0.1U_0402_16V4Z C180 0.1U_0402_16V4Z DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 B Layout Note: Place near JDDR3H.203 and 204 DDR_A_D60 DDR_A_D61 +0.75VS C84 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 4.7U_0603_6.3V6K MEM_MA_EVENT# FCH_SDATA0 FCH_SCLK0 +0.75VS 206 LCN_DAN06-K4406-0103 @ A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 2014/03/20 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC DDRIII-SODIMM0 Rev 1.0 LA-9869P Date: Wednesday, March 20, 2013 Sheet 10 of 51 A B +5VALW TO +5VS +3VALW TO +3VS Load switch +5VALW C VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm C45 @ 1U_0402_6.3V6K SUSP# +5VALW +3VALW VIN1 VIN1 VOUT1 VOUT1 ON1 CT1 VBIAS SUSP# E +5VS PJ3 U2 D GND ON2 CT2 VIN2 VIN2 VOUT2 VOUT2 GPAD 14 13 +5VS_LS 12 C20 180P_0402_50V8J C21 330P_0402_50V7K 2 PAD-OPEN 4x4m @ @ C46 11 10 0.1U_0402_25V6 +3VS PJ5 +3VS_LS 15 PAD-OPEN 4x4m @ @ C53 TPS22966DPUR_SON14_2X3 @ SA00004MM00 C44 +1.5V +5VALW +3VL 0.1U_0402_25V6 1U_0402_6.3V6K 2 Q6B SYSON Q6A SUSP 2N7002KDWH_SOT363-6 2 SUSP# 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6 VR_ON SUSP# Q22A VR_ON# Q13A S SUSP SUSP 2N7002KDWH_SOT363-6 R448 100K_0402_5% Q13B R422 100K_0402_5% G SYSON# Q25 2N7002KW_SOT323-3 R5529 100K_0402_5% 9012@ FCH_PWR_EN Q22B 2N7002KDWH_SOT363-6 1 FCH_PWR_EN# D R477 470_0805_5% 2 FCH_PWR_EN# R432 100K_0402_5% +5VALW +0.75VS +5VALW R479 470_0805_5% 1 R5546 10K_0402_5% 885@ R5545 10K_0402_5% 2 2 +1.2VS +5VALW R478 470_0805_5% +5VS_ODD +5VS TO +5VS_ODD 3 R457 470_0805_5% ZP@ +1.1VS R417 470_0805_5% R416 820K_0402_5% Q23A 2N7002KDWH_SOT363-6 R385 @ SUSP 0_0402_5% ZP@ R440 ODD_PWR# C200 0.1U_0402_16V4Z @ Q53A ODD_PWR C471 0.1U_0402_16V7K ZP@ Q45 2 47K_0402_5% Vgs=-4.5V,Id=3A,RdsL L > H PC244 0.1U_0402_25V6 Vin Dectector 4 Please locate the RC Near EC chip 2011-02-22 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 2014/03/20 Deciphered Date Title CHARGER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Rev 1.0 Sheet 41 D of 51 A B C D 3/5VALW controller (35.1), Support component (35.2) 5V_3.3V controller (35.1), Support component (35.2) PR350 30K_0402_1% EMI Part (47.1) FB1 LG_3V 10 PHASE2 LDO5 SECFB ENLDO LDO3 15 14 13 11 12 VIN LGATE2 UG_5V LGATE1 17 LX_5V 16 LG_5V PL352 2.2UH_MMD-06CZ-2R2M-V1_8A_20% PU330 RT8243AZQW_WQFN20_3X3 1 2 FDMC7692S_MLP8-5 ENLDO PC344 4.7U_0603_10V6K +5VALWP EMI Part (47.1) + 2 PC342 1U_0603_10V6K VL PC341 4.7U_0603_10V6K 2 @ @ PR332 100K_0402_5% @ PR341 0_0402_5% VS_ON 5V Peak Current 10A OCP current 12A FSW=390kHz Delta I=2.791A,ripple=2.791*15m=41.865mV DCR 18~20mohm TYP MAX H/S Rds(on) ::27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm PR340 2.2K_0402_1% PC343 4.7U_0805_25V6-K EC_ON 3.3V Peak Current 8A OCP current 10A Delta I=1.160A ,ripple=1.160 x17m=19.27mV FSW=455kHz DCR 35mohm +/-15% TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm PQ352 PR338 100K_0402_1% 1 EMI Part (35.33) +3VLP PR334 499K_0402_1% 3/5V_B+ PC360 0.1U_0603_25V7K AON7406L PQ332 2 @EMI@ PR336 @EMI@ PC336 680P_0603_50V8J 4.7_1206_5% SNUB_3V PC354 150U_D2_6.3VY_R15M PHASE1 + BST_5V 18 PC353 150U_D2_6.3VY_R15M 19 PC355 0.1U_0402_10V7K BST1_5V 1 LX_3V @ PR355 0_0402_5% UGATE2 UGATE1 20 1 +3VALWP 1 ENTRIP1 BOOT1 4.7UH_ETQP3W4R7WFN_5.5A_20% AON7408L SNUB_5V BYP1 BOOT2 PQ351 21 @EMI@ PC356 @EMI@ PR356 680P_0603_50V8J 4.7_1206_5% UG_3V PGOOD PAD PL332 PR351 19.1K_0402_1% 2 BST_3V TON PC335 @ PR333 0.1U_0402_10V7K 0_0402_5% BST1_3V FB_5V PC361 10U_0805_25V6K FB_3V ENTRIP2 PR337 210K_0402_1% PR342 56K_0402_1% PR357 174K_0402_1% 3/5V_B+ VL POK PQ331 AON7408L PC340 10U_0805_25V6K PR331 20K_0402_1% @EMI@ PC339 2200P_0402_50V7K 1 PR330 14K_0402_1% 3/5V_B+ FB2 EMI@ PL331 HCB2012KF-121T50_0805 PR335 100K_0402_1% B+ @ PJ332 +3VLP 2 @ +3VL +3VALWP JUMP_43X39 1 PJ331 2 +3VALW JUMP_43X118 (100mA,20mils ,Via NO.= 1) (8A,160mils ,Via NO.= 16) @ +5VALWP 1 PJ351 2 +5VALW JUMP_43X118 (12A,240mils ,Via NO.= 24) 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Deciphered Date 2014/03/20 Title 3VALW/5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 Date: A B C Sheet D 42 of 51 A DDR controller (35.3), Support component (35.4) EMI@ PL151 HCB2012KF-121T50_0805 EMI Part (47.1) 1.5V_B+ @ BST_1.5V-1 2 19 20 VTTREF_1.5V +1.5VP FB PC163 0.033U_0402_16V7K PR160 10.2K_0402_1% FB_1.5V +1.5VP PR161 887K_0402_1% PR162 10K_0402_1% @ PC166 0.1U_0402_10V7K SUSP# @ PR164 0_0402_5% EN_0.75VSP 1 2 EN_1.5V @ PJ151 21 +5VALW 1.5V_B+ @ PR163 0_0402_5% SYSON VTT BOOT VLDOIN VDDQ S3 VDD TON_1.5V 17 VTTREF PC156 @EMI@ 680P_0402_50V7K GND RT8207MZQW_WQFN20_3X3 VDDP 10 PC164 1U_0603_10V6K 18 CS +5VALW VTTSNS S5 PAD VTTGND PGND TON 11 UGATE 16 12 VDD_1.5V PR156 @EMI@ 4.7_1206_5% PR159 5.1_0603_5% 2 FDMC7692S_MLP8-5 PQ152 PC162 1U_0603_10V6K LGATE 14 PR158 17.4K_0402_1% 2CS_1.5V PHASE 15 PGOOD PU150 PC160 10U_0603_6.3V6M PC155 0.1U_0603_25V7K PQ151 AON7408L DL_1.5V 13 SNUB_+1.5VP + PC157 330U_D2_2V_Y +0.75VSP SW_1.5V PL152 1UH_VMPI0703AR-1R0M-Z01_11A_20% +1.5VP +1.5V BST_1.5V 0_0603_5% DH_1.5V PC154 10U_0805_25V6K PC152@EMI@ 2200P_0402_50V7K PR155 PC159 10U_0603_6.3V6M B+ JUMP_43X118 +1.5VP +0.75VS JUMP_43X79 1 @ PJ152 +1.5V JUMP_43X118 (0.5A,40mils ,Via NO.= 1) 2 +0.75VSP @ PJ750 @ PC167 0.1U_0402_10V7K (12A, 480mils ,Via NO.= 24) OCP=13.8A 1.5V Peak Current 12A OCP current 13.34A FSW=300kHz DCR 8.3 ~ 10mohm TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm STATE S3 S5 1.5VP S0 Hi Hi On On S3 Lo Hi On On Lo Lo S4/S5 VTT_REFP 0.75VSP On Off (Hi-Z) Off Off Off (Discharge) (Discharge) (Discharge) Issued Date Note: S3 - sleep ; S5 - power off Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Deciphered Date 2014/03/20 Title 1.5VP/0.75VSP/1.8VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 LA-9869P Date: A Sheet 43 of 51 A B C D 1.8V controller (35.15), Support component (35.16) 1 +3VS VGA@ PC456 680P_0603_50V7K PC451 22U_0603_6.3V6M @EMI@ PR453 49.9K_0402_1% PR454 @ 22K_0402_5% 1.8V Peak Current 0.5A OCP current 3.5A FSW=800kHz H/S Rds(on) :100mohm , L/S Rds(on) :80mohm , 1 +1.8_EN FB=0.6V VGA@ SY8032ABC_SOT23-6 +1.8VGSP 1 1 @EMI@ PR451 VGA@ PR456 100K_0402_1% 4.7_1206_5% 2 VGA@ PC453 0.1U_0402_16V7K PJ451 @ EN PC452 VGA@ 22U_0603_6.3V6M FB GND VGA@ PL451 1UH_NRS4018T1R0NDGJ_3.2A_30% 2 PG LX 2 VGA_PWRGD IN SNB_1.8V VGA@ PR452 220K_0402_1% VGA@ PC458 22U_0603_6.3V6M PU450 VGA@ PC450 VGA@ 22P_0402_50V8J Note:Iload(max)=3A +1.8VGSP 2 +1.8VGS JUMP_43X79 2 (0.5A,20mils ,Via NO.=1) 1.1V controller (35.27), Support component (35.28) @ PJ401 +1.1VALWP 1 2 @ PR404 0_0402_5% +1.1VALW JUMP_43X79 1.1VPWR_EN (5.3A,220mils ,Via NO.=10) PR405 10K_0402_1% EMI Part (47.1) EMI Part (47.1) @EMI@ PR401 @EMI@PC403 4.7_1206_5% 680P_0603_50V7K 2SNB_1.1V PL402 EMI@ PR406 1K_0402_1% PR403 H/S Rds(on) :22mohm , L/S Rds(on) :11mohm , 2 PC412 22U_0603_6.3V6M @ 100K_0402_1% PC406 22U_0603_6.3V6M FB=0.6V SY8206DQNC_QFN10_3X3 PC401 22U_0603_6.3V6M +3VALW PC411 2.2U_0603_6.3V6K FB +3VALW LDO +1.1VALWP PG PL401 1UH_PCMB063T-1R0MS_12A_20% PC407 22U_0603_6.3V6M BYP LX_1.1V ILMT 10 LX GND PC408 22U_0603_6.3V6M BS PC405 0.1U_0603_25V7K EN IN PC409 S CER CAP 4700P 25V K X7R 0402 PR402 84.5K_0402_1% 10U_0805_25V6K PC410 1 B+_1.1V PC402 4.7U_0603_6.3V6K 1.1V Peak Current 5.3A OCP current 12A FSW=800kHz PU400 HCB2012KF-121T50_0805 2 B+ @EMI@ PC404 2200P_0402_50V7K The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively Compal Electronics, Inc Compal Secret Data Security Classification Issued Date 2013/03/20 Deciphered Date 2014/03/20 Title +1.8VALWP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Rev 1.0 LA-9869P W ednesday, March 20, 2013 D Sheet 44 of 51 1.2V controller (35.7), Support component (35.8) PR702 D D VR_ON 0_0402_5% @ EMI Part (47.1) EMI Part (47.1) @EMI@PC706 @EMI@PR706 @EMI@PR706 4.7_1206_5% 680P_0603_50V7K 2SNB_1.2V EMI@ PL702 PU700 PR407 1K_0402_1% PR703 100K_0402_1% PC713 22U_0603_6.3V6M PC712 22U_0603_6.3V6M PC703 22U_0603_6.3V6M 2 PC711 22U_0603_6.3V6M @ C H/S Rds(on) :22mohm , L/S Rds(on) :11mohm , PC708 22U_0603_6.3V6M +3VS 1.2V Peak Current 7A OCP current 12A FSW=800kHz BYP PG LDO SY8206DQNC_QFN10_3X3 PC701 2.2U_0603_6.3V6K ILMT +3VS C PC707 4.7U_0603_6.3V6K FB +1.2VS S CER CAP 4700P 25V K X7R 0402 LX (7A,280mils ,Via NO.= 14) PL701 1UH_MMD-05CZ-1R0M-M7L_7A_20% LX_1.2V GND 10 PC704 0.1U_0603_25V7K 2 BS PC710 EN 10U_0805_25V6K PC709 IN PR701 102K_0402_1% B+_1.2V @EMI@ PC702 2200P_0402_50V7K B+ HCB2012KF-121T50_0805 2.5V controller (35.13), Support component (35.14) PU702 APL5508-25DC-TRL_SOT89-3 OUT B +2.5VSP 2 GND PC798 1U_0402_6.3V6K IN @ PR798 150_1206_5% 2 +3VS PC799 4.7U_0805_6.3V6K B @ PJ702 +2.5VSP 2 +2.5VS JUMP_43X39 (0.75A,30mils ,Via NO.= 2) A A Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Issued Date Deciphered Date 2014/03/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +1.2VSP/+2.5VSP Size Document Number Custom Date: Rev 1.0 LA-9869P W ednesday, March 20, 2013 Sheet 45 of 51 D E CPU controller (36.1),Driver (36.2) Support component (36.3) VCC GND LGATE PC535 PC536 680P_0402_50V7K NB_PHASE1 PR572 @PR552 @ PR552 32.4K_0402_1% 2.2_0603_5% NB_BOOT1 PC557 0.22U_0603_25V7K NB_LGATE1 PR557 +APU_CORE 10/9 CPU_Vdroop=-2.1m ohm 10_0402_5% APU_VDD_SEN Compal Secret Data 2013/03/20 Issued Date PC553 10U_0805_25V6K PC552 10U_0805_25V6K NB_UGATE1 Security Classification APU_VDD_RUN_FB_L PC556 @EMI@PC556 @EMI@ 2200P_0402_50V7K 2 2 PR573 @EMI@ @EMI@ PC558 4.7_1206_5% 680P_0603_50V7K 10_0402_5% PQ504 PR574 CSD87351Q5D_SON8~D 0_0603_5% 2 137K_0402_1% 390P_0402_50V7K PR551 2K_0402_1% 2 PR556 @ PR571 10K_0402_1% ISEN1_NB C PC501 100U_25V_M @PR577 @EMI@ 1_0402_1% VSUM-_NB @PR576 @ PR576 10K_0402_1% ISEN2_NB PR566 1_0402_1% VSUM-_NB Compal Electronics, Inc +CPU_CORE/VDDNBP Date: B @ PR580 10K_0402_1% @ PR579 3.65K_0402_1% VSUM+_NB PR575 3.65K_0402_1% VSUM+_NB Title Deciphered Date @ PR578 10K_0402_1% @EMI@ISEN2_NB PL505 0.22UH_MMD-06DZNR22ME_25A_20% +APU_CORE_NB APU_NB_SW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A PC541 10U_0805_25V6K @EMI@ PC548 2200P_0402_50V7K 2 S1/D2 S2 G2 D1 G1 PR516 PC516 4.7_1206_5% 680P_0603_50V7K APU_NB_SW2 1U_0603_16V6K 1 PC532 2 @ PR554 @PR555 @ PR555 0_0402_5% 0_0402_5% 10/9 OCP=62.5A for 35W (634) @PC511 100U_25V_M @EMI@ PC545 2200P_0402_50V7K PC539 10U_0805_25V6K PC538 10U_0805_25V6K PC537 10U_0805_25V6K S2 PR506 @EMI@ 4.7_1206_5% @EMI@ PC506 680P_0603_50V7K D1 G1 S2 S1/D2 G2 PQ501 FDMS3664S_POWER56-8-7 EMI Part (35.33) 1 820P_0402_50V7K S2 PR526 FCCM PWM EMI Part (35.33) PR549 1.65K_0402_1% 0.01U_0402_50V7K @ PL504 0.22UH_MMD-06DZNR22ME_25A_20% PC526 BOOT 4.7_1206_5% @ PR541 @ @PR570 +5VALW 2.2_0603_5% PC521 2 0_0402_5% @PC524 0.22U_0603_25V7K 680P_0603_50V7K 2 PWM2_NB UGATE PHASE PC530 2 PR548 @ @ISL6208BCRZ-T_QFN8_2X2 PR546 1 @ +APU_CORE_NB TP 49 24 +3VS PR558 100K_0402_1% @ PU502 1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J @ PC534 @ PQ503 PR561 CSD87351Q5D_SON8~D 0_0603_5% 2 @ UGATE1 CPU_B+_NB ISEN1_NB PHASE1 EMI Part (47.1) PC519 1U_0603_16V6K PC520 10U_0805_25V6K 26 25 PR531 1_0402_1% PC544 10U_0805_25V6K LGATE1 27 @EMI@VSUM-1 PC543 10U_0805_25V6K 1_0603_5% PR525 10K_0402_1% ISEN1 PR530 3.65K_0402_1% VSUM+ @EMI@ PC550 2200P_0402_50V7K 1 PR501 28 @EMI@ +APU_CORE CPU_B+_NB PC531 @ PR553 100_0402_1% LGATE2 29 PC533 0.1U_0402_25V6 +5VALW PC525 @ PL503 PR524 10K_0402_1% ISEN21 VGATE PC528 PR550 422_0402_1% CPU_B+ FDMS3664S_POWER56-8-7 PQ502 30 PR569 0_0402_5% LGATE2 S2 PHASE2 S2 32 31 PC515 0.22U_0603_50V7K UGATE2 BOOT2 33 34 2 10K_0402_1%_ERTJ0EG103FA VSUM- CPU_B+ PC513 0.22U_0603_25V7K 330P_0402_50V8J PC529 @ 0.022U_0402_16V7K PC527 0.15U_0402_10V6K 11K_0402_1% PH504 EMI@ PL507 CPU_B+_NB HCB2012KF-121T50_0805 PR517 1_0402_1% VSUM-1 PR514 10K_0402_1% ISEN2 PR515 3.65K_0402_1% VSUM+ NB_UGATE1 37 UGATEX BOOT1 PGOOD COMP RTN 35 10P_0402_50V8J PR545 2 2.61K_0402_1% PR544 PL502 PR513 10K_0402_1% ISEN11 PR560 0_0603_5% PR521 2.2_0603_5% BOOT2 0_0603_5% PR527 CPU_B+ @ NB_BOOT1 VSUM+ UGATE2 + B+ 0.22UH_MMD-06DZNR22ME_25A_20% +APU_CORE EMI Part (47.1) VSUM- PC508 0.22U_0603_25V7K PC522 PR563 @ 10K_0402_1% FB UGATE1 FB2 PHASE1 NTC VSEN IMON 0_0402_5% PR568 0_0402_5% ISEN2 @ PR540 @1 PR510 2.2_0603_5% BOOT1 NB_LGATE1 NB_PHASE1 39 LGATEX PHASEX FCCM_NB PWM2_NB 40 PWM2_NB 42 41 FCCM_NB 43 COMP_NB PGOOD_NB 45 44 FB_NB VSEN_NB 46 LGATE1 21 +5VS ISUMN_NB PWROK 36 BOOT1 PWM_Y 20 470K_0402_5%_TSM0B474J4702RE ENABLE ISEN3 VDD PC546 PH503 12 VDDP SVT PR538 13K_0402_1% 11 27.4K_0402_1% 1000P_0603_50V7K 2PR537 118K_0402_1% PR539 VDDIO 19 APU_PWRGD LGATE2 S IC ISL6277HRZ-TR5570 QFN 48P PWM 18 10 PHASE2 SVD ISUMN VR_HOT_L ISUMP UGATE2 17 PC517 1000P_0402_50V7K SVC 16 @ PR5592 100K_0402_1% VIN PC523 0.22U_0402_16V7K +1.5V @ PR533 0_0402_5% 2 PC555 0.1U_0402_25V6 @ PR535 APU_SVT 0_0402_5% @ PR536 VR_ON 0_0402_5% APU_SVD +1.5V BOOTX BOOT2 ISEN1 H_PROCHOT# PHASE2 IMON_NB ISEN1 15 @ PR532 0_0402_5% APU_SVC + EMI@ PL501 HCB2012KF-121T50_0805 PL506 HCB2012KF-121T50_0805 EMI@ 0.22UH_MMD-06DZNR22ME_25A_20% NTC_NB ISEN2_NB 2PR528 127K_0402_1% ISEN1_NB 13K_0402_1% PH501 PC514 1000P_0402_50V7K 470K_0402_5%_TSM0B474J4702RE ISUMP_NB ISEN2 +5VS 0_0402_5% PR564 14 PR523 27.4K_0402_1% 0.22U_0402_16V7K PR522 13 @ PC560 0.22U_0402_16V7K PU501 48 47 0.22U_0402_16V7K PR562 10K_0402_1% 38 121K_0402_1% 220P_0402_50V7K @ PC559 PHASE1 @ PC512 100_0402_1% PR520 23 @ PR519 PC551 0.1U_0402_25V6 UGATE1 +APU_CORE_NB LGATE1 TDC (AB)22A (C)30A EDC (AB)33A (C)40A OCP current (AB)41.51A Load line -4mV/A FSW=450kHz DCR 1mohm ~1.2mohm TYP MAX H/S Rds(on) :7.4mohm , 8.8mohm L/S Rds(on) :2.6mohm , 3.1mohm PR518 681_0402_1% VSUM-_NB PR542 0_0603_5% 2 10K_0402_1%_ERTJ0EG103FA 10/9 OCP=50A for 35W(511 ohm) 22 PC510 0.1U_0402_10V6K @ 0.022U_0402_25V7K PH502 PC509 1 PR512 2.61K_0402_1% PR511 11K_0402_1% VSUM+_NB 330P_0402_50V7K CPU_B+ 100P_0402_50V8J PR509 42.2K_0402_1% +APU_CORE TDC (AB)22A (C)36A EDC (AB)35A (C)50A OCP current (AB)43.56A Load line -2.1mV/A FSW=450kHz DCR 1mohm~1.2mohm TYP MAX H/S Rds(on) :8.5mohm , 11mohm L/S Rds(on) :2.6mohm , 3.2mohm PC505 PC518 1U_0603_16V6K PR504 2.94K_0402_1% +APU_CORE_NB PC504 @PR507 @ PR507 10_0402_1% 1000P_0402_50V7K 2 PR508 APU_VDDNB_SEN @ PC507 0_0402_5% 301_0402_1% 2 PR502 PC502 2K_0402_1% 330P_0402_50V7K 1 PR505 PC503 137K_0402_1% 390P_0402_50V7K 2 PR503 EMI Part (47.1) PC542 10U_0805_25V6K C PC540 10U_0805_25V6K B PC554 10U_0805_25V6K A 10/9 NB_Vdroop=-4m ohm D Rev 1.0 LA-9869P Wednesday, March 20, 2013 Sheet E 46 of 51 D D VGA controller (43.1),Driver (43.2) Support component (43.3) EMI Part (47.1) VGA@ PL801 HCB2012KF-121T50_0805 +VGA_CORE TDC 21A EDC 31.5A OCP current 40A FSW=300kHz DCR 1.4m ohm +-5% TYP H/S Rds(on) :11.7mohm , L/S Rds(on) :3.8mohm , 1 GPIO15 VID1 1.15V 1.125V 2.61K_0402_1% 10KB_0402_5%_ERTJ1VR103J 1 1 0 1.000V 1 0.975V 1 0.950V 1 1 0.925V 1 0 0.900V 1 0 0.875V 1 0.850V 1 1 0.825V 1 0 0.800V 1 1 0.775V Default @ @ @ @ @ @ A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Deciphered Date 2014/03/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +VPU_COREP Size C Date: 2 0_0402_5% PR821 1.025V 1 B GPU_VID1 GPU_VID2 GPU_VID3 0 GPU_VID4 GPU_VID5 1.050V VGA@ PC820 047U_0402_16V7K GPU_ISUM- 0.1U_0402_25V6 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 1.075V VGA@ PC822 PR827 PR826 PR825 PR824 1.100V 1 0 0.1U_0402_16V7K Layout Note: Place near Choke VGA@ PR822 1.2K_0402_1% 0 2 VGA@ PR818 11K_0402_1% VGA@ GPU_ISUM+ PXS_PWREN 0 VGA@ PC899 560U_D2_2VM_R4.5M VGA@ PH7 VGA@ PC821 0.1U_0402_16V7K GPU_DPRSLPVR VGA@ 47K_0402_5% PR828 1 @ PR811 0_0402_5% VGA@ PR815 VDDC +VGA_CORE 1 VGA@ PR810 3.65K_0805_1% 2 PC816 680P_0603_50V7K PQ803 S TR TPCA8059-H 1N PPAK56-8 PQ802 S TR TPCA8059-H 1N PPAK56-8 VID2 PQ801 TR TPCA8065-H 1N PPAK56-8 VGA@ VGA@ 0_0402_5% PR829 GPIO20 VID2 1 + @EMI@ VGA@ PR823 10K_0402_1% @ PR830 10K_0402_1% VGA@ PR831 10K_0402_1% VGA@ PR832 10K_0402_1% @ PR833 10K_0402_1% GPIO29 VID3 B value:4250K±2% 22 VID4 VID5 VGA@ PC817 2.2U_0603_6.3V6K +3VGS VGA_PWRGD A +5VALW 1 21 PR814 1_0603_5% VGA@ PR718 1.8K_0402_1% B GPIO30 VID4 1 1 14 12 11 13 IMON VIN BOOT 19 20 @ GPIO6 VID5 0 DL_GPU @EMI@ PR808 4.7_1206_5% VGA@ PR835 120K_0402_1% 0.36UH_PDME064T-R36MS_24A_20% VGA@ 17 18 VGA@ PL802 VGA@ PC823 VGA@ PR817 8.06K_0402_1% VDD RTN VID1 LX_GPU C @ PR836 10K_0402_1% VGA@ PR837 10K_0402_1% @ PR838 10K_0402_1% PR839 10K_0402_1% VGA@ PR840 10K_0402_1% VGA@ PR816 715_0402_1% PC818 1000P_0402_50V7K VGA@ VID0 CLK_EN# +3VS VCCP PGOOD 23 LGATE RBIAS DH_GPU 2 1 1 VW PU801 ISL62881CHRTZ-T_TQFN28_4X4 24 VGA@ PC814 390P_0402_50V7K VGA@ PC819 56P_0402_50V8 VGA@ 147K for CPU 47K for GPU VGA@ 25 2 VSSP VID6 COMP 28 PR809 47K_0402_1% VGA@ PC815 1000P_0402_50V7K PHASE 15 16 VGA@ PR813 226K_0402_1% VGA@ PR812 2.37K_0402_1% FB VR_ON UGATE DPRSLPVR VSEN 26 27 ISUM- AGND PC811 330P_0402_50V7K VGA@ PR806 10_0402_5% ISUM+ VGA@ +VGA_CORE 29 VCC_GPU_SENSE 10 VGA@ PC812 330P_0402_50V7K C VGA@ PR805 VGA@ PC810 2.2_0603_5% 0.1U_0603_25V7K 2 BST_GPU PR841 VGA@ 0_0402_5% VID3 VSS_GPU_SENSE GPU_ISUM- +5VALW GPU_ISUM+ VGA@ PC809 1000P_0402_50V7K MAX 14.5mohm 4.8mohm VGA@ PR804 10_0402_5% 2 VGA@ PC806 1U_0603_6.3V6M 2 VGA@ VGA@ PR802 1_0603_5% VGA@ PR801 1_0603_5% VGA@ PC807 0.22U_0603_25V7K +5VALW VGA@ PC804 10U_0805_25V6K @EMI@ PC802 2200P_0402_50V7K PC803 10U_0805_25V6K 1 GPU_B+ 2 B+ Document Number Rev 1.0 LA-9869P Wednesday, March 20, 2013 Sheet 47 of 51 A B C D 1 0.95V controller (35.11), Support component (35.12) +5VS +1.1VALW PJ602@ JUMP_43X79 +0.95VS_FB APL5916KAI-TRL_SO8 VGA@PR603 56K_0402_1% VGA@ PC603 22U_0805_6.3V6M 1 2 +0.95VGSP VGA@PR604 VGA@PR604 10K_0402_1% VGA@ PC600 39P_0402_50V8J FB @ PR601 1K_0402_1% @ PJ601 +0.95VGSP +0.95VGS JUMP_43X118 (4A,160mils ,Via NO.= 4) VGA@ PC602 0.01U_0402_25V6 EN POK VOUT VOUT +3VS +0.95VS_EN 2+0.95VS_POK VCNTL VIN VIN 10K_0402_1% PXS_PW REN PU600 VGA@ VGA@ +0.95VS_VIN VGA@ PR602 GND 22U_0805_6.3V6M PC601 1U_0603_6.3V6M PC604 VGA@ 2 2 3 0.95V Peak Current 4A OCP current 16A FSW=800kHz H/S Rds(on) :22mohm , L/S Rds(on) :11mohm , 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/03/20 Deciphered Date 2014/03/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C +1.5VPCIE/0.935V Document Number Rev 1.0 LA-9869P W ednesday, March 20, 2013 D Sheet 48 of 51 PC1021 0.01U_0402_50V7K PC1009 0.01U_0402_50V7K PC1022 0.01U_0402_50V7K PC1023 0.01U_0402_50V7K + PC1001 22U_0603_6.3V6M PC1015 22U_0603_6.3V6M PC1013 22U_0603_6.3V6M PC1002 22U_0603_6.3V6M PC1101 330U_D2_2V_Y PC1024 180P_0402_50V8J PC1014 22U_0603_6.3V6M PC1003 22U_0603_6.3V6M PC1012 22U_0603_6.3V6M PC1004 22U_0603_6.3V6M PC1016 22U_0603_6.3V6M PC1026 180P_0402_50V8J + @ PC1102 330U_D2_2V_Y PC1025 180P_0402_50V8J 2 PC1017 220P_0402_25V8K VGA@ PC1051 1U_0402_6.3V6K VGA@ PC1077 1U_0402_6.3V6K VGA@ PC1042 10U_0603_6.3V6M VGA@ PC1068 1U_0402_6.3V6K VGA@ PC1052 1U_0402_6.3V6K VGA@ PC1078 1U_0402_6.3V6K VGA@ PC1040 10U_0603_6.3V6M VGA@ PC1061 1U_0402_6.3V6K VGA@ PC1053 1U_0402_6.3V6K VGA@ PC1044 1U_0402_6.3V6K VGA@ PC1041 10U_0603_6.3V6M VGA@ PC1047 1U_0402_6.3V6K VGA@ PC1066 1U_0402_6.3V6K VGA@ PC1058 1U_0402_6.3V6K VGA@ PC1048 1U_0402_6.3V6K VGA@ PC1067 1U_0402_6.3V6K VGA@ PC1059 1U_0402_6.3V6K VGA@ PC1049 1U_0402_6.3V6K PC1032 560U_D2_2VM_R4.5M + 2@ PC1033 330U_D2_2V_Y Local 22uF 15 330uF*9m 4 0.01u 1u x30 0.22uF 49 of 51 Rev 1.0 180P Compal Electronics, Inc Sheet PROCESSOR DECOUPLING LA-9869P W ednesday, March 20, 2013 Document Number 10u x Title Size A3 Date: 560u x1 GFX output CAP (Including MLCC) 36.5 VGA@ PC1057 1U_0402_6.3V6K PC1031 22U_0603_6.3V6M +APU_CORE_NB VGA@ PC1065 1U_0402_6.3V6K PC1038 180P_0402_50V8J + VGA@ PC1046 1U_0402_6.3V6K 1 VGA@ PC1056 1U_0402_6.3V6K PC1037 180P_0402_50V8J 2 VGA@ PC1064 1U_0402_6.3V6K PC1030 22U_0603_6.3V6M Richland VGA@ PC1079 1U_0402_6.3V6K PC1029 22U_0603_6.3V6M PC1036 180P_0402_50V8J VDD VGA@ PC1055 1U_0402_6.3V6K PC1035 0.22U_0402_16V7K VDD_NB VGA@ PC1063 1U_0402_6.3V6K VGA VGA@ PC1045 1U_0402_6.3V6K VGA_Core output CAP (Including MLCC 43.9) Deciphered Date Compal Secret Data VGA@ PC1054 1U_0402_6.3V6K PC1028 22U_0603_6.3V6M 2013/03/20 VGA@ PC1062 1U_0402_6.3V6K PC1034 0.22U_0402_16V7K +APU_CORE_NB VGA@ PC1060 1U_0402_6.3V6K +APU_CORE_NB VGA@ PC1043 10U_0603_6.3V6M +VGA_CORE VGA@ PC1076 1U_0402_6.3V6K +VDDC VGA@ PC1050 1U_0402_6.3V6K +VGA_CORE Issued Date Security Classification THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC VGA@ PC1069 1U_0402_6.3V6K PC1011 22U_0603_6.3V6M PC1005 180P_0402_50V8J 1 PC1018 22U_0603_6.3V6M PC1008 0.01U_0402_50V7K PC1000 22U_0603_6.3V6M CPU_Core output CAP (Including MLCC) 36.4 PC1020 0.22U_0402_16V7K PC1010 22U_0603_6.3V6M +APU_CORE Local PC1007 0.22U_0402_16V7K PC1027 22U_0603_6.3V6M +APU_CORE +APU_CORE + PC1019 0.22U_0402_16V7K D C B A PC1100 560U_D2_2VM_R4.5M PC1006 0.22U_0402_16V7K D C B A Version change list (P.I.R List) Item Page of for PWR Reason for change PG# Modify List Date Phase D C D Item Time (When) EVT 2012/11/28 EVT 2012/11/28 EVT 2012/11/28 EVT 2012/11/28 EVT 2012/11/28 EVT 2012/11/28 Page (Where) P39-PWR-BATTERYCONN/ OTP P41-PWR-+3VALW/5VALW P41-PWR-+3VALW/5VALW P43-PWR_+1.8VSGP/+1.1VALWP P43-PWR_+1.8VSGP/+1.1VALWP P50-PWR-CPU_CORE Location/ Discription( How/ What) Request (Who) change PF2vandor for cost downplane PWR change PR337 235Kto210K&PR5357156kto174k PWR Delate PC351addPC353 150uD2 cap PWR change PC157 220uH=4.5mmto 330uD2capH=2mm PWR change PR158 16.2Kto17.4K PWR change the PC1101560uto330u PWR C B B A A 2013/03/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2014/03/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: PIR (PWR) Rev 1.0 VCUAA W ednesday, March 20, 2013 Sheet 50 of 51 HW PIR (Product Improve Record) VDKTE LA-9869P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.2 GERBER-OUT DATE: 2012/12/25 D Item Page Date Request Solution 1) 21 2012/12/04a For CRT undershoot issue Add R66 & R67 for CRT issue 2) 14 2012/12/04a For VGA_CORE display unomunt CR103 3) 22 2012/12/13a For EMI request Change L8/L9/L10/L11 part number for EMI requesrt 4) 34 2012/12/13a For change EC PIN Change 1.1VPWR_EN from pin 71 to pin 127 and USB_EN#0 from pin84 to pin 23 5) 19 2012/12/14a For LVDS translator Delete all of RTD2132S components 6) 31 2012/12/14a For S&C port wake Add CHG_PWR_GATE# on U15 pin and connect to EC pin82 7) 24 2012/12/17a For leakage with PXS_PWREN Change Power rail from +3VALW_FCH to +3VALW on R216 pin1 8) 07 2012/12/22a For leakge Delete R47, D18 9) 24 2012/12/22a For NV suggestion Add R283 & Q30 10) 34 2012/12/25a For S&C port wake Add RB25 D VDKTE LA-9869P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.3 GERBER-OUT DATE: 2013/02/04 C Item Page Date Request Solution 1) 24 2013/01/21a For AMD suggestion Update R288/R289 from 10K to 2.2K 2) 22 2013/01/21a For HDMIleakage issue Change R571 to +3VS power rail 3) 34 2013/01/21a For Audio noise Add EC_MUTE_INT (GPIO5D) and add RB38(0 ohm) and RB37 (4.7K PD) 4) 20 2013/01/21a For layout routing SWAP L56 5) 20 2013/01/21a For EMI request Add R155/156 6) 13 2013/01/28a For Safety Add GPU_DOWN# connect to EC 7) 25 2013/01/29a For EMI request Add C508(10P)/R118(0 ohm) with FCH_SPI_CLK_R 8) 33 2013/01/30a For ESD request Reserve D27~D30 on SPK 9) 07 2013/01/30a For ESD request Reserve D31 on APU_PROCHOT# 10) 20 2013/01/30a For ESD request Add D32 on Int mic clk/data and USB 11) 34 2013/01/30a For ESD request Reserve DB2 on H_PROCHOT_EC 12) 36 2013/01/31a For move JTP SWAP JTP 13) 24 2013/02/01a For ESD request Add 1000p C505 on FCH_PWRGD 14) 34 2013/02/01a For ESD request Add 1000p CB17 on FCH_PWRGD 15) 34 2013/02/04a For PWR Add GPIO pin 99 of EC for power C B B A A www.s-manuals.com ... 180P _04 02_50V8J 180P _04 02_50V8J 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 4.7U _06 03_6.3V6K... 0. 22U _04 02_10V4Z C632 C132 180P _04 02_50V8J 180P _04 02_50V8J C152 C 106 C 105 180P _04 02_50V8J 180P _04 02_50V8J C 109 100 0P _04 02_50V7K C1 10 C111 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z C115 C116 0. 01U _04 02_16V7K 0. 01U _04 02_16V7K... PC 103 EMI@ 100 P _06 03_50V8 PC 101 EMI@ 100 P _06 03_50V8 PC 102 EMI@ 100 0P _06 03_50V7K 2 ACES_ 502 99 -00 401 -00 1 7A_32V_S1 206 -H-7.0A 2 PL3 EMI@ HCB 201 2KF-121T 50_ 0 805 PC 104 EMI@ 100 0P _06 03_50V7K For ML1220