1 CPU CORE MAX8771 POWER VCORE 01 BQ2L BLOCK DIAGRAM PG 32 SYSTEM MAX8734AEEI+ PG 33 POWER(3/5V) SYSTEM POWER MAX8743 PG 36 (VCCP) CPU THERMAL SENSOR CPU Yonah/Merom GMT781 PG 31 A A 479 Pins (uPGA) SYSTEM POWER APL5331 PG 37 (+1.5V) 14.318MHz CPUCLK,CPUCLK# SYSTEM POWER MAX8632ETI+ (1.8VSUS/0.9V SMDDR_VREF) PG 4,5 PG 34 BATT CHARGER MAX8724 CLOCK GEN SBLINKCLK, SBLINKCLK# FSB 533M/667M MEM CLK BUF ICS9LPR600 56pins NBSRCCLK, NBSRCCLK# PG 35 ICS9P935 PG PG USB6 HTREFCLK BATTERY CONNECTOE PG35 OSC14M CRT port PG 18 Integraded VGA Function B LCD Panel DDRII USB4 SiS 307LV HDV I/F 533,667 MHz TV-OUT PG 16,17 DMI X4 PG 24 NBSRCCLK, NBSRCCLK# 32.768KHz PG 10 Mini PCIE / WLAN DDRII-SODIMM2 PG 6,7,8,9 PG 18 PCI-Express MII I/F SATA - HDD IDE - ODD PHY 10/100 PG 26 33MHZ, 3.3V PCI ATA 66/100/133 Azalia 588 BGA (27X27) USB PORT USB PORT USB PORT 24.576MHz USB 2.0 PG 30 PWRCLKN PWRCLKP PG 12,13,14,15 Bluetooth PG 29 CIR PG 29 USB PORT USB PORT C DIB_DATAN DIB_DATAP IEEE 1394 PG 20 CARDBUS R5C832 PG 30 PG 19,20 IN PG 21 PG 30 MDC Azalia 32.768KHz USB PORT RJ45PG 25 PG 25 PG 22 SiS 966L PG 26 Magnetics RTL8201CL SATA 150MB C B 801 BGA (31X31) DDRII PG 23 PG 21 DDRII-SODIMM1 533,667 MHz PG 16,17 LVDS X1 S-VIDEO New Card SiS M662MX R.G,B PG 30 LPC PG 29 AUDIO CODEC PG27 ALC262H PG 29 PC87541 AMP TQFP 176pins MAX9755 PG 31 PG 29 PG28 WIRE D FAN PG24 Touch PAD PG29 Key Board PG30 FLASH ROM RJ11 PG31 PG25 D LINE IN PG28 MIC PG 27 INT SPK PG28 QUANTA COMPUTER HP PG28 Title BLOCK DIAGRAM Size Document Number Custom Date: Friday, August 25, 2006 Rev 1A BQ2L MAIN BOARD Sheet of 38 02 Board Stack up Description PCB Layers Voltage Rails A A Layer Layer Layer Layer Layer Layer Layer Layer TOP(Component,Other) Voltage Rails Ground Plane VCC_CORE Core voltage for Processor VCCP Core voltage for CPU / NB SMDDR_VTERM 0.9V for DDR2 Termination voltage X X X RVCC1.5 RVCC3 X X VCC1.5 VCC2.5 VCC3 VCC5 X X X X 1.8VSUS 3VSUS 5VSUS X X X X X X 3VPCU 5VPCU 9VPCU X X X X X X IN1 ON S3 ON S4 ON S5 Control signal VR_ON 0.726V~0.94V VR_ON MAINON IN2 Power Plane X X X X RVCC_ON RVCCD IN3 Ground Plane BOTTOM Power On Sequencing Timing Diagram VID Tsft_star_vcc VR_ON Vboot Vid MAIND MAINON MAIND MAIND SUSON SUSD SUSD Tboot Vcc-core Tboot-vid-tr Tcpu_up CPU_UP B ON S0~S2 Vccp X X X X X X VL VL 5VPCU B Tvccp_up Vccp_UP Vccgmch Tgmch_pwrgd GMCHPWRGD ACIN CLK_ENABLE# POWER ON TIMING ACIN Tcpu_pwrgd IMVP4_PWRGD Voltage Rails ON S0~S1 ON S3 ON S4 ON S5 Control signal 5VPCU/3VPCU VCC_CORE Core voltage for Processor X VRON GMCH_VTT Core voltage for GMCH 1.05V X MAINON SMDDR_VTERM SMDDR_VREF 0.9V for DDR II Termination voltage 0.9V for DDR II Reference Voltage X X MAINON MAINON NBSWON# Dothan Power-up Timing Specifications PWRBTN# To ICH7 X GMCH_1.5V From 87541 Td S5_ON 1.8VSUS 1.8V for DDR II voltage MAINON X X SUSON To ICH7 RESET# +2.5V X 3VPCU 3VSUS +3V X X X X X X X VL SUSON MAINON MAINON 5VPCU 5VSUS +5V X X X X X X X VL SUSON MAINON X X X X RSMRST# From ICH7 SUSB#,SUSC# BCLK From 87541 SUSON Tc From 87541 MAINON Te From 87541 VSUS,VCC PWRGOOD From 87541 C C VR_ON Ta VCC Tb Tf VIN POWER SOURCE VCCP/1.05V VCORE_CPU Vcc,boot VID[5:0] CLK_EN# PCI DEVICE IDSEL# PCI7402 AD20 REQ# / GNT# Interrupts REQ2# / GNT2# PIRQ C/D To clock generator 99ms < t 214 PWROK To GMCH/other PCI device PLTRST#\PCIRST# VCCP From ICH7 to CPU H_PWRGD Ta=VCC and VCCP asseration to VID[5:0] vaild Tb=VID[5:0] stable to VCC vaild Tc=BCLK stable to PWRGOOD assertion Td=PWRGOOD to RESET# de-assertion time Te=Vcc,boot vaild to PWRGOOD assertion time 2ms Form GMCH to CPU H_CPURST# D D Title QUANTA COMPUTER FRONTPAGE Size Document Number Custom Date: Friday, August 25, 2006 Rev 1A BQ2L MAIN BOARD Sheet of 38 120 ohms@100Mhz +3VRUN C616 2 1 C609 1 C613 C615 1 22u/6.3V_8 C612 C619 C618 C617 CLK_VDD HB-1T2012-121JT C608 +1.05V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V +3VRUN 2 R267 *10K CLKGEN_VTTPWRGD VR_PWRGD_CK *0 R272 CLKGEN VDDREF VDDPCI VDDPCI VDDZ VDD48 VDDCPU VDDPCIEX VDDPCIEX 13 20 27 53 42 32 GNDREF GNDPCI GNDPCI GNDZ GND48 GNDCPU GNDPCIEX GNDPCIEX VTTPWRGD/PD#/(CLK_STOP#) CPUT_L0 CPUC_L0 CPUT_L1 CPUC_L1 55 54 52 51 R_HCLK_CPU R_HCLK_CPU# R_HCLK_MCH R_HCLK_MCH# PCIET_L0 PCIEC_L0 PCIET_L1 PCIEC_L1 PCIET_L2 PCIEC_L2 PCIET_L3 PCIEC_L3 PCIET_L4F PCIEC_L4F PCIET_L5F PCIEC_L5F 44 43 41 40 38 37 36 35 34 33 31 30 R_CLK_PCIE_DP0 R_CLK_PCIE_DN0 R_PCIE_ICH R_PCIE_ICH# R_PCIE_MINI R_PCIE_MINI# R_PCIE_NEW R_PCIE_NEW# R_PCIECLK307 R_PCIECLK307# R_PCIET_L5 R_PCIET_L5# SATACLKT_L SATACLKC_L 49 48 R_PCIE_SATA R_PCIE_SATA# ZCLK0 ZCLK1 Q24 PM_STPCPU# R276 STPCPU#_C 28 *(CPU_STOP#)/RESET# 13 PM_STPCPU# Q23 R273 14 19 23 24 56 39 29 *FSL0/REF0_2x **FSL1/REF1_2x *MMBT3904 L64 *MMBT3904 +3VRUN CLK_VDDA HB-1T2012-121JT 120 ohms@100Mhz C614 10u/10V_8 50 VDDA 1 R263 *10K C611 0.1u/10V 2 A R274 *10K C610 0.01u/16V CGDAT_SMB CGCLK_SMB 47 45 46 GNDA SDATA SCLK ZCLK0 ZCLK1 21 22 4 RP43 CLKGEN_FSL2 R282 CLKGEN_FS3 CLKGEN_FS4 R283 CLKGEN_STOP# R284 CLKGEN_MODE R285 CLKGEN_EQ0 R488 CLKGEN_EQ1 R287 CLKGEN_CLK7 R288 **FSL2/PCICLK0_2x **FS3/PCICLK1_2x **FS4/PCICLK2 *(PCI_STOP#)/PCICLK3 **MODE/PCICLK4 (PECLKREQ0#)/PCICLK5 (PECLKREQ1#)/PCICLK6 PCICLK7 **SEL24_48#/24_48MHz 26 SEL24M_48M 12MHz 25 USB_12M B R289 R290 CLKGEN_FSL0 CLKGEN_FSL1 10 11 12 15 16 17 18 RP33 4 R_HCLK_CPU R_HCLK_CPU# R_HCLK_MCH R_HCLK_MCH# U11 L65 +3VRUN R291 R_CLK_PCIE_DN0 R_CLK_PCIE_DP0 RP37 R_PCIE_ICH# R_PCIE_ICH RP38 R_PCIE_MINI# R_PCIE_MINI RP39 R_PCIE_NEW# R_PCIE_NEW RP40 R_PCIECLK307# R_PCIECLK307 RP41 R_PCIE_SATA# R_PCIE_SATA RP35 ZCLK0_NB ZCLK1_SB 22 22 0 REFCLK0_NB REFCLK1_SB 33x2 33 SB_PCI_CLK0 33x2 3 RP34 33x2 33x2 33x2 33x2 33x2 33x2 33x2 CLK_PCIE_DN0 CLK_PCIE_DP0 CLK_PCIE_ICH# 13 CLK_PCIE_ICH 13 CLK_PCIE_MINI# 24 CLK_PCIE_MINI 24 A CLK_PCIE_NEW_C# 21 CLK_PCIE_NEW_C 21 CLK_PCIE_307# 10 CLK_PCIE_307 10 CLK_PCIE_SATA# 14 CLK_PCIE_SATA 14 REFCLK0_NB REFCLK1_SB 13 SB_PCI_CLK0 12 PCLK_LPC_DEBUG 24 PCLK_R5C832 19 PCIE_CLKREQ# 24 NEW_CLKREQ# 21 PCLK_541 31 PCLK_541 USB_12M_SB 03 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# ZCLK0_NB ZCLK1_SB 12 33 PCLK_LPC_DEBUG *33 PCLK_R5C832 33 33 USB_12M_SB 14 B X2 Y3 SEL24_48M#: 1->24MHZ; 0->48MHZ RHU002N06 27p/50V C392 27p/50V 21 RP42 ICS9LPR600 * Internal Pull-Up ** Internal Pull-Down PCLK_541 C411 10P PCLK_R5C832 C410 10P C409 10P +3VRUN PCLK_LPC_DEBUG PCLK_SMB PCIET_L5# PCIET_L5 *33x2 PCICLK6: 1->Notebook; 0->Desktop +3VRUN Q42 R_PCIET_L5# R_PCIET_L5 PCICLK5: 1->Notebook; 0->Desktop C391 CGDAT_SMB 13,16,24 14.318MHZ XOUT CGDAT_SMB CLKGEN_MODE: 1->Mobil; 0->Desktop 2 PDAT_SMB