THÔNG TIN TÀI LIỆU
5 01 D C B A Block Diagram 61 02 System Setting 62 USB CONN 03 * 63 * 04 04_CPU-Merom(HOST) 64 ISA ROM 05 05_CPU-Merom(PWR) 65 SPI ROM 06 * 66 LED 07 07_CRESTLINE(HOST) 67 * 08 08_CRESTLINE(DMI & CFG) 68 DC & BAT IN 09 09_CRESTLINE(GRAPHIC) 69 * 10 10_CRESTLINE(DDR2) 70 Debug CONN 11 11_CRESTLINE(PWR) 71 * 12 12_CRESTLINE(PWR2) 72 SATA-HDD & ODD 13 13_CRESTLINE(GND) 73 eSATA 14 * 74 SREW HOLE 15 15_SB-ICH8M(1) 75 * 16 16_SB-ICH8M(2) 76 TPM 17 17_SB-ICH8M(3) 77 SPRING_PAD 18 18_SB-ICH8M(PWR) 78 BT 19 * 79 POWER SEQUENCE 20 20_DDR2 SO-DIMM0 80 POWER_VCORE GDDR2 16Mx16 x4 PAGE 33 PAGE 32 24 24_VGA_ATI_M7X/66-M_MAIN(1) 84 POWER_I/O_+3VAO & +2.5VS N/A 28 VGA_ATI_M7X/66-M_VRAM_A(5) 88 POWER_CHARGER 29 VGA_ATI_M7X/66-M_VRAM_B(6) 89 N/A 30 VGA_SPI_ROM (7) 90 POWER_DETECT * 91 POWER_LOAD SWITCH 32 CRT 92 POWER_FLOWCHART 33 LVDS & INVERTER CONNECTOR 93 POWER_PROTECT 34 * 94 POWER_SIGNAL 35 TV OUT CONN 95 History 36 * 37 THER SENSOR & FAN 38 * 39 CLOCK GEN-ICS9LPR363AGLF-T * 42 DISCHARGE 43 * 46 * 47 MINI CARD-TV/Windigo 48 MINI CARD-Robson MINI CARD-Kedron 51 CARD1394-R5C833(1) 52 CARD1394-R5C833(2) 53 in CARD READER ICH8M EC AUDIO AMP AZALIA CODEC PAGE 57 Realtek ALC660 ITE IT8511 PAGE 56 EXT MIC PAGE 59 PAGE 57 MDC PAGE 15,16,17,18 Internal KB Touch Pad PAGE 60 in Card Reader PAGE 53 INT MIC1 PAGE 45 PAGE 33 PAGE 60 B MINICARD Kedron Ricoh R5C833 MINICARD Robson PAGE 51,52 LAN Marvell 88E8055 eSATA JMB360 PAGE 47 PAGE 73 USB Port X5 PAGE 62 * 56 CODEC-ALC660 57 AUDIO AMP & JCAK 58 Sequence Control Logic Touch Pad & KB ISA ROM PAGE 64 PAGE 72 PAGE 44,45 NEWCARD IT8511TE PAGE 76 ODD MINICARD TV 54 59 SOUTH BRIDGE PAGE 48 55 60 TPM 1.2 INFINEON SLB9635 PAGE 52 LAN-L1 MDC & RJ45+11 * C PAGE 72 PAGE 49 45 49 SATA HDD PAGE 70 1394 44 50 Debug Conn POWER_VGA_CORE & +1.25VS 31 DDR2 PAGE 7,8,9,10,11,12,13 PAGE 35 POWER_I/O_DDR & VTT 87 PAGE 24,25,26,27,28,29,30 PAGE 20,21,22 83 VGA_ATI_M7X/66-M_POWER(4) DDR2 SO-DIMM1 HDMI * 27 PAGE 20 CRESTLINE PAGE 21 PAGE 35 23 N/A D DDR2 SO-DIMM0 TV-OUT POWER_I/O_1.5VS & 1.05VS 86 NORTH BRIDGE ATI M72m CRT POWER_SYSTEM 25_VGA_ATI_M7X/66-M_Memory(2) 85 THERMAL CONTROL LCD 81 26_VGA_ATI_M7X/66-M_PCI-E(3) PAGE 4,5 PAGE 37 82 26 PAGE 39 PAGE 28 22_DDR2 TERMINATION 25 F7Sr ICS9LPR363AGLF-T 34W 21_DDR2 SO-DIMM1 Power on & Reset Freq CLOCK GEN MEROM 21 40 CPU 22 41 * A NEWCARD Bluetooth PAGE 54 PAGE 78 Title : Block Diagram CMOS Camera ASUSTek Computer INC NB1 PAGE 33 Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet 1 of 95 Pin EC_IT8511TE SETTING Pin D C B A Pin Name Signal Name 32 PWM0/GPA0 / 33 PWM1/GPA1 FAN_PWM Type O Pin Name Signal Name Type Pin Pin Name Signal Name Type GPL0 PM_S4_STATE# I 152 GPI2 / IDSEL# REQ/GNT# Interrupts 11 GPL1 S4_STATE_ON O 155 GPI3 CHG_EN# O CARD READER AD17 A 12 GPL2 SLP_M_ON O 168 GPI5 EC_CLK_EN O 1394 AD17 B 20 GPL3 EC_WLAN_PWR O 85 NETDETECT O 21 GPL4 MP_PWRGD I 48 GPH0 VSUS_ON I LAN PE(T/R)(p/n)1 Robson PE(T/R)(p/n)4 KS016/GPM2 PCI Device PCIE Device Bus PCIE Device Bus 36 PWM2/GPA2 / 54 GPH1 VSUS_GD# O Kedron PE(T/R)(p/n)2 NEWCARD PE(T/R)(p/n)5 37 PWM3/GPA3 / 55 GPH2 CPUPWR_GD# O eSATA PE(T/R)(p/n)3 GLAN PE(T/R)(p/n)6 38 PWM4/GPA4 CHG_LED_UP# O 69 GPH3 PM_PWRBTN# O 39 PWM5/GPA5 PWR_LED_UP# O 70 GPH4 SUSC_ON O 40 PWM6/GPA6 / 75 GPH5 SUSB_ON O 43 PWM7/GPA7 LCD_BACKOFF# O 76 GPH6 CPU_VRON O 153 RXD/GPB0 NUM_LED O 105 GPH7 PM_RSMRST# O 154 TXD/GPB1 CAP_LED O 148 GPI0 ICH8_PWROK O 162 GPB2 SCRL_LED O 149 GPI1 ALL_SYSTEM_PWRGD I 163 SMCLK0/GPB3 SMB0_CLK I/0 164 SMDAT0GPB4 SMB0_DAT I/0 GA20/GPB5 A20GATE O Pin KBRST#/GPB6 RC_IN# O AG12 GPIO0/BM_BUSY# O AJ8 GPIO1/TACH1 F8 GPIO2/PIRQE# ICH8-M GPIO SETTING Pin Name SM-Bus Device SM-Bus Address Clock Generator 1101001x SO-DIMM 1010000x ( A0 ) SO-DIMM 1010001x ( A2 ) CPU Thermal Sensor(MAX6657) 0100110x ( 4C ) VGA Thermal Sensor(MAX6657) 0100110x ( 4C ) ( D2 ) ICS9LPR363AGLF-T SETTING Signal Name PM_BMBUSY# Type Pin Pin Name Signal Name Type Pins Pin Name Device I PCICLK1 TPMPCI USB_CON_OC23# I PCICLK2 CardBus R5C832 USB_CON_OC23# I SELPCIEX0_LCD#PCICLK3 EC IT8511E I AG16 GPIO40/OC#1 USB_CON_OC01# EXTSMI# I AG15 GPIO41/OC#2 PCI_INTE# I AE15 GPIO42/OC#3 165 GPB7 THRO_CPU 47 CLKOUT/GPC0 / 169 SMCLK1/GPC1 SMB1_CLK I/0 G11 GPIO3/PIRQF# PCI_INTF# I E18 GPIO50/REQ1# PCI_REQ#1 ITP_EN/PCICLK_F0 ICH8 170 SMDAT1/GPC2 SMB1_DAT I/0 F12 GPIO4/PIRQG# PCI_INTG# I C18 GPIO51/GNT1# PCI_GNT#1 15 DOTC_96MHzL X 171 GPC3 / B3 GPIO5/PIRQH# PCI_INTH# I B19 GPIO52/REQ2# PCI_REQ#2 14 DOTT_96MHzL X C 172 TMRI0/WUI2/GPC4 ACIN_OC# I AJ9 GPIO6/TACH2 BIOS_REC I/O F18 GPIO53/GNT2# PCI_GNT#2 12 FSLA/USB_48MHz ICH8 175 GPC5 OP_SD# O AH9 GPIO7/TACH3 WLAN_LED_EN I A11 GPIO54/REQ3# PCI_REQ#3 19 PCIeT_L1 eSATA 176 TMRI1/WUI3/GPC6 BAT_IN_OC# I AE16 GPIO8 BT_ON# I C10 GPIO55/GNT3# PCI_GNT#3 20 PCIeC_L1 eSATA CK32KOUT/GPC7 EC_IDE_RST# O AG19 GPIO9/WOL_EN LAN_WOL_EN I 36 PCIeT_L5 M66M 26 RI1#/WUI0/GPD0 SUSB# I AJ24 GPIO10/CLGPIO1 ME_ALERT# O 35 PCIeC_L5 M66M 29 RI2#/WUI1/GPD1 SUSC# I AG22 GPIO11/SMBALERT# SMB_ALERT# I 39 PCIeT_L6 MiniCard(Rob) 30 LPCRST#/WUI4//GPD2 BUF_PLT_RST# I AC19 GPIO12 KBC_SCI# I 38 PCIeC_L6 MiniCard(Rob) 31 ECSCI#/GPD3 EXT_SCI# O AH21 GPIO13/GLAN_DOCK# 22 PCIeT_L2 ICH8 41 GPD4 RF_ON_SW# I AF22 GPIO14/CLGPIO2 NETDETECT 23 PCIeC_L2 ICH8 42 GINT/GPD5 / AE20 GPIO15/STP_PCI# STP_PCI# I/O 24 PCIeT_L3 MCH 62 TACH0/GPD6 FAN0_TACH I AJ14 GPIO16/DPRSLPVR PM_DPRSLPVR O 25 PCIeC_L3 MCH 63 TACH1/GPD7 GAIN_AMP#_K O AG8 GPIO17/TACH0 WLAN_ON# O 26 SATACLKT_L ICH8 87 ADC4/GPE0 COLOREN# I AH12 GPIO18 TP_LEDON O 27 SATACLKC_L ICH8 88 ADC5/GPE1 INTERNET# I AJ10 GPIO19/SATA1GP PCB_ID0 I 44 CPUITPT_L2 / PCIeT_L8 LAN 89 ADC6/GPE2 MARATHON# I AE11 GPIO20 BTLED_ON O 43 CPUITPC_L2 / PCIeC_L8 LAN 27FIX/LCD_SSCGT/PCIeT_L0M72M B 90 ADC7/GPE3 DISTP# I AJ12 GPIO21/SATA0GP CPU_Select I 14 PWRSW/GPE4 PWR_SW# I AG10 GPIO22/SCLOCK 3G_ON# I 15 DOTC_96MHzL M72M 44 WUI5/GPE5 / E6 GPIO23/LDRQ1# LPC_DRQ#1 I/O 41 PEREQ1# / PCIeT_L7 MiniCard 24 LPCPD#/WUI6/GPE6 LID_EC# AJ27 GPIO24/CLGPIO0 40 PEREQ2# / PCIeC_L7 MiniCard 25 CLKRUN#/WUI7/GPE7 PM_SLP_M# AG18 GPIO25/STP_CPU# 32 PEREQ3# NewCard 110 PS2CLK0/GPF0 WALN_SW# AH27 GPIO26/S4_STATE# PM_S4_STATE# 33 PEREQ4# MiniCard 111 PS2DAT0/GPF1 ME_ALERT# AH25 GPIO27/QRT_STATE0 BT_DET# 30 PCIeT_L4 NewCard 114 PS2CLK1/GPF2 / I/0 AD16 GPIO28/QRT_STATE1 CB_SD# 31 PCIeC_L4 NewCard 115 PS2DAT1/GPF3 / I/0 AG17 GPIO29/OC#5 USB_CON_OC5# I 49 CPUT_L1F MCH 116 PS2CLK2/GPF4 TP_CLK AD12 GPIO30/OC#6 NEWCARD_OC# I 48 CPUC_L1F MCH I STP_CPU# I 117 PS2DAT2/GPF5 TP_DAT AJ18 GPIO31/OC#7 USB_OC#7 I 52 CPUT_L0 CPU 118 PS2CLK3/GPF6 / AH11 GPIO32/CLKRUN# PM_CLKRUN# O 51 CPUC_L0 CPU O 57 X2 14.318MHz 58 X1 14.318MHz 60 REF0 ICH8 61 REF1/FSLC/TEST_SEL X 119 PS2DAT3/GPF7 INSTANTON# AE10 GPIO33/AZ_DOCK_EN# 113 FA16/GPG0 FA16 AG14 GPIO34/AZ_DOCK_RST# 112 FA17/GPG1 FA17 AG13 GPIO35/SATACLKREQ# GPO35 104 FA18/GPG2 FA18 AF11 GPIO36/SATA2GP PCB_ID1 103 FA19/GPG3 FA19 AG11 GPIO37/SATA3GP PCB_ID2 FA20/GPG4 THRM_CPU# FA21/GPG5 / 27 LPC80HL/GPG6 PMTHERM# 28 LPC80HL/GPG7 AC_APR_UC# I I O I O AF9 GPIO38/SLOAD GPI38 I GPIO39/SDATAOUT0 GPI39 I AD10 GPIO48/SDATAOUT1 PCI_GNT#4 O GPIO49/CPUPWRGD H_PWRGD A I/O AJ11 AG29 D Title : GPIO setting ASUSTek Computer INC NB1 Size Date: Jerry Mou Project Name Rev F7Sr Custom O Engineer: , 1.1 10, 2007 Sheet of 95 D D C C B B A A Title : Blank Page ASUSTeK COMPUTER INC Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 D D 7 7 CPU0A H_A#[16:3] H_ADSTB#0 H_REQ#[4:0] H_A#[35:17] 15 15 15 15 15 15 15 J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 K3 H2 K2 J3 L1 REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 H_A20M# H_FERR# H_IGNNE# A6 A5 C4 C H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_STPCLK# H_INTR H_NMI H_SMI# T0407 TPC26T T0408 TPC26T B ADS# BNR# BPRI# DEFER# DRDY# DBSY# BR0# A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# A20M# FERR# IGNNE# D5 C6 B4 A3 STPCLK# LINT0 LINT1 SMI# M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 H1 E2 G5 H_ADS# H_BNR# H_BPRI# H5 F21 E1 H_DEFER# H_DRDY# H_DBSY# F1 H_BR0# H_INIT# 15 7 7 LOCK# H4 H_LOCK# RESET# RS[0]# RS[1]# RS[2]# TRDY# C1 F3 F4 G3 G2 H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# HIT# HITM# G6 E4 H_HIT# H_HITM# TPC26T XDP_BPM#1 THERMTRIP# 7 R0402 1KOhm 1% CPU_THERM_DA 37 CPU_THERM_DC 37 H_D#[31:16] D TPC26T TPC26T 7 Q0401 H2N7002 / PM_THRMTRIP# 8,15,60 A22 A21 R0403 1KOhm 1% R1.1_25 H_PROCHOT 11 S BCLK[0] BCLK[1] H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 +VCCP C7 H CLK H_DSTBN#0 H_DSTBP#0 H_DINV#0 AGTL+ I/O Voltage Reference +VCCP If not use,mount 56 Ohm If use ,mount 68 Ohm D21 A24 B25 7 T0401 CPU Debug Port H_PREQ# H_TCK H_TDI H_TDO H_TMS H_TRST# H_DBR# THERMAL PROCHOT# THRMDA THRMDC R0401 56Ohm H_IERR# D20 B3 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 +VCCP IERR# INIT# BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# CPU0B H_D#[15:0] G Zo 55/L 0.5inch/S 25mils R0404 1KOhm R0405 51.1Ohm T0402 TPC26T C0401 T0403 TPC26T T0405 TPC26T R0406 2KOhm 1% THRO_CPU 59 T0404 CLK_CPU_BCLK 39 CLK_CPU_BCLK# 39 GND GND GND T0406 H_DSTBN#1 H_DSTBP#1 H_DINV#1 39 39 39 0.1UF/10V / CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 BCLK GTL_REF / / FSB BSEL2BSEL1BSEL0 166 667 L H H 200 800 L H L E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24 D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# AD26 C23 D25 C24 AF26 AF1 A26 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 B22 B23 C21 BSEL[0] BSEL[1] BSEL[2] D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 COMP[0] COMP[1] COMP[2] COMP[3] R26 U26 AA1 Y1 H_COMP0 H_COMP1 H_COMP2 H_COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# E5 B5 D24 D6 D7 AE6 MISC H_D#[47:32] H_DSTBN#2 H_DSTBP#2 H_DINV#2 H_D#[63:48] C H_DSTBN#3 H_DSTBP#3 H_DINV#3 AGTL+ I/O Buffer Compensation H_DPRSTP# 8,15,80 H_DPSLP# 15 H_DPWR# H_PWRGD 15 H_CPUSLP# PM_PSI# 80 SOCKET478B B Default Strapping When Not Used +VCCP SOCKET478B XDP_BPM#1 H_PREQ# H_TDI H_TDO H_TMS R0409 R0410 R0411 R0412 R0413 / 1 / 2 2 54.9Ohm 54.9Ohm 150Ohm 54.9Ohm 39Ohm 1% 1% 1% 1% 5% H_DBR# R0414 / /1KOhm1% H_TCK H_TRST# R0417 R0418 / 27.4Ohm 1% 649Ohm 1% AGTL+ I/O Buffer Compensation R0407 1% 27.4Ohm H_COMP0 H_COMP1 R0415 1% 54.9Ohm R0408 1% 27.4Ohm H_COMP2 H_COMP3 R0416 1% 54.9Ohm +3VS GND GND GND GND GND A A Title : CPU-Merom(HOST) ASUSTeK COMPUTER INC NB1 Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 CPU0D A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 D +VCORE +VCORE CPU0C A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 CPU +VCORE Bulk-Decoupling Capacitors + CE0501 220UF/4V / GND C CPU +VCORE Mid-Frequency Capacitors C0501 10UF/6.3V / GND C0502 10UF/6.3V GND C0503 10UF/6.3V GND C0504 10UF/6.3V GND C0505 10UF/6.3V / GND Place these upper side inside socket cavity on L1 C0510 10UF/6.3V GND C0511 10UF/6.3V GND C0512 10UF/6.3V GND C0513 10UF/6.3V / GND C0514 10UF/6.3V GND Place these lower side inside socket cavity on L1 C0517 10UF/6.3V / B GND C0518 10UF/6.3V GND C0519 10UF/6.3V GND Place these upper side inside socket cavity on L8 C0520 10UF/6.3V GND C0521 10UF/6.3V / GND VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 VCCA1 VCCA2 B26 C26 VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] AD6 AF5 AE5 AF4 AE3 AF3 AE2 VCCSENSE AF7 VSSSENSE AE7 SOCKET478B C0522 10UF/6.3V / +VCCP C0506 0.1UF/10V GND + C0507 0.1UF/10V GND C0508 0.1UF/10V CE0502 100UF/2.5V GND C0509 0.1UF/10V +1.5VS GND H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 7 0OHM 0OHM 0OHM 0OHM 0OHM 0OHM 0OHM 0OHM 8 GND RN0501A RN0501B RN0501C RN0501D RN0502A RN0502B RN0502C RN0502D VR_VID0 VR_VID1 VR_VID2 VR_VID3 VR_VID4 VR_VID5 VR_VID6 R0503 100Ohm +VCORE R0504 100Ohm GND 80 80 80 80 80 80 80 C0515 0.01UF/16V GND C0516 10UF/6.3V GND VCCSENSE 80 VSSSENSE 80 GND Place these lower side inside socket cavity on L8 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 D C B SOCKET478B GND +VCORE Mid-Frequency Capacitor Intel: 22UF *32 F3S: 10UF *16 +VCCP Decoupling Capacitor Intel: 270UF *1, 0.1UF *6 F3S: 100UF *1, 0.1UF *4 GND A A Title : CPU_Merom(PWR) ASUSTeK COMPUTER INC NB1 Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 D D C C B B A A Title : Blank Page ASUSTeK COMPUTER INC Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 D D RCOMP NB0A For Calibrating the FSB I/O Buffer H_D#[63:0] H_RCOMP R0701 24.9Ohm 1% GND SCOMP For Slew Rate Compenssation on the FSB +VCCP +VCCP R0702 54.9Ohm 1% C R0703 54.9Ohm 1% H_SCOMP H_SCOMP# Voltage Swing For Providing a Reference Voltage to The FSB RCOMP circuits +VCCP R0704 221Ohm 1% H_SWING R0705 100Ohm 1% GND C0701 0.1UF/10V GND B 4 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 E2 G2 G7 M6 H7 H3 G4 F3 N8 H2 M10 N12 N9 H5 P13 K9 M2 W10 Y8 V4 M3 J1 N5 N3 W6 W9 N2 Y7 Y9 P4 W3 N1 AD12 AE3 AD9 AC9 AC7 AC14 AD11 AC11 AB2 AD7 AB1 Y3 AC6 AE2 AC5 AG3 AJ9 AH8 AJ14 AE9 AE11 AH12 AJ5 AH5 AJ6 AE7 AJ7 AJ2 AE5 AJ3 AH2 AH13 H_SWING H_RCOMP B3 C2 H_SWING H_RCOMP H_SCOMP H_SCOMP# W1 W2 H_SCOMP H_SCOMP# B6 E5 H_CPURST# H_CPUSLP# H_CPURST# H_CPUSLP# +VCCP H_AVREF H_DVREF B9 A9 H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 H_A#[35:3] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7 H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK 39 CLK_MCH_BCLK# 39 H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 K5 L2 AD13 AE13 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 M7 K3 AD2 AH11 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 4 4 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 L7 K2 AC2 AJ10 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#[4:0] 4 4 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 M14 E13 A11 H13 B12 H_RS#_0 H_RS#_1 H_RS#_2 E12 D7 D8 C H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2 4 4 B 4 H_AVREF H_DVREF CRESTLINE_965PM R0706 1KOhm 1% A A R0708 2KOhm 1% C0702 0.1UF/10V GND Title : NB-965PM(HOST) GND ASUSTeK COMPUTER INC NB1 Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 NB0B GMCH Strapping CFG5 : DMI Strap CFG19 : DMI Lane Reversal = DMI x2 CFG[13:12] : GMCH Test Mode = Normal Operation (D) = DMI x4 (D) = Lanes Reversed T0803 TPC26T MCH_CFG_5 MCH_CFG_19 R0802 00= Partial CLK Gating Disable 01 = XOR Mode Enable +3VS 10 = All Z Mode Enable 11 = Normal Operation (D) D 4.02KOHM / MCH_CFG_12 CFG8 : Low Power PCI-E CFG20 : Concurrent SDVO / PCIe = Normal mode P36 P37 R35 N35 AR12 AR13 AM12 AN13 J12 AR37 AM36 AL36 AM37 D20 C0807 T0805 TPC26T 0.1UF/10V = Only one is operational (D) = Low Power Mode (D) MCH_CFG_8 = operate simultaneous T0804 TPC26T MCH_CFG_20 R0808 MCH_CFG_13 +3VS GND T0806 TPC26T 4.02KOHM / CFG9 : PCIE Graphic Lane SDVO_CTRL_DATA : SDVO Present = Reverse Lane MCH_CFG_9 R1.1_3 C 20,22 21,22 = No SDVO (D) = Normal Operation (D) R0809 M_A_A14 M_B_A14 M_A_A14 M_B_A14 = SDVO Present SDVO_CTRL_DATA 4.02KOHM / GND GND CFG16 : FSB Dynamic ODT H10 B51 BJ20 BK22 BF19 BH20 BK18 BJ18 BF23 BG23 BC23 BD24 BJ29 BE24 BH39 AW20 BK20 C48 D47 B44 C44 A35 B37 B36 B34 C34 = Dynamic ODT Disable = Dynamic ODT Enable (D) MCH_CFG_16 R0811 4.02KOHM / BCLK FSB 166 667 L H H 200 800 L H L GND 39 39 39 MCH_BSEL0 MCH_BSEL1 MCH_BSEL2 MCH_CFG_8 MCH_CFG_9 +1.25VM MCH_CFG_12 MCH_CFG_13 MCH_CFG_16 PM_EXTTS#_0 PM_EXTTS#_1 20 PM_EXTTS#_0 21 PM_EXTTS#_1 MCH_CLVREF MCH_CFG_19 MCH_CFG_20 B R0818 392Ohm 1% GND C0801 0.1UF/10V T0801 17 PM_BMBUSY# 4,15,80 H_DPRSTP# +3VS GND R0817 G41 L39 L36 J36 AW49 100Ohm RST_IN_MCH# AV20 N20 G36 10KOhm 10KOhm 1r0402 FROM PAGE 83 +1.8V +1.8V 0.9V_VTT_REF R0822 1KOhm 1% / R0821 1KOhm 1% R0820 0Ohm SM_RCOMP_VOH M_VREF_MCH 20,21 C0802 1UF/10V R0823 3.01KOHM 1% A GND R0826 1KOhm 1% / GND P27 N27 N24 C21 C23 F23 N23 G23 J20 C20 R24 L23 J23 E23 E20 K23 M20 M24 L32 N33 L35 CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20 C0803 0.01UF/16V GND SM_RCOMP_VOL PM_EXTTS#_0 PM_EXTTS#_1 BJ51 BK51 BK50 BL50 BL49 BL3 BL2 BK1 BJ1 E1 A5 C51 B50 A50 A49 BK2 SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4 AV29 BB23 BA25 AV23 M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3 SM_CK#_0 SM_CK#_1 SM_CK#_3 SM_CK#_4 AW30 BA23 AW25 AW23 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4 BE29 AY32 BD39 BG37 M_CKE0 M_CKE1 M_CKE2 M_CKE3 20,22 20,22 21,22 21,22 SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3 BG20 BK16 BG16 BE13 M_CS#0 M_CS#1 M_CS#2 M_CS#3 20,22 20,22 21,22 21,22 SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3 BH18 BJ15 BJ14 BE16 M_ODT0 M_ODT1 M_ODT2 M_ODT3 20,22 20,22 21,22 21,22 SM_RCOMP SM_RCOMP# BL15 BK14 R0803 R0804 SM_RCOMP_VOH SM_RCOMP_VOL BK31 BL31 SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF_0 SM_VREF_1 AR49 AW4 M_VREF_MCH DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# B42 C42 H48 H47 PEG_CLK PEG_CLK# K44 K45 20 20 21 21 D +1.8V 1% 1% R1.1_2 GND For Calero For Crestline 20 Ohm 80.6 Ohm GND CLK_MCH_3GPLL 39 CLK_MCH_3GPLL# 39 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 AN47 AJ38 AN42 AN46 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 AM47 AJ39 AN41 AN45 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 AJ46 AJ41 AM40 AM44 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 AJ47 AJ42 AM39 AM43 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 C DMI_TXN[3:0] 16 DMI_TXP[0 3] 16 DMI_RXN[0 3] 16 DMI_RXP[0 3] 16 GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VR_EN PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 E35 A39 C38 B39 E36 AM49 AK50 AT43 AN49 AM50 SDVO_CTRL_CLK SDVO_CTRL_DATA CLK_REQ# ICH_SYNC# H35 K36 G39 G40 TEST_1 TEST_2 A37 R32 CL_CLK0 17 CL_DATA0 17 MP_PWRGD 17,59 CL_RST#0 17 MCH_CLVREF INT PD T0802 TPC26T SDVO_CTRL_DATA CLK_MCH_OE# R0813 10KOhm MCH_ICH_SYNC# R0825 +3VS INT PD 17 22kOhm A CRESTLINE_965PM C0804 0.1UF/10V GND R0827 1KOhm 1% C0805 1UF/10V C0806 0.01UF/16V Title : GND GND GND ASUSTeK COMPUTER INC NB1 GND Size Date: Engineer: NB-965PM(DMI & CFG) Jerry Mou Project Name Rev F7Sr Custom 20Ohm 20Ohm 2 20 20 21 21 B TPC26T R0815 R0816 59,60,80,93 CPU_PWRGD 16,17,26,44,48,49,54,59,66,72,73,76 BUF_PLT_RST# 4,15,60 PM_THRMTRIP# 17,80 PM_DPRSLPVR RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 SA_MA_14 SB_MA_14 RSVD34 RSVD35 RSVD36 LVDSA_DATA#_3 LVDSA_DATA_3 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45 BSEL2 BSEL1 BSEL0 MCH_CFG_5 R0812 1KOhm 1% RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 , 1.1 10, 2007 Sheet of 95 +VCCP NB0C D J40 H39 E39 E40 C37 D35 K40 L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN L41 L43 N41 N40 D46 C45 D44 E42 LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK G51 E51 F49 LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 G50 E50 F48 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 G44 B47 B45 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 E44 A47 A45 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 R0901 24.9Ohm 1% C E27 G27 K27 TVA_DAC TVB_DAC TVC_DAC F27 J27 L27 TVA_RTN TVB_RTN TVC_RTN M35 P33 H32 G32 K29 J29 F29 E29 K33 G35 F33 C32 E33 B GND TV_DCONSEL_0 TV_DCONSEL_1 CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED# CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC GND PEG_COMP PEG_COMPI PEG_COMPO N43 M43 PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41 PCIENB_RXN0 PCIENB_RXN1 PCIENB_RXN2 PCIENB_RXN3 PCIENB_RXN4 PCIENB_RXN5 PCIENB_RXN6 PCIENB_RXN7 PCIENB_RXN8 PCIENB_RXN9 PCIENB_RXN10 PCIENB_RXN11 PCIENB_RXN12 PCIENB_RXN13 PCIENB_RXN14 PCIENB_RXN15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42 PCIENB_RXP0 PCIENB_RXP1 PCIENB_RXP2 PCIENB_RXP3 PCIENB_RXP4 PCIENB_RXP5 PCIENB_RXP6 PCIENB_RXP7 PCIENB_RXP8 PCIENB_RXP9 PCIENB_RXP10 PCIENB_RXP11 PCIENB_RXP12 PCIENB_RXP13 PCIENB_RXP14 PCIENB_RXP15 PCIENB_RXN[0 15] 26 PCIENB_RXP[0 15] 26 D C PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39 AC46 AC49 AC42 AH39 AE49 AH44 PCIENB_TXN0 PCIENB_TXN1 PCIENB_TXN2 PCIENB_TXN3 PCIENB_TXN4 PCIENB_TXN5 PCIENB_TXN6 PCIENB_TXN7 PCIENB_TXN8 PCIENB_TXN9 PCIENB_TXN10 PCIENB_TXN11 PCIENB_TXN12 PCIENB_TXN13 PCIENB_TXN14 PCIENB_TXN15 PCIENB_TXP15 PCIENB_TXP14 PCIENB_TXP13 PCIENB_TXP12 PCIENB_TXP11 PCIENB_TXP10 PCIENB_TXP9 PCIENB_TXP8 PCIENB_TXP7 PCIENB_TXP6 PCIENB_TXP5 PCIENB_TXP4 PCIENB_TXP3 PCIENB_TXP2 PCIENB_TXP1 PCIENB_TXP0 C0901 C0903 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15 M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38 AD47 AC50 AD43 AG39 AE50 AH43 PCIENB_TXP0 PCIENB_TXP1 PCIENB_TXP2 PCIENB_TXP3 PCIENB_TXP4 PCIENB_TXP5 PCIENB_TXP6 PCIENB_TXP7 PCIENB_TXP8 PCIENB_TXP9 PCIENB_TXP10 PCIENB_TXP11 PCIENB_TXP12 PCIENB_TXP13 PCIENB_TXP14 PCIENB_TXP15 PCIENB_TXN15 PCIENB_TXN14 PCIENB_TXN13 PCIENB_TXN12 PCIENB_TXN11 PCIENB_TXN10 PCIENB_TXN9 PCIENB_TXN8 PCIENB_TXN7 PCIENB_TXN6 PCIENB_TXN5 PCIENB_TXN4 PCIENB_TXN3 PCIENB_TXN2 PCIENB_TXN1 PCIENB_TXN0 C0917 C0905 C0907 C0909 C0911 C0913 C0915 1 C0919 C0921 C0923 C0925 C0927 C0929 C0931 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V C0902 C0904 C0906 C0908 C0910 C0912 C0914 C0916 C0918 C0920 C0922 C0924 C0926 C0928 C0930 C0932 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V PCIEG_RXP15 PCIEG_RXP14 PCIEG_RXP13 PCIEG_RXP12 PCIEG_RXP11 PCIEG_RXP10 PCIEG_RXP9 PCIEG_RXP8 PCIEG_RXP7 PCIEG_RXP6 PCIEG_RXP5 PCIEG_RXP4 PCIEG_RXP3 PCIEG_RXP2 PCIEG_RXP1 PCIEG_RXP0 PCIEG_RXN15 PCIEG_RXN14 PCIEG_RXN13 PCIEG_RXN12 PCIEG_RXN11 PCIEG_RXN10 PCIEG_RXN9 PCIEG_RXN8 PCIEG_RXN7 PCIEG_RXN6 PCIEG_RXN5 PCIEG_RXN4 PCIEG_RXN3 PCIEG_RXN2 PCIEG_RXN1 PCIEG_RXN0 PCIEG_RXN[0 15] 26 PCIEG_RXP[0 15] 26 B CRESTLINE_965PM A A Title : ASUSTeK COMPUTER INC NB1 Size NB_965PM(GRAPHIC) Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet of 95 D D NB0D 20 M_A_DQ[63:0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 C B AR43 AW44 BA45 AY46 AR41 AR45 AT42 AW47 BB45 BF48 BG47 BJ45 BB47 BG50 BH49 BE45 AW43 BE44 BG42 BE40 BF44 BH45 BG40 BF40 AR40 AW40 AT39 AW36 AW41 AY41 AV38 AT38 AV13 AT13 AW11 AV11 AU15 AT11 BA13 BA11 BE10 BD10 BD8 AY9 BG10 AW9 BD7 BB9 BB5 AY7 AT5 AT7 AY6 BB7 AR5 AR8 AR9 AN3 AM8 AN10 AT9 AN9 AM9 AN11 SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SA_BS_0 SA_BS_1 SA_BS_2 BB19 BK19 BF29 M_A_BS0 20,22 M_A_BS1 20,22 M_A_BS2 20,22 SA_CAS# BL17 SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 AT45 BD44 BD42 AW38 AW13 BG8 AY5 AN6 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_CAS# 20,22 M_A_DM[7:0] 20 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 21 M_B_DQ[63:0] M_A_DQS[7:0] 20 M_A_DQS#[7:0] 20 M_A_A[13:0] 20,22 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16 SA_RAS# SA_RCVEN# BE18 AY20 M_A_RAS# 20,22 SA_WE# BA19 M_A_WE# 20,22 CRESTLINE_965PM NB0E M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 AP49 AR51 AW50 AW51 AN51 AN50 AV50 AV49 BA50 BB50 BA49 BE50 BA51 AY49 BF50 BF49 BJ50 BJ44 BJ43 BL43 BK47 BK49 BK43 BK42 BJ41 BL41 BJ37 BJ36 BK41 BJ40 BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12 BJ10 BL9 BK5 BL5 BK9 BK10 BJ8 BJ6 BF4 BH5 BG1 BC2 BK3 BE4 BD3 BJ2 BA3 BB3 AR1 AT3 AY2 AY3 AU2 AT2 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_BS_0 SB_BS_1 SB_BS_2 AY17 BG18 BG36 M_B_BS0 21,22 M_B_BS1 21,22 M_B_BS2 21,22 SB_CAS# BE17 SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 SB_RAS# SB_RCVEN# AV16 AY18 M_B_RAS# 21,22 SB_WE# BC17 M_B_WE# 21,22 M_B_CAS# 21,22 M_B_DM[7:0] 21 M_B_DQS[7:0] 21 M_B_DQS#[7:0] 21 C M_B_A[13:0] 21,22 B CRESTLINE_965PM A A Title : NB-965PM(DDR2) ASUSTeK COMPUTER INC NB1 Size Jerry Mou Project Name Rev F7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet 10 of 95 AC_BAT_SYS C8109 1UF/25V MLCC/+80%-20% C8110 6800PF/50V MLCC/+/-10% D 82,83,84,85,91,93,94 R8134 49.9KOhm 1% SUSB#_PWR T8127 TPC28T AC_BAT_SYS R8118 0Ohm r0805_h24 Q8100 SI4800BDY R8123 330Ohm 1% +5VAO D R8126 0Ohm C8118 1500PF/50V MLCC/+/-10% R8117 0Ohm r0402 AC_BAT_SYS @ R8131 10KOhm 1% R8122 0Ohm r0402 R8119 1.8KOhm 1% C8116 1 ENBL 59,93 SUS_PWRGD 2 0.01UF/50V R8132 0Ohm r0402 @ C C8112 0.1UF/50V MLCC/+/-10% 4700PF/50V T8121 TPC28T T8128 TPC28T L8100 3.8UH 1 C8107 3300PF/50V MLCC/+/-10% C8104 R8136 2.7KOhm 1% 10 11 12 13 14 15 INV1 VBST1 COMP1 OUT1_U SSTRT1 LL1 SKIP# OUT1_D VO1_VDDQ OUTGND1 DDR# TRIP1 GND VIN REF_X TRIP2 ENBL1 VREG5 ENBL2 REG5_IN VO2 OUTGND2 PGOOD OUT2_D SSTRT2 LL2 COMP2 OUT2_U INV2 VBST2 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1 R8135 R8125 R8129 0Ohm Q8103 SI4800BDY C8101 4.7UF/6.3V MLCC/+/-20% C8106 270PF/50V MLCC/+/-10% R8124 30.1KOhm 1% C8114 0.1UF/50V MLCC/+/-10% F=450KHz R8107 330Ohm 1% + AC_BAT_SYS +5VAO TPS51020 R8128 10KOhm 1% + +5VO Vref=0.85V D8100 FS1J4TP Q8101 SI4800BDY 2 17.4KOhm 1% @ 17.4KOhm 1% @ +5VAO (6A) Irat=6A U8101 +5VO TPC28T T8122 C8103 270PF/50V MLCC/+/-10% C TPC28T T8102 070504 +3VO L8101 3.8UH 070504 Irat=6A Q8102 SI4800BDY 070504 JP8103 (6A) 1 +3VSUS 3MM_OPEN_5MIL @ D8102 FS1J4TP + (3.9A) + C8108 6800PF/50V MLCC/+/-10% +3VAO TPC28T T8123 +5VAO B U8102 VIN GND +3VO VOUT FB SD# Vref=1.215V +3VAO R8121 174KOhm R8130 1% 100KOhm r0402 1% TPC28TTPC28TTPC28TTPC28T T8104 T8108 T8116 T8113 TPC28TTPC28TTPC28T T8111 T8126 T8124 T8125 TPC28T TPC28T T8120 41,59,60,68,93 AC_BAT_SYS VSUS_ON TPC28T T8118 A D8101 RB751V-40 FORCE_OFF# IN OUT GND EN NC or ADJ +5VAO R8114 845KOhm 1% 2 54,59,94 VSUS_ON ENBL TPC28T T8105 +3VAO +5VSUS 2 (0.02A) TPC28T T8115 JP8101 1 +3VA 2 1MM_OPEN_5MIL @ Q8105B UM6K1N A Q8105A UM6K1N MIC5235YM5 FB=1.24V ENBL R8116 100KOhm r0402 C8111 1UF/25V MLCC/+80%-20% TPC28T T8106 JP8100 1MM_OPEN_5MIL @ +12VSUS Imax=100mA U8100 TPC28TTPC28TTPC28T T8112 T8119 T8101 C8120 4.7UF/6.3V MLCC/+/-10% +5VO +12VSUS C8117 0.1UF/25V MLCC/+80%-20% B +5VO SI9183DT C8119 1UF/16V MLCC/+80%-20% TPC28TTPC28TTPC28T T8117 T8107 T8109 TPC28TTPC28TTPC28TTPC28T T8110 T8103 T8114 T8100 +3VSUS R8104 95.3KOhm 1% Title : SYSTEM ASUSTeK COMPUTER INC NB Size Project Name Custom Date: Engineer: Ehong_Ping Rev F7SR , 1.1 Sheet 10, 2007 81 of 95 AC_BAT_SYS +5VO +1.05VO Q8201 D1_1 G1 D1_2 S1/D2_3 D G2 S1/D2_2 S2 S1/D2_1 R8201 4.7Ohm D8201 RB717F R8202 10Ohm R8203 0Ohm (4A) JP8202 1 L8201 2 3MM_OPEN_5MIL @ C8207 0.1UF/25V MLCC/+/-10% 3.3UH + R8207 0Ohm 1 R8208 6.65KOhm 1% 0.01UF/50V R8205 @ 2KOhm C8208 MLCC/+/-10% C R8210 9.76KOhm 1% 1% 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC LGATE2 PGND2 PHASE2 UGATE2 BOOT2 ISEN2 EN2 VOUT2 VSEN2 OCSET2 SOFT2 PG2/REF PG1 L8200 1 10 11 12 13 14 + R8206 D8202 FS1J4TP 2.61KOhm ISL6227CAZ_T C8209 VREF = 0.9V 0.1UF/25V MLCC/+/-10% R8213 C8212 18.7KOhm 1% D (8A) +1.05VM 1MM_OPEN_5MIL Q8203 SI4894DY +VCCP 2 3MM_OPEN_5MIL @ JP8201 TPC28T T8201 1.8UH GND LGATE1 PGND1 PHASE1 UGATE1 BOOT1 ISEN1 EN1 VOUT1 VSEN1 OCSET1 SOFT1 DDR VIN 3MM_OPEN_5MIL @ JP8205 1 2 C8205 4.7UF/6.3V MLCC/+/-20% TPC28T T8202 U8200 +1.5VS @ C8203 0.1UF/50V MLCC/+/-10% SI4914DY +1.5VO JP8204 Q8202 SI4800BDY @ (0.54A) + @ R8209 0Ohm @ C 0.01UF/50V MLCC/+/-10% R8216 0Ohm 070502 93 1.05V_1.5V_PWRGD 81,83,84,85,91,93,94 SUSB#_PWR D8203 1SS355 @ R8219 120KOhm R8215 110KOhm 1% TPC28T T8203 C8213 0.1UF/50V MLCC/+/-10% R8224 TPC28T T8206 TPC28T T8207 TPC28T T8208 TPC28T T8209 TPC28T T8210 +1.5VO TPC28T T8215 SUSB#_PWR TPC28T T8205 +1.05VO B 81,83,84,85,91,93,94 TPC28T T8204 TPC28T T8216 TPC28T T8217 TPC28T T8218 TPC28T T8211 TPC28T T8212 TPC28T T8213 TPC28T T8214 TPC28T T8222 TPC28T T8223 TPC28T T8224 TPC28T T8225 +1.5VS TPC28T T8219 TPC28T T8200 TPC28T T8220 TPC28T T8221 0Ohm B +1.05VM D8200 1SS355 @ 85,91,94 SLP_M#_PWR R8220 0Ohm @ R8200 100KOhm TPC28T T8226 C8215 0.1UF/50V MLCC/+/-10% TPC28T T8227 TPC28T T8228 TPC28T T8229 TPC28T T8230 TPC28T T8231 TPC28T T8232 TPC28T T8233 +VCCP A A Title : POWER_I/O_1.5VS & 1.05VS Engineer: Size Project Name Date: Rev F7SR Custom , 1.1 Sheet 10, 2007 82 of 95 +5VO R8315 10Ohm D R8313 0Ohm 81,82,84,85,91,93,94 SUSB#_PWR R8305 0Ohm @ D AC_BAT_SYS @ D8301 1SS355 S4_STATE#_PWR Q8300 IRF7413ZPBF 1 JP8302 R8302 100KOhm 1% C8302 0.047UF/50V MLCC/+/-10% R8304 0Ohm @ +1.8VO R8308 0Ohm @ R8311 270KOhm 1% For foldback current limit R8307 100KOhm 1% D8302 RB751V-40 R8309 0Ohm C +1.8VO REF=2V C8311 0.22UF/10V MLCC/+/-10% R8306 0Ohm R8301 0Ohm 1 TON OVP/UVP REF U8300 ILIM MAX8632ETI POK1 POK2 STBY# DL BST LX DH VIN OUT FB 21 20 19 18 17 16 15 TPC28T T8324 C8301 0.1UF/50V MLCC/+/-10% 2 3MM_OPEN_5MIL @ JP8301 1 2 (18A==>VRAM*8) 3MM_OPEN_5MIL @ L8300 1UH Irat=18A + D8303 FS1J4TP +1.8V (9.5A) C + Q8301 IRF7832ZPBF C8314 1UF/25V MLCC/+80%-20% F=300KHz 93 DDR_PWRGD 0.9V_VTT_REF 2 SUSB#_PWR FB=0.7V C8312 0.1UF/25V MLCC/+/-10% 1 R8300 68KOhm 1% Q8302 IRF7832ZPBF @ D8300 1SS355 R8317 0Ohm 81,82,84,85,91,93,94 R8314 10Ohm TPC28T R8316 0Ohm @ 94 S4_STATE#_PWR T8315 +-18mA R8310 10KOhm 1% @ C8309 0.033UF/16V MLCC/+/-10% R8303 15.8KOhm 1% @ C8310 4700PF/50V @ MLCC/+/-10% (80mil) B (80mil) +0.9VO B JP8300 +0.9V 1 2 1MM_OPEN_5MIL @ JP8304 +0.9VS (1A) 1 C8307 0.1UF/25V MLCC/+/-10% C8306 10UF/6.3V MLCC/+/-10% C8304 10UF/6.3V MLCC/+/-10% C8303 10UF/6.3V MLCC/+/-10% C8316 10UF/6.3V MLCC/+/-10% TPC28T T8301 1MM_OPEN_5MIL @ TPC28T T8302 +0.9VO TPC28T T8303 TPC28T T8304 +0.9VS TPC28T T8313 TPC28T T8314 TPC28T T8305 TPC28T T8306 TPC28T T8307 TPC28T T8308 +0.9V TPC28T T8325 TPC28T T8316 TPC28T T8309 TPC28T T8310 TPC28T T8311 TPC28T T8312 TPC28T T8320 TPC28T T8321 TPC28T T8322 TPC28T T8323 +1.8VO TPC28T T8317 TPC28T T8300 TPC28T T8318 TPC28T T8319 +1.8V A A Title : POWER_I/O_DDR & VTT ASUSTeK COMPUTER INC NB Size Project Name Custom Date: Engineer: Rev F7SR , 10, 2007 1.1 Sheet 83 of 95 +5VO +2.5VS +3VO 1 2 R8410 100KOhm r0402 @ +5VAO 81,82,83,85,91,93,94 (1.4A) 2 TPC28T @ T8408 VIN PGND VFB AGND VOUT0 VCCA VOUT1 REFEN D JP8401 +2.5VS R8412 47KOhm @ 1 CM8562GISTR @ 1MM_OPEN_5MIL @ + TPC28T @ T8409 Q8406B UM6K1N @ D8400 1SS355 @ SUSB#_PWR R8405 20KOhm TPC28T 1% @ T8400 @ U8400 3MM_OPEN_5MIL @ +12VSUS +2.5VREF TPC28T TPC28T @ T8403 @ T8404 Q8408 SI2304BDS @ JP8400 D @ @ +2.5VO @ Q8406A UM6K1N @ R8411 10KOhm @ C8407 0.1UF/25V MLCC/+/-10% @ @ C8408 0.1UF/25V MLCC/+/-10% @ C C +3VM TPC28T T8402 (0.5A) JP8402 +3VM C8402 10UF/10V 2 +3VS 2MM_OPEN_5MIL @ GND +5VO B +1.1VS B R8413 20KOhm 1% U8401 +1.5VO R8408 100KOhm r0402 +5VAO 81,82,83,85,91,93,94 SUSB#_PWR D8401 1SS355 @ R8409 10KOhm A TPC28T T8410 R8407 +12VSUS JP8403 47KOhm 1% +2.5VREF TPC28T TPC28T T8413 T8414 Q8410 SI2304BDS +1.1VS 1 2 (1.1A) VIN PGND VFB AGND VOUT0 VCCA VOUT1 REFEN TPC28T T8412 CM8562GISTR 3MM_OPEN_5MIL @ R8414 16KOhm 1% + TPC28T T8411 Q8409B UM6K1N +1.1VO Q8409A UM6K1N C8410 0.1UF/25V MLCC/+/-10% C8409 0.1UF/25V MLCC/+/-10% A Title :POWER_I/O_+3VM & +2.5VS Engineer: Size Project Name Rev F7SR Custom Date: , 1.1 10, 2007 Sheet 84 of 95 TPC28T T8501 +5VO TPC28T T8502 R8501 100KOhm_0402 @ R8500 100KOhm_0402 24,27,93 PWR_OK_VGA D Q8501 H2N7002 D 11 S C G Q8502 PMBS3904 D B E AC_BAT_SYS @ Q8509 SI4392DY + Q8510 SI4392DY @ C8502 0.1UF/25V MLCC/+/-10% + +VGA_VCORE_O (1.1V/15A) R8505 R8506 10Ohm 0Ohm TPC28T T8503 +VGA_VCORE L8500 1 10 11 12 13 14 +3VO R8511 100KOhm r0402 R8508 R8509 100KOhm r0402 R8510 0Ohm @ 110KOhm 1% 8743_REF C D8502 1SS355 OUT1 FB1 ILIM1 V+ TON SKIP# PGOOD OVP UVP REF ON1 ON2 ILIM2 FB2 R8515 0Ohm 81,82,83,84,91,93,94 SUSB#_PWR Q8505B UM6K1N Q8505A UM6K1N C8503 0.1UF/50V MLCC/+/-10% CS1 LX1 DH1 BST1 DL1 GND VCC VDD DL2 BST2 DH2 LX2 CS2 OUT2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R8507 R8518 49.9KOhm 1% TON F1 345K +3VO R8529 0Ohm R8512 255K Q8500B UM6K1N Q8500A UM6K1N 24 Q8508 SI2302ADS @ 11 GPU_VID_1# G D 070502 S1/D2_3 D1_2 S1/D2_2 G2 S2 S1/D2_1 C8516 1UF/25V +1.25VO TPC28T T8504 0Ohm C8512 1000PF/50V MLCC/+/-10% JP8505 2.8UH 2 + +1.25VM 1MM_OPEN_5MIL JP8506 @ JP85 C8514 1UF/6.3V SHORT_PIN 1 R8526 10KOhm 1% (0.75A) +1.25VS 3MM_OPEN_5MIL @ (4.0A) JP8507 S 8743_GND SHORT_PIN 8743_GND R8532 100KOhm r0402 C8515 0.033UF/16V MLCC/+/-10% 82,91,94 SLP_M#_PWR + 2.49KOhm R8527 82KOhm 1% B 355K AC_BAT_SYS D1_1 G1 R8523 Vref=1V R8528 0Ohm @ 0Ohm L8501 C8513 0.22UF/10V MLCC/+/-10% @ R8524 30KOhm @ 1% R8522 100KOhm r0402 D8503 1SS355 3MM_OPEN_5MIL @ C8506 0.1UF/50V MLCC/+/-10% Q8506 SI4914DY 8743_GND R8521 100KOhm r0402 SUSB#_PWR F2 485K 3MM_OPEN_5MIL @ JP8504 1 2 D8500 EC31QS04 S D8501 RB717F FLOAT REF 4G S 3MM_OPEN_5MIL @ JP8503 1 2 + D 4G C 81,82,83,84,91,93,94 D 0Ohm R8520 +5VAO + U8500 MAX8743EEI C8511 0.1UF/25V MLCC/+/-10% @ 0.56UH Vref=1V +3VO +5VAO JP8502 B M66 GPU_VID_0# GPU_VID_1# +3VO R8530 120KOhm 1% R8525 100KOhm r0402 +VGA_VCORE_O +VGA_VCORE_O NC 1.2V L NC 1.1V H NC 0.95V H NC 0.95V UNMOUNT PR8532,PR8524,PQ8508 R8533 249KOhm 1% M72 GPU_VID_0# GPU_VID_1# L R8530 -> 40.2K R8530 -> 24.3K Q8507A UM6K1N 24 070502 GPU_VID_0# R8531 100KOhm r0402 TPC28T T8512 Q8507B UM6K1N TPC28T T8513 TPC28T T8514 TPC28T T8515 TPC28T T8505 TPC28T T8506 TPC28T T8507 TPC28T T8508 +VGA_VCORE_O 8743_GND TPC28T T8509 TPC28T T8510 +1.25VO TPC28T T8500 TPC28T T8511 TPC28T T8522 TPC28T T8523 +1.25VS +VGA_VCORE TPC28T T8524 TPC28T T8525 TPC28T T8526 TPC28T T8527 TPC28T T8516 TPC28T T8517 TPC28T T8518 TPC28T T8519 TPC28T T8520 TPC28T T8521 A A +1.25VM Title : POWER_VGA_CORE & +1.25VS Engineer: Size Project Name Rev F7SR C Date: , 1.1 10, 2007 Sheet 85 of 95 D D C C B B A Title : Engineer: Size Project Name Rev F7SR A Date: A N/A , 10, 2007 1.1 Sheet 86 of 95 D D C C B B A A Title : Size Project Name Rev F7SR C Date: N/A Engineer: , 1.1 10, 2007 Sheet 87 of 95 T8801 TPC28T JP8801 SHORT_PIN JP8800 SHORT_PIN CSSP JP8802 CSSN 3MM_OPEN_5MIL @ T8800 TPC28T POWER PATH & BAT_LEARN T8802 T8803 T8804 T8805 T8806 68,90 A/D_DOCK_IN TPC28T TPC28T TPC28T TPC28T A/D_DOCK_IN 1 2 3 D 4 Q8801 TPC8107 T8808 Q8800 BAT TPC28T T8815 R8801 6.8KOhm 1% BAT 2 TPC28T TPC28T TPC28T TPC28T T8811 T8812 T8813 T8814 L8801 150Ohm/100Mhz Irat=5A l1812_h67 TPC8107 2 T8810 AC_BAT_SYS C8802 0.01UF/50V MLCC/+/-10% T8809 TPC28T TPC28T TPC28T TPC28T TPC28T R8802 10mOhm r1508 1% Q8802 TPC8107 R8800 18KOhm 1% T8807 T8821 TPC28T BAT_S BAT_CON L8802 150Ohm/100Mhz Irat=5A l1812_h67 D L8803 1KOhm/100Mhz Irat=100mA CHG_PDL JP8805 SHORT_PIN CHG_PDS AC_BAT_SYS AC_BAT_SYS_INV AC_BAT_SYS_INV to Inverter connect, Power trace =60mil(min), Put JP8805 close to Q8800 CSSP CSSN TPC28T T8816 AC_IN Threshold 2.048Vmax A/D_DOCK_IN > 17.44V active CHG_PDS AC_BAT_SYS Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF] Rsense(ADin)=0.010ohm VCLS=2.5341V => Iin(max)=4.5A => Constant Power = 19 * 4.5 = 85.5W => R5710=20K,R5715=30K C Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] Rsense(CHG)=0.025 ohm VICTL= 3V => Ichg = 2.5A VICTL= 1.68V => Ichg = 1.4A CHG_PDL C8805 1UF/25V MLCC/+80%-20% A/D_DOCK_IN A/D_DOCK_IN TPC28T T8817 MAX8725_LDO T8819 TPC28T Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] } VCTL= 1.588V => Vbatt = 4.2V MAX8725_LDO CHG_GND Mode pin : Vmode > 2.8V (trie to LDO pin) > Cells 2.0 > Vmode > 1.6V (floating) > Cells 0.8 > Vmode (trie to GND) > Learning mode D8801 1SS355 R8804 100KOhm 1% + C8806 1UF/25V MLCC/+/-10% R8805 100KOhm MAX8725_REF REF : 4.2235V MAX8725_REF Precgarge current=150mA R8807 13.3KOhm 1% R8808 20KOhm 1% R8809 40.2KOhm 1% R8810 33.2KOhm 1% DCIN LDO ACIN REF GND/PKPRES# ACOK MODE DLOV DLO PGND CSIP CSIN BATT GND1 C Q8803 SI4431BDY R8803 33Ohm LDO : 5.4V VICTL< 0.8V or DCIN < 7V >Charger Disable TPC28T T8818 CHG_GND 21 20 19 18 17 16 15 C8807 1UF/25V MLCC/+80%-20% L8800 R8806 25mOHM r1508 1% BAT 10UH Irat=4.4A Q8804 SI4800BDY D8802 FS1J4TP U8800 MAX8725ETI + CHG_CCS 1.588V CHG_GND 0.188V 2.991V 2.5341V AD_IINP R8829 36.5KOhm @ R8812 1.91KOhm 1% B 11 59 BATSEL_2P# G R8813 30KOhm 1% D S TPC28T 59 PRECHG R8815 20KOhm 1% B +5VO +2.5VREF PWRLMT# 59 PKPRES# D Q8805 H2N7002 11 G MAX8725_LDO 59 AD_IINP 1.98V TPC28T CHG_EN# 59 R8820 107KOhm @ C8815 1UF/16V MLCC/+80%-20% S T8822 Q8806 H2N7002 G S 4S: Mount R8808 only 3S: Unmount all components 3S/4S: Unmount R8808, and mount others R8830 10KOhm r0402 AC_APR_UC R8817 100KOhm 59 TPC28T BAT_LEARN + - R8826 100KOhm @ @ U8801 V+ VLMV321IDBVR @ D Q8811 H2N7002 11 S R8822 100KOhm @ MAX8725_LDO D R8827 4.7KOhm @ Q8808 H2N7002 PKPRES# R8818 100KOhm 1% BATSEL_3S# R8819 470KOhm R8828 470KOhm @ UMC4N @ D Q8807 H2N7002 11 S 3 11 S C8817 0.1UF/25V @ R8821 143KOhm @ G G Q8809 H2N7002 G 11 D D8803 1SS355 @ MAX8725_LDO Q8812 T8824 D 11 A TPC28T T8820 07/02/02 Q8813 2N7002 @ T8823 R8814 97.6KOhm 1% C8812 0.047UF/50V MLCC/+/-10% D Q8810 H2N7002 G 68,90 TS# 11 G A S C8816 0.22UF/10V MLCC/+/-10% Title : S Size Project Name Rev F7SR Custom Date: POWER_CHARGER Engineer: , 1.1 10, 2007 Sheet 88 of 95 D D C C B B A A Title : Size Project Name Rev F7SR Custom Date: N/A Engineer: , 1.1 10, 2007 Sheet 89 of 95 BATTERY IN DETECT +5VAO ADAPTER IN DETECT +5VAO TPC28T T9001 BAT1_IN_OC# 59 D D A/D_DOCK_IN R9001 100KOhm TPC28T T9002 R9002 100KOhm Q9001A UM6K1N R9003 243KOhm 1% 39,59 AC_IN_OC# C B 68,88 Q9001B UM6K1N TS# E Q9000 PMBS3904 R9004 10.2KOhm 1% C9001 0.1UF/25V MLCC/+80%-20% C9002 1000PF/50V MLCC/+/-10% C C +2.5VREF +5VO B B TPC28T T9000 TPC28T T9003 C9003 1UF/6.3V MLCC/+80/-20% R9000 1KOhm +2.5VREF C9000 1UF/6.3V MLCC/+80/-20% U9001 MM1431ANRE @ U9000 LM4040BIM3 CATHODE SUB NC REFERENCE ANODE U9000 & U9001 colay A A Title : Size Project Name Rev F7SR Custom Date: POWER_DETECT Engineer: , 1.1 10, 2007 Sheet 90 of 95 SUSB#_PWR POWER SUSC#_PWR POWER Q9102 SI2304BDS D TPC28T T9100 TPC28T T9119 Q9107 SI4336DY_T1_E3 +1.8VO +3VO TPC28T T9105 R9100 75KOhm 1% R9102 18KOhm +VRAM C9110 0.1UF/25V MLCC/+80%-20% @ C9111 0.1UF/25V MLCC/+/-10% D +3V +1.8VS (5A) TPC28T T9106 C9103 0.1UF/25V MLCC/+/-10% @ C9104 0.033UF/16V MLCC/+/-10% TPC28T T9112 (0.5A) TPC28T T9111 +5VO TPC28T TPC28T T9137 T9122 +3VO Q9109 DRAIN_1 FDW2501NZ_NL SOURCE_1 SOURCE_2 GATE_1 DRAIN_1 SOURCE_1 SOURCE_2 GATE_1 TPC28T T9120 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 +3VS C9113 0.1UF/25V MLCC/+80%-20% @ Q9110 DRAIN_1 FDW2501NZ_NL SOURCE_1 SOURCE_2 GATE_1 +5VO +12V SUSC#_PWR R9107 100KOhm 1% TPC28T T9128 C9117 0.1UF/25V MLCC/+80%-20% @ SLP_M#_PWR POWER JP9104 +12VS_GATE R9112 5.1KOhm 1% +12VSUS Q9100 @ SI2304BDS +3VO 1 +3VS TPC28T T9123 TPC28T T9124 +3VM_CLK TPC28T T9135 R9110 47KOhm 1% @ C9115 0.1UF/25V MLCC/+80%-20% @ C9116 @ 0.033UF/16V MLCC/+/-10% R9114 100KOhm 1% Q9112 UMC4N 1MM_OPEN_5MIL @ +12VS TPC28T T9133 SUSB#_PWR C (0.01A) Q9106 UMC4N +5VS 070502 B 81,82,83,84,85,93,94 TPC28T T9117 (3.1A) R9116 68KOhm C9118 0.033UF/16V MLCC/+/-10% TPC28T T9131 (2.0A) R9105 22KOhm 1% TPC28T T9118 TPC28T T9127 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 C9107 0.033UF/16V MLCC/+/-10% +12VSUS 94 TPC28T TPC28T T9125 T9126 C9121 0.1UF/25V MLCC/+/-10% @ 070502 C9114 0.1UF/25V MLCC/+/-10% C +5V R9104 0Ohm (3.9A) R9109 47KOhm Q9104 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 FDW2501NZ_NL (0.25A) B TPC28T T9129 070502 SUSB#_PWR +12VSUS +12VM TPC28T T9130 Q9111 UMC4N @ SLP_M#_PWR (0.01A) R9113 100KOhm 1% @ 82,85,94 SLP_M#_PWR Q9108 SI2304BDS TPC28T TPC28T T9121 T9140 +3VO TPC28T T9132 +3VSG R9108 120KOhm C9100 0.1UF/25V MLCC/+80%-20% @ +12VS_GATE C9112 0.033UF/16V MLCC/+/-10% A A Title : Size Project Name Rev F7SR Custom Date: POWER_LOAD SWITCH Engineer: , 1.1 Sheet 10, 2007 91 of 95 A/D_DOCK_IN SLP_M#_PWR UMC4N (SWITCH) +12VM (10mA) S4_STATE#_PWR UMC4N (SWITCH) +12V (10mA) UMC4N (SWITCH) +12VS (10mA) +12VSUS (100mA) AC_BAT_SYS D SUSB#_PWR MIC5235 D VSUS_ON +3VSUS (3.9A) SUSC_STATE CM8562 SUSB#_PWR +3VO SUSB#_PWR EC_WLAN_PWR SLP_M#_PWR LAN_WOL_EN TPS51120 SUSB#_PWR VSUS_ON (0.08A) +3V NDS351AN +2.5VO FDW2501 +2.5VS (1A) (3.9A) +3VS NDS351AN +3VAUX_GOLAN (0.5A) NDS351AN +3VM (0.5A) NDS351AN +3VSG (0.1A) NDS351AN +3VM_CLK (0.25A) C C SLP_M#_PWR FORCE_OFF# +5VO SUSC_STATE +5VSUS (0.06A) FDW2501 +5V (2.0A) FDW2501 +5VS (3.1A) +3VA ( 0.01 A) SUSB#_PWR +5VAO +3VAO SUS_PWRGD +1.5VO +5VO ISL6227 +1.5VS +VCCP SUSB#_PWR 1.05V_1.5V_PWRGD SLP_M#_PWR B NDS351AN SUSB#_PWR TPS51116 +5VO PMN45EN +0.9VO +1.8V (5A) +1.8VS (0.2A) +0.9VS (1A) B DDR_PWRGD +VGA_VCORE_O +5VO (11A) +1.05VM (0.54A) +1.8VO SUSC#_PWR SUSB#_PWR (4A) +1.05VO MAX8743 +VGA_VCORE (19A) +1.25VO +1.25VS (4A) SUSB#_PWR PWR_OK_VGA GPU_VID SLP_M#_PWR +1.25VM NDS351AN (0.75A) A A +5VS +VCORE ISL6260C (44A) CPU_VRON VR_VID0~VR_VID6, H_DPRSTP#, MCH_OK, PM_DPRSLPVR,PM_PSI#, VCCSENSE,VSSSENSE,STP_CPU# VRM_PWRGD,CLK_EN# LM4040BIM (Regulator) +5VO Title : +2.5VREF (10mA) Size Project Name Rev F7SR Custom Date: POWER_VCORE Engineer: , 1.1 Sheet 10, 2007 92 of 95 D D POWER GOOD DETECTER T9301 TPC28T +3VO +3VS ALL_SYSTEM_PWRGD 59 SUSB#_PWR 81,82,83,84,85,91,94 C SUSB#_PWR FORCE_OFF# 41,59,60,68,81 C R9303 100KOhm @ D9301 1SS355 R9304 560KOhm Q9300A UM6K1N 83 DDR_PWRGD 59,81 SUS_PWRGD 82 1.05V_1.5V_PWRGD 24,27,85 PWR_OK_VGA +3VS R9300 0Ohm r0402 T9300 TPC28T 2 UM6K1N D9300 1SS355 R9305 0Ohm r0402 R9306 0Ohm r0402 T9302 TPC28T Q9300B C9300 4.7UF/6.3V MLCC/+/-10% +3VO U9300 A VCC B GND Y NC7SZ08P5X B B 8,59,60,80 CPU_PWRGD A A Title : Size Project Name Rev F7SR Custom Date: POWER_PROTECT Engineer: , 1.1 10, 2007 Sheet 93 of 95 FOR POWER TEST JP9401 AC_BAT_SYS D +3VA +1.5VSUS AC_BAT_SYS 68,80,81,82,83,85,88 +3VA +3VAO 2 CPU_VRON_PWR D 80 SGL_JUMP @ 15,33,41,42,58,59,60,81 +1.5VSUS JP9402 +5VO +5VO 66,81,82,83,84,85,88,90,91 +3VO +3VO 81,84,85,91,93 +3VSUS +3VSUS 16,17,18,44,45,54,59,81 +5VSUS +5VSUS 18,66,81 +3V 33,42,45,47,49,54,57,76,78,91 +3VS +3VS 4,8,12,15,16,17,18,32,33,35,37,42,44,47,48,49,51,52,53,54,56,57,59,60,66,70,72,73,76,80,84,91,93 +3VM +3VM 17,18,20,21,39,65,84 2 SUSB#_PWR SUSB#_PWR 81,82,83,84,85,91,93 SGL_JUMP @ JP9403 +3V +3VAUX_GOLAN +3VM_CLK +12VSUS +12V C +12VS +5V B +12V 42,53,57,91 +12VS 27,32,33,57,66,91 33,42,54,62,91 17,18,32,35,37,42,44,56,57,61,66,72,80,91 +2.5VO +2.5VO 84 +2.5VS +2.5VS 23,27,42,56,84 +1.8VO +1.8VO 83,91 +1.8V +1.8V 8,11,12,20,21,42,83 +VCCP +VCCP 4,5,7,9,11,12,15,18,23,27,39,42,82 +1.05VM +1.05VM 11,82 +0.9VO +0.9VO 83 +0.9V +0.9V 22,42,83 +0.9VS +0.9VS 28,29,42,83 BAT 88 +VGA_VCORE +VCORE SUSC#_PWR SUSC#_PWR 91 2 VSUS_ON VSUS_ON 54,59,81 SGL_JUMP @ JP9400 1 2 C S4_STATE#_PWR S4_STATE#_PWR 83 SGL_JUMP @ TPC28T T9400 58 S4_STATE_ON_EC R9400 TPC28T T9401 1KOhm 83 S4_STATE#_PWR TPC28T T9404 58 SUSB_ON_EC# 5,80 81,82,83,84,85,91,93 R9401 TPC28T T9405 1KOhm B SUSB#_PWR SUSB#_PWR +VGA_VCORE 23,27,85 +VRAM 23,24,25,27,28,29,42,73,91 +1.25VS +1.25VS 12,18,23,27,42,85 +1.25VM +1.25VM 8,12,85 +1.1VS +2.5VREF 84,88,90 +VRAM BAT_CON +12VSUS 81,84,91 +5VS +VCORE JP9404 +3VM_CLK 39,91 +5V +2.5VREF SGL_JUMP @ +3VAUX_GOLAN +5VS BAT TPC28T T9402 58 SUSC_ON_EC# BAT_CON 68,88 +1.1VS R9402 TPC28T T9403 1KOhm 23,27,84 91 SUSC#_PWR TPC28T T9406 58 SLP_M_ON_EC R9403 TPC28T T9407 1KOhm 82,85,91 SLP_M#_PWR A A Title : Size Project Name Rev F7SR Custom Date: POWER_SIGNAL Engineer: , 1.1 10, 2007 Sheet 94 of 95 Rev Date 1.0 2006/07/ 1.1 2006/09/29 Description Rev Date Description Initial release 1.Enable INTVRMEN and LAN100_SLP (Remove R1506, R1511).[15] 2.Change R0803 R0804 to 20ohm.[8] D D 3.Set PCIE graphic lane to normal mode.(Unmount R0809).[8] 4.Pull high 10Kohm at 3GSIM_DATA.[33] 5.Change INVCN0 to 20 pin.[33] 6.Change net name "INT_MIC_P" to "INTMIC_P".[56] 7.Change R5706 and R5707 to 75ohm.[56] 8.Change CE5701 and CE5702 to 100UF.[57] 9.Add +1.5V discharg circuit.[42] 10.Remove R5415.[54] 11.Change power "+12V" to "+12VS".[54] 12.Change R6401,R6403,R6409 to10KOhm.[64] 13.Change C2940 to0.1uF.[28] 14.Change EC_GPIO pin define for design IP.[59] 15.Add debounce and thermal circuit for EC design IP.[60] 16.Change C1612,C1613 to 0.1uF.[16] 17.Change C7302,C7308 to 10uF and remove C7315, C7307,C7321,C7301,C7309,C7313,C7310,C7320, C7321.[73] C C 18.Remove Q4401,Q5404 and change R1604 to 1Kohm.[16,44,54] 19.Revers D6602.[66] 20.Remove C4401,C4404.[44] 21.Colay M66/M76M.[23~30] 22.Connect ICH8M_LAN_RST# to GND.[17] 23.Add JACK detect circuit at DOS mode.[15] 24.Connect M_VREF_MCH to" 0.9V_VTT_REF".[8] 25.Change R0402 to 1Kohm.[4] 26.Change R3952 to 270Ohm.[39] 27.Swap "xD_GND1" and "xD_CD".[53] 28.Add R and C to avoid pop.[56] 29.Add 3G Led circuit.[66] 30.Connect "BUF_PLT_RST#" and "IDERST#" by 47Ohm.[72] B B A A Title : History ASUSTek COMPUTER INC Size Jack Chen Project Name Rev F3Se Custom Date: Engineer: , 1.1 10, 2007 Sheet 95 of 95 ... AP21 AP26 AM27 AR21 AR26 AM26 AJ22 AJ24 LVSSR_1 LVSSR_2 LVSSR_3 LVSSR_4 LVSSR_5 LVSSR_6 LVSSR_7 LVSSR_8 LVSSR_9 LVSSR_10 LVSSR_11 LVSSR_12 LVSSR_13 LVSSR_14 AL22 AK22 LPVDD LPVSS GND R2703 10KOhm... TXVDDR_2 TXVDDR_3 TXVDDR_4 AN19 AN20 AP19 AR19 +TXVDDR TXVSSR_1 TXVSSR_2 TXVSSR_3 TXVSSR_4 TXVSSR_5 TXVSSR_6 TXVSSR_7 TXVSSR_8 TXVSSR_9 TXVSSR_10 AN18 AP18 AR18 AN16 AN15 AN17 AN11 AN12 AN13 AN14... Size Jerry Mou Project Name Rev F 7Sr Custom Date: Engineer: , 1.1 10, 2007 Sheet 13 of 95 D D C C B B A A Title : Blank Page Engineer: ASUSTeK COMPUTER INC Size Rev F 7Sr C Date: Jerry Mou Project
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