A B C D E A8J/F SCHEMATIC R11 Content PAGE PAGE SYSTEM PAGE REF 4 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 YONAH CPU (1) YONAH CPU (2) CPU CAP/THERMAL SENSOR CLOCK GEN Calistoga CPU Calistoga PCIE Calistoga DDR2 Calistoga POWER Calistoga GND Calistoga Strap DDR2 SO-DIMM_0 DDR2 SO-DIMM_1 DDR2 ADDRESS TERMINATION VGA CONN LVDS & INVERTER CONN CRT & TV_OUT ICH7M CPU,IDE,AUDIO ICH7M PCI,PCI-E,USB ICH7M GPIO ICH7M VCC,GND HDD & CD-ROM CONN USB PORTS SUPER I/O LPC47N217 BIOS & FIR KBC 38857 SM BUS & POWER PORT PCI-E GIGA_LAN RTL8111B PCI-E MINI CARD PCI-E NEW CARD PCI 1394,CardReader R5C832 PCI IN1 CON PCI Empty AUDIO CODEC AD1986A AUDIO AMP G1420 MDC,B/T,TPM & DISCHG,HOLE DVI CONN ACIN, BAT, FAN, I/O PORT SW & LED & TP POWER-ON SEQUENCE HISTORY I/O PORT Content POWER PAGE REF 50_POWER_VCORE 51_POWER_SYSTEM 52_POWER_I/O_1.8V & 1.05VS 53_POWER_I/O_+1.5VS 54_POWER_I/O_VTT & +2.5VS 55_POWER_VGA_CORE(Empty) 56_POWER_VGA_RAM(Empty) 57_POWER_CHARGER 58_POWER_PIC 59_POWER_SELECTOR 60_POWER_PROTECT 61_POWER_LOAD SWITCH 62_POWER_FLOWCHART 63_POWER_SIGNAL 5 ASUSTek COMPUTER INC FL.,No.150, Li-Te Rd.,Peitou, Taipei,Taiwan, ROC Title PAGE REF Size Document Number Custom A8J/F Date: A B C D Rev 1.1 Thursday, October 06, 2005 Sheet E of 63 A B C D E A8J/F Yonah/Galistoga BLOCK DIAGRAM BATTERY TYPE IO PORT 3S2P 1394 CLOCK GEN ICS954310 Yonah 478 4,5 LFB VGA BAORD Dual PCI-E VGA x16 CON 29 DDR2 SDRAM 533/667MHz Galistoga 1466 FCBGA 17 DDR2 533/667 SODIMM X2 +1.8V +0.9VS DCIN RTC FAN CON DDR CAP/RES 16 USB2.0 USB x4 52 PATA BUS (PRIMARY) B/T 38 ODD Slave DDR & VTT 53 H/W MONITOR THERMAL (ADT7463) 39 +3VAO & +2.5VS PCI EXPRESS X1 ICH7-M 652 BGA PCI_BUS ACZ IN CARD READER 38 LPC, 33MHz 54 Azalia 1986A 58 SUPER I/O 47N217 26 KEYBOARD CONTROLLER M3885XHP 30 DETECT TPM 38 1394 SLOT 36 27 AUDIO AMP G1420 37 FIR 60 27 INTERNAL KEYBOARD LOAD SWITCH MIC AMP LM358 FLOWCHART RTL8111B MINI CARD x2 35 30 36 30 NEW CARD 35 RJ11,RJ45 CON 30 40 SW & LED & TOUCHPAD CON 41 38 AC & BAT CON FAN CTRL 40 MIC_IN 37 62 MDC CON LINE OUT 40 30 61 LAN 1G RICOH R5C832 LAN IO FWH BIOS 59 PROTECT CARDBUS 32 57 PIC 3.3V, 33MHz HDD Master 26 26 Camera 39 14,15 8,9,10,11,12,13 51 1.5VS & 1.05VS SM_BUS 42 AGTL 1.468V,133MHZ 25 CHARGER RESET X4 DMI 50 SYSTEM POWER SEQENCE 42 21 VCORE CPU CAP LFB Nvidia G7x series VGA CON 17 LFB LINE_IN HOST BUS CRT & TV CON 19 DVI CH LFB MIC 40,44 LVDS & INV CON 18 USB 40 ASUSTek COMPUTER INC FL.,No.150, Li-Te Rd.,Peitou, Taipei,Taiwan, ROC Title SIGNAL BLOCK DAIGRAM 63 Size Document Number Custom A8J/F Date: A B C D Rev 1.1 Thursday, October 06, 2005 Sheet E of 63 A PCI Device Chipset (Host to PCI) Integrated LAN 1394 IN B IDSEL# REQ/GNT# (AD30 internal) AD24(NO USE) Interrupts 0 Signal Name PM_BMBUSY# PCI_REQ#5 PCI_INT[E:H]# BACK_OFF# RF_SW_OFF# EXTSMI#_3A PD_DET# CHG_FULL_OC SMB_ALERT# KB_SCI# SIO_SMI# PD_UnDock# 802_LED_EN# PM_DPRSLPVR PCI_GNT#5 STP_PCI# PD_RDY# STP_CPU# PD_SIO_RST# PCI_REQ#4 LPC_DRQ#1 PD_EN# CB_SD# OP_SD# WLAN_ON# 1Hz USB_OC#5 USB_OC#6 USB_OC#7 PM_CLKRUN# BT_ON/OFF# FWH_WP# SATACLKREQ# BT_LED_EN# PCB_ID0 PCB_ID1 PCB_ID2 NA PCI_GNT#4 H_PWRGD Power +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS NA +3VS +VCORE D E PC/PCI SM_BUS ADDRESS : Thermal MAX6657 CLK GEN DDR_SODIMM0 DDR_SODIMM1 VGA Thermal IC n/a AD16 ICH7M_GPIO Use As GPIO 00 i GPI GPIO 01 i GPI GPIO [5:2] i GPI GPIO 06 i GPO GPIO 07 i GPI GPIO 08 i GPI GPIO 09 i GPI i GPI GPIO 10 i Native GPIO 11 i GPI GPIO 12 i GPI GPIO 13 i GPI GPIO 14 i GPO GPIO 15 O0 GPO GPIO 16 O1 GPO GPIO 17 O1 GPO GPIO 18 i1 GPI GPIO 19 O1 GPO GPIO 20 i1 GPO GPIO 21 i1 Native GPIO 22 i1 Native GPIO 23 O0 GPO GPIO 24 O1 GPO GPIO 25 O0 GPO GPIO 26 O0 GPO GPIO 27 O0 GPO GPIO 28 i0 Native GPIO 29 i0 Native GPIO 30 i0 Native GPIO 31 O1 GPO GPIO 32 O1 GPO GPIO 33 O0 GPO GPIO 34 O0 GPO GPIO 35 i0 GPO GPIO 36 i0 GPI GPIO 37 i0 GPI GPIO 38 i0 GPI GPIO 39 GPIO [40:47] NA Native GPIO 48 Native GPIO 49 C A B M38857_GPIO USE_AS P23 GPO P22 GPO P21 GPO P20 GPO P42 GPO P43 GPI GPO P44 P45 GPO GPO P46 P47 GPI P50 GPI GPI P51 P52 GPO P53 GPO P54 GPI P55 GPI P56 GPO P57 GPO P67 GPI P66 GPI P65 GPI P64 GPI P63 GPI P62 GPI P61 GPI P60 GPI P76 GPIO P77 GPIO P27 GPO P26 GPO P25 GPO P24 GPO P40 GPO P41 GPO SIGNAL_NAME MSK_INSTKEY# BAT_LEARN Power +3V +3V +3V KBCRSM +3V WATCHDOG +3V SWDJ_EN +3V KBCPURST_3Q +3V KBC_GA20 +3V KBSCI_3Q +3V PM_CLKRUN# +3V BAT_LLOW#_OC +3V FAN1_TACH +3V +3V KBDDT0 +3V KBDDT1 LID_KBC# +3V +3V BAT_IN_OC# +3V FAN1_DC ADJ_BL +3V +3V PANLOCK_# +3V MARATHON_# +3V ACIN_OC# +3V +3V WIRELESS_# +3V +3V INTERNET_# BLUETOOTH_# +3V SMD_BAT +3V SMC_BAT +3V SCR_LED# +3V NUM_LED# +3V CAP_LED# +3V SET_PCIRSTNS# +3V KBC_EXTSMI +3V PANLOCK_LED +3V = = = = = 1001100x 1101001x 1010000x 1010010x 1001100x 47N217_GPIO USE_AS GPIO10 GPI GPIO11 GPO GPIO12 GPO GPIO13 GPI GPIO14 GPI GPO GPIO23 GPIO40 GPI GPI GPIO41 GPI GPIO40 GPI GPIO43 GPI GPIO44 GPI GPIO45 GPI GPIO46 GPI GPIO47 ( ( ( ( ( SIGNAL_NAME NONE NONE NONE NONE NONE ATI_RST# VGA_DETEC# 98h D2h A0h A4h 9Ah ) ) ) ) ) Power +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS ASUSTek COMPUTER INC FL.,No.150, Li-Te Rd.,Peitou, Taipei,Taiwan, ROC Title SCHEMATICS REF Size Document Number Custom A8J/F Date: A B C D Rev 1.1 Thursday, October 06, 2005 Sheet E of 63 +VCCP +VCCP 5,6,8,11,12,20,23,52 D D H_D#[63:0] H_A20M# H_FERR# H_IGNNE# A20M# FERR# IGNNE# 20 20 20 20 H_STPCLK# H_INTR H_NMI H_SMI# D5 C6 B4 A3 STPCLK# LINT0 LINT1 SMI# AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3 RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5] RSVD[6] RSVD[7] RSVD[8] RSVD[9] RSVD[10] B25 RSVD[11] H_ADS# H_BNR# H_BPRI# H5 F21 E1 H_DEFER# H_DRDY# H_DBSY# F1 LOCK# H4 RESET# RS[0]# RS[1]# RS[2]# TRDY# B1 F3 F4 G3 G2 HIT# HITM# G6 E4 BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# PROCHOT# THERMDA THERMDC THERMTRIP# BCLK[0] BCLK[1] H_BR0# D20 H_IERR# B3 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 R1 56 8 8 +VCCP H_INIT# 20 H_LOCK# H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# H_RS#0 H_RS#1 H_RS#2 H_HIT# H_HITM# 8 T1 T2 T3 T4 T5 R3 R4 R5 R6 R7 R8 56_* 56 56 56_* 56 56 +VCCP +VCCP T6 H_THERMDA H_THERMDC +VCCP H_THRMTRIP# A22 A21 CLK_CPU_BCLK CLK_CPU_BCLK# RSVD[13] RSVD[14] RSVD[15] RSVD[16] RSVD[17] RSVD[18] RSVD[19] RSVD[20] D2 F6 D3 C1 AF1 D22 C23 C24 8 R9 H_DSTBN#1 H_DSTBP#1 H_DINV#1 GTLREF0 D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 M24 N25 M26 D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# AD26 1K_1 T7 GTLREF0