5 SYSTEM PAGE REF Content PAGE D C B A 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 38 40 41 42 43 44 45 46 47 48 50 51 52 53 56 57 60 61 Block Diagram System Setting CPU(1)_DMI,PEG,FDI,CLK,MISC CPU(2)_DDR3 CPU(3)_CFG,RSVD,GND CPU(4)_PWR CPU(5)_XDP DDR3 SO-DIMM_0 DDR3 SO-DIMM_1 DDR3 CA_DQ VOLTAGE VID controller PCH_IBEX(1)SATA,IHDA,RTC,LPC PCH_IBEX(2)_PCIE,CLK,SMB,PEG PCH_IBEX(3)_FDI,DMI,SYS PWR PCH_IBEX(4)_DP,LVDS,CRT PCH_IBEX(5)_PCI,NVRAM,USB PCH_IBEX(6)CPU,GPIO,MISC PCH_IBEX(7)_POWER,GND PCH_IBEX(8)_POWER,GND PCH_SPI ROM,OTH CLK_ICS9LPR362 EC_IT8512(1/2) EC_IT8512(2/2)KB, TP RST_Reset Circuit HANKSVILLE LAN_RJ45 CODEC-ALC663 AUD_Amp & Jack AUD_FM2010 CB_R5C833 CB_R5C833 CB_4in1 CardReader CB_NewCard BUG_Debug CRT_LCD Panel CRT_D-Sub Display Port K42Jr SCHEMATIC Revision 2.0 Power VCORE BLOCK DIAGRAM System D 1.5VS & 1.05VS DDR & VTT HDMI HDMI AMD PARK-XT-S3 CRT CRT PCIE x16 DDR3 800/1066MHz CPU ARRANDALE +2.5VS DDR3 SO-DIMM Charger LVDS FDI x8 LVDS LCD Panel DMI x4 Detect CRT Load Switch MiniCard WLAN Shirley Peak/ Echo Peak Debug Conn Touchpad EC PCIE x1 LPC IT8500E-L C Power Protect MiniCard PCH Ibex Peak-M Keyboard GigaLAN USB RJ45 HANKSVILLE SPI ROM CardReader TV_HDMI FAN_Fan & Sensor XDD_HDD & ODD USB_USB Port *2 MINICARD(WLAN) LED_Indicator DSG_Discharge DC_DC & BAT Conn BT_Bluetooth 64 65 66 67 TUN_TV Tuner ME_Conn & Skew Hole ESA_ESATA PCH_XDP, ONFI 70 71 VGA_MXM VGA_LVDS Switch 80 81 82 83 84 86 88 90 91 92 93 94 PW_VCORE(MAX17034) PW_SYSTEM(MAX17020) PW_I/O_VTT_CPU&+1.1VM PW_I/O_DDR & VTT& +1.8VS PW_I/O_3VM & ME_+VM_PWEGD PW_+VGFX_CORE(MAX17028) PW_CHARGER(MAX17015) PW_DETECT PW_LOAD SWITCH PW_PROTECT PW_SIGNAL PW_FLOWCHART SATA INT MIC Audio Amp CMOS Camera Azalia USB Port(1) MiniCard ODD Azalia Codec Realtek ALC269 USB Port(2) HDD(1) Jack VID controller Bluetooth USB Port(3) Discharge Circuit DC & BATT Conn Reset Circuit Skew Holes A Clock Generator ICS ICS9LPR427 PWM Fan Title : Block Diagram Engineer: ASUSTeK COMPUTER INC NB4 Size C Date: B Nic Project Name Rev K42Jr Thursday, November 12, 2009 1.1 Sheet 1 of 96 PCH_IBEX GPIO D C B A PCH_IBEX GPIO GPIO 00 GPIO 01 GPIO [2:5] GPIO 06 GPIO 07 GPIO 08 GPIO 09 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23 GPIO 24 GPIO 25 GPIO 26 GPIO 27 GPIO 28 GPIO 29 GPIO 30 GPIO 31 GPIO 32 GPIO 33 GPIO 34 GPIO 35 GPIO 36 GPIO 37 GPIO 38 GPIO 39 GPIO 40 GPIO 41 GPIO 42 GPIO 43 GPIO 44 GPIO 45 GPIO 46 GPIO 47 GPIO 48 GPIO 49 GPIO 50 GPIO 51 GPIO 52 GPIO 53 GPIO 54 GPIO 55 GPIO 56 GPIO 57 GPIO 58 GPIO 59 GPIO 60 GPIO 61 GPIO 62 GPIO 63 GPIO 64 GPIO 65 GPIO 66 GPIO 67 GPIO 72 GPIO 73 GPIO 74 GPIO 75 Use As GPO GPO Native GPO GPO GPI Native Native GPI Native GPO GPO GPO GPO GPO Native GPO Native GPO GPO Native GPO Native Native GPO GPO Native Native Native Native GPO Native Native GPO GPI GPI GPI Native Native Native Native Native Native Native Native GPO GPO Native Native GPO GPO GPO GPO Native GPO Native Native GPO Native Native Native Native Native Native Native GPO Native GPO Native Internal & External Pull-up/down Signal Name DGPU_HPD_INTR# EXT_SMI# USB_OC5# USB_OC6# EXT_SCI# PM_LAYPHY_EN CB_SD# WLAN_ON DGPU_HOLD_RST# DGPU_PWROK CLKREQ1#_TV CLKREQ2#_WLAN WLAN_LED LDRQ1# CLKREQ3#_NEWCARD CLKREQ4# BT_LED ME_PM_SLP_LAN# ME_Sus_PwrDnAck ME_AC_PRESENT PM_CLKRUN# STP_PCI# SATA_CLK_REQ# DGPU_PWR_EN# DGPU_PRSNT# PCB_ID0 PCB_ID1 USB_OC1# USB_OC2# USB_OC3# USB_OC4# CLK_REQ5# CLK_REQ6# CLK_REQ7# CLKREQ_PEG# GPU_RST# PCI_REQ1# PCI_GNT1# CLKREQ_GLAN# BT_ON SML1_CLK USB_OC0# PM_SUS_STAT# SUS_CLK PM_SLP_S5# CLK_OUT0 CLK_OUT1 CLK_OUT2 CLK_OUT3 CLK_REQ0# SML1_DATA Power +3VS +3VS +5VS INT TBD +3VS INT TBD +3VS EXT PU & INT PU +3VSUS EXT PU +3VSUS EXT PU +3VSUS EXT PU +3VSUS EXT PU +3VSUS +3VSUS EXT PU(DIODE DNI) +3VSUS INT PD +3VSUS +3VS EXT PD & INT TBD +3VS EXT PU(DNI)/PD +3VS +3VS EXT PU(DNI)/PD +3VS +3VS EXT PD +3VS INT PU +3VS +3VSUS EXT PU(DNI)/PD +3VSUS EXT PU (Not used) +3VSUS INT WEAK PU +3VSUS EXT PD +3VSUS EXT PU(DNI)/PD(DNI) +3VSUS EXT PU +3VSUS EXT PU +3VSUS EXT PU +3VS +3VS +3VS EXT PU/PD(DNI) +3VS +3VS EXT PU EXT PU +3VS EXT PD +3VS EXT PD +3VS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PD +3VSUS +3VS +3VS EXT PU (Not used) +5VS INT PU +3VS +5VS INT PU +3VS +5VS INT PU +3VS EXT PU(DNI)/PD +3VSUS EXT PU(DIODE) +3VSUS EXT PU +3VSUS EXT PU (Not used) +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS INT TBD +3VS INT TBD +3VS INT TBD +3VS INT TBD +3VS +3VSUS EXT PU (Not used) +3VSUS EXT PU (Not used) +3VSUS EXT PU +3VSUS - INT TBD EXT PU EC IT8512 EC GPIO Use As Signal Name GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPB0 GPB1 GPB2 GPB3 GPB4 GPB5 GPB6 GPB7 GPC0 GPC1 GPC2 GPC3 GPC4 GPC5 GPC6 GPC7 GPD0 GPD1 GPD2 GPD3 GPD4 GPD5 GPD6 GPD7 GPE0 GPE1 GPE2 GPE3 GPE4 GPE5 GPE6 GPE7 GPF0 GPF1 GPF2 GPF3 GPF4 GPF5 GPF6 GPF7 GPG0 GPG1 GPG2 GPG6 GPH0 GPH1 GPH2 GPH3 GPH4 GPH5 GPH6 GPI0 GPI1 GPI2 GPI3 GPI4 GPI5 GPI6 GPI7 GPJ0 GPJ1 GPJ2 GPJ3 GPJ4 GPJ5 O O PWR_LED# CHG_LED# LCD_BL_PWM FAN0_PWM SUSC_EC# SUSB_EC# SMB0_CLK SMB0_DAT A20GATE RC_IN# PM_RSMRST# SMB1_CLK SMB1_DAT PM_PWRBTN# AC_IN_OC# OP_SD# BAT1_IN_OC# RFON_SW# PM_SUSC# BUF_PLT_RST# EXT_SCI# EXT_SMI# LCD_BACKOFF# FAN0_TACH VSUS_ON EGAD (IT8301 Address/Data connect) EGCS (IT8301 Cycle Start connect) EGCLK (IT8301 Clock connect) PWR_SW# LID_SW# CAP_ACK# EXP_GATE# TP_CLK TP_DAT THRO_CPU PM_SUSB# PM_CLKRUN# GFX_VR_ON BAT_LEARN NUM_LED# CAP_LED# SUS_PWRGD ALL_SYSTEM_PWRGD VRM_PWRGD GFX_VR ALS_AD CPU_VRON PM_PWROK VSET_EC ISET_EC TP_LED - O O O O IO IO O O O IO IO O I I I I I O O O I O O O O I I I I I IO O I IO O O O O I I I I I O O O O O EC IT8301 EC GPIO Use As GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 Signal Name ME_PM_SLP_M# ME_SusPwrDnAck ME_+VM_PWRGD ME_PM_SLP_LAN# ME_AC_PRESENT ME_PWROK ME_SLP_M_EC# - I I I I O O O D C SM_BUS ADDRESS : PCH Master SM-Bus Device SM-Bus Address Clock Generator(ICS9LPR362) 1101001x ( D2 ) SO-DIMM 1010000x ( A0 ) SO-DIMM 1010001x ( A2 ) VID Controller(ASM8272) 0011011x ( 36 ) WiFi/WiMax N/A B EC Master (SMB1) SM-Bus Device SM-Bus Address CPU Thermal Sensor(G780) 1001100x ( 98 ) VGA Thermal IC(G781-1) 1001101x ( 9A ) PCIE Minicard TV Tuner USB USB Port (1) PCIE Minicard WLAN USB USB Port (2) PCIE Newcard USB USB Port (3) USB USB Port (4) USB CMOS Camera USB NewCard PCIE USB Minicard TV Tuner PCIE USB PCIE PCIE PCIE ESATA (for pre-ES1) GLAN USB WLAN USB A SATA SATA HDD (1) USB 10 SATA1 SATA ODD USB 11 SATA4 SATA HDD (2) USB 12 Bluetooth SATA5 ESATA USB 13 Finger Printer Title : System Setting Engineer: ASUSTeK COMPUTER INC NB4 Size C Date: CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 U0301A (22) (22) (22) (22) DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 D25 F24 E23 G23 (22) FDI_TXN[7:0] FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 D22 C21 D20 C18 G22 E20 F20 G19 F17 E17 (22) FDI_FSYNC0 (22) FDI_FSYNC1 C17 (22) FDI_LSYNC0 (22) FDI_LSYNC1 F18 D17 C FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] FDI_FSYNC[0] FDI_FSYNC[1] FDI_INT FDI_LSYNC[0] FDI_LSYNC[1] For Intel GFX display PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PCIENB_RXN15 PCIENB_RXN14 PCIENB_RXN13 PCIENB_RXN12 PCIENB_RXN11 PCIENB_RXN10 PCIENB_RXN9 PCIENB_RXN8 PCIENB_RXN7 PCIENB_RXN6 PCIENB_RXN5 PCIENB_RXN4 PCIENB_RXN3 PCIENB_RXN2 PCIENB_RXN1 PCIENB_RXN0 J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PCIENB_RXP15 PCIENB_RXP14 PCIENB_RXP13 PCIENB_RXP12 PCIENB_RXP11 PCIENB_RXP10 PCIENB_RXP9 PCIENB_RXP8 PCIENB_RXP7 PCIENB_RXP6 PCIENB_RXP5 PCIENB_RXP4 PCIENB_RXP3 PCIENB_RXP2 PCIENB_RXP1 PCIENB_RXP0 (75) R0370,R0371,R0372 near U0301 U0301B PCIENB_RXP[15:0] (75) R0303 1% 20Ohm H_COMP3 AT23 R0304 1% 20Ohm H_COMP2 AT24 R0305 1% 49.9Ohm H_COMP1 G16 R0306 1% 49.9Ohm H_COMP0 AT26 +VTT_CPU For EC request, to read PECI via EC Connection: R0317.2 >Q0301.1 >U3001.118 R0307 (25) 1TP_SKTOCC# T0301 49.9Ohm H_CATERR# 1% AH24 AT15 H_PECI H_PROCHOT_S# L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PCIENB_TXN15 PCIENB_TXN14 PCIENB_TXN13 PCIENB_TXN12 PCIENB_TXN11 PCIENB_TXN10 PCIENB_TXN9 PCIENB_TXN8 PCIENB_TXN7 PCIENB_TXN6 PCIENB_TXN5 PCIENB_TXN4 PCIENB_TXN3 PCIENB_TXN2 PCIENB_TXN1 PCIENB_TXN0 CX0316 CX0315 CX0314 CX0313 CX0312 CX0311 CX0310 CX0309 CX0308 CX0307 CX0306 CX0305 CX0304 CX0303 CX0302 CX0301 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V PCIEG_RXN15 PCIEG_RXN14 PCIEG_RXN13 PCIEG_RXN12 PCIEG_RXN11 PCIEG_RXN10 PCIEG_RXN9 PCIEG_RXN8 PCIEG_RXN7 PCIEG_RXN6 PCIEG_RXN5 PCIEG_RXN4 PCIEG_RXN3 PCIEG_RXN2 PCIEG_RXN1 PCIEG_RXN0 L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 PCIENB_TXP15 PCIENB_TXP14 PCIENB_TXP13 PCIENB_TXP12 PCIENB_TXP11 PCIENB_TXP10 PCIENB_TXP9 PCIENB_TXP8 PCIENB_TXP7 PCIENB_TXP6 PCIENB_TXP5 PCIENB_TXP4 PCIENB_TXP3 PCIENB_TXP2 PCIENB_TXP1 PCIENB_TXP0 CX0332 CX0331 CX0330 CX0329 CX0328 CX0327 CX0326 CX0325 CX0324 CX0323 CX0322 CX0321 CX0320 CX0319 CX0318 CX0317 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V PCIEG_RXP15 PCIEG_RXP14 PCIEG_RXP13 PCIEG_RXP12 PCIEG_RXP11 PCIEG_RXP10 PCIEG_RXP9 PCIEG_RXP8 PCIEG_RXP7 PCIEG_RXP6 PCIEG_RXP5 PCIEG_RXP4 PCIEG_RXP3 PCIEG_RXP2 PCIEG_RXP1 PCIEG_RXP0 PCIEG_RXN[15:0] AN26 (75) AK15 (32) H_THRMTRIP# (7) H_XDPRST# (22) PM_SYNC# AK14 AP26 AL15 AN14 PCIEG_RXP[15:0] (75) AN27 (7,25) H_CPUPWRGD (22) H_DRAM_PWRGD AK13 (32) H_VTTPWRGD AM15 AM26 (7) H_PWRGD_XDP COMP3 COMP2 COMP1 COMP0 SKTOCC# CATERR# PECI PROCHOT# THERMTRIP# RESET_OBS# PM_SYNC VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWROK VTTPWRGOOD TAPPWRGOOD R0318 (24,30,32,41,53,75) BUF_PLT_RST# 1.5KOhm 1% PLT_RST#_R AL14 BCLK BCLK# BCLK_ITP BCLK_ITP# PEG_CLK PEG_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# SM_DRAMRST# SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] PM_EXT_TS#[0] PM_EXT_TS#[1] D A16 B16 BCLK_CPU_P_PCH BCLK_CPU_N_PCH AR30 AT30 CLK_ITP_BCLK (7) CLK_ITP_BCLK# (7) E16 D16 CLK_DMI_PCH CLK_DMI#_PCH A18 CLKDREF A17 CLKDREF# TDI TDO TDI_M TDO_M DBR# BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] R0366 R0367 (21) (21) 1KOhm 1KOhm F6 M_DRAMRST# AL1 SM_RCOMP0 AM1 SM_RCOMP1 AN1 SM_RCOMP2 AN15 AP15 R0331 R0332 R0333 1% 1% 1% 1 10KOhm 10KOhm PM_EXTTS#0 (16,17) RN0301C 10KOhm RN0301D 10KOhm XDP_PRDY# XDP_PREQ# AN28 AP28 AT27 AT29 AR27 AR29 AP29 (16,17) 100Ohm 24.9Ohm 130Ohm PM_EXTTS#1 +VTT_CPU RN0301A RN0301B AT28 PRDY# AP27 PREQ# TCK TMS TRST# (25) (25) (7) (7) IPU IPU IPU IPU XDP_TCLK (7) XDP_TMS (7) XDP_TRST# (7) XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M IPU IPU C AN25 XDP_DBRESET# XDP_OBS[7:0] XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7 AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 (7,22) (7) IPU R0319 1% 750Ohm RSTIN# SOCKET989 C0304 @ 0.1UF/10V PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 Main Board PCIENB_RXN[15:0] PWR MANAGEMENT FDI_INT (22) FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] 750Ohm THERMAL E22 D21 D19 D18 G21 E19 F21 G18 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] Intel(R) FDI (22) FDI_TXP[7:0] FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] 49.9Ohm 1% CLOCKS D24 G24 F23 H23 1% DDR3 MISC DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] R0302 JTAG & BPM (22) (22) (22) (22) DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] R0301 EXP_RBIAS B24 D23 B23 A22 PEG_IRCOMP_R DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 B26 A26 B27 A25 (22) (22) (22) (22) PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] PCI EXPRESS GRAPHICS A24 C23 B22 A21 MISC DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI D (22) (22) (22) (22) SOCKET989 +VTT_CPU B @ 2 @ 68OHM XDP_TMS R0345 @ 51Ohm XDP_TDI_R R0346 @ 51Ohm XDP_PREQ# R0347 @ 51Ohm XDP_TCLK R0348 @ 51Ohm R0354 1% 49.9Ohm JTAG MAPPING 0.1UF/10V H_DRAM_PWRGD C0302 @ 0.1UF/10V H_VTTPWRGD C0303 @ 0.1UF/10V XDP_TRST# Stuff these resistors for disable IGPU XDP_TDI_R R0349 /XDP 0Ohm XDP_TDI XDP_TDO_M R0350 0Ohm XDP_TDO (7) @ (7) C0301 R0313 B R0351 0Ohm /XDP H_CPUPWRGD H_XDPRST# XDP_TDI_M R0352 @ 0Ohm XDP_TDO_R R0353 /XDP 0Ohm DRAMPWROK: (WW35 MoW) Choose either one solution: >Choose solution @ 1KOhm FDI_FSYNC1 R0397 @ 1KOhm FDI_LSYNC0 R0396 @ 1KOhm FDI_LSYNC1 R0395 @ 1KOhm FDI_INT R0399 @ 1KOhm This pin should have an external pull-up of 1K Ohms to 10K Ohms to a rail of 1.05/1.1V which is ON in S0-S3 Connect this pin through a voltage divider circuit; recommend 4.75K Ohms pull-up to DDR3 Power Rail (VDDQ) of +V1.5U and a 12K Ohms pull-down to ground to convert to processor’s VTT level +VTT_CPU R0398 R0322 68OHM FDI_FSYNC0 +1.5V H_PROCHOT_S# Q0301 2N7002 11 D H_DRAM_PWRGD R0320 1% 1.1KOHM A S THRO_CPU (30) A 2 R0321 1% 3KOhm G Title : Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CPU(1)_DMI,PEG,FDI,CLK,MISC CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 Main Board U0301C U0301D (16) M_A_DQ[63:0] C B A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 (16) (16) (16) M_A_BS0 M_A_BS1 M_A_BS2 AC3 AB2 U7 (16) (16) (16) M_A_CAS# M_A_RAS# M_A_WE# AE1 AB3 AE9 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# AA6 AA7 P7 M_CLK_DDR0 (16) M_CLK_DDR#0 (16) M_CKE0 (16) D (17) M_B_DQ[63:0] SA_CK[1] SA_CK#[1] SA_CKE[1] SA_CS#[0] SA_CS#[1] SA_ODT[0] SA_ODT[1] SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y6 Y5 P6 M_CLK_DDR1 (16) M_CLK_DDR#1 (16) M_CKE1 (16) AE2 AE8 M_CS#0 M_CS#1 (16) (16) AD8 AF9 M_ODT0 M_ODT1 (16) (16) B9 D7 H7 M7 AG6 AM7 AN10 AN13 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 C9 F8 J9 N9 AH7 AK9 AP11 AT13 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 C8 F9 H9 M9 AH8 AK10 AN11 AR13 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DM[7:0] M_A_DQS#[7:0] M_A_DQS[7:0] M_A_A[15:0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 (16) (16) (16) (16) B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 (17) (17) (17) M_B_BS0 M_B_BS1 M_B_BS2 AB1 W5 R7 (17) (17) (17) M_B_CAS# M_B_RAS# M_B_WE# AC5 Y7 AC6 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_WE# SB_CK[0] SB_CK#[0] SB_CKE[0] SB_CK[1] SB_CK#[1] SB_CKE[1] SB_CS#[0] SB_CS#[1] SB_ODT[0] SB_ODT[1] SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] DDR SYSTEM MEMORY - B M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 DDR SYSTEM MEMORY A D SA_CK[0] SA_CK#[0] SA_CKE[0] SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] W8 W9 M3 M_CLK_DDR2 (17) M_CLK_DDR#2 (17) M_CKE2 (17) V7 V6 M2 M_CLK_DDR3 (17) M_CLK_DDR#3 (17) M_CKE3 (17) AB8 AD6 M_CS#2 M_CS#3 (17) (17) AC7 AD1 M_ODT2 M_ODT3 (17) (17) D4 E1 H3 K1 AH1 AL2 AR4 AT8 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 D5 F4 J4 L4 AH2 AL4 AR5 AR8 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 C5 E3 H4 M5 AG2 AL5 AP5 AR7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_DM[7:0] (17) M_B_DQS#[7:0] M_B_DQS[7:0] M_B_A[15:0] (17) C (17) (17) B SOCKET989 SOCKET989 A A Title : CPU(2)_DDR3 Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 Main Board D D U0301H U0301I RSVD32 RSVD33 AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 CFG3 CFG7 C B19 A19 A20 B20 U9 T9 AC9 AB9 C1 A3 J29 J28 A34 A33 B C35 B35 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] CFG[18] RESERVED CFG[0:17] : IPU RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58 RSVD59 RSVD60 RSVD61 RSVD62 RSVD63 RSVD64 RSVD65 AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 AJ13 AJ12 AH25 AK26 AL26 AR2 AJ26 AJ27 AP1 AT2 AT3 AR1 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15 A2 D15 C15 AJ15 AH15 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD66 RSVD67 RSVD68 RSVD69 RSVD70 RSVD71 RSVD72 RSVD73 RSVD74 RSVD75 RSVD76 RSVD77 RSVD78 RSVD79 RSVD80 RSVD81 RSVD82 RSVD83 RSVD84 RSVD85 RSVD86 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 AP34 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 C VSS NCTF U0301E VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 B SOCKET989 SOCKET989 SOCKET989 CFG strapping information: CFG[1:0]: PCI Express Port Bifurcation:(Clarksfield Only) - 11 = x 16 PEG (Default) - 10 = x PEG CFG[3]: PCIE Static Numbering Lane Reversal.(Arrandale Only) - 1:Normal Operation (Default) - 0:Lane Numbers Reversed 15 -> 0, 14 -> 1, CFG[4]: Embedded DisplayPort Detection.(Arrandale Only) - 1:Disabled - No Physical Display Port attached to Embedded DisplayPort - 0:Enabled - An external Display Port device is connected to the Embedded Display Port CFG[7]: Fixed for PCI Express 2.0 jitter specifications.(Clarksfield) Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm/5% resistor For a common motherboard design (for AUB and CFD), the pull-down resistor should be used Does not impact Arrandale functionality Unmount if Intel has fixed this issue CFG strapping information: For Arrandale CFG3 R0544 CFG7 R0538 1% For Clarksfield 3KOhm 3KOhm 1% @ A A Note: (Auburndale)Hardware Straps are sampled on the asserting edge of VCCPWRGOOD_0 and VCCPWRGOOD_1 and latched inside the processor Title : CPU(3)_CFG,RSVD,GND Note: (Clarksfield)Hardware Straps are sampled after RSTIN# de-assertion Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CH_Lin Project Name Rev M60JV 1.01 Sheet Thursday, November 12, 2009 of 96 +VGFX_CORE Main Board U0301G U0301F SENSE LINES GRAPHICS VIDs R0605 Processor Decoupling (92) Decoupling guide from Intel 4.7KOhm Schematic R0.9: AR25 AT25 AM24 (92) R0606 VCORE 22uF * 12pcs 10uF * 16pcs 10uF * 16pcs (87,92) GFXVR_DPRSLPVR GVR_PWR_MON Schematic Checklist R0.7: VCORE 22uF * 16pcs 470uF* 6pcs(2 no stuff) (92) VTT_SELECT 22UF/6.3V C0638 22UF/6.3V 22UF/6.3V 2 C0644 C0637 C0645 22UF/6.3V 22UF/6.3V C0643 22UF/6.3V 1 2 22UF/6.3V C0636 C0639 22UF/6.3V C0647 22UF/6.3V C0675 @ 10UF/6.3V C0674 @ 10UF/6.3V C0673 @ 10UF/6.3V C0671 @ 10UF/6.3V C0676 @ 10UF/6.3V C0683 @ 10UF/6.3V C0682 @ 10UF/6.3V C0681 @ 10UF/6.3V 2 C0680 @ 10UF/6.3V 1 C0679 @ 10UF/6.3V C0684 @ 10UF/6.3V +1.8VS PL0601 70Ohm/100Mhz 22UF/6.3V C0649 22UF/6.3V C0619 @ 10UF/6.3V C0648 C0651 @ 22UF/6.3V 22UF/6.3V 2 C0650 +VGFX_CORE C7113 @ 0.1UF/10V 10UF/6.3V 1UF/10V C0667 C0629 0.1UF/16V C0628 SOCKET989 C0642 2 C0678 @ 10UF/6.3V 2 Imax=1.35A L26 L27 M26 C0677 @ 10UF/6.3V J22 J20 J18 H21 H20 H19 +1.8VS_HPLL VCCPLL1 VCCPLL2 VCCPLL3 22UF/6.3V C 1.1V P10 N10 L10 K10 VR_VID0 (88) VR_VID1 (88) VR_VID2 (88) VR_VID3 (88) VR_VID4 (88) VR_VID5 (88) VR_VID6 (88) PM_DPRSLPVR (88) VTT63 VTT64 VTT65 VTT66 VTT67 VTT68 C0635 8/5 delete C0646 (22UF,6.3V) for layout placement (+1.8VS,VCCPLL) AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 (88) 470uF* 6pcs(2 no stuff) 22UF/6.3V 22UF/6.3V C0641 C0634 22UF/6.3V 22UF/6.3V 1 C0640 C0633 1 22UF/6.3V C0632 2 1KOhm R0613 GVR_PWR_MON AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 - 1.5V RAILS VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 PM_PSI# VTT48 VTT49 VTT50 VTT51 VTT52 VTT53 VTT54 VTT55 VTT56 VTT57 VTT58 D +VCORE 4.7KOhm +VTT_CPU AN33 G15 GVR_VID[0:6] GVR_VID0 GVR_VID1 GVR_VID2 GVR_VID3 GVR_VID4 GVR_VID5 GVR_VID6 POWER CPU VIDS VTT_SELECT GFX_VR_EN GFX_DPRSLPVR GFX_IMON PEG & DMI VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR (92) (92) GFX_VRON VTT59 VTT60 VTT61 VTT62 K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 PSI# VTT45 VTT46 VTT47 AM22 AP22 AN22 AP23 AM23 AP24 AN24 VCC_AXG_SENSE VSS_AXG_SENSE J24 J23 H25 AR22 AT22 +1.5V +VTT_CPU AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] 1.8V 1.1V RAIL POWER AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 FDI C0620 10UF/6.3V T633 VTT_TEST TBD +1.5V B 1UF/10V C0685 C0686 22UF/6.3V 22UF/6.3V 1 C0625 C0624 @ 1UF/10V 1 C0623 N/A 27PF/50V 1UF/10V C0622 C0621 N/A 27PF/50V VCCSENSE (88) VSSSENSE (88) AJ34 AJ35 VCC_SENSE VSS_SENSE (88) I_MON AN35 ISENSE T0632 T0631 + CE0604 @ 330UF/2V PANASONIC/EEFSX0D331XE ESR=6mOhm/Ir=3A C0656 @ 22UF/6.3V C0655 @ 22UF/6.3V 22u C0618 @ 22UF/6.3V Intel use C0617 @ 22UF/6.3V 2 Max 48A +VTT_CPU 1 VTT_SENSE B15 A15 TP_VSS_SENSE_VTT VTT_SENSE VSS_SENSE_VTT B CPU CORE SUPPLY C VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 SENSE LINES D VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 VCCAXG_SENSE VSSAXG_SENSE DDR3 +VTT_CPU AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 VCCAXG1 VCCAXG2 VCCAXG3 VCCAXG4 VCCAXG5 VCCAXG6 VCCAXG7 VCCAXG8 VCCAXG9 VCCAXG10 VCCAXG11 VCCAXG12 VCCAXG13 VCCAXG14 VCCAXG15 VCCAXG16 VCCAXG17 VCCAXG18 VCCAXG19 VCCAXG20 VCCAXG21 VCCAXG22 VCCAXG23 VCCAXG24 VCCAXG25 VCCAXG26 VCCAXG27 VCCAXG28 VCCAXG29 VCCAXG30 VCCAXG31 VCCAXG32 VCCAXG33 VCCAXG34 VCCAXG35 VCCAXG36 POWER Max 18A +VCORE GRAPHICS AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 C0657 @ 22UF/6.3V 10UF/6.3V Intel use 22u 10UF/6.3V A 1 C0664 C0654 C0658 C0659 10UF/6.3V 10UF/6.3V 10UF/6.3V C0627 @ 10UF/6.3V 2 C0665 C0611 @ 10UF/6.3V 1 C0606 @ 10UF/6.3V C0626 10UF/6.3V C0688 @ 10UF/6.3V 2 C0687 @ 10UF/6.3V C0604 @ 10UF/6.3V 1 C0616 @ 10UF/6.3V C0602 @ 10UF/6.3V C0615 @ 10UF/6.3V C0601 @ 10UF/6.3V 10UF/6.3V 2 A C0613 Intel use 22u SOCKET989 Intel use 22u Title : CPU(4)_PWR Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 Main Board D D C C CPU XDP connector XDP1 XDP_OBS0 XDP_OBS1 (3) (3) XDP_OBS2 XDP_OBS3 (3) (3) XDP_OBS4 XDP_OBS5 (3) (3) (3,25) H_CPUPWRGD R0708 R712 (3) H_PWRGD_XDP XDP_OBS6 XDP_OBS7 2 /XDP 1KOhm CPUPWRGD_XDP HOOK1 /XDP 49.9Ohm T0701 T702 T703 Update 1105 (R2.0) (3) XDP_TCLK PCIE_CLK_XDP_P PCIE_CLK_XDP_N 1 SMB_DAT_XDP SMB_CLK_XDP 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 NP_NC1 NP_NC2 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 +VTT_CPU B +VTT_CPU B (3) (3) 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 R0711 49.9Ohm /XDP CLK_ITP_BCLK (3) CLK_ITP_BCLK# (3) XDP_RST#_R R0707 /XDP 1KOhm (3) XDP_PREQ# (3) XDP_PRDY# H_XDPRST# (3) XDP_DBRESET# (3,22) XDP_TDO (3) XDP_TRST# (3) XDP_TDI (3) XDP_TMS (3) 62 BtoB_CON_60P /XDP A A Title : CPU(5)_XDP Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 D D C C B B A A Title : ASUSTeK COMPUTER INC NB1 Size NB_**** CH_Lin Project Name Custom Date: Engineer: Rev M60JV 1.01 Thursday, November 12, 2009 Sheet of 96 Main Board D D C C B B A A Title : NB_**** ASUSTeK COMPUTER INC NB1 Size CH_Lin Project Name Custom Date: Engineer: Rev M60JV 1.01 Thursday, November 12, 2009 Sheet of 96 Main Board D D C C B B A A Title : NB_**** ASUSTeK COMPUTER INC NB1 Size CH_Lin Project Name Custom Date: Engineer: Rev M60JV 1.01 Thursday, November 12, 2009 Sheet 10 of 96 /X PD8301 1N4148W S PR8301 Irat=3A PL8301 PJP8301 /X 17 16 15 14 13 GND2 TON EN/DEM NC2 BOOT PC8307 0.56UH PQ8303 P_+VTT_CPU_SRC_60 RJK0355DPA-00-J0 19 21 2 +VTT_CPU C 3MM_OPEN_5MIL PJP8306 /X 2 3MM_OPEN_5MIL+VTT_PCH P_+VTT_CPU_LG_20 RT8202APQW PJP8305 PR8308 2 SHORT_PIN /X PR8310 2 Power stage 3.9KOhm PR8350 1 15KOhm 1% 1 402KOhm B PR8307 1Ohm 4 G G GND4 GND6 S S PU8301B 3MM_OPEN_5MIL PJP8304 + /X D PQ8302 D SHORT_PIN /X /X PC8306 1000PF/50V 18KOhm 1UF/10V 1 RJK0355DPA-00-J0 GND3 GND5 PJP8303 PR8306 2 220UF/2V 1 PJP8302 PL8303 PCE8301 NC1 GND1 PGND LGATE P_+VTT_CPU_HG_20 P_+VTT_CPU_PHASE_20 P_+VTT_CPU_OC_10 +VTT_CPUO (18A) 12 11 10 UGATE PHASE OC VDDP RT8202APQW 18 20 PC8304 10UF/25V G PC8303 10UF/25V S +VTT_CPU_PW RGD G VOUT VDD FB PGOOD N/A S (32) C RJK0355DPA-00-J0 /X 0.1UF/25V +5VSUSO PU8301A P_+VTT_CPU_VOUT_10 P_+VTT_CPU_VDD_20 P_+VTT_CPU_FB_10 PQ8304 RJK0355DPA-00-J0 PC8302 PC8305 1UF/10V PQ8301 PD8302 BAT54CW P_+VTT_CPU_TON_10 AC_BAT_SYS Irat=3A 70Ohm/100Mhz SHORT_PIN /X D PR8303 4.7Ohm P_+VTT_CPU_IN_SHAPE +5VSUSO 1 PR8304 510KOhm 1% D P_+VTT_CPU_EN_10 +5VSUSO D 70Ohm/100Mhz PL8302 PC8301 0.1UF/25V 0Ohm /X SUSB_EC# D (30,32,45,57,84,85,87) 0Ohm PR8302 2 (32) SYSTEM_PW RGD PC8309 place to IC 0.1UF/25V B I/P Current: I in = Vo*Io/( 0.75 * Vin) =2.3 A 820PF/50V PC8308 Ripple Current: Iripple=2.8A 0 0.945 -10% 0.998 -5% 1.049 Normal 1 1.103 +5% Dynamic: +VTT_CPU PR8343 PR8341 54.9KOhm 28KOhm Controller Voltage & Current: PQ8340A UM6K1N PC8341 0.1UF/25V UM6K1N VTT_CPU_SEL2 (20) A H-side and L-side MOSFET:RJK0355DPA-00-JO WPAK Rds(on)=16.5mOhm (Vgs=4.5V) Icont=30A (T=25) Ipeak=120A (Pause=99ms) (EC to power) 24 CPU_VRON T7=10~100us +VCORE 25 CLK_PWRGD (inversion of CLK_EN#) A T8=3~20ms (power to EC) 26 VRM_PWRGD A (EC to PCH) 27 PM_PWROK T9=10ms (PCH to CPU) 28 H_DRAM_PWRGD Title : Power On Timing (PCH to CPU) 29 H_CPUPWRGD Size (PCH to CPU) 30 BUF_PLT_RST# Engineer: CH_Lin Project Name C M60JV Date: Thursday, November 12, 2009 Rev 1.01 Sheet 97 of 96 ... Title : CPU(5)_XDP Engineer: ASUSTeK COMPUTER INC NB1 Size C Date: CH_Lin Project Name Rev M60JV Thursday, November 12, 2009 1.01 Sheet of 96 D D C C B B A A Title : ASUSTeK COMPUTER INC NB1 Size... : NB_**** ASUSTeK COMPUTER INC NB1 Size CH_Lin Project Name Custom Date: Engineer: Rev M60JV 1.01 Thursday, November 12, 2009 Sheet of 96 Main Board D D C C B B A A Title : NB_**** ASUSTeK COMPUTER... NB_**** ASUSTeK COMPUTER INC NB1 Size CH_Lin Project Name Custom Date: Engineer: Rev M60JV 1.01 Thursday, November 12, 2009 Sheet 11 of 96 Main Board D D C C B B A A Title : NB_**** ASUSTeK COMPUTER