A B C D E 1 Compal confidential 2 ISKAA LA-3481P Schematics Document Mobile Merom uFCPGA with Intel Crestline_PM+ICH8-M core logic 3 2007-06-23 REV:2.0A 4 Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Compal Electronics, Inc Cover Sheet Document Number Rev 2.0 LA-3481P Saturday, June 23, 2007 Sheet E of 47 A B C D E ISKAA Sub-board Compal confidential ATI VGA/B LS-3481P Rev 1.0 Model : ISKAA File Name : LA-3481P ATI VGA/B LS-3486P Rev 1.0 SW/B LS-3482P Rev 1.0 Mobile Merom Santa Rosa Platform Fan Control Thermal Sensor ADM1032ARMZ uFCPGA-478 CPU page Clock Generator ICS 9LPR365 page page 4,5,6 CRT/B LS-3483P Rev 1.0 USB/B LS-3484P Rev 1.0 Robson/B LS-3445P Rev 1.0 page 16 Finger Print/B LS-3401P Rev 1.0 H_A#(3 35) H_D#(0 63) HDMI Conn LCD Conn page 18 CRT & TV-out page 19 FSB 667/800MHz 1.05V Intel Crestline MCH page 17 FCBGA 1299 ATI M72/76 with 256/512 VRAM VGA/B Conn 3G Int Camera USB x page USB port Mini-Card New Card socket page 31 USB port PCI-E BUS 3.3V 48MHz USB port USB 2.5GHz Robson WLAN PCI BUS page 26 page 31 USB/B conn 33 USB2.0 Bluetooth Conn page 33 Azalia SATA1.5GHz PATA page 20,21,22,23 page 31 USB port 4, page 33 USB port 0, USB port 3.3V 480MHz 3.3V ATA-100 RTL8111B/RTL8101E mBGA-676 3.3V 33 MHz 10/100/1000 LAN USB x conn page 33 3.3V 24.576MHz/48Mhz Mini-Card page 14,15 DMI X4 page 30 Intel ICH8-M Mini-Card BANK 0, 1, 2, Dual Channel page 7,8,9,10,11,12,13 PCI-Express x 16 page 19 DDR2-SO-DIMM X2 DDR2 667MHz 1.8V USB port Tweeter/HP Amplifier & Int-Mic USB1.1 Finger Printer page 28 APA2056 page 33 MDC V1.5 page 30 RJ45/11 CONN page 26 LPC BUS HD Audio Codec 3.3V 33 MHz ALC268 page 27 CardBus Controller TI PCI8412 SATA SATA HDD Connector page 32 page 24,25 LED SATA page 34 Slot page 25 RTC CKT 1394 port page 24 5in1 Slot ENE KB926 SATA HDD Connector Audio Jack page 32 page 24 page 28 page 29 page 21 PATA Slave PATA ODD Connector Power On/Off CKT page 32 page 34 Touch Pad DC/DC Interface CKT page 34 Int.KBD SPI BIOS page 34 page 34 CIR page 33 page 35 Compal Secret Data Security Classification Power Circuit DC/DC 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Page 36~43 Date: A B C D Compal Electronics, Inc Block Diagram Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 E of 47 Voltage Rails Board ID / SKU ID Table for AD channel S0-S1 S3 S5 Adapter power supply (18.5V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +VCC_CORE Core voltage for CPU ON OFF OFF +0.9VS 0.9V switched power rail for DDRII Vtt ON OFF OFF +1.05VS 1.05V power rail for Processor I/O and MCH/ICH core power ON OFF OFF OFF Power Plane Description VIN Vcc Ra/Rc/Re Board ID D +1.25VS 1.25V power rail for MCH/ICH core power ON OFF +1.5VS 1.5V switched power rail for PCI-E interface ON OFF OFF +1.8V 1.8V power rail for DDRII ON ON OFF OFF +1.8VS 1.8V switched power rail ON OFF +2.5VS 2.5V switched power rail for MCH video PLL ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +RTC_VCC RTC power ON ON ON Board ID C External PCI Devices PCI Device ID IDSEL # REQ/GNT # PIRQ 1394 D0 AD20 A,B,C,D CARD BUS D4 AD20 A,B,C,D 5IN1 D4 AD20 A,B,C,D B HEX ADDRESS SM1 24C16 A0H 1010000Xb SM1 SMART BATTERY 16H 0001011Xb SM2 ADM0132 CPU THERMAL MONITOR 98H 1001100Xb V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V V AD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V SKU ID V AD_BID max 0.100 V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V D BTO Option Table BTO Item 2nd HDD BOM Structure 2HDD@ 100M@ LAN 1000M@ WLAN WLAN@ GM@ NB PM@ BT BT@ MIC MIC@ CIR CIR@ FINGER PRINT FP@ HDMI HDMI@ PCB Revision 0.1 0.2 0.3 0.4 1.0 2.0 2A SKU ID Table KB926 I2C / SMBUS ADDRESSING DEVICE 3.3V +/- 5% 100K +/- 1% Rb / Rd / Rf 8.2K +/- 1% 18K +/- 1% 33K +/- 1% 56K +/- 1% 100K +/- 1% 200K +/- 1% NC BOARD ID Table Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF DEVICE SKU 10 10G Camera Camera@ Robson Robson@ Express Card NEWCARD@ HD-DVD 3G@ C B USB PORT LIST ICH8-M SM Bus address DEVICE HEX ADDRESS DDR SO-DIMM A0 10100000 DDR SO-DIMM A4 10100100 CLOCK GENERATOR (EXT.) D2 11010010 DEVICE PORT RIGHT USB Port (Samll Board) RIGHT USB Port (Samll Board) 3G Card N.C LEFT USB Port LEFT USB Port Fingerprint or Felica Blue Tooth Internal Camera New Card A A Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Notes List Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 of 47 +5VS B Q53 FMMT619_SOT23 D1 R629 100_0402_5% E 10K_0402_5% +3VS 1 R20 8.2K_0402_5% D2 R23 H_IERR# R14 56_0402_5% ITP_PREQ R604 54.9_0402_1% ITP_TDI R11 150_0402_1% @R605 @ R605 54.9_0402_1% Please add the 10uf capacitor if the +5VS power source not stable JP2 ITP_TDO 3 GND GND D ITP_TMS R10 39_0402_1% H_PROCHOT# R310 56_0402_5% ITP_TCK R22 27_0402_1% ITP_TRST# R21 649_0402_5% ACES_85205-03001 C13 @ 1000P_0402_50V7K 10K_0402_5% +1.05VS Place close to CPU within 500mil C926 @ 10U_0805_10V4Z +FAN1_VOUT R19 0.1U_0402_16V4Z D 1N4148_SOT23 C925 @ 1SS355_SOD323 P C - PU5B + G @ LM358DT_SO8 EN_DFAN1 VS H_A#[3 35] H_A#[3 35] FAN_SPEED1 C14 1000P_0402_50V7K JP1A 2@ 180P_0402_50V8J H_INIT# C2 2@ 180P_0402_50V8J H_A20M# C3 2@ 180P_0402_50V8J H_INTR H_STPCLK# H_INTR H_NMI H_SMI# D5 C6 B4 A3 STPCLK# LINT0 LINT1 SMI# M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10] H_INIT# H4 H_LOCK# H_LOCK# C1 F3 F4 G3 G2 H_RESET# H_RS#0 H_RS#1 H_RS#2 H_TRDY# H_RESET# H_RS#0 H_RS#1 H_RS#2 H_TRDY# HIT# HITM# G6 E4 H_HIT# H_HITM# H_HIT# H_HITM# H_PROCHOT# 2@ 180P_0402_50V8J H_NMI 2@ 180P_0402_50V8J H_SMI# C6 2@ 180P_0402_50V8J H_STPCLK# C7 2@ 180P_0402_50V8J H_IGNNE# C8 2@ 180P_0402_50V8J H_FERR# OCP# +1.05VS R304 @ 330_0402_5% AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 ITP_PREQ ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET# XDP/ITP SIGNALS BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# H_THERMTRIP# ITP_DBRESET# Q51 @ MMBT3904_SOT23 MAINPWON THERMAL PROCHOT# THERMDA THERMDC THERMTRIP# D21 A24 B25 H_PROCHOT# H_THERMDA H_THERMDC C7 H_THERMTRIP# H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil H_THERMTRIP# B H CLK BCLK[0] BCLK[1] A22 A21 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK# Thermal Sensor ADM1032ARM +3VS conn@ Merom Ball-out Rev 1a C9 0.1U_0402_16V4Z U1 H_THERMDA D+ VDD1 H_THERMDC D- ALERT# EC_SMB_CK2 SCLK THERM# EC_SMB_DA2 SDATA GND 2200P_0402_50V7K C5 C OCP# Q1 @ MMBT3904_SOT23 LOCK# RESET# RS[0]# RS[1]# RS[2]# TRDY# R16 @ 56_0402_5% 2 CONTROL H_BR0# C10 C4 A A20M# FERR# IGNNE# H_IERR# H_INIT# +1.05VS H_DEFER# H_DRDY# H_DBSY# C C1 H_STPCLK# H_INTR H_NMI H_SMI# A6 A5 C4 H_BR0# D20 B3 E H_A20M# H_FERR# H_IGNNE# H_DEFER# H_DRDY# H_DBSY# H_ADS# H_BNR# H_BPRI# B B A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# H5 F21 E1 F1 ICH H_A20M# H_FERR# H_IGNNE# Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# H_ADS# H_BNR# H_BPRI# IERR# INIT# BR0# ADDR GROUP H_ADSTB#1 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1 DEFER# DRDY# DBSY# H1 E2 G5 C H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 K3 H2 K2 J3 L1 ADS# BNR# BPRI# E H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# B H_ADSTB#0 J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 ADDR GROUP C H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0 RESERVED 2 ADM1032ARMZ_RM8 A Place Caps Close to CPU Socket Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Merom(1/3)-AGTL+/XDP Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 of 47 +VCC_CORE C868 @ 1K_0402_5% @ 1K_0402_5% R732 +GTL_REF0 TEST1 TEST2 @ 0.1U_0402_16V4Z TEST4 @ 0_0402_5% CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 AD26 C23 D25 C24 AF26 AF1 A26 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 B22 B23 C21 BSEL[0] BSEL[1] BSEL[2] H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 MISC COMP[0] COMP[1] COMP[2] COMP[3] R26 U26 AA1 Y1 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# E5 B5 D24 D6 D7 AE6 H_DSTBN#3 H_DSTBP#3 H_DINV#3 COMP0 COMP1 COMP2 COMP3 H_DPSLP# H_PWRGOOD H_CPUSLP# H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI# conn@ Merom Ball-out Rev 1a CPU_BSEL 166 B 200 CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 1 Resistor placed within 0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal COMP[0,2] trace width is 18 mils COMP[1,3] trace width is mils VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100] VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16] G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 VCCA[01] VCCA[02] B26 C26 VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] AD6 AF5 AE5 AF4 AE3 AF3 AE2 VCCSENSE AF7 VCCSENSE VSSSENSE AE7 VSSSENSE D +1.05VS C + C17 330U_D2E_2.5VM_R9 +1.5VS CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 2 0.01U_0402_25V7K R707 R708 AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067] AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 Near pin B26 H_DSTBN#1 H_DSTBP#1 H_DINV#1 D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 C18 C D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# DATA GRP Close to CPU pin AD26 within 500mils H_D#16 N22 H_D#17 K25 H_D#18 P26 H_D#19 R23 H_D#20 L23 H_D#21 M24 H_D#22 L22 H_D#23 M23 H_D#24 P25 H_D#25 P23 H_D#26 P22 H_D#27 T24 H_D#28 R24 H_D#29 L25 H_D#30 T25 H_D#31 N25 L26 M26 N24 H_DSTBN#2 H_DSTBP#2 H_DINV#2 H_D#[48 63] R33 27.4_0402_1% 1 R37 2K_0402_1% JP1C R32 54.9_0402_1% 2 H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_D#[16 31] +GTL_REF0 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 R31 27.4_0402_1% R35 1K_0402_1% D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 DATA GRP +1.05VS D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# DATA GRP D +VCC_CORE H_D#[32 47] JP1B H_D#0 E22 H_D#1 F24 H_D#2 E26 H_D#3 G22 H_D#4 F23 H_D#5 G25 H_D#6 E25 H_D#7 E23 H_D#8 K24 H_D#9 G24 H_D#10 J24 H_D#11 J23 H_D#12 H22 H_D#13 F26 H_D#14 K22 H_D#15 H23 J26 H26 H25 R30 54.9_0402_1% H_D#[0 15] DATA GRP 10U_0805_10V4Z C19 Near pin C26 VCCSENSE VSSSENSE B conn@ Merom Ball-out Rev 1a +VCC_CORE R34 100_0402_1% VCCSENSE R36 100_0402_1% VSSSENSE Close to CPU pin within 500mils Length match within 25 mils The trace width/space/other is 20/7/25 A A Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Merom(2/3)-AGTL+/PWR Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 of 47 +VCC_CORE Place these capacitors on L8 (North side,Secondary Layer) C21 10U_0805_6.3V6M C22 10U_0805_6.3V6M C23 10U_0805_6.3V6M C24 10U_0805_6.3V6M C25 10U_0805_6.3V6M C26 10U_0805_6.3V6M C27 10U_0805_6.3V6M C28 10U_0805_6.3V6M +VCC_CORE D D JP1D VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 Place these capacitors on L8 (North side,Secondary Layer) C29 10U_0805_6.3V6M C30 10U_0805_6.3V6M C31 10U_0805_6.3V6M C32 10U_0805_6.3V6M C33 10U_0805_6.3V6M C34 10U_0805_6.3V6M C35 10U_0805_6.3V6M C36 10U_0805_6.3V6M +VCC_CORE Place these capacitors on L8 (Sorth side,Secondary Layer) C37 10U_0805_6.3V6M C38 10U_0805_6.3V6M C39 10U_0805_6.3V6M C40 10U_0805_6.3V6M C41 10U_0805_6.3V6M C42 10U_0805_6.3V6M C43 10U_0805_6.3V6M C44 10U_0805_6.3V6M +VCC_CORE Place these capacitors on L8 (Sorth side,Secondary Layer) C45 10U_0805_6.3V6M C46 10U_0805_6.3V6M C47 10U_0805_6.3V6M C48 10U_0805_6.3V6M C49 10U_0805_6.3V6M C50 10U_0805_6.3V6M C51 10U_0805_6.3V6M C52 10U_0805_6.3V6M Mid Frequence Decoupling C +VCC_CORE 330U_D2E_2.5VM_R9 South Side Secondary of CPU Socket @ C53 1 + C54 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 + + C55 C56 330U_D2E_2.5VM_R9 + C57 330U_D2E_2.5VM_R9 + @ C58 North Side Secondary of CPU Socket ESR 1980uF + 2 330uF ESR 7m ohm X PCS 330U_D2E_2.5VM_R9 B +1.05VS C59 @ B VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] + conn@ Merom Ball-out Rev 1a 330U_D2E_2.5VM_R9 C A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 1 C60 0.1U_0402_16V4Z C61 0.1U_0402_16V4Z C62 0.1U_0402_16V4Z C63 0.1U_0402_16V4Z C64 0.1U_0402_16V4Z C65 0.1U_0402_16V4Z Place these inside socket cavity on Bottom layer (North side Secondary) A A Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Merom(3/3)-GND&Bypass Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 of 47 H_D#[0 63] R40 221_0603_1% H_SWNG1 R41 C66 0.1U_0402_16V4Z 100_0402_1% H_RCOMP R42 24.9_0402_1% C 10-mil wide with 20-mil spacing +1.05VS R43 R44 54.9_0402_1% H_SCOMP 54.9_0402_1% H_SCOMP# impedance is 55 ohm Width is 10mil E2 G2 G7 M6 H7 H3 G4 F3 N8 H2 M10 N12 N9 H5 P13 K9 M2 W10 Y8 V4 M3 J1 N5 N3 W6 W9 N2 Y7 Y9 P4 W3 N1 AD12 AE3 AD9 AC9 AC7 AC14 AD11 AC11 AB2 AD7 AB1 Y3 AC6 AE2 AC5 AG3 AJ9 AH8 AJ14 AE9 AE11 AH12 AJ5 AH5 AJ6 AE7 AJ7 AJ2 AE5 AJ3 AH2 AH13 H_A#[3 35] H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 B H_RESET# H_CPUSLP# H_AVREF +1.05VS U3A H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 +1.05VS D HOST H_SWNG1 H_RCOMP B3 C2 H_SWING H_RCOMP H_SCOMP H_SCOMP# W1 W2 H_SCOMP H_SCOMP# H_RESET# H_CPUSLP# B6 E5 H_CPURST# H_CPUSLP# B9 A9 H_AVREF H_DVREF H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7 H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 K5 L2 AD13 AE13 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 M7 K3 AD2 AH11 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 L7 K2 AC2 AJ10 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 M14 E13 A11 H13 B12 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#_0 H_RS#_1 H_RS#_2 E12 D7 D8 H_RS#0 H_RS#1 H_RS#2 D H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 C H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#[0 4] H_RS#[0 2] B CRESTLINE ES_FCBGA1299 PMR3@ R211 1K_0402_1% H_AVREF 0.1U_0402_16V4Z R212 2K_0402_1% C67 A A Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/05 Issued Date Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Crestline (1/7) Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet of 47 DDRA_SMA14 DDRB_SMA14 MCH_CFG_5 R51 @ 4.02K_0402_1% MCH_CFG_9 R53 @ 4.02K_0402_1% R55 @ 4.02K_0402_1% R56 @ 4.02K_0402_1% R57 @ 4.02K_0402_1% MCH_CFG_12 MCH_CFG_13 C MCH_CFG_16 MCH_CFG_19 R58 4.02K_0402_1% R60 @ 4.02K_0402_1% MCH_CFG_9 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16 MCH_CFG_19 MCH_CFG_20 R733 @ 56_0402_5% CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20 CFG Refer Strap Pin Table +1.05VS R71 PM_BMBUSY#_R H_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1_R G41 L39 L36 0_0402_5%1 J36 AW49 MCH_RSTIN# R70 AV20 100_0402_5% H_THERMTRIP# N20 PM_DPRSLPVR_R G36 0_0402_5% PM_EXTTS#0 10K_0402_5% PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR DDRA_SCS0# DDRA_SCS1# DDRB_SCS0# DDRB_SCS1# SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3 BH18 BJ15 BJ14 BE16 DDRA_ODT0 DDRA_ODT1 DDRB_ODT0 DDRB_ODT1 SM_RCOMP SM_RCOMP# BL15 BK14 SM_RCOMP_VOH SM_RCOMP_VOL BK31 BL31 SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF_0 SM_VREF_1 AR49 AW4 SM_VREF NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 R50 1K_0402_1% C70 C71 2.2U_0603_6.3V6K 0.01U_0402_25V7K SMRCOMPP SMRCOMPN DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# B42 C42 H48 H47 CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC# CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC# PEG_CLK PEG_CLK# K44 K45 CLK_MCH_3GPLL CLK_MCH_3GPLL# CLK_MCH_3GPLL CLK_MCH_3GPLL# DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 AN47 AJ38 AN42 AN46 DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 AM47 AJ39 AN41 AN45 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 AJ46 AJ41 AM40 AM44 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 AJ47 AJ42 AM39 AM43 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3 +1.8V SMRCOMPP R52 20_0402_1% SMRCOMPN R54 20_0402_1% +1.8V C R59 1K_0402_1% SM_VREF C72 R61 1K_0402_1% 0.1U_0402_16V4Z GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 E35 A39 C38 B39 GFX_VR_EN E36 R7341 R7351 R7361 R737 R64 1K_0402_1% @ 22K_0402_5% @ 22K_0402_5% @ 22K_0402_5% @ 22K_0402_5% CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF AM49 AK50 AT43 AN49 AM50 CL_VREF R69 392_0402_1% CL_CLK0 CL_DATA0 PWROK CL_RST# CL_VREF SDVO_SDAT SDVO_CTRL_CLK SDVO_CTRL_DATA CLK_REQ# ICH_SYNC# H35 K36 G39 G40 TEST_1 TEST_2 SDVO_SDAT MCH_CLKREQ# MCH_ICH_SYNC# A37 MCH_TEST_1 R32 MCH_TEST_2 PM@ 0_0402_5% R757 R73 R72 0_0402_5% A 20K_0402_5% CRESTLINE ES_FCBGA1299 PMR3@ Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/05 Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B +3VS 0.1U_0402_16V4Z Issued Date D SM_RCOMP_VOL C73 NC BJ51 BK51 BK50 BL50 BL49 BL3 BL2 BK1 BJ1 E1 A5 C51 B50 A50 A49 BK2 +3VS MCH_CLKREQ# 10K_0402_5% 2 ME R68 0_0402_5%1 0_0402_5%1 MISC R66 R67 PM PM_EXTTS#0 PM_EXTTS#1 PWROK PLT_RST# H_THERMTRIP# DPRSLPVR R65 BG20 BK16 BG16 BE13 2.2U_0603_6.3V6K 0.01U_0402_25V7K +1.25VS PM_BMBUSY# H_DPRSTP# R63 SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3 R49 3.01K_0402_1% C69 MCH_CFG_5 PM_EXTTS#1_R 10K_0402_5% DDRA_CKE0 DDRA_CKE1 DDRB_CKE0 DDRB_CKE1 C68 CFG[19:18] have internal pull down R62 BE29 AY32 BD39 BG37 SM_RCOMP_VOH MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 CFG[17:3] have internal pull up P27 N27 N24 C21 C23 F23 N23 G23 J20 C20 R24 L23 J23 E23 E20 K23 M20 M24 L32 N33 L35 GRAPHICS VID MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 DMI Intel recommend 4.02K_1% A SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4 +3VS MCH_CFG_20 B DDRA_CLK0# DDRA_CLK1# DDRB_CLK0# DDRB_CLK1# DDRA_SMA14 DDRB_SMA14 AW30 BA23 AW25 AW23 R48 1K_0402_1% * (Default) = SDVO Device Present SM_CK#_0 SM_CK#_1 SM_CK#_3 SM_CK#_4 = No SDVO Device Present DDRA_CLK0 DDRA_CLK1 DDRB_CLK0 DDRB_CLK1 SDVO_CTRLDATA RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45 AV29 BB23 BA25 AV23 CFG20 (PCIE/SDVO select) H10 B51 BJ20 BK22 BF19 BH20 BK18 BJ18 BF23 BG23 BC23 BD24 BJ29 BE24 BH39 AW20 BK20 C48 D47 B44 C44 A35 B37 B36 B34 C34 SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4 CFG19 = Normal Operation *(Default) = DMI Lane Reversal Enable = Only PCIE or SDVO is operational * (Default) = PCIE/SDVO are operating simu MUXING CFG16 RSVD CFG[13:12] RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 DDR CFG9 D P36 P37 R35 N35 AR12 AR13 AM12 AN13 J12 AR37 AM36 AL36 AM37 D20 011 = 667MT/s FSB 010 = 800MT/s FSB = DMI x = DMI x * (Default) = Lane Reversal Enable = Normal Operation * (Default) 00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation * (Default) = Dynamic ODT Disabled = Dynamic ODT Enabled * (Default) CFG5 +1.8V CLK Strap Pin Table CFG[2:0] U3B Crestline (2/7) Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 of 47 DDRA_SDQ[0 63] DDRA_SDQ[0 63] DDRB_SDM[0 7] DDRB_SDM[0 7] DDRA_SMA[0 13] DDRA_SMA[0 13] DDRB_SDQ[0 63] DDRB_SDQ[0 63] DDRA_SDM[0 7] DDRA_SDM[0 7] DDRB_SMA[0 13] DDRB_SMA[0 13] D D B AT45 BD44 BD42 AW38 AW13 BG8 AY5 AN6 DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2 DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7# SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16 DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 SA_CAS# SA_RAS# SA_WE# BL17 BE18 BA19 SA_RCVEN# AY20 MEMORY DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7 DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7# DDRA_SCAS# DDRA_SRAS# DDRA_SWE# CRESTLINE ES_FCBGA1299 PMR3@ AP49 AR51 AW50 AW51 AN51 AN50 AV50 AV49 BA50 BB50 BA49 BE50 BA51 AY49 BF50 BF49 BJ50 BJ44 BJ43 BL43 BK47 BK49 BK43 BK42 BJ41 BL41 BJ37 BJ36 BK41 BJ40 BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12 BJ10 BL9 BK5 BL5 BK9 BK10 BJ8 BJ6 BF4 BH5 BG1 BC2 BK3 BE4 BD3 BJ2 BA3 BB3 AR1 AT3 AY2 AY3 AU2 AT2 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 MEMORY SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63 DDRA_SBS0# DDRA_SBS1# DDRA_SBS2# SYSTEM BB19 BK19 BF29 A SA_BS_0 SA_BS_1 SA_BS_2 B U3E SYSTEM SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 DDR C AR43 AW44 BA45 AY46 AR41 AR45 AT42 AW47 BB45 BF48 BG47 BJ45 BB47 BG50 BH49 BE45 AW43 BE44 BG42 BE40 BF44 BH45 BG40 BF40 AR40 AW40 AT39 AW36 AW41 AY41 AV38 AT38 AV13 AT13 AW11 AV11 AU15 AT11 BA13 BA11 BE10 BD10 BD8 AY9 BG10 AW9 BD7 BB9 BB5 AY7 AT5 AT7 AY6 BB7 AR5 AR8 AR9 AN3 AM8 AN10 AT9 AN9 AM9 AN11 DDR U3D DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63 SB_BS_0 SB_BS_1 SB_BS_2 AY17 BG18 BG36 SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2 DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3 DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7# SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13 DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 SB_CAS# SB_RAS# SB_WE# BE17 AV16 BC17 SB_RCVEN# AY18 DDRB_SBS0# DDRB_SBS1# DDRB_SBS2# DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7 DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7# C B DDRB_SCAS# DDRB_SRAS# DDRB_SWE# CRESTLINE ES_FCBGA1299 PMR3@ A A Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/05 Issued Date Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Crestline (3/7) Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet of 47 PCIE_MTX_C_GRX_N[0 15] PCIE_MTX_C_GRX_P[0 15] U3C PCIE_GTX_C_MRX_N[0 15] GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+ GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+ D46 C45 D44 E42 LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK GMCH_TXOUT0 GMCH_TXOUT1 GMCH_TXOUT2- GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2- G51 E51 F49 LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+ GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+ G50 E50 F48 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 GMCH_TZOUT0 GMCH_TZOUT1 GMCH_TZOUT2- GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2- G44 B47 B45 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+ C GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+ E44 A47 A45 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 2.4K_0402_5% R87 75_0402_1% GMCH_TV_COMPS 150_0402_1% GMCH_TV_LUMA R88 R89 LVDS_IBG GMCH_TV_LUMA GMCH_TV_CRMA GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA 150_0402_1% GMCH_TV_CRMA TV_DCONSEL_0 TV_DCONSEL_1 R90 R91 150_0402_1% GMCH_CRT_B 150_0402_1% GMCH_CRT_G GMCH_CRT_B GMCH_CRT_G 150_0402_1% GMCH_CRT_R TVA_DAC TVB_DAC TVC_DAC F27 J27 L27 TVA_RTN TVB_RTN TVC_RTN M35 P33 TV_DCONSEL_0 TV_DCONSEL_1 H32 G32 K29 J29 F29 E29 GMCH_CRT_G GMCH_CRT_R CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED# B GMCH_CRT_CLK GMCH_CRT_DATA GMCH_CRT_HSYNC GMCH_CRT_VSYNC GMCH_CRT_CLK GMCH_CRT_DATA R93 CRT_IREF 1.3K_0402_1% C32 CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC CRT_TVO_IREF PEG_COMP PEG_COMPI PEG_COMPO N43 M43 PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_N15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42 PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_P15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39 AC46 AC49 AC42 AH39 AE49 AH44 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15 M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38 AD47 AC50 AD43 AG39 AE50 AH43 10mils PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15 R75 C85 24.9_0402_1% PCIE_GTX_C_MRX_P[0 15] +1.05VS PCIE_MTX_C_GRX_P[0 15] PCIE_GTX_C_MRX_N[0 15] PCIE_GTX_C_MRX_P[0 15] D C Close to U41 C87 C89 C91 C93 C95 C97 C99 C84 PM@ 0.1U_0402_16V7K C86 PM@ 0.1U_0402_16V7K C88 PM@ 0.1U_0402_16V7K C90 PM@ 0.1U_0402_16V7K C92 PM@ 0.1U_0402_16V7K C94 PM@ 0.1U_0402_16V7K C96 PM@ 0.1U_0402_16V7K C98 PM@ 0.1U_0402_16V7K 1 1 1 1 Close to U41 C101 C103 C105 C107 C109 C111 C113 C115 C100 PM@ 0.1U_0402_16V7K C102 PM@ 0.1U_0402_16V7K C104 PM@ 0.1U_0402_16V7K C106 PM@ 0.1U_0402_16V7K C108 PM@ 0.1U_0402_16V7K C110 PM@ 0.1U_0402_16V7K C112 PM@ 0.1U_0402_16V7K C114 PM@ 0.1U_0402_16V7K 1 1 1 1 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15 B CRESTLINE ES_FCBGA1299 PMR3@ +3VS A K33 G35 F33 E33 VGA GMCH_CRT_R R92 GMCH_CRT_B E27 G27 K27 TV R86 GRAPHICS LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDS_IBG LVDS L41 L43 N41 N40 LCTLA_CLK LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA GMCH_LCD_CLK GMCH_LCD_DATA GMCH_ENVDD D L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN PCI-EXPRESS GMCH_ENBKL J40 H39 E39 E40 C37 D35 K40 PCIE_MTX_C_GRX_N[0 15] R667 2.2K_0402_5% GMCH_LCD_CLK R669 2.2K_0402_5% GMCH_LCD_DATA R671 10K_0402_5% LCTLB_DATA R673 10K_0402_5% LCTLA_CLK R675 2.2K_0402_5% GMCH_CRT_CLK R677 2.2K_0402_5% GMCH_CRT_DATA R679 2.2K_0402_5% TV_DCONSEL_0 R681 2.2K_0402_5% TV_DCONSEL_1 A Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/05 Issued Date Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Crestline(4/7) Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet 10 of 47 +5VALW @ 0_0603_1% R502 Camera@ 0_0603_1% USB CONN +3VS +USB_VCCC C626 Camera@ 0.1U_0402_16V4Z USB20_N8 USB20_P8 1 0.1U_0402_16V4Z C639 1000P_0402_50V7K D ACES_85201-0505 USB20_N4 USB20_P4 USB20_N4 USB20_P4 3 C638 JP31 D25 PSOT24C_SOT23 @ CIR + D24 SM05_SOT23 @ D38 @ SM05_SOT23 ACES_88266-05001 Camera@ 3 +5VALW +5VALW VCC DD+ GND GND GND GND GND P-TWO_CU304D-A0G1G-P +USB_VCCC CIR@ R503 100_0805_5% U29 CIR_IN C C629 4.7U_0805_10V4Z CIR@ GND VCC Vout GND C637 GND IN IN EN# OUT OUT OUT FLG USB CONN.2 G528_SO8 +USB_VCCC USB_EN# USB_EN# W=60mils 150U_D_6.3VM C642 IRM-V538/TR1_3P CIR@ + C643 1 0.1U_0402_16V4Z C644 1000P_0402_50V7K C JP33 USB20_N5 USB20_P5 USB20_N5 USB20_P5 U30 1U_0805_16V7K GND1 GND2 150U_D_6.3VM C636 USB20_N6 USB20_P6 FP@ JP28 FP@ JP27 W=60mils C627 0.1U_0402_16V4Z D Fingerprint Conn W=20mils +CAM_VDD R951 +5VS Int Camera Conn D26 PSOT24C_SOT23 @ GND GND P-TWO_CU304D-A0G1G-P BlueTooth Interface VCC DD+ GND GND GND +3VS +5VS 1000P_0402_50V7K BT@ Q18 2N7002_SOT23-3 BT@ USB Small Board Q17 BT@AO3413_SOT23 B +BT_VCC +5VALW Module ID Indication for polarity of reset Reset input High Active > Low , Reset input Low Active > Open JP30 0_0402_5% BT@ A 0.1U_0402_16V4Z C634 4.7U_0805_10V4Z WLAN_BT_DATA (MAX=200mA) +BT_VCC C931 +3VS R925 @ 4.7K_0402_5% BT@ 0.1U_0402_16V4Z C635 BT@ BT_RST# R730 USB20_P7 USB20_N7 WLAN_BT_CLK BT_DET# +USB_VCCA U31 10 2 10 C876 USB_EN# 1U_0805_16V7K S G BT_PWR 1 1 C631 D C630 0.1U_0402_16V4Z BT@ G B D R507 BT@ 100K_0402_5% S R506 1M_0402_5% BT@ GND IN IN EN# OUT OUT OUT FLG +USB_VCCA G528_SO8 JP32 USB_EN# ACES_87213-1000 BT@ USB20_P1 USB20_N1 USB20_P0 USB20_N0 10 11 12 BT@ R926 4.7K_0402_5% ACES_85201-1205 A Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/05 Issued Date Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: USB Conn./BT/Camera/CIR Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet 33 of 47 ON/OFF BUTTON +3VALW +3VALW 100K_0402_5% DAN202U_SC70 C649 D EC_ON S R537 10K_0402_5% 0_0402_5% @ R933 D41 HT-191UD_AMBER_0603 10K 2 0_0402_5% Sattlate_LED# Q58 +5VALW R592 BATT_CHG_LOW_LED# BATT_FULL_LED# HT-191NB_BLUE_0603 2 120_0402_5% SMT1-05_4P R839 SAT@ 2 120_0402_5% MODE# C683 33P_0402_50V8J @ D34 DAN202U_SC70 ON/OFF IEBTN# KSO0 MODEBTN# EC_PLAYBTN# EC_STOPBTN# EC_FRDBTN# EC_REVBTN# BUTTON_ID KSO0 10 11 12 SAT@ 1 R934 IEBTN# 1 51_ON# KSI1 KSI2 KSI3 KSI5 BUTTON_ID D58 BATT_FULL_LED# 2 B Q80 MMBT3904_SOT23 @ SAT@ D44 R594 12-21-BHC-ZL1M2RY-2C_BLUE BATT_CHG_LOW_LED# HT-191UD_AMBER_0603 VF=2.8V 2 120_0402_5% D IE_BTN# 51_ON# D35 DAN202U_SC70 JP37 C R717 SAT@ 14 SMT1-05_4P SB_Sattlate_LED# D47 D43 13 E&T_6701-Q12N-00R C682 33P_0402_50V8J @ SAT@ BATT CHARGE/FULL LED G1 10 11 12 G2 SW/LED Connector R901 SAT@ SAT@ 2 300_0402_5% SW_R MODEBTN# 1 HT-191NB_BLUE_0603 C SW4 E SW_L D42 PWR_LED_0# SW_R 1 ACIN TP_DATA TP_CLK SW_L SW3 RLZ20A_LL34 47K POWER/SUSPEND LED PWR_SUSPLED1# 0.01U_0402_25V7K TP_DATA TP_CLK TP Button D37 Satellite LED S G HT-191NB_BLUE_0603 DTA114YKA_SOT23 2 120_0402_5% Q50 2N7002_SOT23-3 D D46 R596 C692 +5VS AC IN LED +5VALW Q25 G TP_CLK 51_ON# 10 11 12 +5VS 2 1 LID_SW# NC LID_SW# NC ON/OFFBTN# 51_ON# 2N7002_SOT23-3 TP_DATA 10P_0402_50V8J GND VDD OUTPUT 0.1U_0402_16V4Z C648 D36 ON/OFF @ 33P_0402_50V8J @ 33P_0402_50V8J @ 33P_0402_50V8J @ 33P_0402_50V8J C677 C678 C679 C680 SW_L R524 47K_0402_5% JP36 SW_R R536 U35 A3212EEH_MLP6 D TP CONN Lid SW +3VALW 5 0_0402_5% 10 GND GND EC_PLAYBTN# EC_STOPBTN# EC_FRDBTN# EC_REVBTN# @ 33P_0402_50V8J @ 33P_0402_50V8J @ 33P_0402_50V8J @ 33P_0402_50V8J C685 C687 C684 C686 C For EMI ACES_85201-1005N 12-21-BHC-ZL1M2RY-2C_BLUE 3G LED HDD LED S R595 2 1 120_0402_5% HT-191NB_BLUE_0603 +3VS 2N7002_SOT23-3 Q54 2N7002_SOT23-3 Q55 G 1 D R905 100K_0402_5% S G +5VS D D45 @ HDD_LED# 120_0402_5% R716 WL&BT LED 2 R591 KS@ 300_0402_5% SPI Flash (8Mb*1) VF=1.9V KS@HT-191UD_AMBER_0603 WL_BT_LED# D40 +5VALW D49 HT-191NB_BLUE_0603 @ +5VALW +3VALW C681 47K 10K PWR_SUSP_LED VF=2.8V B 0.1U_0402_16V4Z FSEL#SPICS# Q46 DTA114YKA_SOT23 R593 EC_SPICLK 300_0402_5% PWR_SUSPLED1# 3G_LED# FRD#SPI_SO FSEL#SPICS# R870 EC_SPICLK R871 0_0402_5% W=20mils U52 SPI_CS# 0_0402_5% SPI_CLK_R 0_0402_5% SPI_SO R873 VCC W HOLD S C D VSS Q B SPI_SI 0_0402_5% FWR#SPI_SI R872 FWR#SPI_SI SST25LF080A_SO8-200mil +5VALW 47K JP49 SPI_CS# SPI_SI 10K +3VALW POWER_LED# 8 +3VALW SPI_CLK_R SPI_SO PWR_LED_0# +5VALW +5VALW A 0.1U_0402_16V4Z C646 EEPROM A R521 U34 EC_SMB_CK1 EC_SMB_DA1 VCC WP SCL SDA 100K_0402_5% A0 A1 A2 GND R523 @ E&T_2941-G08N-00E~D Q48 DTA114YKA_SOT23 R597 120_0402_5% AT24C16AN-10SU-2.7_SO8~N 100K_0402_5% 2006/08/05 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: EEPROM/TP/LID/KB/LED/SW-B Document Number Rev 2.0 LA-3481P Saturday, June 23, 2007 Sheet 34 of 47 B C 18@ 2 @ 470_0805_5% R559 18@ C720 D S G SUSP 1.8VS_GATE D 2N7002_SOT23-3 Q36 @ S C723 18@ Q37 0.1U_0603_25V7K 2N7002_SOT23-3 18@ +0.9VS +1.05VS 470_0805_5% R563 470_0805_5% R564 1 D 18@ SI4856ADY_SO8 SI4856/AO4430 G 470_0805_5% R561 Q38 S 1 D Q40 S D SUSP G 2N7002_SOT23-3 Q41 S SUSP G 2N7002_SOT23-3 2 SUSP G 2N7002_SOT23-3 3 Q39 S SYSON# G Q42 S @ 2N7002_SOT23-3 S D SUSP G 2N7002_SOT23-3 D Q27 2N7002_SOT23-3 R551 100K_0402_5% +1.5VS S S S G D G S R557 100K_0402_5% @ 470_0805_5% R565 SYSON SYSON Q32 2N7002_SOT23-3 1 D G SUSP# 29,30,38,40,41,42> 1U_0603_10V4Z D D D D 2 470_0805_5% R562 SYSON# 1 SUSP SUSP +1.8V 2R560 18@ 84.5K_0402_1% SUSP 0.1U_0603_25V7K +2.5VS R547 100K_0402_5% C896 +5VALW S @ Q64 2N7002_SOT23-3 +5VALW Q33 SUSP 2N7002_SOT23-3 G @ +VSB D G 0.1U_0603_25V7K 3VS_GATE C708 18@ D C722 1U_0603_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AO4422_SO8 C711 @ 470_0805_5% R555 C721 C710 2 AOS 4422 R806 100K_0402_5% +VSB SUSP S S S G 1 D D D D 10U_0805_10V4Z @ 10U_0805_10V4Z C715 10U_0805_10V4Z S S Q29 SUSP G 2N7002_SOT23-3 @ R554 100K_0402_5% +1.8VS U40 Q30 2N7002_SOT23-3 D S 1 C714 2 1U_0603_10V4Z 5VS_GATE D G 1 C701 @ 470_0805_5% R548 C700 AO4422_SO8 AOS 4422 R552 47K_0402_5% SUSP 2 S S S G 10U_0805_10V4Z @ D D D D C705 1 +VSB 10U_0805_10V4Z 10U_0805_10V4Z C704 +1.8V +3VS U38 +3VALW 10U_0805_10V4Z +5VS U36 E +1.8V to +1.8VS C719 +5VALW D +3VALW TO +3VS A +5VALW TO +5VS Debug Port New LPC Debug Pad MB side For EE H1 SERIRQ R540 0_0402_5% PCI_RST# LPC_AD2 LPC_DRQ#1 PCI_RST# U13B LPC_AD2 LPC_AD1 LPC_AD1 LPC_FRAME# LPC_FRAME# 10 LPC_AD0 LPC_AD0 CLK_PCI_SIO2 DEBUG_PAD-MB A B O SN74LVC08APW_TSSOP14 CLK_PCI_SIO R544 @ 14 R542 0_0402_5% LPC_AD3 P SERIRQ LPC_AD3 E51_TXD LPC_DRQ#1 G E51_RXD R538 @ 0_0402_5% E51_TXD +3VALW R539 @ 0_0402_5% E51_RXD C694 2 10_0402_5% 10P_0402_50V8J Under DDR ME Assigment Area Keep Resistor near Debug Pad and in the same side Reverse Side DIMM Pin keep away DIMM Compal Secret Data Security Classification 2006/08/05 Issued Date 2007/08/05 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Compal Electronics, Inc DC/DC I/F & Debug Pad Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 E 35 of 47 A B C D VS VIN PR2 5.6K_0402_5% + - LM393DG_SO8 PC6 0.1U_0402_16V7K 0.068U_0402_10V6K PR8 10K_0402_1% VIN PR10 68_1206_5% N1 PR11 1K_1206_5% 2 PR12 200_0603_5% VS 1 PD4 N3 RLS4148_LLDS2 PR13 1K_1206_5% B+ 2 2 PC7 0.22U_1206_25V7K PR14 100K_0402_1% VIN PC8 0.1U_0603_25V7K 2 PR15 22K_0402_1% 51_ON# High 18.384 17.901 17.430 Low 17.728 17.257 16.976 PR9 68_1206_5% PQ1 Vin Detector RTCVREF 3.3V PD2 RLS4148_LLDS2 1 RLS4148_LLDS2 CHGRTCP PD3 BATT+ PACIN PR7 10K_0402_1% PD1 RLZ4.3B_LL34 2 PC5 PACIN O 1 PR6 20K_0402_1% ACIN PU1A @ SINGA_2DW-0005-B03 PR4 10K_0402_1% 2 PC4 100P_0402_50V8J 1 PC3 1000P_0402_50V7K PR5 22K_0402_1% P PC2 100P_0402_50V8J - PC1 1000P_0402_50V7K - + VS PR3 84.5K_0402_1% 10A_125V_451010MRL 1 + DC_IN_S2 PJP1 G 1 DC_IN_S1 PR1 1M_0402_1% VIN PL1 HCB4532KF-800T90_1812 PF1 PR16 1K_1206_5% TP0610K-T1-E3_SOT23-3 PR20 499K_0402_1% LM393DG_SO8 2 PC13 1000P_0402_50V7K VL PR23 34K_0402_1% PR25 66.5K_0402_1% PC12 1000P_0402_50V7K - PR24 499K_0402_1% PR26 191K_0402_1% PC11 1000P_0402_50V7K RB715F_SOT323-3 + O ACON 1 PU1B 2 MAINPWON PD5 @ RLZ16B_LL34 PC10 1U_0805_25V4Z PD6 1 2 GND PC9 10U_0805_6.3V6M P N2 G IN OUT PR19 2.2M_0402_5% 2 3.3V PR18 100K_0402_1% VL PU2 G920AT24U_SOT89-3 +CHGRTC PR22 560_0603_5% 2 PR17 200_0603_5% PR21 560_0603_5% 1 RTCVREF 3 PJ1 1 +1.8VP PJ4 @ +5VALW 1 +1.8V PR27 47K_0402_1% D G 2 PQ3 DTC115EUA_SC70-3 +1.25VS 1 RHU002N06_SOT323-3 @ JUMP_43X118 1 +VSB +5VALWP (3.0A,120mils ,Via NO.=6) @ JUMP_43X39 PACIN S PJ5 +1.25VSP PJ6 2 (12A,480mils ,Via NO.= 24) JUMP_43X118 PQ2 Precharge detector 15.97V/14.84V FOR ADAPTOR @ JUMP_43X118 (5A,200mils ,Via NO.= 10) +VSBP PJ3 (5A,200mils ,Via NO.= 10) +5VALWP @ JUMP_43X118 +3VALW JUMP_43X118 @ PJ2 +3VALWP PJ7 (120mA,40mils ,Via NO.= 2) +0.9VSP 2 1 +0.9VS @ JUMP_43X79 PJ8 2 (2A,80mils ,Via NO.= 4) 1 @ JUMP_43X118 PJ9 +1.5VSP PJ10 +1.05VSP 2 1 @ JUMP_43X118 1 +1.5VS @ JUMP_43X118 +1.05VS (10A,400mils ,Via NO.= 20) (6.0A,240mils ,Via NO.=12) PJ11 +2.5VSP 2 1 +2.5VS Issued Date (0.35A,40mils ,Via NO.=2) Compal Electronics, Inc Compal Secret Data Security Classification @ JUMP_43X39 2006/05/18 Deciphered Date 2007/05/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C DCIN & DETECTOR Document Number Rev 2.0 Sheet Tuesday, May 22, 2007 D 36 of 47 A B C D PH1 under CPU botten side : CPU thermal protection at 92 degree C Recovery at 56 degree C VS VL VL VMB PR28 47K_0402_1% PC14 0.1U_0603_25V7K PR31 47K_0402_1% PR33 1K_0402_1% PC15 1000P_0402_50V7K PC16 0.01U_0402_25V7K TM_REF1 + - PU3A 2 1SS355_SOD323-2 VL PR37 100K_0402_1% LM393DG_SO8 PR39 100K_0402_1% +3VALWP PC18 1000P_0402_50V7K 1 PR36 15.4K_0402_1% PR38 6.49K_0402_1% 2 1 ALI/MH# PC17 0.22U_0805_16V7K 2 PR35 100_0402_1% PD7 O @ OCTEK_BTJ-09HA1G PR34 100_0402_1% PQ4 DTC115EUA_SC70-3 P PR32 13.7K_0402_1% MAINPWON G 1 +3VALWP PH1 100K_0603_1%_TH11-4H104FT BATT+ PL2 HCB4532KF-800T90_1812 2 GND GND BATT_S1 10 11 PF2 15A_65V_451015MRL PR29 1K_0402_1% 2 PR30 47K_0402_1% PJP2 PR40 1K_0402_1% PH2 near main Battery CONN : BAT thermal protection at 92 degree C Recovery at 47 degree C BATT_TEMPA EC_SMB_DA1 EC_SMB_CK1 + - PR44 20K_0402_1% PD8 G PC19 0.22U_0805_16V7K @ PU3B O 1 TM_REF1 P PR43 15K_0402_1% 2 2 PC20 0.22U_1206_25V7K @ PR42 47K_0402_1% 1SS355_SOD323-2 LM393DG_SO8 D S PQ6 RHU002N06_SOT323-3 G PR48 0_0402_5% POK PC22 0.1U_0402_16V7K PR47 100K_0402_1% VL PR45 100K_0402_1% PR46 22K_0402_1% +VSBP PC21 0.1U_0603_25V7K B+ PR41 47K_0402_1% PH2 100K_0603_1%_TH11-4H104FT PQ5 TP0610K-T1-E3_SOT23-3 VL VL @ 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2006/05/18 Deciphered Date 2007/05/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C BATTERY CONN / OTP Document Number Rev 2.0 Sheet Tuesday, May 22, 2007 D 37 of 47 B C D PQ19 75W Iadapter=0~3.947A PR49=0.02 ohm CP=3.71A PR66=10.7K @ AO4407_SO8 90W Iadapter=0~4.737A PR49=0.015 ohm CP=4.459A PR66=19.6K PJ13 @ 1 2 CSOP 21 ICOMP CSIN 20 VCOMP CSIP 19 ICM PHASE 18 LX_CHG VREF UGATE 17 DH_CHG PR69 10K_0402_1% PQ41 DTC115EUA_SC70-3 BOOT 16 ACLIM VDDP 15 VADJ LGATE 14 PGND 13 CHLIM 11 12 ACOFF GND D D D D DTC115EUA_SC70-3 D 0.1U_0603_25V7K G RHU002N06_SOT323-3 G S S S BST_CHG 2.2_0603_5% 6251VDDP SI4800BDY-T1-E3_SO8 PL3 16UH_D104C-919AS-160M_3.7A_20% CHG 2 CH751H-40PT_SOD323-2 PD10 26251VDD 4.7_0603_5% PR67 PC37 4.7U_0805_6.3V6K BATT+ PR62 0.02_2512_1% PQ18 SI4800BDY-T1-E3_SO8 PC38 DL_CHG ISL6251AHAZ-T_QSOP24 PACIN S PQ16 PC36 BST_CHGA 0.1U_0603_25V7K PQ20 PC109 10 PR68 10K_0402_1% ACON ACON 10.7K_0402_1% 6251VREF PR66 2 RHU002N06_SOT323-3 0.1U_0402_16V7K 15.4K_0402_1% PR63 VIN 200K_0402_1% D D D D PR65 IREF S PR61 @ 0_0402_5% PC35 PC32 0.1U_0603_25V7K PR135 2.2_0603_5% G PACIN PR64 22K_0402_1% PACIN ADP_I D PQ17 G S S S 2 PD15 1SS355_SOD323-2 CSOP 1 PR60 100_0402_1% 6251VREF PQ14 2 0.01U_0402_25V7K PR59 10K_0402_1% PC34 100P_0402_50V8J PC33 S PR72 CELLS 1 CSON 20_0603_5% PR58 150K_0402_1% PC29 1U_0603_16V6K PR56 20_0603_5% PR57 20_0603_5% 1 PC31 6800P_0402_25V7K ACOFF PC39 22 CSON 1SS355_SOD323-2 ACOFF# 10U_1206_25V6M EN 0.1U_0603_25V7K BATT+ 10U_1206_25V6M ACSET ACPRN 23 1 DCIN PR185 PC30 @ 680P_0402_50V7K CSON1 PQ13 3 24 PC105 PQ12 DTC115EUA_SC70-3 ALI/MH# PD14 10K_0402_1% DCIN VDD 2 6251VDD VIN PU4 PC27 2.2U_0603_6.3V6K PR53 0_0402_5% FSTCHG PR55 10K_0402_1% RHU002N06_SOT323-3 4.7U_1206_25V6K 4.7U_1206_25V6K 4.7U_1206_25V6K 2 2 PC142 5600P_0402_25V7K 6251VDD PC26 0.1U_0603_25V7K DTC115EUA_SC70-3 D PR51 47K_0402_1% PR54 DTA144EUA_SC70-3 PQ15 G PC25 PC23 6251_EN PC24 4 PR50 200K_0402_1% PR52 47K_0402_1% 2 CSIN PQ11 PQ7 AO4407_SO8 B++ CSIP JUMP_43X118 PR49 0.02_2512_1% 8 1 1 VIN PQ9 AO4407_SO8 P2 120W Iadapter=0~6.315A PR49=0.010 ohm CP=5.936A PR66=19.6K PQ8 AO4407_SO8 B+ P3 Iadp=0~3.6A A PR70 1 6251VREF @ 28.7K_0402_1% PR71 PQ40 2 @ 47K_0402_1% @ SI2301BDS-T1-E3_SOT23-3 BATT Type IREF=1.016*Icharge IREF=0.508V~3.048V ALI/MH# Charge Current CC=0.5~3A CV=12.6V(6 CELLS LI-ION) IREF CELL 3.3V 1.5.A 1.524V CELL 3.3V 3.0A 3.048V CELL 3.3V 3.0A 3.048V 3 VS 3FSTCHG RB715F_SOT323-3 PR184 P BATT_OVP 10K_0402_1% - LM358DT_SO8 PR133 6251_EN PU5A + G 100K_0402_1% DTC115EUA_SC70-3 6251VREF LI-3S :13.5V BATT-OVP=1.5V BATT-OVP=0.111*BATT+ SUSP# 1 PC96 CSON C PQ31 @ B 2SC2411KT146_SOT23-3 E 0.01U_0402_25V7K PC41 0.01U_0402_25V7K 100K_0402_1% 2 PR132 2 PR75 105K_0402_1% PD9 0.1U_0603_25V7K PR131 100K_0402_1% PQ29 PC28 PC40 0.01U_0402_25V7K DCIN 1 P3 TP0610K-T1-E3_SOT23-3 PR74 PR73 499K_0402_1% 340K_0402_1% VMB PQ10 PR134 2006/05/18 Deciphered Date 2007/05/18 Title Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 20K_0402_1% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C CHARGER Document Number Rev 2.0 Tuesday, May 22, 2007 Sheet D 38 of 47 PJ18 1 DRVL1 25 DL_5V 16 DRVL2 VO1 17 PGND2 VFB1 COMP1 COMP2 CS1 CS2 VREF2 TONSEL GND PGOOD1 PGOOD2 VREG3 10 EN3 RLZ5.1B_LL34 2 B 10K_0402_1% 1 TPS51120RHBR_QFN32_5X5 + C +VCC_TPS51120 1 +3VALWP PR90 100K_0402_1% 2 PR89 TPS51120_CS1 TPS51120_CS2 PR85 10K_0402_1% PC56 10U_0805_6.3V6M PD11 VS PC58 2.2U_0805_25V6K EN2 EN1 19 FB5 PR84 14.7K_0402_1% 12 29 23 18 31 30 11 @ PAD VFB2 SKIPSEL VO2 33 32 0_0402_5% 24 PC79 @ 680P_0603_50V8J PR87 0_0402_5% DL_3V PGND1 LL2 PQ23 SI4810BDY-T1-E3_SO8 PC51 1000P_0402_50V7K PC52 330U_D3L_6.3VM_R25M DRVH2 PR129 @ 4.7_1206_5% 14 PR78 10K_0402_1% LX_5V 26 PR81 2.49K_0402_1% 32 QFN 5X5 LL1 2 VBST2 +3.3V_RTC_LDO 806K_0603_1% PR86 D D D D G S S S 13 15 PR105 PC57 0.047U_0603_16V7K PC45 4.7U_1206_25V6K DH_5V 27 D D D D 28 DRVH1 G S S S VBST1 EN5 FB3 PR88 0_0402_5% PC44 4.7U_1206_25V6K V5FILT VL MAINPWON OCP=8A +5VALWP PL5 3.3UH_SIL1045R-3R3PF_8.2A_30% PR83 14.7K_0402_1% D D D D 20 LX_3V S S S G PC78 @ 680P_0603_50V8J PQ21 SI4800BDY-T1-E3_SO8 PC49 0.1U_0603_25V7K PC55 1000P_0402_50V7K S S S G DH_3V PQ24 SI4810BDY-T1-E3_SO8 2 PR128 @ 4.7_1206_5% VIN VREG5 21 PR77 0_0603_5% 22 @ PC50 PR79 0.1U_0603_25V7K 0_0603_5% 1 2 PR80 10K_0402_1% + 1000P_0402_50V7K PC53 1 PL6 3.3UH_SIL1045R-3R3PF_8.2A_30% PR82 4.22K_0402_1% C PC54 330U_D3L_6.3VM_R25M +3VALWP D PU6 SI4800BDY-T1-E3_SO8 OCP=8A VL PR76 5.1_0603_5% PC47 10U_0805_6.3V6M PC48 0.1U_0603_25V7K D D D D PQ22 +VCC_TPS51120 PC46 1U_0603_10V6K 2 PC143 680P_0603_50V8J D PC43 4.7U_1206_25V6K 1 PC146 680P_0603_50V8J PC42 4.7U_1206_25V6K JUMP_43X118 @ B+ B @ POK A A Compal Electronics, Inc Compal Secret Data Security Classification 2006/05/18 Issued Date Deciphered Date 2007/05/18 Title +5V/+3V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Tuesday, May 22, 2007 Date: Rev 2.0 LA-3481P Sheet 39 of 47 A B C D PJ14 DL_1.8V LGATE1 LGATE2 27 PGND1 PGND2 26 10 15 VOUT1 VSEN1 EN1 PG1 VOUT2 VSEN2 EN2 PG2/REF 20 19 21 16 11 OCSET1 OCSET2 18 PR101 2.26K_0402_1% PQ28 SI4800BDY-T1-E3_SO8 PR103 0_0402_5% PC75 680P_0603_50V8J + PC74 0.01U_0402_25V7K PR104 6.81K_0402_1% PC73 220U_D2_4VM_R15 VSE_1.5V PR106 0_0402_5% SUSP# 1 ISL6227CAZ-T_SSOP28 PR109 @ 0_0402_5% 13 1 DL_1.5V PR112 100K_0402_1% PC77 @ 0.1U_0402_16V7K PR110 10K_0402_1% 2 PR113 100K_0402_1% PC76 @ 0.1U_0402_16V7K PR111 @ 0_0402_5% PR108 10K_0402_1% DDR GND VSE_1.8V PR107 0_0402_5% 1 SYSON PR99 4.7_1206_5% PR102 0_0402_5% ISE_1.5V 22 ISEN2 LX_1.5V ISEN1 +1.5VSP PL8 4.7U_LF919AS-4R7M-P3_5.2A_20% 2 PR97 2.2_0603_5% DH_1.5V-2 25 PHASE2 ISE_1.8V D D D D PHASE1 +1.5VSP G S S S VCC UGATE2 PQ26 SI4800BDY-T1-E3_SO8 28 14 VIN UGATE1 24 PR100 2.26K_0402_1% PQ27 SI4810BDY-T1-E3_SO8 DH_1.5V-1 PC69 0.1U_0402_16V7K 2 PR96 2.2_0603_5% BST_1.5V-2 PR94 0_0603_5% DH_1.8V-1 23 S S S G BOOT2 PR93 0_0603_5% BOOT1 D D D D SOFT2 PC67 0.01U_0402_25V7K 17 G S S S 2 PC72 680P_0603_50V8J PC71 0.01U_0402_25V7K 1 1 PR98 10K_0402_1% PC65 2.2U_0805_10V6K PR92 2.2_0603_5% 2BST_1.8V-2 2 PR95 4.7_1206_5% PC68 0.1U_0402_16V7K 2 PC70 220U_D2_4VM_R15 PC62 4.7U_1206_25V6K DAP202U_SOT323-3 PC66 0.01U_0402_25V7K PU7 12 SOFT1 D D D D + BST_1.8V-1 S S S G PL7 1.8UH_SIL104R-1R8PF_9.5A_30% LX_1.8V B+ BST_1.5V-1 +1.8VP JUMP_43X118 PC64 0.1U_0603_25V7K D D D D PQ25 SI4800BDY-T1-E3_SO8 +1.8VP PC61 4.7U_1206_25V6K +5VALWP 1 PD12 PC63 4.7U_0805_6.3V6K PR91 0_1206_5% @ 1 PC60 4.7U_1206_25V6K PC59 4.7U_1206_25V6K 2 3 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2006/05/18 Deciphered Date 2007/05/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C 1.8V / 1.2V Document Number Rev 2.0 Tuesday, May 22, 2007 Sheet D 40 of 47 PL14 B+ PHASE_1.05V PR130 VIN VCC UG BOOT PHASE PGOOD GND PVCC 14 LG 13 PGND 12 ISEN 11 D PC82 0.1U_0603_25V7K PR116 0_0603_5% PR117 4.7_0603_5% 6269_1.05V D D D D 15 16 PU8 UG_1.05V 2 0_0603_5% +5VALW BOOT_1.05V 20_0603_5%1 PC83 2.2U_0603_6.3V6K LG_1.05V PL10 1.8UH_SIL104R-1R8PF_9.5A_30% +1.05VSP PC90 680P_0603_50V8J 2 PC89 220U_D2_4VM_R15 PR122 2.26K_0402_1% PQ32 SI4810BDY-T1-E3_SO8 10 ISL6268CAZ-T_SSOP16 C PC88 0.01U_0402_25V7K 2 PR121 PC87 1 PR120 49.9K_0402_1% 6800P_0402_25V7K PC86 22P_0402_50V8J 1 C + D D D D ISEN_1.05V PR119 8.66K_0402_1% VO FB PC85 0.1U_0402_16V7K PR124 4.7_1206_5% G S S S EN COMP FSET PR118 22K_0402_1% SUSP# +1.05VS PC84 2.2U_0603_6.3V6K 6269_1.05V PQ30 SI4800BDY-T1-E3_SO8 G S S S PR114 PR115 10K_0402_1% 6269_1.05V 1 2 @ D PC80 10U_1206_25V6M PC81 10U_1206_25V6M FBMA-L18-453215-900LMA90T_1812 57.6K_0402_1% PR123 3K_0402_1% +1.5VSP PC95 1U_0603_6.3V6M B EN POK FB +1.25VSP PC94 22U_1206_6.3V6M PC93 1.15K_0402_1% 1 PR125 APL5913-KAC-TRL_SO8 PC92 1U_0603_10V6K VOUT VOUT 12K_0402_1% SUSP# VCNTL VIN VIN PR127 PU12 GND PC91 4.7U_0805_6.3V6K 2 B PJ19 JUMP_43X79 @ 1 +5VALW 0.01U_0402_25V7K PR126 2K_0402_1% A A 2006/05/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/05/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: 1.05V / 1.25V Document Number Rev 2.0 Tuesday, May 22, 2007 Sheet 41 of 47 +3VALW +1.8V +5VALW PJ16 @ JUMP_43X79 VOUT VOUT FB +2.5VSP VREF NC VOUT NC TP +3VALWP PC98 1U_0603_6.3V6M PR137 1K_0402_1% +0.9VSP PC99 2 G S PQ33 PC101 @ 0.1U_0402_16V7K D 1 PR138 0_0402_5% SUSP PC100 10U_1206_6.3V7K 2 NC APL5331KAC-TRL_SO8 22U_1206_6.3V6M PC104 1 2.15K_0402_1% PC106 GND 1 PR140 APL5913-KAC-TRL_SO8 VCNTL GND EN POK VIN PR136 1K_0402_1% VCNTL VIN VIN 1 1 PC107 1U_0603_10V6K PU9 1U_0603_6.3V6M PC97 4.7U_0805_6.3V6K PR139 12K_0402_1% SUSP# PC102 PU10 PC103 4.7U_0805_6.3V6K D PJ17 JUMP_43X79 @ 2 D 0.01U_0402_25V7K 0.1U_0402_16V7K RHU002N06_SOT323-3 PR141 1K_0402_1% C C B B A A 2006/05/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/05/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: 1.05V / 0.9V / 1.5V Document Number Rev 2.0 Tuesday, May 22, 2007 Sheet 42 of 47 2 +CPU_B+ PHASE1 34 PHASE_CPU1 RBIAS PGND1 33 LGATE1 32 PVCC 31 LGATE2 30 10 COMP UGATE2 27 11 FB BOOT2 26 12 FB2 NC 25 1 680P_0402_50V7K PC145 68U_25V_M_R0.44 PC148 100U_25V_M 68U_25V_M_R0.44 PC108 PC112 10U_1206_25V6M PC111 10U_1206_25V6M PC116 1U_0603_6.3V6M PR152 2 1 8 3 1 PR163 2 2 PC135 0.018U_0603_50V7J 1_0402_5% PR165 @ 0_0603_5% PC130 0.22U_0603_10V7K IRF8113PBF_SO8 B ISEN2 +CPU_B+ VCC_PRM PC140 0.22U_0603_10V7K PR175 PR180 11K_0402_1% PR179 1K_0402_1% 20_0402_5% PR178 1 PR176 0_0402_5% PC138 180P_0402_50V8J PR177 5.36K_0402_1% PC139 0.1U_0402_16V7K 2.61K_0402_1% VSUM PC137 0.018U_0603_50V7J 2 PC136 0.018U_0603_50V7J 0_0402_5% +VCC_CORE PR174 20_0402_5% VSSSENSE 0.1U_0603_25V7K 2 PR173 VSUM PR164 PC134 10_0603_5% 1 VCCSENSE VCC_PRM PR172 1.82K_0402_1% IRF8113PBF_SO8 PL13 PH4 10KB_0603_5%_ERTJ1VR103J PR170 +5VS PC128 680P_0603_50V8J PR171 PC133 470P_0402_50V7K 3.4K_0402_1% 2 @ 0_0402_5% 390P_0402_50V7K PQ39 ISEN1 ISEN2 PR160 4.7_1206_5% PR166 1_0603_5% PC131 1U_0402_6.3V4Z 2 1 PC132 PC115 PQ38 PR168 @ 0_0402_5% PR169 0.36UH_MPC1040LR36_24A_20% PC125 0.22U_0603_10V7K PC127 5600P_0402_25V7K PR167 61.9K_0402_1% PC129 1500P_0402_50V7K 2 UGATE_CPU2-2 8 ISEN1 BOOT_CPU2 PR159 0_0603_5% PU11 24 ISEN2 23 22 VDD GND 21 VIN VSUM 20 19 VO 18 PHASE_CPU2 PR183 UGATE_CPU2-110_0603_5%2 28 C 29 PHASE2 ISL6262ACRZ-T_QFN48_7X7 PGND2 VW PQ37 SI7840DP-T1-E3_SO8 LGATE_CPU2 OCSET +VCC_CORE +CPU_B+ PC122 10U_1206_25V6M 13 PC144 680P_0402_50V7K PR154 1_0402_5% PR162 10K_0402_1% SOFT 3.65K_0805_1% DFB 1000P_0402_50V7K PC126 PR161 3.57K_0402_1% D IRF8113PBF_SO8 IRF8113PBF_SO8 NTC 17 PR158 13K_0402_1% + PL12 LGATE_CPU1 VR_TT# DROOP + PR155 @ 0_0603_5% PC120 VCC_PRM ISEN1 0.22U_0603_10V7K VSUM PC121 10U_1206_25V6M PC119 680P_0603_50V8J PR153 10K_0402_1% PMON 3.65K_0805_1% UGATE_CPU1-1 35 37 38 VID0 39 VID1 VID2 40 VID3 42 41 VID4 VID5 43 VID6 44 45 46 DPRSTP# DPRSLPVR 48 47 3V3 CLK_EN# PQ36 UGATE1 RTN @ 100K_0603_1%_TH11-4H104FT @ 0.015U_0402_16V7K PC123 0.022U_0603_25V7K PC124 B 0.01U_0402_25V7K PR146 2 49 GND PR151 4.7_1206_5% PH3 PSI# PC118 2 0_0603_5% 0.22U_0603_10V7K PR182 PQ35 0_0603_5% 36 16 VR_TT# @ 4.22K_0402_1% 147K_0402_1% + PQ34 SI7840DP-T1-E3_SO8 2 0_0402_5% PR156 0.36UH_MPC1040LR36_24A_20% PR148 BOOT1 15 PR157 PR181 PGOOD VSEN PGD_IN C H_PSI# VDIFF VGATE 14 PL11 FBMA-L18-453215-900LMA90T_1812 B+ UGATE_CPU1-2 BOOT_CPU1 PC117 1U_0603_6.3V6M PR149 PR150 499_0402_1% 1.91K_0402_1% +3VS 0_0402_5% 0_0402_5% 0_0402_5% PR145 PR147 0_0402_5% VR_ON H_DPRSTP# CLK_ENABLE# +3VS 0_0402_5% PR144 PC114 1U_0603_6.3V6M PR143 DPRSLPVR PC113 0.01U_0402_25V7K 1 PR142 1_0603_5% PC147 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 CPU_VID5 VR_ON D CPU_VID6 +5VS PC141 0.22U_0402_6.3V6K A A 2005/06/23 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2006/06/23 Deciphered Date Title +CPU_CORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Tuesday, May 22, 2007 Date: Rev 2.0 LA-3481P Sheet 43 of 47 HW4 Product Improvement Record (P.I.R.) ISKAA LA-3481P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 2A D C B A Rev 0.1 to 0.2 NO PAGE MODIFICATION LIST PURPOSE -1 17 Add JP39 Add CRT Board 22 Change R322 from 150 ohm to 10K ohm From Intel recommend 12 Delete L13, L14, C199, C140 1.25VS_DMI share with 1.25VS_PEG 31 Modify PCI-E for WLAN and Robson Design issue 15 Delete C234 Share with C729 Rev 0.2 to 0.3 NO PAGE MODIFICATION LIST PURPOSE -From Intel recommend 11 Remove C116 16 Change EXP_CLKREQ# from U4.44 to U4.3 Common design with ISRAA 16 Change CLK_MCH_3GPLL from U4.27 to U4.47 Common design with ISRAA 16 Change CLK_PCIE_CARD from U4.47 to U4.27 Common design with ISRAA 19 Add R949 and Remove D11 Design change 19 Add JP42 Co-layout 30 pin LVDS connector 24 Add R874 Reserve the resister for EMI 29 Change EC from KB910 to KB926 Design change 34 Change SPI BIOS U52 Design change 10 34 Add Q54, Q55 HDD LED controlled by SB 11 47 Add Energy Star circuit Design change 12 10 Change C84~C115 from Y5V to X7R For VGA thermal issue Rev 1.0 to 2.0 NO PAGE MODIFICATION LIST PURPOSE -1 18 Add U54 and C966 For HDMI hot plug issue 18 Remove 1932 circuit M72 and M76 has internal HDMI 18 Remove CMD circuit For EMI issue 18 Add L66, L67, L68, L69 For EMI issue 18 Add Q134,Q135 level-shifting circuit For HDMI level-shifting 18 Change R705 and R706 to 19.1K ohm From ATI recommend 24 Reserve R713, R714, R715, C873, C875, C877 For EMI issue 32 Reserve C650~C676 For EMI issue 34 Reserve C682~C687 For EMI issue 10 18 Change R621 to 100K ohm and R723 to 2.2K ohm For HDMI level-shifting D Rev 2.0 to 2A NO PAGE MODIFICATION LIST PURPOSE -1 18 Add U55 level-shifting circuit For HDMI level-shifting 29 Change C943 and C944 from 10pf to 15pf From ENE recommend for crystal issue 23 Change C360 from 0.1uf to 1uf From Intel recommend for boot-up issue 22 Remove R327, R328, R329 For leakage issue C Rev 0.3 to 0.4 NO PAGE MODIFICATION LIST PURPOSE -1 12 Modify L58 to 4.7 ohm For TV-out wave line issue 12 Change R686 to 2.2uf For TV-out wave line issue 12 Modify L15 to 100 ohm from Intel recommend for new chip set 12 Change R694 to 1uf from Intel recommend for new chip set 26 Reserve L92,R941,R944,R946,R947, Reserve for LAN controller 8111C C965,C963,R937,C962,C964 33 Modify Camera power from +5Vs to +5VALW Change for Camera can't detect from S3 resume 29 Add R928 For CIR issue 22 Add R903 and R927 For CIR issue B Rev 0.4 to 1.0 NO PAGE MODIFICATION LIST PURPOSE -Change PCB 0.4 to 1.0 Modify Revision for MP 27 Add R935 Design for speaker select 28 Change L49, L50, L51, L52 to ohm For speaker issue 27 Change C517 and C519 from 1uf to 4.7uf From Realtek recommend for THD+N issue 31 Add R954 For HD-DVD function A Compal Secret Data Security Classification Issued Date 2006/06/30 Deciphered Date 2008/05/21 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc P.I.R Document Number Rev 2.0 LA-3481P Sheet Saturday, June 23, 2007 44 of 47 Screw Hole GL960_R3 GLR3@ H7 H_C217D118 D CF2 @ CF7 @ CF1 @ @ U37 @ H15 H_C236D43 100M 100M@ 2.2U_0402_6.3VM GM@ H22 H_C276D158 100M 100M@ H23 H_C276D158 @ @ H21 H_C315D165 @ @ C H32 H_C276D158 @ TRANSFORMER @ U19 @ H20 H_C315D165 @ C H19 H_C315D165 @ H31 H_C236D122 @ H18 H_C315D165 R686 H30 H_C236D122 @ H17 H_C236D43 @ 1U_0402_6.3V4Z GM@ H14 H_C236D146 @ H16 H_C236D43 @ LAN H13 H_C236D122 CF8 @ H12 H_C236D122 CF4 @ D @ H11 H_C236D122 R694 @ @ @ @ ICH8M ICH8M_R1 ICH8MR1@ H10 H_C276D118 1 @ H9 H_C276D118 1 @ H8 H_C217D118 @ CF9 1 @ CF3 @ 1 @ CF10 @ U10 CF6 CF5 H5 H6 H_C276D118 H_C276D118 @ H4 H_C276D118 @ H3 H_C276D118 @ H2 H_C276D118 965PM_R1 PMR1@ @ FD3 965GM_R1 GMR1@ @ FD1 965GM_R3 GMR3@ @ FD2 @ @ FD5 NB FD6 FD4 U3 U3 U3 U3 PCBA H24 H_C118D118N H28 H_S315D118 @ H29 H_S315D118 @ @ CARDBUS @ H27 H_S315D118 U14 B @ @ LA-3481P_DAZ H26 H_O197X55D158X16 B PCB H25 H_O118X197D118X197N TI8402 8402@ PJP1 DC-JACK SINGA_2DW-0005-B03 45@ A A Compal Secret Data Security Classification Issued Date 2006/08/05 Deciphered Date 2007/08/05 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc ISPD & Screw Hole Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet 45 of 47 NO DATE PAGE MODIFICATION LIST PURPOSE 9/14 P.39 Change PACIN to GND Change to AUTO-SKIP mode 9/14 P.39 Add PR105 Reserve control sequence pin 9/14 P.37 Change PF2 to 15A Increase design margine 10/24 P.36,37,43 Change PL1,PL2,PL11 to Tai-Tech Buyer request 10/24 P.39,43 Add PC143,PC144,PC145 EMI request 10/24 P.41,43 Add snubber PR124,PC90,PR151,PC119,PR160,PC128 EMI request 10/24 P.41 Change PR119 to 5.49K Modify 1.05V OCP point 10/24 P.40 Change PC70 to 330U_D2_9m ohm Reduce the 1.8V ripple 0_0402_5% Compal Secret Data Security Classification Issued Date 2005/06/01 Deciphered Date 2006/06/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Power PIR Document Number Rev 2.0 LA-3481P Tuesday, May 22, 2007 Sheet 46 of 47 A B C +3VALW TO +3V_SB +3VALW D +5VALW TO +5V_SB +5VALW +3V_SB PJ12 2 E R852 1 0_0402_5% @ JUMP_43X79 @ C901 S 2 STB_SB# G 2N7002_SOT23-3 Q67 D D @ S @ +5V_SB R824 1U_0603_10V4Z @ R826 47K_0402_5% STB_SB# 1 @ AOS 4422 AO3413_SOT23 @ 470_0805_5% AO4422_SO8 1 10U_0805_10V4Z 2 S S S G C899 C903 @ 10U_0805_10V4Z C900 +VSB 10U_0805_10V4Z @ D D D D D G STB_SB# U42 Q77 S @ C922 @ 4.7U_0805_10V4Z C923 @ 0.1U_0402_16V4Z C907 @ Q69 2N7002_SOT23-3 0.1U_0603_25V7K @ G 2 +3VALW TO +3V_LAN +3VALW TO +3V_WLAN +3VALW +3V_WLAN +3VALW +3V_LAN PJ21 Q71 SI3456BDV-T1-E3_TSOP6 STB_WLAN# G 2N7002_SOT23-3 +VSB S Q73 2N7002_SOT23-3 0.1U_0603_25V7K @ 2 1U_0603_10V4Z Q68 S STB_WLAN_R STB_WLAN_R R848 @ 0_0402_5% STB_SB_R +5VALW 1 STB_WLAN# STB_LAN S 2N7002_SOT23-3 STB_LAN_R R850 0_0402_5% @ Q75 @ G R834 100K_0402_5% @ D STB_WLAN STB_WLAN S 2N7002_SOT23-3 STB_LAN R832 100K_0402_5% @ 1 R831 100K_0402_5% @ D Q74 @ G R833 100K_0402_5% +5VALW STB_LAN# STB_SB_R STB_LAN# G 2N7002_SOT23-3 +5VALW R849 0_0402_5% @ STB_SB R847 @ 0_0402_5% @ C908 Q70 2N7002_SOT23-3 0.1U_0603_25V7K @ G STB_SB# STB_SB STB_LAN_R D @ S D @ 470_0805_5% R825 STB_LAN# C913 @ @ @ C906 R830 100K_0402_5% @ STB_LAN_R STB_WLAN# G R846 @ 0_0402_5% D R827 47K_0402_5% @ @ STB_SB_R R851 0_0402_5% @ STB_WLAN_R R835 100K_0402_5% @ D Q76 @ S 2N7002_SOT23-3 G 3 @ S 2 Q72 @ S S S G D D D D D AO4422_SO8 @ R829 47K_0402_5% @ R828 1U_0603_10V4Z 10U_0805_10V4Z C905 @ 470_0805_5% 10U_0805_10V4Z @ C904 1 C912 @ 10U_0805_10V4Z G C911 @ 1 S C910 U43 D @ 1 +VSB 10U_0805_10V4Z C909 @ 10U_0805_10V4Z @ JUMP_43X79 1 C902 @ JUMP_43X79 10U_0805_10V4Z PJ20 @ Compal Secret Data Security Classification 2006/06/30 Issued Date 2 4 2007/06/30 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Compal Electronics, Inc DC/DC I/F & Screw Document Number Rev 2.0 LA-3481P Sheet Tuesday, May 22, 2007 E 47 of 47 ... 179 181 183 185 187 189 191 193 195 197 199 201 203 205 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100... 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 1 08 110 112 114 116 1 18 120 122 124 126 1 28 130 132 134 136 1 38 140... 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 1 08 110 112 114 116 1 18 120 122 124 126 1 28 130 132 134 136 1 38 140 142 144 146 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