Packard bell easynote TJ75 WISTRON SJV50 CP REV SB

4 SJV50-CP Block Diagram Arrandale Clarksfield DDRII Channel A DDRIII Slot 21 800/1066/1333 ATI Madison Park PCI EXPRESS GRAPHIC X16 PCIE+USB 2.0 FDIx8 PCH RGB CRT INTEL Mini-Card 3G 37 TPS51123 VRAM sDDR3 1Gb*8 INPUTS ETHERNET C DCBATOUT 63 66 3D3V_S5 PCH LVDS 2CH CRT LCD WXGA+ Switch PCH Digital Display (10/100/1000Mb) OUTPUTS DCBATOUT 1D5V_S3 SYSTEM DC/DC 24 TPS51117 INPUTS 23 Switch 1D05V_S0 48 SYSTEM DC/DC HDMI25 WEBCAM LPC I/F 23 OUTPUTS DCBATOUT 1D05V_VTT 49 RT9025 BLUETOOTH28 INPUTS PCI/PCI BRIDGE OUTPUTS 3D3V_S0 MIC IN USB 2.0 C TPS51117 ACPI 1.1 30 OUTPUTS DCBATOUT INPUTS PCIE ports PCIE INPUTS 48 Switch SATA ports Giga LAN HD AUDIO CODEC ALC272 47 TPS51117 High Definition Audio INT MIC D OUTPUTS 5V_S5 14 USB 2.0/1.1 ports BCM57780 45,46 58 62 PCH 31 VCC_CORE SYSTEM DC/DC DMIx4 RJ45 CONN OUTPUTS DCBATOUT 4,5, ,9,10 DDR II Channel B Mini-Card WLAN 37 ISL62882 INPUTS SYSTEM DC/DC Intel CPU DDRIII Slot 20 800/1066/1333 CPU DC/DC Digital Display Clock Generator ICS9LRS3197AKLFT RGB CRT D Project code: 91.4GH01.001 PCB P/N : 48.4GH01.0SB REVISION : 09284-SB LVDS 2CH 1D8V_S0 50 USB x 29 AZALIA G2997 Card Reader AU6433 32 INPUTS SD/MMC MS/MS Pro/xD 36 36 OUTPUTS 1D5V_S3 0D75_S0 50 LINE OUT SATA HDD SYSTEM DC/DC 26 ISL62881 SATA INPUTS B OP AMP 2CH SPEAKER G1454 SATA ODD 33 Flash ROM 4MB SPI 11,12, ,18,19 OUTPUTS DCBATOUT TPS51117 INPUTS OUTPUTS DCBATOUT LPC Bus MDC CARD LPC debug 35 +VGA_CORE 53 GND 40 B VCC_GFXCORE 52 SYSTEM DC/DC PCB STACKUP 40 TOP MODEM RJ11 27 S CHARGER S KBC ISL88731A GND INPUTS BOTTOM DCBATOUT NPCE781B SPI 39 A OUTPUTS BT+ 51 A SJV50 Flash ROM 128KB 40 Thermal Sensor G787 38 Wistron Corporation Touch PAD41 Int KB39 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C MMB Title 42 Block Diagram FAN Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet 1 of 67 A B PCH Strapping Name SPKR INIT3_3V# Weak internal pull-down Do not pull high GNT3#/ GPIO55 Default Mode: Internal pull-up Low (0) = Top Block Swap Mode (Connect to ground with 4.7-kΩ weak pull-down resistor) INTVRMEN High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled Default (SPI): Left both GNT0# and GNT1# floating No pull up required Boot from PCI: Connect GNT1# to ground with 1-kΩ pull-down resistor Leave GNT0# Floating Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kΩ pull-down resistor GNT0#, GNT1# Schematics Notes Reboot option at power-up Default Mode: Internal weak Pull-down No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ - 10-kΩ weak pull-up resistor GNT2#/ GPIO53 Default - Internal pull-up Low (0)= Configures DMI for ESI compatible operation (for servers only Not for mobile/desktops) GPIO33 Default: Do not pull low Disable ME in Manufacturing Mode: Connect to ground with 1-kΩ pull-down resistor SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor Disable iTPM: Left floating, no pull-down required Enable Danbury: Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor Disable Danbury: Connect to ground with 4.7-kΩ weak pull-down resistor NV_ALE NC_CLE Weak internal pull-up Do not pull low HAD_DOCK_EN# /GPIO[33] HDA_SDO Low (0): Flash Descriptor Security will be overridden High (1) : Flash Descriptor Security will be in effect Weak internal pull-down Do not pull high HDA_SYNC Weak internal pull-down Do not pull high GPIO15 Weak internal pull-down Do not pull high GPIO8 Weak internal pull-up Do not pull low GPIO27 Default = Do not connect (floating) High(1) = Enables the internal VccVRM to have a clean supply for analog rails No need to use on-board filter circuit Low (0) = Disables the VccVRM Need to use on-board filter circuits for analog rails C Processor Strapping D E Pin Name Strap Description Configuration (Default value for each bit is unless specified otherwise) Default Value CFG[4] Embedded DisplayPort Presence CFG[3] PCI-Express Static Lane Reversal 1: Disabled - No Physical Display Port attached to Embedded DisplayPort 0: Enabled - An external Display Port device is connected to the Embedded Display Port 1: Normal Operation 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, CFG[0] PCI-Express Configuration Select 1: Single PCI-Express Graphics 0: Bifurcation enabled CFG[7] Reserved Temporarily used for early Clarksfield samples Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor Note: Only temporary for early CFD samples (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report] For a common motherboard design (for AUB and CFD), the pull-down resistor should be used Does not impact AUB functionality 2 PCIE Routing LANE1 LANE2 LAN MiniCard WLAN USB Table Pair Device USB3 USB2 USB4 MINICARD1 WECAM Touch Panel (X) NC NC NC USB1(HS) 10 Finger Print (X) 11 Blue Tooth Wistron Corporation 12 MINIC2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 13 Cardreader SJV50 Title Table of Content Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 A B C D E C581 R457 3D3V_S0 1D5V_S0_CLKGEN -1 0925 0R3J-0-U-GP C579 SCD1U16V2ZY-2GP DY SC1U6D3V2KX-GP R231 0R3J-0-U-GP 1D5V_S0 1D5V_S0_CLKGEN 1D05V_S0 R229 0R0603-PAD -1 0925 3D3V_S0 12 CLK_PCIE_SATA# 12 CLK_PCIE_SATA RN33 0R4P2R-PAD 12 CLK_CPU_BCLK# 12 CLK_CPU_BCLK RN37 0R4P2R-PAD CLKIN_DMI#_R CLKIN_DMI_R 14 13 SRCC1_LPR SRCT1_LPR CLK_PCIE_SATA#_R 11 CLK_PCIE_SATA_R 10 SATAC_LPR SATAT_LPR CLK_CPU_BCLK#_R 22 CLK_CPU_BCLK_R 23 CPUC0_LPR CPUT0_LPR 19 20 CPUC1_LPR CPUT1_LPR 18 15 1 2 1 -1 0925 VDDCPU_IO VDDSRC_IO VDD_27MHZ 17 29 VDDREF_3_3 24 DOT96C_LPR DOT96T_LPR SA 0622 EMI VGA_XIN1_L OSC_SPREAD_L 27MHZ_NONSS 27MHZ_SS VGA_XIN1_L R12 OSC_SPREAD_L ATI_ES 0R2J-2-GP 2 SC22P50V2JN-4GP SC22P50V2JN-4GP VGA_XIN1 59 TP133 CPU_STOP# CLKPWRGD/PD#_3_3 REF_3L/FSLC_3_3 16 25 30 CPU_STOP# R226 CLK_EN FSC R2111 X1 X2 28 27 GEN_XTAL_IN GEN_XTAL_OUT SDATA_3_3 SCLK_3_3 31 32 3D3V_S0 10KR2J-3-GP 33R2J-2-GP CLK_ICH14 12 C296 DY PCH_SMBDATA 12,20,21 PCH_SMBCLK 12,20,21 SA 0629 RF GNDSATA GND27MHZ GNDDOT96MHZ GNDSRC 12 GNDCPU 21 GNDREF GND 33 ICS9LRS3197AKLFT-GP-U 26 RN -1 0928 DY DY EC22 EC21 -1 0925 RN DY RN34 0R4P2R-PAD DREFCLK#_R DREFCLK_R VDDDOT96MHZ_3_3 CLKIN_DMI# CLKIN_DMI VDDSRC_3_3 2 VDDCPU_3_3 12 12 RN RN30 0R4P2R-PAD C574 SC4D7P50V2CN-1GP DREFCLK# DREFCLK 1 2 RN 12 12 R4961 0R3J-0-U-GP C577 SC10U6D3V3MX-GP U19 DY C576 SC1U10V2ZY-GP -1 0925 DY C573 SC1U6D3V2KX-GP DY C572 SCD1U16V2ZY-2GP DY SCD1U16V2ZY-2GP DY C571 SCD1U16V2ZY-2GP C569 SCD1U16V2ZY-2GP C565 SCD1U16V2ZY-2GP 3D3V_CK505_IO C580 SC1U10V2ZY-GP -1 0929 3D3V_CK505 C583 SC10U6D3V3MX-GP R499 0R0603-PAD PCH_SMBDATA 71.93197.003 2ND = 71.08585.003 PCH_SMBCLK DY EC11 SC33P50V2JN-3GP DY EC12 SC33P50V2JN-3GP 3D3V_S0 2 10KR2J-3-GP R224 SB 0814 (Default) R222 10MR2J-L-GP DY R212 2K2R2J-2-GP 2N7002-11-GP Q14 GEN_XTAL_OUT SC12P50V2JN-3GP G VR_CLKEN# 45 S DY GEN_XTAL_OUT_R R223 0R0402-PAD 100MHz 1 SPEED 133MHz D GEN_XTAL_IN X3 X-14D31818M-37GP CLK_EN 1D05V_VTT C298 FSC C297 SC12P50V2JN-3GP FSC -1 0929 82.30005.901 2ND = 82.30005.A51 R210 2K2R2J-2-GP CL=20pF±0.2pF SJV50 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Clock Generator Size A3 Date: A B C D Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet E of 67 D OF 13 13 13 13 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 B24 D23 B23 A22 DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3 DMI_RX0# DMI_RX1# DMI_RX2# DMI_RX3# 13 13 13 13 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 D24 G24 F23 H23 DMI_TX0# DMI_TX1# DMI_TX2# DMI_TX3# 13 13 13 13 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 D25 F24 E23 G23 DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3 E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX0# FDI_TX1# FDI_TX2# FDI_TX3# FDI_TX4# FDI_TX5# FDI_TX6# FDI_TX7# 13 13 13 13 13 13 13 13 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7 13 FDI_FSYNC0 13 FDI_FSYNC1 F17 E17 FDI_FSYNC0 FDI_FSYNC1 13 FDI_INT C17 FDI_INT 13 FDI_LSYNC0 13 FDI_LSYNC1 F18 D17 FDI_LSYNC0 FDI_LSYNC1 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 B RN74 FDI_FSYNC0 FDI_LSYNC0 FDI_FSYNC1 FDI_LSYNC1 R660 1KR2J-1-GP DIS_ONLY SRN1KJ-4-GP DIS_ONLY For Graphics Disable , Pull-down to GND via 1-k ± 5% resistor B26 A26 B27 A25 PEG_IRCOMP_R PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RXN[15 0] 58 PEG_RX0# PEG_RX1# PEG_RX2# PEG_RX3# PEG_RX4# PEG_RX5# PEG_RX6# PEG_RX7# PEG_RX8# PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15# K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_RXP[15 0] 58 PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15 PEG_TX0# PEG_TX1# PEG_TX2# PEG_TX3# PEG_TX4# PEG_TX5# PEG_TX6# PEG_TX7# PEG_TX8# PEG_TX9# PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15# L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PEG_TXN15_L PEG_TXN14_L PEG_TXN13_L PEG_TXN12_L PEG_TXN11_L PEG_TXN10_L PEG_TXN9_L PEG_TXN8_L PEG_TXN7_L PEG_TXN6_L PEG_TXN5_L PEG_TXN4_L PEG_TXN3_L PEG_TXN2_L PEG_TXN1_L PEG_TXN0_L DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 C397 C398 C404 C402 C408 C414 C413 C417 C421 C423 C427 C431 C432 C434 C437 C439 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15 L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 PEG_TXP15_L PEG_TXP14_L PEG_TXP13_L PEG_TXP12_L PEG_TXP11_L PEG_TXP10_L PEG_TXP9_L PEG_TXP8_L PEG_TXP7_L PEG_TXP6_L PEG_TXP5_L PEG_TXP4_L PEG_TXP3_L PEG_TXP2_L PEG_TXP1_L PEG_TXP0_L DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 C399 C400 C401 C405 C410 C411 C416 C420 C422 C425 C429 C428 C433 C435 C440 C441 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0 Intel(R) FDI 13 13 13 13 13 13 13 13 PCI EXPRESS GRAPHICS DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 D R388 PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS DMI C 13 13 13 13 A24 C23 B22 A21 AUBURNDALE CPU1A 49D9R2F-GP R392 EXP_RBIAS 750R2F-GP C PEG_TXN[15 0] 58 PEG_TXP[15 0] 58 B SB 0812 AUBURNF 62.10040.611 2ND = 62.10055.321 A A SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (1/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 1D05V_VTT CPU1B 1 R85 PROCHOT# 2 R100 68R2-GP H_COMP2 AT24 H_COMP1 G16 COMP1 H_COMP0 AT26 COMP0 SKTOCC#_R AH24 SKTOCC# H_CATERR# AK14 2 R141 49D9R2F-GP R95 49D9R2F-GP D AFTE14P-GP TP40 0R2J-2-GP DY PROCHOT# PROCHOT# AK15 TP39 H_CPURST# 13 H_PM_SYNC R146 0R0402-PAD 13 PM_DRAM_PW RGD THERMTRIP# AP26 RESET_OBS# AL15 PM_SYNC VCCPW RGOOD_1 AN14 VCCPWRGOOD_1 R93 0R0402-PAD VCCPW RGOOD_0 AN27 VCCPWRGOOD_0 R145 0R0402-PAD DRAMPW ROK AK13 SM_DRAMPWROK AM15 VTTPWRGOOD H_PW RGD_XDP AM26 TAPPWRGOOD PLT_RST#_R AL14 RSTIN# PWR MANAGEMENT -1 0925 49 H_VTTPW RGD AFTE14P-GP TP38 R139 PLT_RST# PEG_CLK PEG_CLK# E16 D16 DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 BCLK_CPU_P 16 BCLK_CPU_N 16 PEG_CLK_R PEG_CLK#_R PEG_CLK_R 12 PEG_CLK#_R 12 DPLL_REF_SSCLK DPLL_REF_SSCLK# SM_RCOMP_0 R193 SM_RCOMP_1 R191 SM_RCOMP_2 R192 DPLL_REF_SSCLK 12 DPLL_REF_SSCLK# 12 SB 0814 SM_DRAMRST# SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 F6 AL1 AM1 AN1 SM_DRAMRST# 16 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 PM_EXT_TS0# PM_EXT_TS1# AN15 AP15 PRDY# PREQ# AT28 AP27 XDP_PRDY# XDP_PREQ# TCK TMS TRST# AN28 AP28 AT27 XDP_TCLK XDP_TMS XDP_TRST# TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 XDP_TDI XDP_TDO XDP_TDI_M XDP_TDO_M DBR# AN25 XDP_DBRESET# BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7# AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 1D05V_VTT RN20 SRN10KJ-5-GP D 100R2F-L1-GP-U 24D9R2F-L-GP 130R2F-1-GP PM_EXTTS#0_R 20 PM_EXTTS#1_R 21 TP33 AFTE14P-GP DPLL_REF_SSCLK DPLL_REF_SSCLK# RN75 0R4P2R-PAD -1 0928 C 15,30,36,37,39,56,58 BCLK_ITP BCLK_ITP# AR30 AT30 BCLK_CPU_P BCLK_CPU_N RN TPAD14-GP 16,43,56 H_PW RGD PECI AN26 16,43 PM_THRMTRIP-A# THERMAL R92 45 H_PROCHOT# A16 B16 CATERR# AT15 16 H_PECI C COMP2 20R2F-GP MISC 49D9R2F-GP BCLK BCLK# CLOCKS H_CATERR# OF COMP3 AUBURNDALE R154 AT23 20R2F-GP DDR3 MISC H_COMP3 JTAG & BPM R104 1K5R2F-2-GP R138 750R2F-GP AUBURNF 62.10040.611 2ND = 62.10055.321 SB 0821 R859 PM_DRAM_PW RGD B PM_DRAM_PW RGD_1 B 1K5R2F-2-GP S3 1D5V_S0_DDR CPU JTAG 1D5V_S0_DDR 3D3V_S0 DY XDP_PREQ# S3 DY 51R2J-2-GP R716 750R2F-GP XDP_DBRESET# 51R2J-2-GP R75 0R0402-PAD 51R2J-2-GP R72 XDP_TRST# R89 DY 1KR2J-1-GP XDP_TDO_M XDP_TDI_M XDP_TCLK R98 51R2J-2-GP R83 NON_S3 DY XDP_TDO R147 3KR2F-GP DY R80 PM_DRAM_PW RGD DRAMPW ROK R74 XDP_TDI R76 2 NON_S3 XDP_TMS R717 1K1R2F-GP R151 1K1R2F-GP 1 1D05V_VTT 51R2J-2-GP -1 0925 51R2J-2-GP 3D3V_S5 A A SJV50 U86 43,50 1D5V_S0_PW RGD B A SB 0817 VCC Y GND Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C PM_DRAM_PW RGD_1 Title 74LVC1G08GW -1-GP 73.01G08.L04 S3 CPU (2/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 4 CPU1D B 20 20 20 20 20 20 M_A_BS0 M_A_BS1 M_A_BS2 AC3 AB2 U7 M_A_CAS# M_A_RAS# M_A_W E# AE1 AB3 AE9 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 SA_BS0 SA_BS1 SA_BS2 SA_CAS# SA_RAS# SA_WE# 21 M_B_DQ[63 0] SA_CK0 SA_CK0# SA_CKE0 AA6 AA7 P7 SA_CK1 SA_CK1# SA_CKE1 Y6 Y5 P6 M_CLK_DDR1 20 M_CLK_DDR#1 20 M_CKE1 20 SA_CS0# SA_CS1# AE2 AE8 M_CS#0 20 M_CS#1 20 SA_ODT0 SA_ODT1 AD8 AF9 M_ODT0 20 M_ODT1 20 SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 B9 D7 H7 M7 AG6 AM7 AN10 AN13 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_CLK_DDR0 20 M_CLK_DDR#0 20 M_CKE0 20 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# C9 F8 J9 N9 AH7 AK9 AP11 AT13 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 C8 F9 H9 M9 AH8 AK10 AN11 AR13 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15 Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DM[7 0] 20 M_A_DQS#[7 0] 20 M_A_DQS[7 0] 20 M_A_A[15 0] 20 B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 21 21 21 M_B_BS0 M_B_BS1 M_B_BS2 AB1 W5 R7 SB_BS0 SB_BS1 SB_BS2 21 21 21 M_B_CAS# M_B_RAS# M_B_W E# AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# DDR SYSTEM MEMORY - B C A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 AUBURNDALE M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 D DDR SYSTEM MEMORY A 20 M_A_DQ[63 0] OF OF AUBURNDALE CPU1C SB_CK0 SB_CK0# SB_CKE0 W8 W9 M3 M_CLK_DDR2 21 M_CLK_DDR#2 21 M_CKE2 21 SB_CK1 SB_CK1# SB_CKE1 V7 V6 M2 M_CLK_DDR3 21 M_CLK_DDR#3 21 M_CKE3 21 SB_CS0# SB_CS1# AB8 AD6 M_CS#2 21 M_CS#3 21 SB_ODT0 SB_ODT1 AC7 AD1 M_ODT2 21 M_ODT3 21 SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7 D4 E1 H3 K1 AH1 AL2 AR4 AT8 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7# D5 F4 J4 L4 AH2 AL4 AR5 AR8 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 C5 E3 H4 M5 AG2 AL5 AP5 AR7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15 U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 D M_B_DM[7 0] 21 C M_B_DQS#[7 0] 21 M_B_DQS[7 0] 21 B M_B_A[15 0] 21 AUBURNF AUBURNF 2ND = 62.10055.321 A SJV50 A 2ND = 62.10055.321 62.10040.611 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 62.10040.611 Title CPU (3/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 CPU1F AUBURNDALE 1.1V RAIL POWER C237 2 2 DY C231 D -1 0925 The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation Customers need to follow the recommendations in the Calpella Platform Design Guide C202 SC10U6D3V3MX-GP 2 C C221 SC10U6D3V3MX-GP 1D05V_VTT +VTT_43 +VTT_44 RN17 0R4P2R-PAD -1 0928 CPU VIDS Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V PSI# AN33 VID0 VID1 VID2 VID3 VID4 VID5 VID6 PROC_DPRSLPVR AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 VTT_SELECT G15 PSI# 45 H_VID[6 0] H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 45 B PM_DPRSLPVR 45 H_VTTVID1 TP44 TPAD14-GP Clarksfield H_VTTVID1 = Low, VTT = 1.1V Arrandale H_VTTVID1 = High, VTT = 1.05V VCC_CORE AN35 VCC_SENSE VSS_SENSE AJ34 AJ35 R348 100R2F-L1-GP-U IMVP_IMON 45 ISENSE VCC_SENSE 45 VSS_SENSE 45 VTT_SENSE VSS_SENSE_VTT B15 A15 TP_VSS_SENSE_VTT R342 100R2F-L1-GP-U VTT_SENSE 49 TP45 AFTE14P-GP POWER 2 2 2 2 2 2 2 2 2 2 2 C227 SC10U6D3V3MX-GP -1 0925 C206 SC10U6D3V3MX-GP C226 RN A C215 SC10U6D3V3MX-GP B AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 DY SC10U6D3V3MX-GP SC10U6D3V3MX-GP -1 0925 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 C228 1D05V_VTT CPU CORE SUPPLY C185 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 SC10U6D3V3MX-GP C179 SC10U6D3V3MX-GP SC10U6D3V3MX-GP DY C455 SC10U6D3V3MX-GP C184 C125 SC10U6D3V3MX-GP C178 SC10U6D3V3MX-GP DY C451 SC10U6D3V3MX-GP C183 SC10U6D3V3MX-GP SC10U6D3V3MX-GP DY C131 SC10U6D3V3MX-GP SC10U6D3V3MX-GP C182 DY C126 SC10U6D3V3MX-GP C128 C453 SC10U6D3V3MX-GP DY C127 SC10U6D3V3MX-GP C454 SC10U6D3V3MX-GP C181 SC10U6D3V3MX-GP SC10U6D3V3MX-GP DY C456 SC10U6D3V3MX-GP SC10U6D3V3MX-GP C180 C129 SC10U6D3V3MX-GP SC10U6D3V3MX-GP C452 DY C187 SC10U6D3V3MX-GP C130 C186 SC10U6D3V3MX-GP SC10U6D3V3MX-GP C C457 1D05V_VTT VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 SC10U6D3V3MX-GP D VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC OF SC10U6D3V3MX-GP 52A VCC_CORE AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 SENSE LINES VCC_CORE PROCESSOR CORE POWER 2 A SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (4/7) AUBURNF Size Custom 62.10040.611 2ND = 62.10055.321 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 SB 0812 VCC_GFXCORE 2 1D5V_S0_DDR C335 S3 C S B R94 0R0603-PAD 1 C173 SC10U6D3V3MX-GP C177 SC10U6D3V3MX-GP 1D8V_S0 0.6A DY 2 C195 SC4D7U6D3V3KX-GP DY +V1.8S_VCCSFR 1 C197 -1 0925 C200 D 84.27002.W31 2nd = 84.27002.N31 1D05V_VTT 2 DY Q44 2N7002-11-GP G C229 SC10U6D3V3MX-GP L26 L27 M26 C239 VTT1 VTT1 VTT1 R858 220R2F-GP C288 2 1 2 1 C287 1D05V_VTT SC1U6D3V2KX-GP 62.10040.611 C268 S3 SC1U6D3V2KX-GP 2ND = 62.10055.321 C286 6A C282 P10 N10 L10 K10 J22 J20 J18 H21 H20 H19 R712 0R3J-0-U-GP PM_SLP_S3_CTL_D VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 NON_S3 1 R709 0R3J-0-U-GP SENSE LINES GRAPHICS VIDs NON_S3 R710 0R3J-0-U-GP -1 0925 C198 AUBURNF C262 DY 2 - 1.5V RAILS 1.1V 2 C250 DY SC1U6D3V2KX-GP VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 NON_S3 13,20 PM_SLP_S3_CTL 1.8V 2 1 C225 K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 R711 0R3J-0-U-GP SB 0812 SC10U6D3V3MX-GP DDR3 1 AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 SC1U6D3V2KX-GP VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ C238 PEG & DMI AUBURNDALE 2 2 2 1 R180 1KR2J-1-GP VTT1 VTT1 VTT1 VTT1 SC1U6D3V2KX-GP -1 0925 C188 SC10U6D3V3MX-GP DY C230 SC10U6D3V3MX-GP SC10U6D3V3MX-GP ST220U2D5VBM-2GP DY C208 C223 VTT1 VTT1 VTT1 NON_S3 GFX_VR_EN 52 GFX_DPRSLPVR 52 GFX_IMON 52 DIS_ONLY FDI TC15 B 18A J24 J23 H25 SC1U6D3V2KX-GP 1D05V_VTT C224 SC10U6D3V3MX-GP Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V 1D05V_VTT 1D5V_S3 SC10U6D3V3MX-GP DIS_ONLY 52 SC10U6D3V3MX-GP DIS_ONLY AR25 AT25 AM24 SB 0814 GFX_VID[6 0] SC10U6D3V3MX-GP DIS_ONLY GFX_VR_EN GFX_DPRSLPVR GFX_IMON GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6 SC10U6D3V3MX-GP DIS_ONLY C AM22 AP22 AN22 AP23 AM23 AP24 AN24 SC1U6D3V2KX-GP R695 0R3J-0-U-GP GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6 D VCC_AXG_SENSE 52 VSS_AXG_SENSE 52 SC1U6D3V2KX-GP R685 0R3J-0-U-GP AR22 AT22 SC1U6D3V2KX-GP R668 0R3J-0-U-GP VAXG_SENSE VSSAXG_SENSE SC1U6D3V2KX-GP R669 0R3J-0-U-GP GRAPHICS VCC_GFXCORE VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 POWER 1 1 UMA_PX UMA_PX UMA_PX UMA_PX 2 2 C193 SC10U6D3V3MX-GP C194 SC10U6D3V3MX-GP DY C192 SC10U6D3V3MX-GP DY C190 SC10U6D3V3MX-GP DY C210 SC10U6D3V3MX-GP DY C205 SC10U6D3V3MX-GP C199 SC10U6D3V3MX-GP ST220U2D5VBM-2GP DY SC10U6D3V3MX-GP TC5 C207 D OF CPU1G AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 -1 0925 -1 0925 SJV50 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (5/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 C B AUBURNDALE D VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS OF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS CPU1I AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS OF AUBURNDALE CPU1H AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 D C VSS NCTF TEST PIN: A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35, AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35 AUBURNF AUBURNF 2ND = 62.10055.321 2ND = 62.10055.321 62.10040.611 62.10040.611 A VSS_NCTF#AR34 VSS_NCTF#B34 VSS_NCTF#B2 AR34 B34 B2 VSS_NCTF#B1 VSS_NCTF#A35 VSS_NCTF#AT1 VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35 RSVD_NCTF#AR35 RSVD_NCTF#AT3 RSVD_NCTF#AR1 RSVD_NCTF#AP1 RSVD_NCTF#AT2 RSVD_NCTF#C1 RSVD_NCTF#A3 RSVD_NCTF#C35 RSVD_NCTF#B35 RSVD_NCTF#A34 RSVD_NCTF#A33 B1 A35 AT1 AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33 TP_MCP_VSS_NCTF6 TP_MCP_VSS_NCTF1 TP_MCP_VSS_NCTF2 TP_MCP_VSS_NCTF7 1 1 TP67 TP65 TP68 TP21 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP B A SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (6/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet of 67 5 CPU1E OF D RN51 DY 20 M_VREF_DQ_DIMM0 21 M_VREF_DQ_DIMM1 H_RSVD9_R H_RSVD10_R SRN0J-10-GP-U RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF# SB_DIMM_VREF# RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30 AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP#H16 AH25 AK26 RSVD#AL26 RSVD_NCTF#AR2 AL26 AR2 RSVD#AJ26 RSVD#AJ27 AJ26 AJ27 PCI-Express Configuration Select RSVD#AH25 RSVD#AK26 CFG0 DY R340 3KR2F-GP CFG0 CFG3 R343 3KR2F-GP CFG3 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP 1 1 1 1 1 TP22 TP26 TP35 TP36 TP28 TP25 TP24 TP32 TP29 TP30 RN RN50 0R4P2R-PAD -1 0928 H_RSVD17_R H_RSVD18_R B19 A19 RSVD#B19 RSVD#A19 A20 B20 RSVD#A20 RSVD#B20 U9 T9 AC9 AB9 B J29 J28 AR32 RSVD_TP#E15 RSVD_TP#F15 KEY RSVD#D15 RSVD#C15 RSVD#AJ15 RSVD#AH15 E15 F15 A2 D15 C15 AJ15 AH15 :Normal Operation :Lane Numbers Reversed 15 -> 0, 14 -> 1, CFG4 - Display Port Presence RSVD#AR32 CFG4 DY R344 3KR2F-GP CFG4 1 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 CFG7 RN AFTE14P-GP TP23 AFTE14P-GP TP31 RSVD#AL28 RSVD#AL29 RSVD#AP30 RSVD#AP32 RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33 RSVD64_R RSVD65_R RN16 0R4P2R-PAD DY C 1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port CFG7(Reserved) - Temporarily used for early Clarksfield samples C CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 R339 3KR2F-GP CFG7 1 RESERVED AFTE14P-GP TP34 AFTE14P-GP TP27 1:Single PEG 0:Bifurcation enabled CFG3 - PCI-Express Static Lane Reversal SB 0817 AJ13 AJ12 AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 RSVD#AJ13 RSVD#AJ12 SO-DIMM VREFDQ (M3) Circuit for Clarksfield Processor AUBURNDALE D Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor -1 0928 RSVD#U9 RSVD#T9 RSVD#AC9 RSVD#AB9 RSVD#J29 RSVD#J28 RSVD_TP#AA5 RSVD_TP#AA4 RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2 RSVD_TP#AA2 RSVD_TP#AA1 RSVD_TP#R9 RSVD_TP#AG7 RSVD_TP#AE3 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 RSVD_TP#V4 RSVD_TP#V5 RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7 RSVD_TP#W3 RSVD_TP#W2 RSVD_TP#N3 RSVD_TP#AE5 RSVD_TP#AD9 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 VSS AUBURNF AP34 Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report] For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used Does not impact AUB functionality B VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND RSVD_VSS R341 0R0402-PAD -1 0925 2ND = 62.10055.321 A SJV50 62.10040.611 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (7/7) Size A3 Date: Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet 10 of 67 VGA_CORE +VGA_CORE G39 DCBATOUT_8209E_VGA 2 R325 10KR2J-3-GP 2009/07/16 WAYNE DIS DIS C430 SCD1U25V3KX-GP GAP-CLOSE-PW R G38 DIS TC7 GAP-CLOSE-PW R G36 GAP-CLOSE-PW R G37 2009/07/16 WAYNE GAP-CLOSE-PW R G23 DIS Id=63A Qg=14~19nC, Rdson=5.8~7.2mohm -1 1001 GAP-CLOSE-PW R G24 GAP-CLOSE-PW R G25 Vout=0.75*((1+(R1/R2)) DIS GAP-CLOSE-PW R G26 SB 0819 GAP-CLOSE-PW R G27 3D3V_VGA NV_VID0_D R775 100KR2J-1-GP Q19 2N7002-7F-GP GAP-CLOSE-PW R G30 DIS B NV_VID1_1 E DY Q51 NVVDD_ALTV1 59 84.02222.V11 2ND = 84.02222.R11 DY C419 SCD1U10V2KX-4GP GAP-CLOSE-PW R G31 R316 B NV_VID0 DIS MMBT2222A-3-GP DY -1 1006 C S 10KR2J-3-GP 84.02222.V11 2ND = 84.02222.R11 NV_VID0_G NVVDD_ALTV0 59 GAP-CLOSE-PW R G32 10KR2J-3-GP Q52 MMBT2222A-3-GP S C G R322 NV_VID1_G G DIS C412 SCD1U10V2KX-4GP GAP-CLOSE-PW R G33 DIS -1 1002 GAP-CLOSE-PW R G34 MADSION PRO I/O Inter Pull Low O YES A NVVDD_ALTV0 I/O O Inter Pull Low YES GAP-CLOSE-PW R G35 GPIO TABLE GPU VOLTAGE GPU VOLTAGE L: 1.00V H: 0.90V PARK XT NVVDD_ALTV0 GPIO TABLE GPU VOLTAGE GPU VOLTAGE L: 1.05V H: 0.90V R331 SJV50 A GAP-CLOSE-PW R Wistron Corporation MADSION PRO 15KR2F 64.15025.6DL PARK XT 10KR2F 64.10025.6DL 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title TPS51117_VGA_CORE Size A3 Date: B GAP-CLOSE-PW R G29 DIS E DY GAP-CLOSE-PW R G28 2 D Q20 2N7002-7F-GP MAD/PARK DY D DY R776 NV_VID1_1_D 100KR2J-1-GP 3D3V_VGA R331 15KR2F-GP R328 11K5R2F-GP B 1 8209A_VFB_VGA C GAP-CLOSE-PW R G22 2 C443 SC100P50V2JN-3GP R334 10KR2F-2-GP 1 TC8 8209A_VFB_VGA 3D3V_VGA 1 2 R338 0R0402-PAD-1-GPDGPU_PWROK16,57,58 DY DIS 1 DIS DIS DIS SE330U2VDM-L-GP R337 10KR2J-3-GP DIS U37 DIS C442 SE330U2VDM-L-GP U8 3D3V_VGA TPS51117RGYR-GP R335 10KR2F-2-GP R333 2KR2F-3-GP S S S G 220KR2F-GP 8209A_PGOOD_VGA S S S G C VOUT PGOOD GND PGND GND GAP-CLOSE-PW R G15 2 IND-D45UH-4-GP VGA_CORE SC33P50V2JN-3GP R329 8209A_PHASE_VGA 15 GAP-CLOSE-PW R G20 VGA_CORE D D D D DIS 12 D D D D 8209A_EN/DEM_VGA EN_PSV 8209A_TON_VGA TON 11 8209A_CS_VGATRIP LL GAP-CLOSE-PW R G18 DIS L11 DIS 8209A_UGATE_VGA 8209A_LGATE_VGA D GAP-CLOSE-PW R G19 VFB VBST 13 14 DRVH DRVL GAP-CLOSE-PW R G17 Iomax=22A OCP>33A V5FILT V5DRV 8209A_VFB_VGA 8209A_BOOT 10 1 U36 8209A_VDD_VGA K DY 2009/08/20 WAYNE SIR460DP-T1-GE3-GP D13 B0530W S-7-F-GP DIS DIS 2009/08/20 WAYNE DIS SIR474DP-T1-GE3-GP SC1U10V2KX-1GP A GAP-CLOSE-PW R 1 2 C436 5V_S5 C438 SCD1U16V2KX-3GP GAP-CLOSE-PW R G21 C403 S S S G GAP-CLOSE-PW R G11 DIS DIS C409 SCD1U50V3KX-GP C424 SC1U10V2KX-1GP U4 DIS C415 SC10U25V5KX-GP 2009/09/28WAYNE remove R322 R330 200R2J-L1-GP D D D D GAP-CLOSE-PW R G14 Id=36A Qg=7.2nC, Rdson=11.1~13.9mohm SC10U25V5KX-GP D DIS 2009/09/28WAYNE 5V_S5 SIR460DP-T1-GE3-GP GAP-CLOSE-PW R G13 1 GAP-CLOSE-PW R G16 DCBATOUT_8209E_VGA TPS51117 for VGA G12 DCBATOUT 2 Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet 53 of 67 A B D E Adaptor in to generate DCBATOUT DCIN1 NP1 AD+ AD_JK A B -1 1006 CT4 SC1U50V5ZY-1-GP C RT6 100KR2J-1-GP QT2 B AD_OFF C R1 E PDTA124EU-1-GP E R2 PDTC124EU-1-GP 39 AD_OFF#_JK D D D D QT1 UT2 S S S G AO4407A-GP RT5 200KR2F-L-GP 2 K AD+_2 DT1 P6SBMJ24APT-GP R1 GND CT3 SCD1U50V3KX-GP 22.10037.F11 SCD1U50V3KX-GP DC-JACK131-GP ECT6 R2 C 3 BATTERY CONNECTOR 2 BAT1 RNT1 39,51 BAT_SDA 39,51 BAT_SCL 39 BAT_IN# 5 BATA_SDA_1 BATA_SCL_1 BAT_IN#_1 1 SRN33J-7-GP BT+ 2 51 BATT_SENSE ECT11 DY DY 2 2 K A DY SC10P50V2JN-4GP ECT12 DY SC10P50V2JN-4GP ECT14 DY MLVS0402M04-GP ECT16 DY SC1000P50V3JN-GP-U DY SC1000P50V3JN-GP-U DY ECT15 SCD1U50V3ZY-GP ECT10 DT2 SCD1U50V3ZY-GP MMPZ5232BPT-GP-U DY MLVS0402M04-GP DY MLVS0402M04-GP ELT2 ELT1 ELT3 RT40 0R0402-PAD GND GND DAT CLK BAT_IN BT+2 BT+1 GND GND TYCO-CON7-19-GP 20.81159.007 SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title AD/BATT CONN Size Document Number Rev SB SJV50-CP Date: Wednesday, October 21, 2009 A B C D Sheet 54 of E 67 1 2 1 2 1 2 2 1 2 DY EC34 DY SCD1U50V3KX-GP DY EC25 SCD1U50V3KX-GP DY EC5 SCD1U50V3KX-GP DY EC19 SCD1U50V3KX-GP ECT65 SCD1U50V3KX-GP 1 ECT66 SCD1U50V3KX-GP ECT54 SCD1U50V3KX-GP DY ECT55 SCD1U50V3KX-GP ECT9 SCD1U50V3KX-GP DY ECT30 SCD1U50V3KX-GP ECT62 SCD1U50V3KX-GP 1 1 ECT39 SCD1U50V3KX-GP DY ECT44 SCD1U50V3KX-GP ECT67 SCD1U50V3KX-GP DY ECT60 SCD1U50V3KX-GP ECT5 SCD1U50V3KX-GP DY ECT56 SCD1U50V3KX-GP DY ECB1 SCD1U50V3KX-GP DY ECB2 SCD1U50V3KX-GP ECB5 SCD1U50V3KX-GP DY 1 ECB11 SCD1U50V3KX-GP D SCD1U50V3KX-GP ECB6 DY DCBATOUT DCBATOUT D -1 1006 DY 1 DY ECT58 2 1 2 1 2 ECT31 SCD1U10V2KX-4GP DY ECB3 SCD1U10V2KX-4GP DY VCC_CORE SCD1U10V2KX-4GP ECT61 DY ECT36 SCD1U10V2KX-4GP DY ECB4 SCD1U10V2KX-4GP ECB7 VCC_CORE SCD1U10V2KX-4GP DY 1D05V_S0 SCD1U10V2KX-4GP ECT57 SCD1U10V2KX-4GP SCD1U10V2KX-4GP ECT59 SCD1U10V2KX-4GP ECT38 DY 1D05V_S0 1D5V_VGA 1D05V_S0 DY -1 1006 34.42Y01.021 34.4B804.001 H14 DY B HOLE256R142-GP H20 HOLE HB1 HOLE 1 ZZ.0HOLE.XXX H8 HOLE 34.42Y01.021 GNDT1 HOLE SPRING_GND3 SPRING-58-GP SJV50 1 HOLE355X355R111-S1-GP ZZ.0HOLE.XXX 34.42Y01.021 GND9 HOLE355X355R111-S1-GP H7 HOLE ZZ.0HOLE.XXX HOLE256R142-GP 34.42Y01.021 GND8 HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP GND7 ZZ.00PAD.801 HOLE256R142-GP 34.42Y01.021 GND6 H6 MINICARD ZZ.00PAD.801 DY 1 2 ZZ.00PAD.801 HOLE256R142-GP HOLE355X355R111-S1-GP GND5 HOLE355X355R111-S1-GP DY H5 34.42Y01.021 GND4 HOLE355X355R111-S1-GP 2 2 ZZ.00PAD.801 HOLE256R142-GP ZZ.00PAD.801 ZZ.00PAD.801 HOLE256R142-GP HOLE315X315R91-S1-GP HOLE355X355R111-S1-GP 1 HOLE256R142-GP ZZ.00PAD.801 GND3 ECT32 MDC H4 34.42Y01.021 GND2 DY ECB10 SCD1U10V2KX-4GP GND1 DY ECT64 VGA H3 34.42Y01.021 ECT23 SCD1U10V2KX-4GP H2 34.42Y01.021 A DY NB H1 B DY ECT33 SCD1U10V2KX-4GP SCD1U10V2KX-4GP CPU DY ECT37 SCD1U10V2KX-4GP SCD1U10V2KX-4GP DY ECT42 SCD1U10V2KX-4GP ECT43 SCD1U10V2KX-4GP ECT63 SCD1U10V2KX-4GP 3D3V_S0 C 3D3V_S0 C Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size Date: A 34.4B312.002 EMI/Spring/Boss Document Number SJV50-CP W ednesday, October 21, 2009 Sheet Rev SB 55 of 67 A B C D E Check test point 3D3V_S0 TPT8 AFTE14P-GP 3D3V_AUX_S5 TPB2 AFTE14P-GP 3D3V_S5 TPT4 AFTE14P-GP 5V_S5 TPT12 AFTE14P-GP TPT9 AFTE14P-GP TPB1 AFTE14P-GP TPT6 AFTE14P-GP TPT7 AFTE14P-GP 13,39 PM_PW RBTN# 5,16,43 H_PW RGD 39,43,47 S5_ENABLE 5,15,30,36,37,39,58 PLT_RST# Test Point放 放放Dimm Door打 打打打打打打 3 2 SJV50 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title AFTE_TP Size A3 Date: A B C D Document Number Rev SJV50-CP W ednesday, October 21, 2009 Sheet E SB 56 of 67 -1M 1021 TC28 D S PX 3D3V_S0 G D R577 100KR2J-1-GP RUN_POW ER_ON PX S DIS D D R574 100KR2J-1-GP R583 330KR2J-L1-GP DIS DIS_EN_1D5_RUN Q30 2N7002-11-GP C -1 0925 D D PX C DIS DIS S PX 84.27002.W31 2ND = 84.27002.N31 C743 84.S0610.B31 2ND = 84.00610.C31 DIS G RUNON_R SCD22U25V3KX-GP DIS_EN_1D5_RUN_R 330KR2J-L1-GP R580 Q26 2N7002-11-GP PX D 77.C4771.02L NDS0610-NL-GP DIS G S 2DIS_EN_1D5_RUN_L 10KR2J-3-GP R655 DGPU_PW R_EN R579 10KR2J-3-GP 3D3V_S0 TC27 ST470UF2VDM-GP Q27 DGPU_3D3V_EN G AO4468-GP 84.04468.037 PX Q25 2N7002-11-GP 84.27002.W31 2ND = 84.27002.N31 DIS DIS C764 PX DGPU_3D3V_DIS VDDR3discharge CKT 84.03413.A31 2 R575 470R2J-2-GP DIS D C763 SC10U6D3V3MX-GP SCD1U16V2KX-3GP Q31 AO3413-GP 2 DIS_ONLY -1M 1021 U70 S S S G D D D D 3D3V_VGA 1D5V_VGA DIS SE330U2VDM-L-GP 3D3V_S0 0R5J-5-GP 1D5V_S3 DIS R581 AO4468, SO-8 Id=11.6A, Qg=9~12nC Rdson=17.4~22m ohm 1D5V_S3 +3VS to 3.3V_DELAY Transfer G 84.27002.W31 2ND = 84.27002.N31 9025_PGOOD_1V R576 0R0402-PAD Q28 2N7002-11-GP DGPU_PW ROK_R G 84.27002.W31 2ND = 84.27002.N31 S S 16 DGPU_PW R_EN# -1 0925 DIS C660 SCD1U10V2KX-4GP RT9025 for 1V_VGA G9661 for 1D8V_VGA 1V_VGA_PW R 1V_VGA G156 1D8V_LDO_VGA 1D5V_S3 3D3V_S5 5V_S5 DIS C70 Iomax=1.5A 74.09025.03D DY DIS 74.09661.07D DIS 9025_PGOOD_1.8V R61 14K3R2F-GP C59 1 DIS C83 DY DY DIS SB 0814 WAYNE Vo=0.8*((R1+R2)/R2) 3D3V_S0 9025_ADJ_VGA C71 R67 18KR2F-GP G9661-25ADJF11U-GP R53 NC#5 VO ADJ GND GND VPP VIN VEN POK C84 SCD1U10V2KX-5GP 2 1 C771 DY DIS R584 20KR2F-L-GP DIS -1 0925 RT9025-25PSP-GP R585 2K2R2J-2-GP DIS DIS 9025_FB 3D3V_VGA C776 9025_PGOOD_1V_R SC10U6D3V5MX-3GP DIS R582 C775 5K1R2F-2-GP R144 0R0402-PAD 1D8V_LDO_VGA Vo(cal.)=1.8069V SC10U6D3V5MX-3GP 9025_PGOOD_1V SC10U10V5ZY-1GP NC#5 VOUT ADJ GND SC10U10V5ZY-1GP VDD VIN EN PGOOD DIS SC100P50V2JN-3GP SCD1U25V3ZY-1GP Iomax=1A OCP>1.35A SC100P50V2JN-3GP -1 0925 DY C866 U31 9025_EN_1V GND R578 0R0402-PAD 16,53,58 DGPU_PW ROK 1V_VGA_PW R U85 B GAP-CLOSE-PW R DIS GAP-CLOSE-PW R DIS GAP-CLOSE-PW R G160 1 DY C50 SC10U6D3V5MX-3GP C803 SC1U10V3ZY-6GP C85 SC10U6D3V5MX-3GP GAP-CLOSE-PW R G158 SC1U6D3V2KX-GP 1 C855 SC10U10V5ZY-1GP C820 SC10U10V5ZY-1GP 5V_S5 1D8V_VGA G159 GAP-CLOSE-PW R G157 2 DIS DY B DY A SJV50 10KR2F-2-GP 9025_PGOOD_1V A DY Vo=0.8*(1+(R1/R2)) Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A3 Date: ATI POWER Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet 57 of 67 1 OF VGA1A PEG_RXN[15 0] PEG_RXN[15 0] PEG_TXN[15 0] PEG_TXN[15 0] PEG_RXP[15 0] PEG_RXP[15 0] PEG_TXP[15 0] PEG_TXP[15 0] D PEG_TXP0 PEG_TXN0 AA38 Y37 PCIE_RX0P PCIE_RX0N PCIE_TX0P PCIE_TX0N Y33 Y32 PEG_RXP0_1 PEG_RXN0_1 C676 SCD1U16V2KX-3GP C684 SCD1U16V2KX-3GP DIS PEG_TXP1 PEG_TXN1 Y35 W36 PCIE_RX1P PCIE_RX1N PCIE_TX1P PCIE_TX1N W33 W32 PEG_RXP1_1 PEG_RXN1_1 C677 PEG_TXP2 PEG_TXN2 W38 V37 PCIE_RX2P PCIE_RX2N PCIE_TX2P PCIE_TX2N U33 U32 PEG_RXP2_1 PEG_RXN2_1 C661 PEG_TXP3 PEG_TXN3 V35 U36 PCIE_RX3P PCIE_RX3N PCIE_TX3P PCIE_TX3N U30 U29 PEG_RXP3_1 PEG_RXN3_1 C680 SCD1U16V2KX-3GP C688 SCD1U16V2KX-3GP SCD1U16V2KX-3GP C681 SCD1U16V2KX-3GP DIS SCD1U16V2KX-3GP C691 SCD1U16V2KX-3GP DIS DIS PEG_TXP4 PEG_TXN4 U38 T37 PCIE_RX4P PCIE_RX4N PCIE_TX4P PCIE_TX4N T33 T32 PEG_RXP4_1 PEG_RXN4_1 C666 SCD1U16V2KX-3GP C673 SCD1U16V2KX-3GP DIS T35 R36 PEG_TXP6 PEG_TXN6 R38 P37 PEG_TXP7 PEG_TXN7 C PCIE_RX6P PCIE_RX6N P35 N36 PEG_TXP8 PEG_TXN8 PCIE_RX7P PCIE_RX7N N38 M37 PEG_TXP9 PEG_TXN9 PCIE_RX8P PCIE_RX8N M35 L36 PEG_TXP10 PEG_TXN10 PCIE_RX9P PCIE_RX9N L38 K37 PEG_TXP11 PEG_TXN11 PCIE_RX10P PCIE_RX10N K35 J36 PEG_TXP12 PEG_TXN12 PCIE_RX11P PCIE_RX11N J38 H37 PEG_TXP13 PEG_TXN13 PCIE_RX12P PCIE_RX12N H35 G36 PEG_TXP14 PEG_TXN14 B PCIE_RX5P PCIE_RX5N PCIE_RX13P PCIE_RX13N G38 F37 PCIE_RX14P PCIE_RX14N PCI EXPRESS INTERFACE PEG_TXP5 PEG_TXN5 PCIE_TX5P PCIE_TX5N T30 T29 PEG_RXP5_1 PEG_RXN5_1 C685 SCD1U16V2KX-3GP C663 SCD1U16V2KX-3GP DIS PCIE_TX6P PCIE_TX6N P33 P32 PEG_RXP6_1 PEG_RXN6_1 C692 SCD1U16V2KX-3GP C689 SCD1U16V2KX-3GP DIS PCIE_TX7P PCIE_TX7N P30 P29 PEG_RXP7_1 PEG_RXN7_1 C667 SCD1U16V2KX-3GP C664 SCD1U16V2KX-3GP DIS PCIE_TX8P PCIE_TX8N N33 N32 PEG_RXP8_1 PEG_RXN8_1 C674 SCD1U16V2KX-3GP C668 SCD1U16V2KX-3GP DIS PCIE_TX9P PCIE_TX9N N30 N29 PEG_RXP9_1 PEG_RXN9_1 C665 SCD1U16V2KX-3GP C679 SCD1U16V2KX-3GP DIS PCIE_TX10P PCIE_TX10N L33 L32 PEG_RXP10_1 PEG_RXN10_1 C671 SCD1U16V2KX-3GP C687 SCD1U16V2KX-3GP DIS PCIE_TX11P PCIE_TX11N L30 L29 PEG_RXP11_1 PEG_RXN11_1 C672 SCD1U16V2KX-3GP C670 SCD1U16V2KX-3GP DIS PCIE_TX12P PCIE_TX12N K33 K32 PEG_RXP12_1 PEG_RXN12_1 C675 SCD1U16V2KX-3GP C690 SCD1U16V2KX-3GP DIS PCIE_TX13P PCIE_TX13N J33 J32 PEG_RXP13_1 PEG_RXN13_1 C669 SCD1U16V2KX-3GP C678 SCD1U16V2KX-3GP DIS PCIE_TX14P PCIE_TX14N K30 K29 PEG_RXP14_1 PEG_RXN14_1 C693 SCD1U16V2KX-3GP C683 SCD1U16V2KX-3GP DIS PEG_TXP15 PEG_TXN15 F35 E37 PCIE_RX15P PCIE_RX15N PCIE_TX15P PCIE_TX15N H33 H32 PEG_RXP15_1 PEG_RXN15_1 C682 SCD1U16V2KX-3GP C662 SCD1U16V2KX-3GP DIS PEG_RXP0 PEG_RXN0 DIS PEG_RXP1 PEG_RXN1 DIS PEG_RXP2 PEG_RXN2 DIS PEG_RXP3 PEG_RXN3 DIS PEG_RXP4 PEG_RXN4 DIS PEG_RXP5 PEG_RXN5 DIS PEG_RXP6 PEG_RXN6 DIS PEG_RXP7 PEG_RXN7 DIS DIS PEG_RXP9 PEG_RXN9 2 DIS DIS DIS DIS DIS C PEG_RXP8 PEG_RXN8 DIS D PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 B PEG_RXP15 PEG_RXN15 DIS CLOCK AB35 AA36 12 CLK_PCIE_PEG 12 CLK_PCIE_PEG# PCIE_REFCLKP PCIE_REFCLKN 1V_VGA DIS CALIBRATION R661 DIS 2PW RGOOD_ATI 10KR2J-3-GP AJ21 AK21 AH16 NC#AJ21 NC#AK21 PWRGOOD PCIE_CALRP Y30 PCIE_CALRP R586 PCIE_CALRN Y29 PCIE_CALRN 1K27R2F-L-GP 2 R587 2KR2F-3-GP R589 0R0402-PAD PLT_RST1#_M92_1 ATI_RST# -1 0925 DY R588 16,53,57 DGPU_PW ROK C686 SC47P50V2JN-3GP AA30 PERST# DIS MADISON-PRO-GP 71.MDSON.M01 DIS DY 0R2J-2-GP A SJV50 PX 16 DGPU_HOLD_RST# 5,15,30,36,37,39,56 PLT_RST# A B GND VCC Y Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C ATI_RST# R701 0R2J-2-GP NL17SZ08DFT2G-GP 73.7SZ08.DAH 2ND = 73.01G08.L04 PLT_RST# Title Size A3 DIS_ONLY Madison PCIE ATI_RST# Date: A 3D3V_VGA U71 Document Number Rev SB SJV50-CP W ednesday, October 21, 2009 Sheet 58 of 67 DIS Layout notice: It should be pleace near HDMI connector SB 0811 DPA TX2P_DPA0P TX2M_DPA0N TXCBP_DPB3P TXCBM_DPB3N TX3P_DPB2P TX3M_DPB2N DPB TX4P_DPB1P TX4M_DPB1N TX5P_DPB0P TX5M_DPB0N TXCCP_DPC3P TXCCM_DPC3N TX0P_DPC2P TX0M_DPC2N DPC TX1P_DPC1P TX1M_DPC1N TX2P_DPC0P TX2M_DPC0N TXCDP_DPD3P TXCDM_DPD3N TX3P_DPD2P TX3M_DPD2N DPD AF37 AE38 NV_CRT_BLUE AC36 AC38 NV_CRT_HSYNC NV_CRT_VSYNC R2 R2# G2 G2# B2 B2# C Y COMP H2SYNC V2SYNC HPD1 = 0.6V) AVSSQ DIS AD30 AD31 DAC2_A2VDD AF30 AF31 AC32 AD32 AF32 DIS AD29 AC29 AG31 AG32 DAC2_VDD2DI AG33 DAC2_A2VDD R2SET AM32 AN32 DPLL_VDDC DPLL_VDDC AV33 AU34 XTALIN XTALOUT PLL/CLOCK AW35 AUX2P AUX2N XO_IN2 -1 0925 DDCCLK_AUX3P DDCDATA_AUX3N For Thermal sensor AF29 AG29 DPLUS DMINUS -1 0929 THERMAL FAN_PWM TSVDD AK32 TS_FDO R595 1MR2J-1-GP AJ32 AJ33 DIS TSVDD TSVSS DDC6CLK DDC6DATA DDCCLK_AUX7P DDCDATA_AUX7N C710 DIS NV_CRT_DDCCLK NV_CRT_DDCDATA AM19 AL19 C713 DIS C714 DIS BLM15BD121SS1D-GP DIS 68.00084.F81 2ND = 68.00217.701 3D3V_VGA AL30 AM30 AL29 AM29 AN21 AM21 AJ30 AJ31 DIS 38,39,42 38,39,42 G781_ALERT# SMBC_THERM SMBD_THERM AK30 AK29 SC 0902 DIS C926 SCD1U16V2KX-3GP 3D3V_VGA U74 SMBCLK VCC SMBDATA DXP ALERT# DXN GND THERM# GPU_TEMP+ A GPU_THERM# C924 SC2200P50V2KX-2GP Q29 MMBT3904-4-GP G781P8F-GP DIS B DIS 84.T3904.C11 2nd = 84.03904.L06 NV_HDMI_DETECT 25,39 SJV50 Wistron Corporation HPD1 SRN2K2J-1-GP RN62 DIS C721 SC10P50V2JN-4GP R591 10KR2J-3-GP DIS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Madison IO DIS -1 0925 Size A2 3D3V_VGA Date: B NV_HDMI_CLK 25 NV_HDMI_DATA 25 -1 0929 C704 AN20 AM20 82.30034.701 2nd = 82.30034.461 DIS 1D8V_VGA L40 24 24 GPU_TEMP- XTAL-27MHZ-92-GP 68.00084.F81 2ND = 68.00217.701 AM27 AL27 DIS -1 0925 C719 SC10P50V2JN-4GP AVSSQ DAC1_VDD1DI DIS 715R2F-GP AM26 AN26 71.MDSON.M01 DIS DIS BLM15BD121SS1D-GP C709 SC1U6D3V2KX-GP MADISON-PRO-GP C697 DIS X7 DIS C716 E C696 TS_A DY DIS C720 1D8V_VGA 2 DIS DIS SCD1U16V2KX-3GP SC1U10V3KX-3GP AL31 C702 AA29 DY 0R0402-PAD C712 L30 0R0402-PAD DDCCLK_AUX4P DDCDATA_AUX4N DDCCLK_AUX5P DDCDATA_AUX5N -1 0929 TP110 AUX1P AUX1N XO_IN TP135 GPU_TEMP+ GPU_TEMP- DDC1CLK DDC1DATA DDC2CLK DDC2DATA 1VGA_XIN1_1 AW34 L37 0R0402-PAD DIS R2SET_ATI DPLL_PVDD DPLL_PVSS AN31 XTALIN XTALOUT 1D8V_VGA DAC2_A2VDDQ AF33 C706 -1 0929 DAC2_A2VDDQ C715 SCD1U16V2KX-3GP R598 DDC/AUX A AD33 DY DIS C701 DY C705 SCD1U16V2KX-3GP 3D3V_VGA R593 C695 SCD1U16V2KX-3GP DPLL_PVDD DIS A2VSSQ DIS VREFG DY 1D8V_VGA L38 R600 249R2F-GP DY DAC1_AVDD 0R0402-PAD C699 DAC1_VDD1DI C765 AC30 AC31 A2VDDQ AH13 1 VGA_VREFG 1D8V_VGA R594 C700 SCD1U16V2KX-3GP DAC2_VDD2DI AVSSQ 2 A2VDD 499R2F-2-GP DIS R590 DAC1_AVDD AC33 AC34 RSET_ATI -1 0925 AVSSQ 24,62 24,62 AD34 AE34 R670 0R0402-PAD DIS 22 AB34 RN86 SRN150F-1-GP 22 VDD1DI VSS1DI NV_CRT_GREEN RSET AVDD AVSSQ AE36 AD35 SC10U6D3V3MX-GP VREFG VOLTAGE DIVIDER IS (VREFG = VDDR4,5(1.8V) / C 22 HSYNC VSYNC NV_CRT_RED B B# AD39 AD37 SCD1U16V2KX-3GP DIS 71.MDSON.M01 DIS NV_CRT_GREEN G G# VDD2DI VSS2DI R596 499R2F-2-GP GPU_TXAOUT2+ 22 GPU_TXAOUT2- 22 AN36 AP37 SCD1U16V2KX-3GP GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT DAC1 GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCS# GPIO_23_CLKREQ# JTAG_TRST# JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 DAC2 GENERICF GENERICG AK24 GPU_TXAOUT1+ 22 GPU_TXAOUT1- 22 AP35 AR35 MADISON-PRO-GP NV_CRT_RED AT23 AR22 SC10U6D3V3MX-GP HPD1 AU22 AV21 GPU_TXAOUT0+ 22 GPU_TXAOUT0- 22 AR37 AU39 NV_CRT_BLUE R R# 1D8V_VGA ATI_ES AT21 AR20 SC1U6D3V2KX-GP B RN55 SRN10KJ-5-GP JTAG_TMS JTAG_TRSTB TXOUT_L3P TXOUT_L3N SCD1U16V2KX-3GP -1 0929 3D3V_VGA AU20 AT19 GPU_TXACLK+ 22 GPU_TXACLK- 22 AW37 AU35 TP102 TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N AP34 AR34 1JTAG_TMS SB 0819 AF35 AG36 VGA_XIN1 GPU_TXBOUT2+ 22 GPU_TXBOUT2- 22 DIS C 1JTAG_TRSTB TP114 AT17 AR16 12 PEX_CLKREQ GPU_TXBOUT1+ 22 GPU_TXBOUT1- 22 AG38 AH37 D R378 62 GPIO_VGA_22 TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N 2 DY GPU_TXBOUT0+ 22 GPU_TXBOUT0- 22 AH35 AJ36 SC10U6D3V3MX-GP THERMTRIP_VGA GPU_TXBCLK+ 22 GPU_TXBCLK- 22 AJ38 AK37 SC1U6D3V2KX-GP TP99 AK35 AL36 SCD1U16V2KX-3GP NVVDD_ALTV1 TP134 R774 10KR2J-3-GP ATI_BRIGHTNESS 23 NV_LCDVDD_ON 23 SCD1U16V2KX-3GP 53 OSC_SPREAD_1 Thermal_int AU16 AV15 SC1U6D3V2KX-GP NVVDD_ALTV0 TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N SCD1U16V2KX-3GP 53 TXCLK_LP_DPE3P TXCLK_LN_DPE3N AT15 AR14 3D3V_VGA AU14 AV13 62 GPIO_VGA_11 62 GPIO_VGA_12 62 GPIO_VGA_13 SB 0814 AK27 AJ27 LVTMDP -1 0925 GPIO_VGA_07_BLON 62 GPIO_VGA_08 62 GPIO_VGA_09 TXOUT_U3P TXOUT_U3N AT33 AU32 R375 0R0402-PAD NV_BLON_IN AR32 AT31 1 22 Thermal_int TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N TP97 TP98 62 GPIO_VGA_05 DIS AH20 AH18 AN16 AH23 AJ23 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 AM23 AN23 AK23 AL24 AM24 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 GPIO_VGA_03 GPIO_VGA_04 1 AV31 AU30 2 62 GPIO_VGA_00 62 GPIO_VGA_01 62 GPIO_VGA_02 TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N SCL SDA GENERAL PURPOSE I/O R597 10KR2J-3-GP TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N SB 0817 AR30 AT29 VARY_BL DIGON TXCLK_UP_DPF3P TXCLK_UN_DPF3N 3D3V_VGA NV_HDMI_DATA2+ 25 NV_HDMI_DATA2- 25 AK26 AJ26 22 NV_LCD_EDID_CLK 22 NV_LCD_EDID_DAT TX5P_DPD0P TX5M_DPD0N NV_HDMI_DATA1+ 25 NV_HDMI_DATA1- 25 AT27 AR26 C I2C -1 0930 AU26 AV25 It's strap for GDDR3-136ball Need to Clarify TX4P_DPD1P TX4M_DPD1N NV_HDMI_DATA0+ 25 NV_HDMI_DATA0- 25 1 DIS DIS DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 AT25 AR24 LVDS CONTROL 1 DY 2 1 AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 R684 10KR2J-3-GP 2 2 2 2 1 DY 10KR2J-3-GP TX1P_DPA1P TX1M_DPA1N R680 10KR2J-3-GP R683 SAMSUNG HYNIX DVPDATA [3:0] 0100 512MB Hynix-H5PS1G63EFR-20L (500MHz) 1000 512MB Samsung-K4N1G164QE-HC20 (500MHz) 1100 512MB QIMONDA HYB18T1G161C2F-20 (500MHz) R682 10KR2J-3-GP 10KR2J-3-GP R681 10KR2J-3-GP DVPDATA [3:2:1:0] for VRAM type selection H/W strap Should provide VRAM Table for VBios request R679 HYNIX MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3 R678 10KR2J-3-GP DIS SCD1U16V2KX-3GP SCD1U16V2KX-3GP DY C708 10KR2J-3-GP C703 DIS SC1U10V3KX-3GP SC10U6D3V3MX-GP DY 68.00084.F81 2ND = 68.00217.701 C711 SAMSUNG R677 C717 NV_HDMI_CLK+ 25 NV_HDMI_CLK- 25 1D8V_VGA 1D8V_VGA 1D8V_VGA 1D8V_VGA BLM15BD121SS1D-GP AU24 AV23 TX0P_DPA2P TX0M_DPA2N MUTI GFX DPLL_VDDC D DIS OF VGA1G TXCAP_DPA3P TXCAM_DPA3N 1 2 OF VGA1B DY DIS 2 DY C722 10KR2J-3-GP L31 C694 SCD1U16V2KX-3GP SC10U6D3V3MX-GP SC10U6D3V3MX-GP 68.00084.F81 DIS 2ND = 68.00217.701 C698 SCD1U16V2KX-3GP C707 1V_VGA DPLL_PVDD L32 BLM15BD121SS1D-GP 1D8V_VGA Document Number Rev SB SJV50-CP Wednesday, October 21, 2009 Sheet 59 of 67 1D8V_VGA 504mA D 2 1 1 2 2 1 2 2 2 1 2 2 2 1 2 2 1 DIS C730 DIS DYC809 C808 DIS DYC807 C734 2 DIS C806 C729 DYC810 +VGA_CORE B 1 C844 C804 2 AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 C802 DIS C801 DIS DIS DIS +VGA_CORE 71.MDSON.M01 DIS C799 DY C800 DIS C737 DIS C798 2 DIS C797 DIS C796 DY 4A MADISON-PRO-GP 68.00084.F81 2ND = 68.00217.701 2 1 2 2 BLM15BD121SS1D-GP DIS C736 2 DIS C805 2 L54 DIS SC10U6D3V3MX-GP DIS 1V_VGA +VGA_CORE 2 2 1 1 ISOLATED CORE I/O FB_GND 2 1 2 2 1 2 2 2 1 1 2 2 2 1 2 1 2 2 2 FB_VDDCI C SC1U6D3V2KX-GP AH29 C846 SC2D2U6D3V2MX-GP FB_GND DIS C727 DY SC1U6D3V2KX-GP C731 SC2D2U6D3V2MX-GP TP120 C725 SC1U6D3V2KX-GP TPAD14-GP DIS C819 SC2D2U6D3V2MX-GP AG28 C845 SC1U6D3V2KX-GP FB_VDDCI DIS DIS SCD1U16V2KX-3GP SC10U6D3V3MX-GP TP119 DIS C735 SC1U6D3V2KX-GP TPAD14-GP FB_VDDC C817 SC1U6D3V2KX-GP AF28 DIS C816 DY SC1U6D3V2KX-GP FB_VDDC C815 SCD1U16V2KX-3GP C814 SCD1U16V2KX-3GP TP118 SC10U6D3V3MX-GP SCD1U16V2KX-3GP SC1U6D3V2KX-GP VOLTAGE SENESE TPAD14-GP DIS C813 SC2D2U6D3V2MX-GP DIS C812 SC1U6D3V2KX-GP C788 SC1U6D3V2KX-GP DIS C787 C829 SC10U6D3V3MX-GP DIS SC10U6D3V3MX-GP 68.00084.F81 C786 2ND = 68.00217.701 VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI DIS C811 SC2D2U6D3V2MX-GP SPVSS C828 DIS SC1U6D3V2KX-GP SPV10 DIS SC1U6D3V2KX-GP SPV18 AN9 AN10 DIS DIS SC10U6D3V3MX-GP AM10 MPV18 MPV18 C738 DIS SC2D2U6D3V2MX-GP SPV18 SPV10 BLM15BD121SS1D-GP PCIE_PVDD DIS DIS SC10U6D3V3MX-GP PCIE_PVDD 40mA L46 H7 H8 C827 +VGA_CORE DIS SC10U6D3V3MX-GP 1D8V_VGA MPV18 DIS SC1U6D3V2KX-GP PLL AB37 PCIE_PVDD C826 SC1U6D3V2KX-GP NC_VDDRHB NC_VSSRHB SC1U6D3V2KX-GP NC_VDDRHA NC_VSSRHA V12 U12 C733 DIS -1 0924 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP M20 M21 DIS DY SC2D2U6D3V2MX-GP -1 0930 C728 C825 SC1U6D3V2KX-GP VDDR4 VDDR4 VDDR4 VDDR4 DY SC1U6D3V2KX-GP AD12 AF11 AF12 AG11 C824 SC2D2U6D3V2MX-GP DIS DIS SC1U6D3V2KX-GP VDDR4 VDDR4 VDDR4 VDDR4 C823 SC2D2U6D3V2MX-GP SC1U6D3V2KX-GP DIS SC2D2U6D3V2MX-GP AF13 AF15 AG13 AG15 C779 C822 SC1U6D3V2KX-GP VDDR3 VDDR3 VDDR3 VDDR3 AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 DIS SC1U6D3V2KX-GP I/O AF23 AF24 AG23 AG24 C821 SC1U6D3V2KX-GP DY VDD_CT VDD_CT VDD_CT VDD_CT DY SC1U6D3V2KX-GP DIS AF26 AF27 AG26 AG27 POWER C782 DIS LEVEL TRANSLATION -1 0925 C839 SCD1U16V2KX-3GP DIS C781 SC1U6D3V2KX-GP SC1U6D3V2KX-GP DIS C724 DY C838 DY D 1V_VGA SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC/BIF_VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC/BIF_VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC CORE DIS C833 1920mA G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 SC1U6D3V2KX-GP PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC AA31 AA32 AA33 AA34 V28 W29 W30 Y31 SC1U6D3V2KX-GP C772 DY PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR SC1U6D3V2KX-GP DIS SC1U6D3V2KX-GP C837 C836 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 C832 SC1U6D3V2KX-GP SC1U6D3V2KX-GP DIS C770 DY C835 SCD1U16V2KX-3GP DY SC1U6D3V2KX-GP DIS C834 SCD1U16V2KX-3GP SC1U6D3V2KX-GP DIS C778 1D8V_VGA DIS DIS C739 SC1U6D3V2KX-GP DIS SC10U6D3V3MX-GP C780 C769 SC1U6D3V2KX-GP SC1U6D3V2KX-GP 3D3V_VGA DIS C774 SC1U6D3V2KX-GP 68.00084.F81 2ND = 68.00217.701 C773 SC1U6D3V2KX-GP SC10U6D3V3MX-GP DIS C777 DIS AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 C758 VDD_CT BLM15BD121SS1D-GP B -1 1001 DIS C768 C762 DIS C757 110mA L52 DIS DIS C767 C761 SC1U6D3V2KX-GP 1D8V_VGA DIS SC1U6D3V2KX-GP SC10U6D3V3MX-GP C SC1U6D3V2KX-GP SC1U6D3V2KX-GP DIS C766 DIS C760 DY DIS C756 SC1U6D3V2KX-GP DIS C759 DY DIS C755 SC1U6D3V2KX-GP DY C754 SC1U6D3V2KX-GP DIS C753 C831 SC1U6D3V2KX-GP PCIE SC1U6D3V2KX-GP DY SC1U6D3V2KX-GP C752 DY SCD1U16V2KX-3GP MEM I/O -1 0925 1 OF VGA1E 1D5V_VGA C830 A A SPV18 DIS DIS 1D8V_VGA DIS DIS DIS DIS -1 0925 C842 C877 1 C841 DY C792 2 68.00084.F81 2ND = 68.00217.701 SJV50 C843 SCD1U16V2KX-3GP C870 SCD1U16V2KX-3GP C791 SC10U6D3V3MX-GP DIS SC1U6D3V2KX-GP MPV18 150mA SC1U6D3V2KX-GP SCD1U16V2KX-3GP -1 0925 C840 SC10U6D3V3MX-GP 68.00084.F81 2ND = 68.00217.701 DY SC1U6D3V2KX-GP C789 1 DIS SC1U6D3V2KX-GP C726 SC1U6D3V2KX-GP SC10U6D3V3MX-GP DIS C723 L58 DIS BLM15BD121SS1D-GP 75mA L51 DIS BLM15BD121SS1D-GP 1D8V_VGA SPV10 120mA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A2 Date: Madison POWER Document Number Rev SB SJV50-CP Wednesday, October 21, 2009 Sheet 60 of 67 OF VGA1F AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 -1 0925 DPD_VDD10 DPD_VDD10 DPB_VDD10 DPB_VDD10 DPD_VSSR DPD_VSSR DPD_VSSR DPD_VSSR DPD_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPD_VDD10 AN19 AP18 AP19 AW20 AW22 AL33 AM33 DPB_PVDD DPB_PVSS DPB_PVDD 20mA DPE_VSSR DPE_VSSR DPE_VSSR DPE_VSSR DPC_PVDD DPC_PVSS AU18 AV17 DPC_PVDD 20mA AF34 AG34 DPF_VDD10 AK33 AK34 120mA DPF_VDD10 DPF_VDD10 DPF_PVDD DPF_PVSS DY R671 150R2F-1-GP 1D8V_VGA R676 0R0603-PAD AM39 DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR DPEF_CALR AL38 AM35 2 DPD_PVDD 20mA AM37 AN38 DPF_PVDD DIS DIS 1D8V_VGA DIS 20mA C741 1D8V_VGA L44 C852 R603 0R0603-PAD BLM15BD121SS1D-GP C853 SC10U6D3V3MX-GP DPEF_CALR 68.00084.F81 2ND = 68.00217.701 20mA AV19 AR18 SC1U6D3V2KX-GP AF39 AH39 AK39 AL34 AM34 DIS DPF_PVDD DPF_VDD18 DPF_VDD18 DPE_PVDD DPE_PVSS DIS C818 R602 0R0603-PAD 1 DPF_VDD18 -1 0925 1D8V_VGA BLM15BD121SS1D-GP DPD_PVDD DPD_PVDD DPD_PVSS SCD1U16V2KX-3GP SCD1U16V2KX-3GP C871 F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13 1D8V_VGA 200mA C872 C860 AV29 AR28 DPE_VDD10 DPE_VDD10 C858 20mA DPE_VDD10 DPA_PVDD DPA_PVSS DPA_PVDD DP PLL POWER DPE_VDD18 DPE_VDD18 1D8V_VGA C851 L50 DIS AU28 AV27 DIS DPAB_CALR AW28 1 200mA DIS DPAB_CALR C794 L59 0R0402-PAD DIS 2 1 2 C850 DPCD_CALR DP E/F POWER AH34 AJ34 AN34 AP39 AR39 AU37 DIS SC1U6D3V2KX-GP SC10U6D3V3MX-GP B C742 AW18 120mA SC1U6D3V2KX-GP DIS DIS 68.00214.091 2ND = 68.00206.341 DIS C863 C854 L47 HCB1608KF-1-GP DPCD_CALR DIS DIS R675 150R2F-1-GP DPE_VDD18 SCD1U16V2KX-3GP 1V_VGA SC10U6D3V3MX-GP 68.00084.F81 2ND = 68.00217.701 DIS AN29 AP29 AP30 AW30 AW32 -1 0929 SC10U6D3V3MX-GP DIS R674 0R0603-PAD DY C847 SCD1U16V2KX-3GP L43 BLM15BD121SS1D-GP C862 DIS DIS C874 SC1U6D3V2KX-GP 68.00214.091 2ND = 68.00206.341 1D8V_VGA C865 SC1U6D3V2KX-GP DIS C795 SC10U6D3V3MX-GP DIS DPB_VDD10 SC1U6D3V2KX-GP L49 HCB1608KF-1-GP AN33 AP33 SCD1U16V2KX-3GP 1V_VGA SCD1U16V2KX-3GP C864 SC10U6D3V3MX-GP DIS 68.00084.F81 2ND = 68.00217.701 R672 -1 0925 150R2F-1-GP DIS 2 BLM15BD121SS1D-GP DIS AP14 AP15 C740 -1 0925 L41 1V_VGA R601 0R0603-PAD 68.00214.091 2ND = 68.00206.341 DIS DY 130mA 1V_VGA DIS 1D8V_VGA DPB_VDD18 SC1U6D3V2KX-GP AP25 AP26 DIS DPB_VDD18 DPB_VDD18 DPD_VDD18 DPD_VDD18 C873 C848 C AP22 AP23 C859 DPD_VDD18 1 130mA 2 C879 DY SCD1U16V2KX-3GP SC10U6D3V3MX-GP C878 DY C861 HCB1608KF-1-GP -1 0925 DIS L48 0R0402-PAD -1 0929 1D8V_VGA 110mA AN27 AP27 AP28 AW24 AW26 1V_VGA L34 DIS SC10U6D3V3MX-GP DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DIS DIS 68.00084.F81 2ND = 68.00217.701 SC1U6D3V2KX-GP DPC_VSSR DPC_VSSR DPC_VSSR DPC_VSSR DPC_VSSR DIS DPA_VDD10 AN17 AP16 AP17 AW14 AW16 AP31 AP32 C856 SCD1U16V2KX-3GP DPA_VDD10 DPA_VDD10 AP13 AT13 DPC_VDD10 BLM15BD121SS1D-GP SC10U6D3V3MX-GP DPC_VDD10 DPC_VDD10 AN24 AP24 SC1U6D3V2KX-GP DPA_VDD18 DPA_VDD18 SCD1U16V2KX-3GP DPC_VDD18 DPC_VDD18 C793 AP20 AP21 DP A/B POWER 1V_VGA 1 DP C/D POWER OF VGA1H R673 0R0603-PAD C849 130mA 1 2 130mA 1D8V_VGA L39 DIS SC10U6D3V3MX-GP C868 DIS DY DPA_VDD18 SC1U6D3V2KX-GP SC1U6D3V2KX-GP DPC_VDD18 SCD1U16V2KX-3GP C857 DY DY SCD1U16V2KX-3GP SC10U6D3V3MX-GP C751 DIS L45 0R0402-PAD D 1D8V_VGA -1 0925 -1 0929 DIS 68.00084.F81 2ND = 68.00217.701 MADISON-PRO-GP 71.MDSON.M01 DIS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND/PX_EN GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSS_MECH VSS_MECH VSS_MECH A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 A39 AW1 AW39 D C B VSS_MECH1 VSS_MECH2 VSS_MECH3 1 TP83 TPAD14-GP TP86 TPAD14-GP TP115 TPAD14-GP MADISON-PRO-GP 71.MDSON.M01 DIS A A SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A2 Date: DP POWER_GND Document Number Rev SB SJV50-CP Wednesday, October 21, 2009 Sheet 61 of 67 R624 40D2R2F-GP Madison MVREFDA MVREFSA MBM_CALRN0 L27 MBM_CALRN1 N12 MBM_CALRN2AG12 MBM_CALRP1 M12 MBM_CALRP0 M27 MBM_CALRP2AH12 RASA0# RASA1# CASA0# CASA1# CSA0#_0 CSA0#_1 CSA1#_0 CSA1#_1 MVREFDA MVREFSA CKEA0 CKEA1 MEM_CALRN0 MEM_CALRN1 MEM_CALRN2 WEA0# WEA1# MEM_CALRP1 MEM_CALRP0 MEM_CALRP2 MAA0_8 MAA1_8 H27 G27 CLKA0 CLKA0# J14 H14 CLKA1 CLKA1# K23 K19 RASA0# RASA1# K20 K17 CASA0# CASA1# K24 K27 CSA0#_0 WDQSA[0 7] ODTA0 ODTA1 63 64 CLKA0 CLKA0# 63 63 CLKA1 CLKA1# 64 64 RASA0# RASA1# 63 64 CASA0# CASA1# 63 64 CSA0#_0 63 GDDR5 GDDR3 MVREF 1.5V 1.8/1.5V 1.5V MVREF TO PWR 40.2R 40.2R 40.2R MVREF TO GND 100R 100R 100R 1D5V_VGA CSA1#_0 K21 J20 CKEA0 CKEA1 K26 L15 WEA0# WEA1# H23 J19 MAA13 CSA1#_0 64 CKEA0 CKEA1 63 64 WEA0# WEA1# R616 40D2R2F-GP DIS 1D5V_VGA M13 K16 Madison: MEM_CALRP[0,2] signals are used Park: MEM_CALRP1 and MEM_CALRN1 are used DDR3 63,64 DIS 63 64 R622 100R2F-L1-GP-U R619 40D2R2F-GP C881 DIS DIS MVREFDB MVREFSB Y12 AA12 WCKB0_0/DQMB_0 WCKB0#_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0#_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1#_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1#_1/DQMB_7 GDDR5/DDR2/GDDR3 EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7 DDBIB0_0/QSB_0#/WDQSB_0 DDBIB0_1/QSB_1#/WDQSB_1 DDBIB0_2/QSB_2#/WDQSB_2 DDBIB0_3/QSB_3#/WDQSB_3 DDBIB1_0/QSB_4#/WDQSB_4 DDBIB1_1/QSB_5#/WDQSB_5 DDBIB1_2/QSB_6#/WDQSB_6 DDBIB1_3/QSB_7#/WDQSB_7 ADBIB0/ODTB0 ADBIB1/ODTB1 CLKB0 CLKB0# CLKB1 CLKB1# RASB0# RASB1# CASB0# CASB1# CSB0#_0 CSB0#_1 CSB1#_0 CSB1#_1 CKEB0 CKEB1 MVREFDB MVREFSB WEB0# WEB1# ATI_MP MAA13 63,64 R623 100R2F-L1-GP-U C876 DIS DIS MADISON-PRO-GP SCD1U16V2KX-3GP 1Madison R6621 Park 243R2F-2-GP R6631Madison 243R2F-2-GP R664 243R2F-2-GP Park R6651Madison 243R2F-2-GP R6661Madison 243R2F-2-GP R667 243R2F-2-GP L18 L20 CLKA1 CLKA1# ODTA0 ODTA1 DIVIDER RESISTORS 2 Madison C880 C882 1D5V_VGA SCD1U16V2KX-3GP R621 100R2F-L1-GP-U SCD01U16V2KX-3GP Madison 1 Madison Madison Madison C883 SCD1U16V2KX-3GP Madison C875 SCD01U16V2KX-3GP R620 100R2F-L1-GP-U 1D5V_VGA 1 Madison CLKA0 CLKA0# J21 G19 63,64 MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12 MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1 TPAD14-GP TPAD14-GP 71.MDSON.M01 DIS TP104 TP107 3D3V_VGA R618 1KR2J-1-GP 1 TESTEN AD28 CLKTESTA CLKTESTB AK10 AL10 R778 TESTEN 10KR2J-3-GP TESTEN CLKTESTA CLKTESTB MAB0_8 MAB1_8 DRAM_RST# MAB[0 12] P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 BB2 BB0 BB1 H3 H1 T3 T5 AE4 AF5 AK6 AK5 DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 RDQSB0 RDQSB1 RDQSB2 RDQSB3 RDQSB4 RDQSB5 RDQSB6 RDQSB7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 WDQSB0 WDQSB1 WDQSB2 WDQSB3 WDQSB4 WDQSB5 WDQSB6 WDQSB7 T7 W7 ODTB0 ODTB1 L9 L8 CLKB0 CLKB0# AD8 AD7 CLKB1 CLKB1# T10 Y10 RASB0# RASB1# W10 AA10 CASB0# CASB1# P10 L10 CSB0#_0 AD10 AC10 CSB1#_0 U10 AA11 CKEB0 CKEB1 N10 AB11 WEB0# WEB1# T8 W8 MAB13 ODTB0 ODTB1 65 66 CLKB0 CLKB0# 65 65 CLKB1 CLKB1# 66 66 RASB0# RASB1# 65 66 CASB0# CASB1# 65 66 CSB0#_0 65 CSB1#_0 66 STRAPS PIN DESCRIPTION PCIE FULL TX OUTPUT SWING TX_PWRS_ENB GPIO0 (Internal PD) Tansmitter Power Savings Enable 0= 50% Tx output swing 1= Full Tx output swing GPIO1 (Internal PD) 59 GPIO_VGA_01 Transmitter De-emphasis Enable 0= Tx de-emphasis disabled 1= Tx de-emphasis enabled X RESERVED GPIO8 RESERVED BIF_VGA_DIS GPIO9 VGA ENABLED RESERVED GPIO21 RESERVED Size of the primary GPIO[13,12,11] Manufacturer memory apertures V 128MB 256MB 64MB 32MB 512MB 1GB 2GB 4GB x000 x001 x010 x x x x x ST Microelectronics Part Number GPIO[13,12,11] M25P05A M25P10A M25P20 M25P40 M25P80 0100 0101 0101 0101 0101 Pm25LV512A Pm25LV010A 0100 0101 59 GPIO_VGA_02 R610 59 GPIO_VGA_05 R604 59 GPIO_VGA_08 59 GPIO_VGA_09 59 GPIO_VGA_11 Chingis (formerly PMC) 59 GPIO_VGA_22 65 66 MAB13 65,66 R605 R612 R607 C 680R2F-GP VRAM_RST 63,64,65,66 C889 SC68P50V2JN-1GP B 2 10KR2J-3-GP DY 65,66 65 66 Designator 10KR2J-3-GP DIS R606 WDQSB[0 7] 10KR2J-3-GP DIS If BIOS_ROM_EN (GPIO22) = 65,66 10KR2J-3-GP DIS R613 X RDQSB[0 7] WEB0# WEB1# DIS R611 59 GPIO_VGA_00 H2SYNC, GENERICC, GPIO2, GPIO21 If BIOS_ROM_EN (GPIO22) = TX_DEEMPH_EN 3D3V_VGA ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET 65,66 R617 VRAM_RST# AMD RESERVED CONFIGURATION STRAPS RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE DQMB#[0 7] CKEB0 CKEB1 R615 10KR2F-2-GP B 65,66 65,66 65,66 AH11 71.MDSON.M01 DIS -1 0925 D BB2 BB0 BB1 MADISON-PRO-GP ATI_ES 65,66 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 R614 40D2R2F-GP C ADBIA0/ODTA0 ADBIA1/ODTA1 RDQSA[0 7] DQB0_0/DQB_0 DQB0_1/DQB_1 DQB0_2/DQB_2 DQB0_3/DQB_3 DQB0_4/DQB_4 DQB0_5/DQB_5 DQB0_6/DQB_6 DQB0_7/DQB_7 DQB0_8/DQB_8 DQB0_9/DQB_9 DQB0_10/DQB_10 DQB0_11/DQB_11 DQB0_12/DQB_12 DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17 DQB0_18/DQB_18 DQB0_19/DQB_19 DQB0_20/DQB_20 DQB0_21/DQB_21 DQB0_22/DQB_22 DQB0_23/DQB_23 DQB0_24/DQB_24 DQB0_25/DQB_25 DQB0_26/DQB_26 DQB0_27/DQB_27 DQB0_28/DQB_28 DQB0_29/DQB_29 DQB0_30/DQB_30 DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63 1 1D5V_VGA For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1 For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 GDDR5 100R WDQSA0 WDQSA1 WDQSA2 WDQSA3 WDQSA4 WDQSA5 WDQSA6 WDQSA7 63,64 100R A34 E30 E26 C20 C16 C12 J11 F8 DQMA#[0 7] 100R RDQSA0 RDQSA1 RDQSA2 RDQSA3 RDQSA4 RDQSA5 RDQSA6 RDQSA7 MVREF TO GND DDBIA0_0/QSA_0#/WDQSA_0 DDBIA0_1/QSA_1#/WDQSA_1 DDBIA0_2/QSA_2#/WDQSA_2 DDBIA0_3/QSA_3#/WDQSA_3 DDBIA1_0/QSA_4#/WDQSA_4 DDBIA1_1/QSA_5#/WDQSA_5 DDBIA1_2/QSA_6#/WDQSA_6 DDBIA1_3/QSA_7#/WDQSA_7 C34 D29 D25 E20 E16 E12 J10 D7 40.2R DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 63,64 63,64 63,64 40.2R A32 C32 D23 E22 C14 A14 E10 D9 OF DDR2 GDDR5/GDDR3 DDR3 VGA1D DDR2 GDDR3/GDDR5 DDR3 1.8/1.5V 1.5V 40.2R BA2 BA0 BA1 1.5V MVREF TO PWR BA2 BA0 BA1 65,66 MDB[0 63] MVREF 63,64 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 DDR3 WCKA0_0/DQMA_0 WCKA0#_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0#_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1#_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1#_1/DQMA_7 GDDR5/DDR2/GDDR3 EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7 MAA[0 12] G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 GDDR3 MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0 MAA1_7/MAA_A15_BA1 GDDR5 GDDR5 DQA0_0/DQA_0 DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63 MEMORY INTERFACE A For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1 For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1 C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 SCD1U16V2KX-3GP MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 D DIVIDER RESISTORS OF DDR2 GDDR5/GDDR3 DDR3 VGA1C DDR2 GDDR3/GDDR5 DDR3 63,64 MDA[0 63] MEMORY INTERFACE B 10KR2J-3-GP DY R_MEM_2 40R/Short For Mannhatton 10K 680R DY C_MEM 10KR2J-3-GP DY 10K R_MEM_3 10KR2J-3-GP DIS For M97-M2 R_MEM_1 DY 2.2nF 68pF 10KR2J-3-GP -1 0929 BIOS_ROM_EN GPIO22_ROMCSB ENABLE EXTERNAL BIOS ROM VIP_DEVICE_STRAP_ENA GPIO[13,12,11] (Internal PD) A RSVD V2SYNC RSVD H2SYNC AUD[1] AUD[0] VGA_HSYNC VGA_VSYNC (Internal PD) 24,59 NV_CRT_HSYNC 24,59 NV_CRT_VSYNC SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT X X X if BIOS_ROM_EN=1,then Config[3:0] defines the ROM type if BIOS_ROM_EN=0,then Config[3:0] defines the primary memory apeture size RN56 SRN10KJ-5-GP DIS 59 GPIO_VGA_12 59 GPIO_VGA_13 R608 R609 10KR2J-3-GP A DY 10KR2J-3-GP DY SJV50 Wistron Corporation AUD[1:0] 00:No audio function 01:Audio for DisplayPort and HDMI ( if adapter is detected) 10:Audio for DisplayPort only 11:Audio for both DisplayPort and HDMI 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C X X Title Size A2 Date: Madison Memory / Straps Document Number Rev SB SJV50-CP Wednesday, October 21, 2009 Sheet 62 of 67 DDR3 K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP 72.41164.H0U Madison 72.41164.H0U Madison DIS 1 2 DIS C904 2 DIS C890 2 DIS 2 C914 DIS C C898 2 C892 C885 2 2 DIS C916 DIS 1 1 2 DIS C906 DIS C913 DIS DIS C903 2 2 DIS DIS C896 C894 C895 DY C905 C909 DIS DIS 2 C910 C908 DIS 1 C886 DIS DIS WE# CAS# RAS# L3 K3 J3 G1 F9 E8 E2 D8 D1 B9 B1 G9 W EA0# CASA0# RASA0# VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DMU DML 62,64,65,66 C884 SCD1U10V2KX-5GP D3 E7 DIS VRAM_RST C893 SC1U6D3V2KX-GP W EA0# CASA0# RASA0# CKE DQMA#0 DQMA#1 C899 DIS SCD1U10V2KX-5GP 62 62 62 CK CK# K9 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 62 DIS C912 SC1U6D3V2KX-GP DQMA#0 DQMA#1 J7 K7 CKEA0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS CSA0#_0 DIS SCD1U10V2KX-5GP 62 62 CLKA0 CLKA0# T7 L9 L1 J9 J1 62 DIS SC1U6D3V2KX-GP CKEA0 BA0 BA1 BA2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 ODTA0 DIS C887 SCD1U10V2KX-5GP B 62 CLKA0 CLKA0# M2 N8 M3 CSA0#_0 DIS SCD1U10V2KX-5GP WE# CAS# RAS# 62 62 BA0 BA1 BA2 CS# RESET# L2 T2 62 62 DIS C907 SC1U6D3V2KX-GP L3 K3 J3 BA0 BA1 BA2 K1 RDQSA1 W DQSA1 DIS SCD1U10V2KX-5GP W EA0# CASA0# RASA0# G1 F9 E8 E2 D8 D1 B9 B1 G9 62,64 62,64 62,64 ODT ODTA0 DIS SCD1U10V2KX-5GP DMU DML VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ CKE MAA13 RDQSA1 W DQSA1 DIS C911 SC1U6D3V2KX-GP D3 E7 62,64 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 F3 G3 62 62 C901 SCD1U10V2KX-5GP DQMA#3 DQMA#2 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 62,64,65,66 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 DQSL DQSL# RDQSA0 W DQSA0 C900 DIS SC1U6D3V2KX-GP W EA0# CASA0# RASA0# K9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VRAM_RST 62 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 RDQSA0 W DQSA0 C888 SC1U6D3V2KX-GP 62 62 62 CKEA0 T7 L9 L1 J9 J1 CSA0#_0 Madison 62 C7 B7 SC1U6D3V2KX-GP DQMA#3 DQMA#2 CK CK# NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 ODTA0 1MAA_ZQ1 243R2F-2-GP DQSU DQSU# SC1U6D3V2KX-GP 62 62 J7 K7 CSA0#_0 VREFDQ VREFCA ZQ C897 SCD1U10V2KX-5GP CKEA0 CLKA0 CLKA0# CS# RESET# L2 T2 62 62 H1 M8 L8 C891 SCD1U10V2KX-5GP 62 BA0 BA1 BA2 K1 RDQSA2 W DQSA2 MAA_VREF12 C915 SCD1U10V2KX-5GP CLKA0 CLKA0# M2 N8 M3 ODT ODTA0 R628 2.16A 1D5V_VGA SCD1U10V2KX-5GP 62 62 BA0 BA1 BA2 RDQSA2 W DQSA2 62 62 MDA4 MDA2 MDA7 MDA0 MDA5 MDA3 MDA6 MDA1 SCD1U10V2KX-5GP BA0 BA1 BA2 F3 G3 DQSL DQSL# RDQSA3 W DQSA3 D7 C3 C8 C2 A7 A2 B8 A3 SCD1U10V2KX-5GP 62,64 62,64 62,64 RDQSA3 W DQSA3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D SCD1U10V2KX-5GP MAA13 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 C7 B7 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ MDA10 MDA14 MDA11 MDA13 MDA9 MDA12 MDA8 MDA15 SCD1U10V2KX-5GP 62,64 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 DQSU DQSU# A8 A1 C1 C9 D2 E9 F1 H9 H2 E3 F7 F2 F8 H3 H8 G2 H7 SCD1U10V2KX-5GP C MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MDA24 MDA28 MDA26 MDA30 MDA25 MDA29 MDA27 MDA31 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 SC1U6D3V2KX-GP Madison D7 C3 C8 C2 A7 A2 B8 A3 VDD VDD VDD VDD VDD VDD VDD VDD VDD SC1U6D3V2KX-GP MAA_ZQ0 VREFDQ VREFCA ZQ DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 1D5V_VGA K8 K2 N1 R9 B2 D9 G7 R1 N9 SC1U6D3V2KX-GP 243R2F-2-GP H1 M8 L8 MDA21 MDA20 MDA22 MDA16 MDA19 MDA17 MDA23 MDA18 SC1U6D3V2KX-GP VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ E3 F7 F2 F8 H3 H8 G2 H7 SC1U6D3V2KX-GP MAA_VREF12 R626 A8 A1 C1 C9 D2 E9 F1 H9 H2 FBRAM2 1D5V_VGA DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 1D5V_VGA VDD VDD VDD VDD VDD VDD VDD VDD VDD D FBRAM1 K8 K2 N1 R9 B2 D9 G7 R1 N9 1D5V_VGA -1 1001 B CLKA0# Madison 1D5V_VGA R627 56R2F-1-GP Madison R686 56R2F-1-GP SAMSUNG: 72.41164.H0U HYNIX: 72.51G63.C0U 1 CLKA0 R629 1K05R2F-GP 62,64 RDQSA[0 7] MAA_VREF12 62,64 DQMA#[0 7] R625 1K05R2F-GP C917 SCD01U50V2KX-1GP 2 Madison CLK_A0 Madison Madison Madison C902 SCD01U50V2KX-1GP 62,64 W DQSA[0 7] A 62,64 MAA[0 12] MAA[0 12] A Wistron Corporation MDA[0 63] 62,64 MDA[0 63] 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title VRAM(1/4) Size A3 Date: Document Number Rev SJV50-CP W ednesday, October 21, 2009 Sheet SB 63 of 67 DDR3 1MAA_ZQ2 243R2F-2-GP Madison C 62,63 MAA13 62,63 62,63 62,63 BA0 BA1 BA2 62 62 CLKA1 CLKA1# 62 CKEA1 62 62 DQMA#4 DQMA#5 62 62 62 W EA1# CASA1# RASA1# VREFDQ VREFCA ZQ MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# J7 K7 CK CK# CKEA1 K9 CKE DQMA#4 DQMA#5 D3 E7 DMU DML W EA1# CASA1# RASA1# L3 K3 J3 WE# CAS# RAS# D7 C3 C8 C2 A7 A2 B8 A3 MDA36 MDA35 MDA39 MDA33 MDA37 MDA32 MDA38 MDA34 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 ODT K1 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ RDQSA4 W DQSA4 RDQSA5 W DQSA5 RDQSA4 W DQSA4 RDQSA5 W DQSA5 62 62 ODTA1 62 ODTA1 CSA1#_0 62 62 CSA1#_0 62 VRAM_RST 62,63,65,66 G1 F9 E8 E2 D8 D1 B9 B1 G9 MAA_VREF34 R630 1MAA_ZQ3 243R2F-2-GP Madison 62,63 MAA13 62,63 62,63 62,63 BA0 BA1 BA2 62 62 CLKA1 CLKA1# 62 CKEA1 62 62 DQMA#7 DQMA#6 62 62 62 W EA1# CASA1# RASA1# A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# J7 K7 CK CK# CKEA1 K9 CKE DQMA#7 DQMA#6 D3 E7 DMU DML W EA1# CASA1# RASA1# L3 K3 J3 WE# CAS# RAS# DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDA55 MDA51 MDA53 MDA49 MDA52 MDA48 MDA54 MDA50 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA57 MDA63 MDA58 MDA60 MDA59 MDA61 MDA56 MDA62 DQSU DQSU# C7 B7 RDQSA7 W DQSA7 DQSL DQSL# F3 G3 RDQSA6 W DQSA6 ODT K1 ODTA1 CS# RESET# L2 T2 CSA1#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 D RDQSA7 W DQSA7 62 62 RDQSA6 W DQSA6 62 62 ODTA1 62 CSA1#_0 62 VRAM_RST 62,63,65,66 C CLKA1# CLKA1 R689 56R2F-1-GP Madison Madison Madison C919 K4W 1G1646E-HC12-GP R688 56R2F-1-GP CLK_A1 K4W 1G1646E-HC12-GP B R687 H1 M8 L8 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 1D5V_VGA VDD VDD VDD VDD VDD VDD VDD VDD VDD MAA_VREF34 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ E3 F7 F2 F8 H3 H8 G2 H7 A8 A1 C1 C9 D2 E9 F1 H9 H2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 K8 K2 N1 R9 B2 D9 G7 R1 N9 1D5V_VGA VDD VDD VDD VDD VDD VDD VDD VDD VDD MDA40 MDA44 MDA41 MDA46 MDA45 MDA42 MDA43 MDA47 D K8 K2 N1 R9 B2 D9 G7 R1 N9 FBRAM4 1D5V_VGA FBRAM3 1D5V_VGA SCD01U50V2KX-1GP B 72.41164.H0U Madison 72.41164.H0U Madison 1D5V_VGA SAMSUNG: 72.41164.H0U HYNIX: 72.51G63.C0U R631 1K05R2F-GP Madison MAA_VREF34 62,63 DQMA#[0 7] R632 1K05R2F-GP 62,63 RDQSA[0 7] C918 SCD01U50V2KX-1GP Madison Madison 62,63 W DQSA[0 7] 62,63 MAA[0 12] MAA[0 12] SJV50 A A Wistron Corporation MDA[0 63] 62,63 MDA[0 63] 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title VRAM(2/4) Size A3 Date: Document Number Rev SJV50-CP W ednesday, October 21, 2009 Sheet SB 64 of 67 DDR3 MAB_VREF12 R633 1MAB_ZQ0 243R2F-2-GP DIS C 62,66 MAB13 62,66 62,66 62,66 BB0 BB1 BB2 62 CKEB0 62 62 DQMB#2 DQMB#1 62 62 62 W EB0# CASB0# RASB0# MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB0 CLKB0# J7 K7 CK CK# CKEB0 K9 D7 C3 C8 C2 A7 A2 B8 A3 MDB16 MDB23 MDB18 MDB21 MDB17 MDB22 MDB20 MDB19 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 RDQSB1 W DQSB1 ODT K1 ODTB0 CS# RESET# L2 T2 CSB0#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 CKE DQMB#2 DQMB#1 D3 E7 DMU DML W EB0# CASB0# RASB0# L3 K3 J3 WE# CAS# RAS# 1D5V_VGA RDQSB2 W DQSB2 RDQSB2 W DQSB2 62 62 RDQSB1 W DQSB1 62 62 ODTB0 62 CSB0#_0 62 VRAM_RST MAB_VREF12 R636 1MAB_ZQ1 243R2F-2-GP DIS 62,63,64,66 62,66 MAB13 62,66 62,66 62,66 BB0 BB1 BB2 62 62 CLKB0 CLKB0# 62 CKEB0 62 62 DQMB#0 DQMB#3 62 62 62 W EB0# CASB0# RASB0# VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB0 CLKB0# J7 K7 CK CK# CKEB0 K9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDB25 MDB30 MDB24 MDB29 MDB26 MDB28 MDB27 MDB31 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB4 MDB3 MDB7 MDB0 MDB5 MDB1 MDB6 MDB2 DQSU DQSU# C7 B7 RDQSB0 W DQSB0 DQSL DQSL# F3 G3 RDQSB3 W DQSB3 ODT K1 ODTB0 CS# RESET# L2 T2 CSB0#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 CKE DQMB#0 DQMB#3 D3 E7 DMU DML W EB0# CASB0# RASB0# L3 K3 J3 WE# CAS# RAS# D RDQSB0 W DQSB0 62 62 RDQSB3 W DQSB3 62 62 ODTB0 62 CSB0#_0 62 VRAM_RST 62,63,64,66 C CLKB0# CLKB0 R690 DIS DIS CLK_B0 K4W 1G1646E-HC12-GP 72.41164.H0U DIS 72.41164.H0U DIS B K4W 1G1646E-HC12-GP R691 56R2F-1-GP CLKB0 CLKB0# VREFDQ VREFCA ZQ DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 K8 K2 N1 R9 B2 D9 G7 R1 N9 56R2F-1-GP 62 62 H1 M8 L8 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ MDB13 MDB11 MDB12 MDB8 MDB14 MDB9 MDB15 MDB10 A8 A1 C1 C9 D2 E9 F1 H9 H2 E3 F7 F2 F8 H3 H8 G2 H7 1D5V_VGA FBRAM6 1D5V_VGA DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D VDD VDD VDD VDD VDD VDD VDD VDD VDD K8 K2 N1 R9 B2 D9 G7 R1 N9 FBRAM5 1D5V_VGA B C920 SCD01U50V2KX-1GP DIS SAMSUNG: 72.41164.H0U HYNIX: 72.51G63.C0U 1D5V_VGA R634 1K05R2F-GP DIS MAB_VREF12 R635 1K05R2F-GP 62,66 RDQSB[0 7] 62,66 DQMB#[0 7] DIS 62,66 MAB[0 12] DIS 62,66 W DQSB[0 7] C921 SCD01U50V2KX-1GP MAB[0 12] SJV50 A A Wistron Corporation MDB[0 63] 62,66 MDB[0 63] 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title VRAM(3/4) Size A3 Date: Document Number Rev SJV50-CP W ednesday, October 21, 2009 Sheet SB 65 of 67 DDR3 MAB_VREF34 R637 1MAB_ZQ2 243R2F-2-GP DIS C 62,65 MAB13 62,65 62,65 62,65 BB0 BB1 BB2 62 62 CLKB1 CLKB1# 62 CKEB1 W EB1# CASB1# RASB1# VREFDQ VREFCA ZQ MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB1 CLKB1# J7 K7 CK CK# CKEB1 K9 DQMB#4 DQMB#6 D3 E7 DMU DML W EB1# CASB1# RASB1# L3 K3 J3 WE# CAS# RAS# D7 C3 C8 C2 A7 A2 B8 A3 MDB35 MDB36 MDB32 MDB38 MDB34 MDB37 MDB33 MDB39 DQSU DQSU# C7 B7 RDQSB4 W DQSB4 DQSL DQSL# F3 G3 RDQSB6 W DQSB6 ODT K1 ODTB1 CS# RESET# L2 T2 CSB1#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 CKE 1D5V_VGA RDQSB4 W DQSB4 62 62 MAB_VREF34 R692 RDQSB6 W DQSB6 62 62 ODTB1 62 CSB1#_0 62 VRAM_RST 62,63,64,65 1MAB_ZQ3 243R2F-2-GP DIS 62,65 MAB13 62,65 62,65 62,65 BB0 BB1 BB2 62 62 CLKB1 CLKB1# 62 CKEB1 62 62 DQMB#7 DQMB#5 62 62 62 W EB1# CASB1# RASB1# VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB1 CLKB1# J7 K7 CK CK# CKEB1 K9 CKE DQMB#7 DQMB#5 D3 E7 DMU DML W EB1# CASB1# RASB1# L3 K3 J3 WE# CAS# RAS# DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDB41 MDB44 MDB40 MDB46 MDB42 MDB45 MDB43 MDB47 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB63 MDB59 MDB58 MDB60 MDB62 MDB56 MDB61 MDB57 DQSU DQSU# C7 B7 RDQSB7 W DQSB7 DQSL DQSL# F3 G3 RDQSB5 W DQSB5 ODT K1 ODTB1 CS# RESET# L2 T2 CSB1#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 D RDQSB7 W DQSB7 62 62 RDQSB5 W DQSB5 62 62 ODTB1 62 CSB1#_0 62 VRAM_RST 62,63,64,65 C CLKB1# CLKB1 R693 DIS R694 DIS CLK_B1 B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP 72.41164.H0U DIS 72.41164.H0U DIS 62 62 62 H1 M8 L8 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 K8 K2 N1 R9 B2 D9 G7 R1 N9 56R2F-1-GP DQMB#4 DQMB#6 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ MDB52 MDB51 MDB55 MDB50 MDB53 MDB49 MDB54 MDB48 56R2F-1-GP 62 62 A8 A1 C1 C9 D2 E9 F1 H9 H2 E3 F7 F2 F8 H3 H8 G2 H7 1D5V_VGA FBRAM8 1D5V_VGA DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D VDD VDD VDD VDD VDD VDD VDD VDD VDD K8 K2 N1 R9 B2 D9 G7 R1 N9 FBRAM7 1D5V_VGA B C923 SCD01U50V2KX-1GP DIS SAMSUNG: 72.41164.H0U HYNIX: 72.51G63.C0U 1D5V_VGA R639 1K05R2F-GP DIS MAB_VREF34 1 62,65 DQMB#[0 7] R638 1K05R2F-GP 62,65 RDQSB[0 7] DIS 62,65 MAB[0 12] DIS 62,65 W DQSB[0 7] C922 SCD01U50V2KX-1GP MAB[0 12] SJV50 A A MDB[0 63] 62,65 MDB[0 63] Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title VRAM(4/4) Size A3 Date: Document Number Rev SJV50-CP W ednesday, October 21, 2009 Sheet SB 66 of 67 D C B A SB 0812 Page57-66: change GPU Page24: swap U5 & U6 Page15: change R112 to 22ohm Page43: D8 change to 83.00016.B11 83.00016.K11 83.00016.F11 Page25: change PS8325 to PS8271 Page4: add R660 RN74 for DIS_ONLY Page8: add R180 R668 R669 R685 R695 for DIS_ONLY Page8: change C190 C192 C193 C194 to UMA_PX Page5: add RN75 for DIS_ONLY Page52: change GFX to UMA_PX Page12: change R385 to DIS_ONLY and X4 C529 C530 to UMA_PX and add R381 R640 Page14: change RN48 RN49 R149 R153 C62 C63 C66 C67 C68 C69 C76 C77 to UMA_PX Page16: cahgne R194 to UMA_DIS_ONLY and change R196 to PX Page17: change R150 R170 C219 C220 to UMA_PX and add R696 R697 for DIS_ONLY Page22: change U30 U33 R320 R321 C359 C360 C361 C388 C392 C394 to PX Page22: add RN76 RN77 RN78 RN80 for DIS_ONLY Page22: change U13 U14 R266 to PX and add RN81 for DIS_ONLY Page22: change U24 to PX and add R698 for DIS_ONLY Page22: change U39 C45 to PX and add RN82 for DIS_ONLY Page23: change U12 R143 to PX and change R111 to UMA_PX and add R699 for DIS_ONLY Page23: change U1 to PX and add R700 for DIS_ONLY Page24: change U6 to UMA_PX Page24: change U35 U38 R49 to PX and add RN83 for DIS_ONLY Page40: change R84 to 65W and change R88 to 90W 0814 Page50: DY R571 and add R649 Page59: add R774 DY Page53: change R334 to 7.5K(64.75015.6DL) and add Q51 R775 Page53: change R331 to 15K(64.15025.6DL) DY and change R322 R328 C419 DY Page3: change C297 C298 from 27p to 12p Page32: codec co-layout Page11: change 1D05V_S0 to 3D3V_S5 Page5,8,10,13,16,20,21,43,50: System Level Implemention to Reduce S3 State Power On 0817 Page59: swap SWAP NV_HDMI_DATA0+/- and NV_HDMI_DATA2+/Page43: add Q48, R725, R726, R52 and C943 for 1D5V_S0_PWRGD level shift Page5: change U86 pin1,2 connection to 1D5V_S0_PWRGD Page50: change R724 pin1 connection to 1D5V_S0_PWRGD Page32: R778 option ALC271 Page10: RN51 DY, change netname M_VREF_DQ_DIMM0, M_VREF_DQ_DIMM1 Page20: del R67 U80 R791 R65 R66; R289 C403 C402 no-option , off-page M_VREF_DQ_DIMM0 Page21: del R67 U80 R791 R65 R66; R289 C403 C402 no-option , off-page M_VREF_DQ_DIMM0 0819 Page43: U41 change to 84.04468.037 Page59: change VGA_XIN1 connect to VGA1B.AW34 Page53: R331 DIS, Q51 DY to keep +VGA_CORE 1.05V Page59: change RN79 to R378 Page23: change R19 pin2 connecot to BRIGHTNESS_DIS Page5: RN75 mount Page20: del R718 RN84 Page24: U6 change to 73.2G125.A07 UMA_PX(the same as U5), and modify enable to High active Page43: Q48 change to Q48 and Q49 Page16: Q47 change to BJT 84.T3904.C11 Page50: del Q45 Page16: C939 change to 47nF Page30: U34 R318 C37 DY, R32 mount 0820 Page33: change RT17 RT18 to 22K for gain Page63-66: swap the signals of VRAM Page47: change R542 R546 to 63.00000.00L 0821 Page43: change part reference C593 to C718 Page32: change codec co-layout to ALC272 Page5: change R151.1 to 1D5V_S0_DDR Page16: change RN32 to R648 single resister Page47: R532 mount,R523 DY Page47: change R531,R259 to 64.13035.6DL Page48: change R539 to 64.10R05.55L Page48: change R549 to 64.20035.6DL Page48: change R534 to 64.95315.6DL Page48: change U23,U58 to 74.51117.073 Page48: Delete R543 Page48: change R258 to 64.13025.6DL Page49: change U51 to 74.51117.073 Page49: change R235 to 64.75015.6DL Page53: change U36 to 74.51117.073 Page53: Delete R326 Page50: change U66 to 74.02997.A79 Page33: delete R708 0824 Page52: 0825 Page12: Page32: Page11: Page39: 0827 Page25: 0916 Page15: change U49 to 74.62881.A73 delete R228 add R152 change R422 to 63.47034.1DL add R228 DY delete D3 D change R127 to 63.10334.1DL mount C B A SJV50 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title HISTORY Size A2 Date: Document Number Rev SB SJV50-CP Wednesday, October 21, 2009 Sheet 67 of 67 ... BF5 USB C USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P... SB_ DQ0 SB_ DQ1 SB_ DQ2 SB_ DQ3 SB_ DQ4 SB_ DQ5 SB_ DQ6 SB_ DQ7 SB_ DQ8 SB_ DQ9 SB_ DQ10 SB_ DQ11 SB_ DQ12 SB_ DQ13 SB_ DQ14 SB_ DQ15 SB_ DQ16 SB_ DQ17 SB_ DQ18 SB_ DQ19 SB_ DQ20 SB_ DQ21 SB_ DQ22 SB_ DQ23 SB_ DQ24 SB_ DQ25... SB_ DQ25 SB_ DQ26 SB_ DQ27 SB_ DQ28 SB_ DQ29 SB_ DQ30 SB_ DQ31 SB_ DQ32 SB_ DQ33 SB_ DQ34 SB_ DQ35 SB_ DQ36 SB_ DQ37 SB_ DQ38 SB_ DQ39 SB_ DQ40 SB_ DQ41 SB_ DQ42 SB_ DQ43 SB_ DQ44 SB_ DQ45 SB_ DQ46 SB_ DQ47 SB_ DQ48 SB_ DQ49