ACER ASPIRE 5553 QUANTA ZR8

1 SGN@ >Internal CLK GEN GN@ >External CLK GEN IV@ -> iGPU SW@ -> dGPU SP@ -> iGPU & dGPU notice SPE@ ->Only for dGPU notice SIDE@ > Side port http://hobi-elektronika.net ZR8 SYSTEM DIAGRAM DDR3 channel A DDR3-SODIMM1 CPU THERMAL SENSOR AMD Champlain P5 35mm X 35mm A A P4 S1G4 Processor DDR3 channel B DDR3-SODIMM2 638P (PGA)45W/35W P6 CPU_CLK P2 ~ CLOCK GEN NBGFX_CLK NBGPP_CLK SBLINK_CLK P11 HT3 PCI-E P25 NORTH BRIDGE 29mm X 29mm P24 RS880 A12 P16 ~ 20 P7 P24 B P24 (10/100/1000) P26 B P27 P7 ~ 10 P22,23 ALINK X4 P26 Charger (ISL88731A) DC/DC ( 3VPCU / 5VPCU ) RT8206B P35 P28 P36 P28 SOUTH BRIDGE P31 SB820 4.5W(Ext) C 4.3W(Int) CPU_VCORE ( VCORE ) ISL6265A P37 DC/DC ( +1.1V_S5 ) UP6111AQD P38 C P11 ~ 14 P31 P24 P30 DC/DC ( NB_CORE ) UP6111AQD P39 DC/DC ( +1.5VSUS ) RT8207A P40 DC/DC ( GPU_CORE ) MAX8792ETD+T D P41 DC/DC (+1.8V/+1V/+2.5V ) HPA00835RTER / RT9018A / RT9025-25PSP DC/DC ( CPU_VDDR ) RT9025-25PSP P31 P29 P34 D P42 P33 P31 P43 P33 P34 P24 P29 P29 Size Document Number Rev 1A Block Diagram Date: Wednesday, May 27, 2009 Sheet of 49 R124 http://hobi-elektronika.net C436 4.7u/6.3V_6 A41 C428 0.22u/6.3V_4 C414 C265 C376 C274 HT_CLKINN[1 0] HT_CTLINP[1 0] HT_CTLINN[1 0] [7] HT_CTLINN[1 0] HT_CADOUTP[15 0] [7] HT_CADOUTP[15 0] HT_CADOUTN[15 0] [7] HT_CADOUTN[15 0] HT_CLKOUTP[1 0] [7] HT_CLKOUTP[1 0] HT_CLKOUTN[1 0] [7] HT_CLKOUTN[1 0] HT_CTLOUTP[1 0] [7] HT_CTLOUTP[1 0] HT_CTLOUTN[1 0] [7] HT_CTLOUTN[1 0] +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT 10U/6.3V_8 10U/6.3V_8 0.22u/6.3V_4 180P/50V_4 HT_CLKINP[1 0] [7] HT_CLKINN[1 0] D1 D2 D3 D4 AE2 AE3 AE4 AE5 +1.1V_VLDT 10U/6.3V_8 +1.1V_VLDT 0.22u/6.3V_4 +1.1V_VLDT 180P/50V_4 +1.1V_VLDT AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7 HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 Y1 W1 Y4 Y3 HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 R2 R3 T5 R5 HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1 HT LINK VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1 J3 J2 J5 K5 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1 N1 P1 P3 P4 FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2) VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 20K/F_4 CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR C704 C703 3900P/25V_4 3900P/25V_4 SideBand Temp sense I2C [4] CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C A9 A8 VDDA1 VDDA2 S1G4 [37] CPU_VDD1_FB_H [37] CPU_VDD1_FB_L Y6 AB6 VDD1_FB_H VDD1_FB_L VDDNB_FB_H VDDNB_FB_L H6 G6 CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI G10 AA9 AC9 AD9 AF9 DBRDY TMS TCK TRST_L TDI CPUTEST23 AD7 TEST23 CPUTEST18 CPUTEST19 H10 G9 TEST18 TEST19 R245 R241 R422 510/F_4 510/F_4 1K/F_4 CPUTEST25H E9 CPUTEST25L E8 place them to CPU within 1.5" CPUTEST21 AB8 CPUTEST20 AF7 CPUTEST24 AE7 CPUTEST22 AE8 CPUTEST12 AC8 CPUTEST27 AF8 *300/F_4 C2 AA6 A3 A5 B3 B5 C1 CPU_MEMHOT_L# R417 +1.5VSUS R425 G1 *SHORT_PAD1 R238 R235 1K/F_4 *1K/F_4 +1.5VSUS +1.5V R240 R237 1K/F_4 *1K/F_4 +1.5VSUS R231 R232 R244 Q12 *MMBT3904 [34] R420 R424 TEST25_H TEST25_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 TEST9 TEST6 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 Q32 MMBT3904 R155 *10K_4 R309 A62 Q8008 FDV301N J7 H8 TEST17 TEST16 TEST15 TEST14 D7 E7 F7 C7 TEST7 TEST10 C3 K8 TEST8 C4 TEST29_H TEST29_L C9 C8 +1.5V +1.5VSUS PV stage:add +1.8VSUS option R3114 for Caspian CPU power leakage issue CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14 H18 H19 AA7 D5 C5 C T28 T27 T26 T29 CPUTEST29H T30 R250 80.6/F_4 CPUTEST29L *0_4 *Short_4 C01 C01 R8189 100K_6 CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO CPU_THERMTRIP# [12] SYS_SHDN# [4,36,43,44] D12 +1.5VSUS C398 *0.1u/10V_4 SVD 0 1 1 T31 11 13 15 17 19 21 23 KEY CPU_PROCHOT# [11] 1.1V 1.0V 0.9V 0.8V [11,37] 10 12 14 16 18 20 22 24 25 R428 R426 R427 R429 R188 R227 R243 R233 R230 R139 1K/F_4 1K/F_4 1K/F_4 1K/F_4 1K/F_4 *300/F_4 *300/F_4 1K/F_4 1K/F_4 1K/F_4 CPU_LDT_RST_HTPA# Size *HDT_CONN A S1G4 Document Number Rev 1A S1G4 HT,CTL I/F 1/3 Date: B Voltage Output CN7 *300/F_4 300/F_4 VID Override Circuit SVC CPUTEST24 CPUTEST23 CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18 CPUTEST21 1K_4 PM_THERM# [4,12,33] 0_4 CPU_VDDNB_FB_H [37] CPU_VDDNB_FB_L [37] *220_4 *220_4 *220_4 HDT Connector Q31 *MMBT3904 R138 VDDIO_FB_H [40] VDDIO_FB_L [40] E10 CPU_DBREQ# R247 R246 AE9 CPU_TDO TEST28_H TEST28_L RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 VDDIO_FB_H VDDIO_FB_L S1G4 CPU_SVC [37] CPU_SVD [37] CPU_PWRGD_SVID_REG R8191 300_4 CPU_PROCHOT_L# HWPG CPU_MEMHOT# [5,6,11] *10K_4 1K_4 TDO H_THRMDC [4] H_THRMDA [4] S1G4 CPU_SVC CPU_SVD CPU_PWRGD_SVID_REG for debug only C01 CPU_THERMTRIP_L# +1.5VSUS A +1.5VSUS S1G4 +1.5VSUS *10K_4 *1K_4 DBREQ_L VFIX MODE +1.5VSUS +1.5V +1.5VSUS R100 W7 W8 W9 Y9 +1.5VSUS +1.5V +1.1V +2.5V *0_4 CPU_LDT_RST_HTPA# Q23 BSS138_NL/SOT23 S1g4 does not support MEMHOT# R101 THERMDC THERMDA VDDIO_FB_H VDDIO_FB_L Serial VID CPU_LDT_REQ# [9,11] The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required +1.5VSUS CPU_THERMTRIP_L# CPU_PROCHOT_L# CPU_MEMHOT_L# VDD0_FB_H VDD0_FB_L R262 4.7K_4 CPU_LDT_RST# R462 AF6 AC7 AA8 F6 E6 R430 +3V 34.8K/F_4 *BSS138_NL/SOT23 THERMTRIP_L PROCHOT_L MEMHOT_L SVC SVD [37] CPU_VDD0_FB_H [37] CPU_VDD0_FB_L 44.2/F_4 CPU_HTREF0 44.2/F_4 CPU_HTREF1 place them to CPU within 1.5" Q35 CPU_SVC CPU_SVD HT_REF0 HT_REF1 R207 R208 +1.1V_VLDT D A6 A4 CLKIN_H CLKIN_L RESET_L PW ROK LDTSTOP_L LDTREQ_L S1G4 M11 W 18 SOCKET_638_PIN CNTR_VREF CPU_LDT_REQ#_CPU VSS RSVD11 R6 P6 CPU_SIC CPU_SID CPU_ALERT 03 +1.5V SIC SID ALERT_L +1.5VSUS [3,4,5,6,37,40,42,43,44,46] +1.5VSUS [7,10,27,29,40,43] +1.5V [7,8,9,10,14,38,44] +1.1V [42] +2.5V R236 R261 R249 R463 AF4 AF5 AE6 [4] [4] S1G4 300/F_4 300/F_4 300/F_4 *300/F_4 U29D F8 F9 CPU_LDT_RST# B7 CPU_PWRGD_SVID_REG A7 CPU_LDT_STOP# F10 CPU_LDT_REQ#_CPU C6 [11] CPU_LDT_RST# [11,37] CPU_PWRGD_SVID_REG [9,11] CPU_LDT_STOP# +1.5VSUS 0.1u/10V_4 R251 C397 C273 C387 250mA W/S= 15 mil/20mil +CPUVDDA +CPUVDDA SOCKET_638_PIN CNTR_VREF [4] C446 R256 +CPUVDDA 169/F_4 CLK_CPU_BCLKN_C R464 CPU_PWRGD_SVID_REG CPU_LDT_RST# CPU_LDT_STOP# CPU_LDT_REQ#_CPU CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR [11] CLK_CPU_BCLKP_PR [11] CLK_CPU_BCLKN_PR CLK_CPU_BCLKP_C HT_CADINN[15 0] [7] HT_CTLINP[1 0] +3V C440 *10U/6.3V_8 U29A HT_CADINP[15 0] [7] HT_CLKINP[1 0] B C432 3300P/50V_4 *SHORT_PAD [7] HT_CADINN[15 0] SB check list tide to CPUVDDIO (+1.5VSUS) Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2" P/N: DG0^8000004 DG0^8000005 DG0^8000009 DG0^80000013 DG0^80000014 [7] HT_CADINP[15 0] C C447 4.7u/6.3V_6 *SHORT_PAD R121 D 2.5V@250mA +1.1V_VLDT +CPUVDDA L40 PBY201209T-221Y-N +2.5V 1.1V@1.5A +1.1V W/S= 15 mil/20mil Wednesday, May 27, 2009 Sheet of 49 A B C http://hobi-elektronika.net VDDR=>1.75A D01 CPU_VDDR +1.5VSUS CPU_VDDR R415 0_4 R432 R431 C660 10U/6.3V_8 S1G4 D10 C10 B10 AD10 39.2/F_4 39.2/F_4 M_ZP M_ZN VDDR1 MEM:CMD/CTRL/CLKVDDR5 VDDR2 VDDR6 VDDR3 VDDR7 VDDR4 VDDR8 VDDR9 MEMZP MEMZN VDDR_SENSE AF10 AE10 M_A_RST# H16 MA_RESET_L [46] M_A_ODT0 [46] M_A_ODT1 [5] M_A1_ODT0 [5] M_A1_ODT1 T19 V22 U21 V19 MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 [46] M_A_CS#0 [46] M_A_CS#1 [5] M_A1_CS#0 [5] M_A1_CS#1 T20 U19 U20 V20 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 [5,46] [5,46] J22 J20 MA_CKE0 MA_CKE1 [5,46] M_A_CKE0 M_A_CKE1 [6] M_B_DQ[0 63] CPU_VDDR U29B PLACE THEM CLOSE TO CPU WITHIN 1" MEMVREF C15 M_B_RST# [6] W 26 W 23 Y26 M_B_ODT0 [6] M_B_ODT1 [6] MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 V26 W 25 U22 M_B_CS#0 [6] M_B_CS#1 [6] MB_CKE0 MB_CKE1 J25 H26 M_B_CKE0 [6] M_B_CKE1 [6] M_B_CLKP1 [6] M_B_CLKN1 [6] MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 P22 R22 A17 A18 AF18 AF17 R26 R25 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W 24 J23 J24 [5,46] M_A_BANK0 [5,46] M_A_BANK1 [5,46] M_A_BANK2 R20 R23 J21 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 R24 U26 J26 M_B_BANK0 [6] M_B_BANK1 [6] M_B_BANK2 [6] [5,46] M_A_RAS# [5,46] M_A_CAS# [5,46] M_A_WE# R19 T22 T24 MA_RAS_L MA_CAS_L MA_W E_L MB_RAS_L MB_CAS_L MB_W E_L U25 U24 U23 M_B_RAS# [6] M_B_CAS# [6] M_B_WE# [6] M_A_CLKP1 M_A_CLKN1 M_A_CLKP3 M_A_CLKN3 M_A_CLKP4 M_A_CLKN4 M_A_CLKP2 M_A_CLKN2 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 [5,46] M_A_A[0 15] D01 W 17 MEMVREF_CPU B18 C347 0.1u/10V_4 C346 1000P/50V_4 M_B_CLKP2 [6] M_B_CLKN2 [6] M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_A[0 15] [6] +0.75V_DDR_VTT [5,6,40] +SMDDR_VREF [43] CPU_VDDR [2,4,5,6,37,40,42,43,44,46] +1.5VSUS +0.75V_DDR_VTT +SMDDR_VREF CPU_VDDR +1.5VSUS SOCKET_638_PIN CPU_VDDR Place close to socket C439 4.7u/6.3V_6 C282 4.7u/6.3V_6 C442 4.7u/6.3V_6 C281 4.7u/6.3V_6 C278 0.22u/6.3V_4 C279 0.22u/6.3V_4 C276 0.22u/6.3V_4 C277 0.22u/6.3V_4 [6] M_B_DM[0 7] CPU_VDDR C431 1000P/50V_4 C434 1000P/50V_4 C345 1000P/50V_4 C275 1000P/50V_4 C427 180P/50V_4 +1.5VSUS R201 C435 180P/50V_4 C437 180P/50V_4 C430 180P/50V_4 [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] [6] 0_4 Reserved for AMD suggest +3VPCU C339 *.1u_4 R204 1K/F_4 1 C352 *0.47u/10V_4 + - U14 R197 *10_4 MEMVREF_CPU M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 A12 B16 A22 E25 AB26 AE22 AC16 AD12 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 *OPA343NA/3K MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W 22 W 21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W 16 W 14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W 11 AB14 AA14 AB12 AA12 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 E12 C15 E19 F24 AC24 Y19 AB16 Y13 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W 15 W 12 W 13 [5,46] M_A_DM[0 7] M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7 [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] [5,46] SOCKET_638_PIN 2 R206 1K/F_4 M_A_DQ[0 63] MEM:DATA R184 *0_4 CPU_VTT_SENSE Y10 04 U29C R189 *0_4 MB0_ODT0 MB0_ODT1 MB1_ODT0 MB_RESET_L E Processor Memory Interface +SMDDR_VREF C18 W 10 AC10 AB10 AA10 A10 N19 N20 E16 F16 Y16 AA16 P19 P20 [46] [46] [5] [5] [5] [5] [46] [46] D VDDR=> 0.9V support 1066 / 800 DDR VDDR= >1.05V support 1333 / 1066 / 800 DDR R182 *10K/F_4 R194 *0_4 R193 *0_4 Size Document Number S1G4 DDRIII MEMORY I/F 2/3 Date: A B C D Wednesday, May 27, 2009 E Sheet of Rev 1A 49 http://hobi-elektronika.net 05 U29F U29E +VCORE D CPU_VDDNB_CORE 3A +1.5VSUS C AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 +VCORE G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 K16 M16 P16 T16 V16 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 B2-TEST PC54 + *330u/2V_7343 Place under CPU bracket side +1.5VSUS 1.5V@2A SOCKET_638_PIN +1.5VSUS R421 1K/F_4 R252 1K/F_4 [2] CNTR_VREF R423 1K/F_4 Q19 CPU_SMBCLK BSS138_NL/SOT23 CPU_SMBDATA BSS138_NL/SOT23 B [2] CPU_SID [2] PM_THERM# C17 Q17 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 +VCORE BOTTOM SIDE DECOUPLING C360 10U/6.3V_8 C351 10U/6.3V_8 C371 10U/6.3V_8 C413 10U/6.3V_8 C354 0.22u/6.3V_4 C355 0.01U/25V_4 C356 180P/50V_4 D +VCORE C357 10U/6.3V_8 C388 10U/6.3V_8 CPU_VDDNB_CORE C358 10U/6.3V_8 C364 10U/6.3V_8 C399 10U/6.3V_8 C370 0.22u/6.3V_4 C378 0.01U/25V_4 C383 180P/50V_4 C368 0.01U/25V_4 +1.5VSUS C406 C366 10U/6.3V_8 10U/6.3V_8 C415 10U/6.3V_8 C372 10U/6.3V_8 C367 C404 0.22u/6.3V_4 0.22u/6.3V_4 C369 180P/50V_4 C396 180P/50V_4 C DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE +1.5VSUS C394 4.7u/6.3V_6 C425 4.7u/6.3V_6 C426 4.7u/6.3V_6 C405 4.7u/6.3V_6 C384 0.22u/6.3V_4 C359 0.22u/6.3V_4 +1.5VSUS C377 C361 C408 C407 0.22u/6.3V_4 0.22u/6.3V_4 0.01U/25V_4 0.01u/25V_4 C385 180P/50V_4 B CPU_ALERT [2] PROCESSOR POWER AND GROUND BSS138_NL/SOT23 +3V +3V D05 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 SOCKET_638_PIN CPU_SIC C17 Q18 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 R254 *200/F_6 R267 *10K/F_4 C17 D05 C450 *0.1u/10V_4 C17 SYS_SHDN# [2,36,43,44] U16 CPU_SMBCLK SCLK VCC [34] CPU_SMBDATA CPU_SMBDATA SDA DXP DXN [2,12,33] PM_THERM# PM_THERM# C17 A ALERT# OVERT# GND MSOP *G786P8 H_THRMDA [2] C344 *1000P/50V_4 H_THRMDC C02 [2] R479 *0_4 D05 [34] CPU_SMBCLK PWROK_EC_3904 Q21 *MMBT3904 R255 D14 *CH501H-40PT *10K/F_4 PWROK_EC [15,34] A +3V SMBALERT# R264 Q22 *2N7002K *10K/F_4 TEMP_FAIL [17] ADD VGA TEMP_ FAIL function M93 is active Hi Size Rev 1A S1G4 PWR & GND 3/3 Date: Document Number Wednesday, May 27, 2009 Sheet of 49 http://hobi-elektronika.net +1.5VSUS M_A_DQ[63:0] [3,46] [3,46] M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 D R585 R588 [6,12,26,27,46] PCLK_SMB [6,12,26,27,46] PDAT_SMB C [3] [3] D08 R259 *10K_4 109 108 79 114 121 101 103 102 104 *Short_4 R0_CKE0 73 *Short_4 R0_CKE1 74 115 110 113 DIMM0_SA0 197 DIMM0_SA1 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 M_A1_ODT0 M_A1_ODT1 +1.5VSUS R584 *10K_4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 M_A_BANK0 M_A_BANK1 M_A_BANK2 [3,46] M_A_BANK[0 2] [3] M_A1_CS#0 [3] M_A1_CS#1 [3] M_A_CLKP3 [3] M_A_CLKN3 [3] M_A_CLKP4 [3] M_A_CLKN4 [3,46] M_A_CKE0 [3,46] M_A_CKE1 [3,46] M_A_CAS# A08 [3,46] M_A_RAS# [3,46] M_A_WE# R198 10K_4 R199 10K_4 +3V 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 [3,46] M_A_DM[7:0] R0_CKE0 R0_CKE1 [3,46] M_A_DQSP[7:0] B [3,46] M_A_DQSN[7:0] PC2100 DDR3 SDRAM SO-DIMM (204P) CN15A DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 15 17 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 CN15B +1.5VSUS 2.48A +0.75VSMVREF_SUSA R589 1K/F_4 +3V R590 1K/F_4 MEMHOT_MA# [46] MEMHOT_MA# [3,46] M_A_RST# +0.75VSMVREF_SUSA +VREF_CA_A +VREF_CA_A R257 *2K/F_4 R203 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 126 VREF_DQ VREF_CA 13 14 19 20 25 26 31 32 37 38 43 +1.5VSUS +SMDDR_VREF 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 *Short_4 R258 *2K/F_4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 PC2100 DDR3 SDRAM SO-DIMM (204P) VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 GND GND 205 206 D C +0.75V_DDR_VTT DDR3-DIMM0_H=4.0_RVS A51 +1.5VSUS R123 *2.2K_4 +1.5VSUS R122 *2.2K_4 B MEMHOT_MA# DDR3-DIMM0_H=4.0_RVS Q10 *MMBT3904 CPU_MEMHOT# [2,6,11] D12 Place these Caps near So-Dimm0 +1.5VSUS +VREF_CA_A C400 10u/6.3V_6 C379 10u/6.3V_6 C401 10u/6.3V_6 C686 1u/16V_4 C390 C348 C260 1u/16V_4 10u/6.3V_6 C411 10u/6.3V_6 A C380 10u/6.3V_6 C416 *.1u/16V_4 +0.75VSMVREF_SUSA C417 1u/16V_4 C402 *.1u/16V_4 C825 C826 1u/16V_4 2.2u/6.3V_6 C455 *.1u/16V_4 2.2u/6.3V_6 A +0.75V_DDR_VTT C224 1U/6.3V_4 C829 C9224 1U/6.3V_4 10u/6.3V_6 Size Document Number DDR2 SODIMMS: A/B CHANNEL Date: Sheet Wednesday, May 27, 2009 of Rev 1A 49 M_B_DQ[63:0] [3] R131 R130 [3] M_B_BANK[0 2] [3] M_B_CS#0 [3] M_B_CS#1 [3] M_B_CLKP1 [3] M_B_CLKN1 [3] M_B_CLKP2 [3] M_B_CLKN2 [3] M_B_CKE0 [3] M_B_CKE1 [3] M_B_CAS# [3] M_B_RAS# [3] M_B_WE# 10K_4 10K_4 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 M_B_BANK0 M_B_BANK1 M_B_BANK2 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DIMM1_SA0 DIMM1_SA1 [5,12,26,27,46] PCLK_SMB [5,12,26,27,46] PDAT_SMB C [3] [3] M_B_ODT0 M_B_ODT1 [3] M_B_DM[7:0] [3] M_B_DQSP[7:0] B [3] M_B_DQSN[7:0] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 15 17 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 +1.5VSUS +1.5VSUS 2.48A R591 1K/F_4 +0.75VSMVREF_SUSB +3V R592 1K/F_4 MEMHOT_MB# [3] M_B_RST# +0.75VSMVREF_SUSB +VREF_CA_B +SMDDR_VREF +VREF_CA_B R118 *2K/F_4 R117 CN25B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 126 VREF_DQ VREF_CA 13 14 19 20 25 26 31 32 37 38 43 +1.5VSUS *Short_4 R110 *2K/F_4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 GND GND 205 206 D C +0.75V_DDR_VTT DDR3-DIMM1_H=4.0_Standard A50 2DIMM ->P/N:DGMK4000109 +1.5VSUS R202 *2.2K_4 R195 *2.2K_4 MEMHOT_MB# D M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 PC2100 DDR3 SDRAM SO-DIMM (204P) CN25A +3V http://hobi-elektronika.net [3] M_B_A[15:0] A08 PC2100 DDR3 SDRAM SO-DIMM (204P) Q14 *MMBT3904 CPU_MEMHOT# [2,5,11] B D12 DDR3-DIMM1_H=4.0_Standard +1.5VSUS Place these Caps near So-Dimm1 +VREF_CA_B C409 10u/6.3V_6 C690 10u/6.3V_6 C821 10u/6.3V_6 C689 1u/16V_4 C817 C230 10u/6.3V_6 1u/16V_4 C819 10u/6.3V_6 C818 10u/6.3V_6 C822 *.1u/16V_4 +0.75VSMVREF_SUSB C820 1u/16V_4 C418 *.1u/16V_4 C259 C828 C827 2.2u/6.3V_6 1u/16V_4 2.2u/6.3V_6 C454 *.1u/16V_4 +0.75V_DDR_VTT C8158 1u/6.3V_4 A C231 1u/6.3V_4 C830 A 10u/6.3V_6 Size Document Number DDR2 SODIMMS: A/B CHANNEL Date: Sheet Wednesday, May 27, 2009 of Rev 1A 49 http://hobi-elektronika.net U28A 11/4 +1.5V_MEM_VDDQ C9788 R599 SIDE@1K/F_4 SIDE@0.1u/10V_4 C9789 SIDE@0.1u/10V_4 SPM_VREFDQ R600 SIDE@1K/F_4 SPM_VREFCA C9790 R601 SIDE@1K/F_4 SIDE@0.1u/10V_4 C9791 SIDE@0.1u/10V_4 R602 SIDE@1K/F_4 U39 SPM_VREFCA M9 SPM_VREFDQ H2 C SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13 SPM_BA0 SPM_BA1 SPM_BA2 R593 SPM_CLKP SPM_CLKN SPM_CKE *SIDE@100/F_4 VREFCA VREFDQ N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 M3 N9 M4 BA0 BA1 BA2 J8 K8 K10 CK CK CKE DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E4 F8 F3 F9 H4 H9 G3 H8 SPM_DQ5 SPM_DQ3 SPM_DQ4 SPM_DQ0 SPM_DQ6 SPM_DQ1 SPM_DQ7 SPM_DQ2 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D8 C4 C9 C3 A8 A3 B9 A4 SPM_DQ14 SPM_DQ9 SPM_DQ15 SPM_DQ8 SPM_DQ10 SPM_DQ11 SPM_DQ13 SPM_DQ12 Ra R183 HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15 AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W 21 W 20 V21 V20 U20 U21 U19 U18 HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1 T22 T23 AB23 AA22 HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1 M22 M23 R21 R20 HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N C23 A24 HT_RXCALP HT_RXCALN 301/F_4 HT_RXCALP HT_RXCALN B3 D10 G8 K3 K9 N2 N10 R2 R10 +1.5V_MEM_VDDQ R603 K2 L3 J4 K4 L4 ODT CS RAS CAS WE SPM_DQS0P SPM_DQS1P F4 C8 DQSL DQSU SPM_DM0 SPM_DM1 E8 D4 DML DMU SPM_DQS0N SPM_DQS1N G4 B8 DQSL DQSU T3 RESET L9 ZQ SIDE@10K/F_4 [12] SP_DDR3_RST# VMA_ZQ R604 SIDE@240/F_4 A J2 L2 J10 L10 VDDQ#A2 VDDQ#A9 VDDQ#C2 VDDQ#C10 VDDQ#D3 VDDQ#E10 VDDQ#F2 VDDQ#H3 VDDQ#H10 A2 A9 C2 C10 D3 E10 F2 H3 H10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC#J2 VSSQ#E9 NC#L2 VSSQ#F10 NC#J10 VSSQ#G2 NC#L10 VSSQ#G10 100-BALL SDRAM DDR3 SIDE@H5TQ1G63AFR-14C D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22 HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15 HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N H24 H25 L21 L20 HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1 HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N M24 M25 P19 R18 HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1 HT_TXCALP HT_TXCALN B24 B25 HT_TXCALP R192 HT_TXCALN HT_CADOUTP[15 0] HT_CADOUTP[15 0] HT_CADOUTN[15 0] HT_CTLOUTP[1 0] HT_CTLOUTN[1 0] HT_CLKINP[1 0] HT_CLKINN[1 0] HT_CTLINP[1 0] [2] HT_CLKINP[1 0] [2] HT_CTLINP[1 0] HT_CTLINN[1 0] [2] HT_CADINN[15 0] HT_CLKINN[1 0] HT_CTLINN[1 0] HT_RXCALN [2] D HT_CADINP[15 0] HT_CADINN[15 0] HT_RXCALP [2] [2] HT_CTLOUTN[1 0] HT_CADINP[15 0] HT_TXCALN 08 [2] HT_CLKOUTN[1 0] HT_CTLOUTP[1 0] HT_TXCALP [2] HT_CLKOUTP[1 0] HT_CLKOUTN[1 0] signals [2] HT_CADOUTN[15 0] HT_CLKOUTP[1 0] RS880 [2] [2] [2] RX880 Ra 301 ohm 1% Ra 1.21k ohm 1% Rb 301 ohm 1% Rb 1.21k ohm 1% Rb C RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18 301/F_4 [9,10,15,24,37,42,43,44] [2,8,9,10,14,38,44] This block is for UMA only , Discrete can remove all component +1.8V +1.1V +1.8V +1.1V +1.5V_MEM_VDDQ U28D A09 +1.5V_MEM_VDDQ +1.5V_MEM_VDDQ PAR OF SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13 B SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE# HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N PART OF RS880M_A11 +1.5V_MEM_VDDQ VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N R597 R607 SIDE@40.2/F_4 SIDE@40.2/F_4 AB12 AE16 V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14 Y14 MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC) SBD_MEM/DVO_I/F +1.5V_MEM_VDDQ D Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25 HYPER TRANSPORT CPU I/F HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7 SIDE PORT SPM_BA0 SPM_BA1 SPM_BA2 AD16 AE17 AD17 MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC) SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT W 12 Y12 AD18 AB13 AB18 V14 MEM_RASb(NC) MEM_CASb(NC) MEM_W Eb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC) SPM_CLKP SPM_CLKN V15 W 14 MEM_CKP(NC) MEM_CKN(NC) SPM_COMPP SPM_COMPN AE12 AD12 MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC) MEM_DQ12(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC) AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21 SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15 MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS1P(NC) MEM_DQS1N(NC) Y17 W 18 AD20 AE21 SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N MEM_DM0(NC) MEM_DM1/DVO_D8(NC) W 17 AE19 SPM_DM0 SPM_DM1 IOPLLVDD18(NC) IOPLLVDD(NC) AE23 AE24 IOPLLVSS(NC) AD23 MEM_VREF(NC) AE18 MEM_COMPP(NC) MEM_COMPN(NC) IOPLLVDD18_SIDE_PORT IOPLLVDD_SIDE_PORT C9792 SPM_VREF1 C9793 R606 SP@1K/F_4 SIDE@0.1u/10V_4 R606 W/O side port >change to Ohm CS00002JB38 L75 L73 PBY160808T-221Y-N PBY160808T-221Y-N +1.8V +1.1V 15mA 26mA IOPLLVDD18 - memory PLL not applicable to RX881 C9781 SIDE@2.2u/6.3V_6 RS880M_A11 40 mil~50 mil B2 B10 D2 D9 E3 E9 F10 G2 G10 +1.5V_MEM_VDDQ SIDE@0.1u/10V_4 +1.5V SIDE@1u/6.3V_4 R598 C9782 C9783 C9784 C9785 C9786 SIDE@0_6 A C9787 SIDE@10u/6.3V_6 SIDE@0.1u/10V_4 SIDE@10u/6.3V_6 SIDE@1u/6.3V_4 Size Document Number Rev 1A RS880M-HT LINK I/F 1/5 Date: B A41 C9794 SIDE@2.2u/6.3V_6 SPM_VREF1 R605 SIDE@1K/F_4 SIDE@0.1u/10V_4 Wednesday, May 27, 2009 Sheet of 49 http://hobi-elektronika.net U28B D C [26] PCIE_RX1+ [26] PCIE_RX1[27] PCIE_RXP2 [27] PCIE_RXN2 [11] [11] [11] [11] [11] [11] [11] [11] A_RXP0 A_RXN0 A_RXP1 A_RXN1 A_RXP2 A_RXN2 A_RXP3 A_RXN3 D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3 GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N AE3 AD4 AE2 AD3 AD1 AD2 V5 W6 U5 U6 U8 U7 GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N AA8 Y8 AA7 Y7 AA5 AA6 W5 Y5 SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2 PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C PEG_TXP11_C PEG_TXN11_C PEG_TXP10_C PEG_TXN10_C PEG_TXP9_C PEG_TXN9_C PEG_TXP8_C PEG_TXN8_C PEG_TXP7_C PEG_TXN7_C PEG_TXP6_C PEG_TXN6_C PEG_TXP5_C PEG_TXN5_C PEG_TXP4_C PEG_TXN4_C PEG_TXP3_C PEG_TXN3_C PEG_TXP2_C PEG_TXN2_C PEG_TXP1_C PEG_TXN1_C PEG_TXP0_C PEG_TXN0_C C669 C672 C662 C666 C657 C659 C652 C654 C641 C640 C643 C642 C645 C644 C625 C624 C647 C646 C627 C626 C649 C648 C631 C628 C630 C629 C638 C637 C633 C621 C650 C639 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 SW@0.1u/10V_4 GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2 PCIE_TXP0_C PCIE_TXN0_C C658 C655 0.1u/10V_4 0.1u/10V_4 PCIE_TXP2_C PCIE_TXN2_C C651 C653 0.1u/10V_4 0.1u/10V_4 SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5 A_TXP0_C A_TXN0_C A_TXP1_C A_TXN1_C A_TXP2_C A_TXN2_C A_TXP3_C A_TXN3_C C676 C677 C673 C674 C668 C670 C661 C665 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN) AC8 AB8 NB_PCIECALRP NB_PCIECALRN R154 R147 PART OF PCIE I/F GFX PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0 PCIE I/F GPP PCIE I/F SB [16] PEG_RXN[15:0] PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0 [16] PEG_RXP[15:0] PEG_RXN[15:0] PEG_TXN[15:0] PEG_RXP[15:0] PEG_TXP[15:0] 09 PEG_TXN[15:0] [16] PEG_TXP[15:0] [16] Close to North Bridge D INT HDMI PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C PCIE_TX1+ [26] PCIE_TX1- [26] PCIE_TXP2 [27] PCIE_TXN2 [27] PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C [25] [25] [25] [25] [25] [25] [25] [25] To LAN C TO WLAN-2 T107 T108 1.27K/F_4 2K/F_4 A_TXP0 A_TXN0 A_TXP1 A_TXN1 A_TXP2 A_TXN2 A_TXP3 A_TXN3 [11] [11] [11] [11] [11] [11] [11] [11] +1.1V RS880M_A11 B B RS880 Display Port Support (muxed on GFX) GFX_TX0,TX1,TX2 and TX3 DP0 AUX0 and HPD0 GFX_TX4,TX5,TX6 and TX7 DP1 AUX1 and HPD1 A A Size Document Number Rev 1A RS880M-PCIE I/F 2/5 Date: Wednesday, May 27, 2009 Sheet of 49 http://hobi-elektronika.net 10 U28C C05 +3V +3V R434 R153 R433 R141 Only for UMA VGA (Not applicable to RX881) *SP_A11@49.9/F_4 *SP_A11@49.9/F_4 IV@140/F_4 R440 150/F_4 R442 150/F_4 [24] INT_CRT_HSYNC [24] INT_CRT_VSYNC [24] INT_DDCDATA [24] INT_DDCCLK R160 For A11 version R119 R116 R438 G18 G17 E18 F18 E19 F19 RED(DFT_GPIO0) REDb(NC) GREEN(DFT_GPIO1) GREENb(NC) BLUE(DFT_GPIO3) BLUEb(NC) INT_CRT_HSYNC INT_CRT_VSYNC A11 B11 E8 F8 DAC_HSYNC(PWM_GPIO4) DAC_VSYNC(PWM_GPIO6) DAC_SDA(PCE_TCALRN) DAC_SCL(PCE_RCALRN) DAC_RSET_NB G14 DAC_RSET(PWM_GPIO1) +1.1V_PLLVDD +1.8V_PLLVDD18 A12 D14 B12 PLLVDD(NC) PLLVDD18(NC) PLLVSS(NC) H17 VDDA18HTPLL INT_CRT_BLU [24] INT_CRT_BLU NB_PWRGD_IN INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA *4.7K_4 *4.7K_4 *4.7K_4 *4.7K_4 C_Pr(DFT_GPIO5) Y(DFT_GPIO2) COMP_Pb(DFT_GPIO4) INT_CRT_GRE [24] INT_CRT_GRE For Check list JTAG E17 F17 F15 B03 INT_CRT_RED [24] INT_CRT_RED D +1.8V_AVDDQ_NB AVDD1(NC) AVDD2(NC) AVDDDI(NC) AVSSDI(NC) AVDDQ(NC) AVSSQ(NC) 715/F_6 +1.8V CLK_SBLINKP CLK_SBLINKN R579 300_4 B2-TEST 65mA +1.8V_VDDA18HTPLL 20mA +1.8V_VDDA18PCIEPLL [11,24,34] A_RST#_SB NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP [12,15] NB_PWRGD_IN [11] CLK_NB_HTREFP_PR [11] CLK_NB_HTREFN_PR [11] CLK_NB_REF_CLKP [11] CLK_NB_REF_CLKN B2-TEST D06 T69 T70 C [11] CLK_SBLINKP [11] CLK_SBLINKN [24] INT_EDIDDATA [24] INT_EDIDCLK [25] HDMI_DDC_DATA [25] HDMI_DDC_CLK A10 T96 T72 T17 VDDA18PCIEPLL1 VDDA18PCIEPLL2 D8 A10 C10 C12 SYSRESETb POWERGOOD LDTSTOPb ALLOW_LDTSTOP C25 C24 HT_REFCLKP HT_REFCLKN E11 F11 REFCLK_P/OSCIN(OSCIN) REFCLK_N(PWM_GPIO3) NBGFX_CLKP NBGFX_CLKN T2 T1 GFX_REFCLKP GFX_REFCLKN GPP_REFCLKP GPP_REFCLKN U1 U2 GPP_REFCLKP GPP_REFCLKN CLK_SBLINKP CLK_SBLINKN V4 V3 GPPSB_REFCLKP(SB_REFCLKP) GPPSB_REFCLKN(SB_REFCLKN) INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA A9 B9 B8 A8 B7 A7 I2C_DATA I2C_CLK DDC_DATA/AUX0N(NC) DDC_CLK/AUX0P(NC) AUX1P(NC) AUX1N(NC) +NB_CORE_ON [39] +NB_CORE_ON D7 E7 AUX1P AUX1N B10 STRP_DATA G11 RSVD RS880_AUX_CAL C8 TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC) TXOUT_L2N(DBG_GPIO0) TXOUT_L3P(NC) TXOUT_L3N(DBG_GPIO2) A22 B22 A21 B21 B20 A20 A19 B19 TXOUT_U0P(NC) TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2) TXOUT_U2P(NC) TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5) TXOUT_U3N(NC) B18 A18 A17 B17 D20 D21 D18 D19 TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1) B16 A16 D16 D17 VDDLTP18(NC) VSSLTP18(NC) A13 B13 +1.8V_VDDLTP18_NB 15mA VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC) A15 B15 A14 B14 +1.8V_VDDLT_18_NB 300mA VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS) C14 D15 C16 C18 C20 E20 C22 LVDS_DIGON(PCE_TCALRP) LVDS_BLON(PCE_RCALRP) LVDS_ENA_BL(PWM_GPIO2) E9 F7 G12 PART OF CRT/TVOUT NBGFX_CLKN 4mA F12 E12 F14 G15 H15 H14 PLL PWR LVTM NBGFX_CLKP 4.7K_4 +1.8V_AVDDDI_NB PM 4.7K_4 R127 +3V_AVDD_NB 20mA CLOCKs R126 110mA LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2 [24] [24] [24] [24] [24] [24] D LA_CLK [24] LA_CLK# [24] INT_LVDS_DIGON [24] INT_DPST_PWM [24] INT_LVDS_BLON [24] C TMDS_HPD(NC) HPD(NC) D9 D10 TVCLKIN(PWM_GPIO5) D12 THERMALDIODE_P THERMALDIODE_N AE8 AD8 TESTMODE D13 MIS INT_HDMI_HPD SUS_STAT#_NB [25] SUS_STAT# [12] R88 *3K_4 TEST_EN R172 1.82K/F_4 AUX_CAL(NC) RS880M_A11 A41 RS880M - ADD STRAP_DEBUG_BUS_GPIO_ENABLEb +3V C300 2.2u/6.3V_6 Enables the Test Debug Bus using GPIO RS880M Disable Enable INT_CRT_VSYNC R158 3K_4 A41 AVDD-DAC Analog not applicable to RX780 L27 PBY160808T-221Y-N +3V_AVDD_NB +1.1V L61 PBY160808T-221Y-N C03 C485 1u/6.3V_4 C679 2.2u/6.3V_6 +1.1V_PLLVDD PLLVDD - Graphics PLL not applicable to RX780 +1.8V B A41 R174 *Short_4 C312 0.1u/10V_4 A41 RS880M: Enables Side port memory L36 PBY160808T-221Y-N Selects if Memory SIDE PORT is available or not = Memory Side port Not available = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] C335 2.2u/6.3V_6 L62 PBY201209T-221Y-N A41 +1.8V_AVDDQ_NB AVDDQ-DAC Bandgap Reference not applicable to RX780 C324 10U/6.3V_8 R166 SIDE@3K_4 +1.8V +3V A41 PLLVDD18 - Graphics PLL not applicable to RX780 VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780 2K/F_4 L34 PBY160808T-221Y-N R85 2.2K_4 +1.8V_VDDA18PCIEPLL VDDA18PCIEPLL -PCIE PLL [2,11] CPU_LDT_STOP# + U8 Open NB_LDT_STOP# Drain - 74LVC07 20mils width A R185 1K_4 +1.8V_VDDA18HTPLL VDDA18HTPLL -HT LINK PLL [2,11] CPU_LDT_REQ# C329 2.2u/6.3V_6 Display Port interface from PCIeGraphics (RS880/rs880M only) DDR3 based CPU : Level shifted to 1.8 V on the Northbridge side using an open-drain buffer and pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor on the Northbridge side +1.8V A41 RS780/RX780/RS880 R145 C680 0.1u/10V_4 C327 2.2u/6.3V_6 20mils width C268 2.2u/6.3V_6 RS880_AUX_CAL +1.8V_VDDLT_18_NB C683 4.7u/6.3V_6 +1.8V_PLLVDD18 *SP@3K_4 R436 B +1.8V R168 L22 PBY160808T-221Y-N +NB_CORE_ON VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780 +1.8V A09 For extrnal EEPROM Debug only C318 2.2u/6.3V_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital not applicable to RX780 L32 PBY160808T-221Y-N RS880M:INT_CRT_HSYNC A +1.8V_VDDLTP18_NB L33 PBY160808T-221Y-N +3V +1.8V INT_CRT_HSYNC A41 +1.8V NB_ALLOW_LDTSTOP A11 [2,11] ALLOW_LDTSTOP The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required *150/F_4 Size Document Number Rev 1A RS880M-SYSTEM I/F 3/5 Date: Wednesday, May 27, 2009 Sheet of 49 A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2 AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15 http://hobi-elektronika.net PART 6/6 A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25 L12 M14 N13 P12 P15 R11 R14 T12 U14 U11 U15 V12 W11 W15 AC12 AA14 Y18 AB11 AB15 AB17 AB19 AE20 AB21 K11 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27 GROUND D 11 RX881/RS880 POWER DIFFERENCE TABLE VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8 VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40 U28F PIN NAME RX881 RS880 PIN NAME RX881 VDDHT +1.1V +1.1V IOPLLVDD +1.1V RS880 +1.1V VDDHTRX +1.1V +1.1V AVDD GND +3.3V VDDHTTX +1.2V +1.2V AVDDDI GND +1.8V VDDA18PCIE +1.8V +1.8V AVDDQ GND +1.8V VDDG18 +1.8V +1.8V PLLVDD GND +1.1V VDD18_MEM GND +1.8V PLLVDD18 GND +1.8V VDDPCIE +1.1V +1.1V VDDA18PCIEPLL +1.8V +1.8V VDDC +1.1V +1.1V VDD_MEM GND +1.8V/1.5V VDDG33 +3.3V IOPLLVDD18 +1.8V VDDA18HTPLL +1.8V +1.8V VDDLTP18 GND +1.8V +3.3V VDDLT18 GND +1.8V +1.8V VDDLT33 NC NC D +1.1V 2A for RS880M +1.1V 1.3A for RX881 +1.1V C *Short_8 +1.1V_VDDHT C317 4.7u/6.3V_6 0.7A L37 L35 C338 0.1u/10V_4 C340 0.1u/10V_4 2A *Short_8 C323 0.1u/10V_4 +1.1V_VDDHTRX C362 4.7u/6.3V_6 C334 0.1u/10V_4 +1.1V_VDDHTTX C333 4.7u/6.3V_6 B2-TEST B C322 0.1u/10V_4 *Short_8 +1.1V 2A for RS880M +1.2V 0.4A for Rx881 +1.1V C321 0.1u/10V_4 C331 0.1u/10V_4 C337 0.1u/10V_4 C332 0.1u/10V_4 C341 0.1u/10V_4 +1.8V 1A for RS780M+SB700 A41 +1.8V 1A for RX881 +1.8V L24 PBY201209T-221Y-N 0.7A +1.8V_VDDA18PCIE C299 4.7u/6.3V_6 C297 4.7u/6.3V_6 +1.8V R136 C292 0.1u/10V_4 *Short_6 C295 0.1u/10V_4 C287 0.1u/10V_4 25mA C301 0.1u/10V_4 +1.8V_VDDG18_NB VDD18-RS880 I/O Transform C286 1U/10V_4 J17 K16 L16 M16 P16 R16 T16 VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7 H18 G19 F20 E21 D22 B23 A23 VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7 AE25 AD24 AC23 AB22 AA21 Y20 W 19 V18 U17 T17 R17 P17 M17 PART 5/6 VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13 J10 P10 K10 M10 L10 W9 H9 T10 R10 Y9 AA9 AB9 AD9 AE9 U10 POWER L31 VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15 F9 G9 AE11 AD11 VDDG18_1(VDD18_1) VDDG18_2(VDD18_2) VDD18_MEM1(NC) VDD18_MEM2(NC) VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC) VDDG33_1(NC) VDDG33_2(NC) A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9 K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16 AE10 AA11 Y11 AD10 AB10 AC10 +1.1V_VDD_PCIE C243 0.1u/10V_4 C291 0.1u/10V_4 +1.8V 25mA +1.8V_VDD18_MEM C +1.1V C290 4.7u/6.3V_6 NB_CORE C315 0.1u/10V_4 C311 0.1u/10V_4 C310 0.1u/10V_4 C307 0.1u/10V_4 C314 10U/6.3V_8 B C316 0.1u/10V_4 C308 0.1u/10V_4 C306 0.1u/10V_4 C305 10U/6.3V_8 A09 SIDE@0.1u/10V_4 C831 W/O side port >stuff Ohm CS00002JB38 SIDE@0.1u/10V_4 +1.5V_VDD_MEM C832 L74 SIDE@0_8 C833 C831 +1.5V C836 C834 SIDE@4.7u/6.3V_6 +3V_VDDG33 C302 0.1u/10V_4 SIDE@0_6 C294 1U/10V_4 *Short_8 0.95~1.1V 10A SP@0.1u/10V_4 R169 RS880M_A11 R171 C293 1U/10V_4 R115 VDDC - Core Logic power SIDE@0.1u/10V_4 H11 H12 VDDPCIE - PCIE-E Main power 2.5A U28E 0.6A C303 0.1u/10V_4 *Short_4 60mA +3V VDD33 - 3.3V I/O Not applicable to RX780 VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform A09 A A C835 SP@1U/10V_4 +1.1V +1.8V NB_CORE +1.1V [2,7,8,9,14,38,44] +1.8V [7,9,15,24,37,42,43,44] NB_CORE [39,44] C835 W/O side port >stuff Ohm CS00002JB38 Size Rev 1A RS880M-POWER5/5 Date: Document Number Wednesday, May 27, 2009 Sheet 10 of 49 http://hobi-elektronika.net A01 A41 PJ2 POWER_JACK VA1 PD6 SBR1045SP5-13 VA VA2 PL3 UPB201212T-121Y-N_8 PC115 0.1u/50V_6 PC109 0.1u/50V_6 PD7 SMAJ20A PR186 220K/F_6 VIN_SRC PC124 0.1u/50V_6 PC117 2200p/50V_6 PR27 33K_6 CSIP_1 PC118 2200p/50V_6 PD1 SW1010CPT B2-TEST PR174 220K/F_6 VA PR2 *Short_6 D/C# PR28 10K_6 [34] PC116 0.1u/50V_6 D PQ39 FDD6685 VIN_SRC PQ37 FDD6685 PR197 0.01/F_7520 PL4 UPB201212T-121Y-N_8 D PQ36 IMD2AT108 C13 EC54 22U/25V_1210 VIN_SRC EC55 22U/25V_1210 PQ6 DMN601K-7 VIN_SRC CLOSE TO PJ2 PIN 1,2 CSIP_1 B2-TEST PC32 1u/16V_6 PR44 10/F_6 PR45 10/F_6 PC129 PC31 0.1u/50V_6 27 CSIN MBDATA [34] 10 13 ACIN PR43 49.9/F_6 SCL PHASE ACOK LGATE PGND 22 88731ACSET PL1 UPB201212T-121Y-N_8 MBAT+ 20 ISL88731_LGATE PR46 2.2_6 B2-TEST 19 PQ46 AO4710 18 CSOP PC34 2200p/50V_6 PC8 2200p/50V_6 17 CSON 16 BAT-V BAT-V PR36 10/F_6 BAT-V 15 GND 29 B PR32 100_4 PC27 *1u/16V_6 MBCLK [34] MBDATA [34] PC26 0.01u/50V_6 PC24 *0.01u/50V_6 VIN PQ42 AOL1413 ISL88731 thermal pad tie to Pin12 PC22 0.01u/50V_6 PR177 100_4 [34] A01 A39 PC111 1U/25V_6 A46 PR37 150K_6 A47 PU1 CM1293A-04SO CH1 TEMP_MBAT_C VN CH2 CH4 VP CH3 PR35 39K_6 MBDATA +3VPCU PC125 10u/25V_1206 CSOP_1 VIN_SRC PC3 47p/50V_6 ICMNT PR178 100_4 PC126 10u/25V_1206 CSOP_1 PR10 100K/F_6 PC1 47p/50V_6 BAT-V 12 NC ICM 14 PR34 2.21K/F_6 +3VPCU PR4 100_4 ISL88731_PHASE *Short_4 VBF VCOMP TEMP_MBAT [34] PR1 *Short_4 23 NC GND TEMP_MBAT_C PR200 0.01_3720 PL7 6.8uH/6.5A PR33 ICOMP NC PQ45 AO4468 ISL88731_UGATE PC23 0.1u/50V_6 VREF CSON PL2 UPB201212T-121Y-N_8 Batt_Conn CSOP BAT-V PJ1 10 ACIN NC B PU4 ISL88731A PC127 0.1u/50V_8 88731B_1 PR38 10/F_6 A53 PR39 22K/F_6 A41 24 DCIN PR40 82.5K_6 PC2 100p/50V_6 VDDP UGATE PC33 0.1u/50V_6 DCIN PC4 0.1u/50V_6 VCC BOOT SDA PR42 2.7_6 25 88731B_2 C [34] MBCLK VDDSMB EC53 *22U/25V_1210 PD8 *RB500V-40 11 [34] PR30 100K_6 CSSN NC GND GND GND GND CSSP PC21 0.1u/50V_6 EC41 *22U/25V_1210 4.7u/25V_8 26 ISL88731_VDDP +3VPCU +3VPCU EC4 0.1u/50V_6 PC29 1u/16V_6 21 33 32 31 30 28 CSIP C PC35 2200p/50V_6 PR41 4.7_6 A48 MBCLK [34] Add ESD diode base on EC FAE suggestion VIN_ON PQ5 DMN601K-7 A A Size Document Number Rev 1A CHARGER (ISL88731) Date: Wednesday, May 27, 2009 Sheet 35 of 49 http://hobi-elektronika.net MAIND MAIND [40,43] PR241 [2,4,43,44] VL A28 SYS_SHDN# *Short_4 A28 B2-TEST VIN_SRC D07 + PD12 *ZD5.6V + PR181 0_4 3V5V_EN PR146 *Short_4 VL PR257 390K/F_4 C PC198 *10u/25V_1206 PC203 330u/6.3V_6X5.7 PR163 2.2_6 PD14 SX34 PC105 0.1u/50V_6 PC103 2200p/50V_6 5V_DL PR137 1/F_6 +3VPCU LDOREFIN LDO VIN NC1 ONLDO VCC TON REF PC88 0.1u/50V_6 PQ68 AO4710 PR250 0_4 OCP : 8A PQ66 AO4468 PU10 RT8206B B2-TEST 3V_LX REFIN2 ILIM2 OUT2 SKIP# PGOOD2 EN2 DH2 LX2 32 31 30 29 28 27 26 25 REFIN2 PR158 191K/F_6 SKIP DDPWRGD_R 3V_EN PD11 SX34 A28 PL14 2R2uH-5.8mR/14A PR154 2.2_6 PQ65 AO4710 PR254 0_6 PC92 2200p/50V_6 + PC183 330u/6.3V_6X5.7 PC89 0.1u/50V_6 C PC86 0.1u/50V_6 PR157 *0_4 PR132 1/F_6 17 18 19 20 21 22 23 24 PR156 220K/F_6 BYP OUT1 FB1 ILIM1 PGOOD1 EN1 DH1 LX1 Pad5 Pad4 Pad3 Pad2 Pad1 5V_LX PR252 *0_4 + 10 11 12 DDPWRGD_R 13 5V_EN 14 15 16 37 36 B2-TEST PC188 PC185 *100u/25V_6.3*5.8 4.7u/25V_8 PR160 *Short_4 BST1 DL1 PVCC NC2 GND1 PGND DL2 BST2 5V_DH PQ67 AO4468 PL16 2R2uH-5.8mR/14A 3V_DH PC96 0.1u/50V_6 35 34 33 A28 PC95 2200p/50V_4 8 +5VPCU EC17 0.1u/50V_6 5.03A REF PR161 150K/F_4 6.15A PR255 *0_4 *Short_4 PC97 1u/16V_6 PC99 4.7u/10V_8 8206_ONLDO OCP: 10A B2-TEST PR256 EC19 PC187 4.7u/25V_8 0.1u/50V_6 5V_EN PC101 2200p/50V_6 3V_EN PR147 *Short_4 PC193 100u/25V_6.3*5.8 PR253 *0_6 PC186 0.01u/16V_4 PC98 0.1u/50V_6 A29 D VIN_SRC PR138 39K/F_4 D +3VPCU_OUT PR155 *Short_4 3V_DL +5VPCU_FB PD5 1PS302 PC100 0.1u/50V_6 OCP:10A L(ripple current) =(19-5)*5/(2.2u*0.4M*19) ~4.18A PR133 *Short_4 PC102 0.1u/50V_6 PC189 0.1u/50V_6 OCP:8A L(ripple current) =(19-3.3)*3.3/(2.2u*0.5M*19) ~2.48A RT8206B_PIN20 PR258 22_8 +3VPCU *Short_4 +15V_ALWP Iocp=10-(4.18/2)=7.91A Vth=7.91A*14.2mOhm=112.322mV R(Ilim)=(112.322mV*10)/5uA ~220K PR251 *0_6 PR162 0_6 PR233 +15V REF PR159 *0_6 PC83 1u/16V_6 PD13 1PS302 SKIP VL PR234 *0_6 PR259 *200K/F_4 PR152 DDPWRGD_R SYS_HWPG Iocp=8-(2.48/2)=6.67A Vth=6.67A*15mOhm=94.714mV R(Ilim)=(94.714mV*10)/5uA ~191K PR242 *39K/F_4 PC190 0.1u/50V_6 PR135 *100K_4 [34] *Short_4 B B PR166 22_8 PR165 1M_6 +5VPCU PR164 *1M_6 +5VPCU +3VPCU +3VPCU PR170 22_8 VIN_SRC PR167 1M_6 +15V +5V_S5 +3V_S5 VIN_SRC S5D PQ32 DMN601K-7 PQ64 AO3404 +3V_S5 1.3A PC104 *2200p/50V_4 PQ33 DMN601K-7 +5V_S5 3A A PQ62 AO4468 PQ35 DMN601K-7 PR171 1M_6 PQ31 AO4468 2 MAIND 4 MAIND 3 2 PQ34 DTC144EUA PQ30 AO4468 S5_ON [34,38,43,44] 3 S5D +5V 3.15A +3V A 3.2A Size Document Number Rev 1A SYSTEM 5V/3V (RT8206) Date: Wednesday, May 27, 2009 Sheet 36 of 49 A B C D X PR127 10/F_6 PQ57 AO4932 [2] CPU_VDDNB_FB_L 1.0 0.9 1 0.8 +5VPCU PC175 *10u/25V_1206 1.1 Output SVD SVC PC173 100u/25V_6.3*5.8 G1 S1/D2 PR126 10/F_6 Metal VID Codes PC69 0.1u/50V_6 PC167 10u/25V_1206 + X VIN + D1 O O G2 X X D1 X +5V S2 +3.3V [2] CPU_VDDNB_FB_H O B2-TEST LGATE_NB A01 VFIX SVI GND PL13 2.2uH/8A CPU_VDDNB_CORE Offset & Droop O OFS/VFIXEN E B2-TEST http://hobi-elektronika.net 3A PC168 330u/2V_7343 PR240 10/F_6 UGATE_NB PC182 1u/25V_8 PR235 22.1K/F_4 PR128 PC82 1000p/50V_6 *Short_8 PC84 33p/50V_4 VFIXEN VID Codes VIN 1.0 1 0.8 B2-TEST VIN LGATE_NB PR123 11.3K/F_4 PC176 + PR136 44.2K/F_4 4.7u/25V_8 PHASE_NB A30 UGATE_NB PC78 0.1u/50V_6 +3V PR145 PR245 *10K/F_6 CPU_SVD [2] CPU_SVC PR142 *Short_4 PR143 *Short_4 37 38 PHASE_NB UGATE_NB 39 LGATE_NB 41 40 PGND_NB 43 42 RTN_NB 45 44 FSET_NB VSEN_NB FB_NB 47 46 PGOOD BOOT_0 PWROK UGATE_0 Pin 49 is GND Pin SVD PHASE_0 SVC PGND_0 PR118 1/F_6 A06 35 34 33 PHASE_0 PQ54 AOL1718 + + + PC56 330u/2V_7343 PC58 330u/2V_7343 LGATE_0 RBIAS PVCC 31 LGATE_0 B2-TEST COMP_0 UGATE_1 VIN 30 PC171 29 LGATE_1 + PC73 2.2u/10V_8 UGATE_1 27 PHASE_1 26 UGATE_1 EC25 *2200p/50V_4 PC180 100u/25V_6.3*5.8 PQ58 AOL1448 20A PL12 0.36uH/25A ISN_1 PR119 1/F_6 PC76 0.1u/50V_6 A06 PR95 1_6 +VCORE B2-TEST A06 + LGATE_1 ISP_0_R 4 PQ55 AOL1718 ISN_1 PQ71 AOL1718 PR120 *Short_6 PC64 1000p/50V_4 + + PR115 *Short_6 PC55 *330u/2V_7343 A45 PR139 18.2K/F_4 PC204 PC205 330u/2V_7343 330u/2V_7343 ISP_1 PR238 3.92K/F_4 +VCORE PC177 0.1u/50V_6 25 Close to CPU socket A30 PC174 *10u/25V_1206 ISP_0 4.7u/25V_8 28 24 23 ISP_1 VW_1 22 COMP_1 21 20 PR244 6.81K/F_4 FB_1 BOOT_1 VDIFF_1 VW_0 19 PC184 1000p/50V_6 12 13 PC90 180p/50V_4 ISL6265A_VW PHASE_1 VSEN_1 PC94 1200p/50V_4 FB_0 RTN_1 11 18 10 ISL6265A_COMP PGND_1 ISP_0 PR151 54.9K/F_4 FB_ISL6265A LGATE_1 VDIFF_0 17 ISL6265A_COMP_R OCSET RTN_0 PR141 1K/F_4 VSEN_0 VDIFF 16 OCSET ISN_0 PC93 4700p/25V_4 PR140 97.6K/F_4 15 PR149 19.6K/F_4 B2-TEST +5VPCU PU9 ISL6265A ENABLE PC59 *330u/2V_7343 ISP_0 A45 A31 PR130 *Short_6 PQ70 AOL1718 32 6265_EN 14 PR150 255/F_4 PR134 10/F_6 A06 PR131 *Short_6 PC65 1000p/50V_4 *0_4 0_4 RBIAS B2-TEST +VCORE PR94 1_6 UGATE_0 VDIFF_RC PR153 100K_4 PC75 0.1u/50V_6 ISN_0 PR148 PR179 [34,43] VRON [42,43] HWPG_2.5V 0_4 6265_EN A43 PL11 0.36uH/25A 36 PR243 20A PC179 100u/25V_6.3*5.8 PQ56 AOL1448 [2] *Short_4 EC13 *2200p/50V_4 BOOT_NB PQ63 *DTC144EU +3V PR117 1/F_6 CPU_COREPG +1.8V [2,11] CPU_PWRGD_SVID_REG *10K/F_4 PC178 0.1u/50V_6 [15,39] PR249 OCSET_NB PR144 *Short_4 OFS/VFIXEN COMP_NB VCC *0_4 48 0_4 PR248 VIN PR247 GND +3V PR265 10K_4 49 UGATE_0 +5VPCU B2-TEST PC172 *10u/25V_1206 1.2 PC85 1200p/50V_4 PC91 0.1u/50V_6 PR246 10/F_6 1.4 Output SVD SVC PC87 0.1u/50V_6 PC77 0.1u/50V_6 PR116 3.92K/F_4 ISN_1 ISN_0 ISP_1 [2] CPU_VDD0_FB_H PC181 *1000p/50V_6 PR121 18.2K/F_4 [2] CPU_VDD0_FB_L PR239 10/F_6 D14 Parallel PR231 *6.81K/F_4 +1.5VSUS PR232 1K/F_4 PR236 *0_4 Close to CPU socket D14 PC81 *4700p/25V_4 PC79 *1200p/50V_4 PR237 *10/F_6 [2] CPU_VDD1_FB_L PR125 *1K/F_4 [2] CPU_VDD1_FB_H PC80 *180p/50V_4 PR129 10/F_6 +VCORE PR124 *255/F_4 PR122 *54.9K/F_4 Size Document Number Rev 1A CPU_CORE Date: A B C D Wednesday, May 27, 2009 E Sheet 37 of 49 http://hobi-elektronika.net D D VIN +5VPCU B2-TEST PC156 PR215 10/F_6 PD2 RB500V-40 PR218 2.2/F_6 PR77 *Short_6 PU6 UP6111AQDD PR73 *Short_4 S5_ON_+1.1V_S5 15 +3V 16 PC149 *0.1u/50V_6 PR68 *10K/F_6 [34] HWPG_1.1V C 14 PC41 1u/16V_6 EN/DEM BOOT TON UGATE VOUT PHASE VDD OC FB VDDP PGOOD LGATE GND PGND NC TPAD +1.1V_S5 EC9 0.1u/50V_6 12 UGATE-1.1V 11 PHASE-1.1V PL9 1R0uH-3mR/15A PR78 7.15K/F_6 10 PC44 1u/16V_6 PR80 1_6 LGATE-1.1V + PC47 1000p/50V_4 17 NC PQ50 AO4710 C PC148 *1000p/50V_6 PC150 0.1u/50V_6 PC147 *33p/50V_6 VOUT=(1+R1/R2)*0.75 1.1V_FB AO4710 Rdson=11.7~14.2mOhm L(ripple current) =(19-1.1)*1.1/(1u*272k*19) ~3.81A TON=3.85p*1M*1/(Vin-0.5) PC151 *10u/10V_8 Rds*OCP=RILIM*20uA PR66 5.1K/F_6 R1 Frequency=Vout/(Vin*TON) PC157 560u/2.5V_6X5.7 A45 B2-TEST TON=3.85p*RTON*Vout/(Vin-0.5) PC48 2200p/50V_4 PQ51 AO4468 PC45 0.1u/50V_6 13 OCP: 10A 6A S5_ON [34,36,43,44] PC42 1u/16V_6 PR67 1M_6 4.7u/25V_8 PR216 10K/F_6 R2 PR75 0_6 14.2m*10=RILIM*20uA RILIM=7.1K - 7.15K Frequency=1/(0.0036767)=272K B B VIN_SRC 1.2V_ON *0_4 PR86 PR65 22_8 PR62 1M_6 *0_4 PR52 1M_6 B2-TEST [34] PR99 +1.1V_S5 +15V [43] HWPG_0.9V +1.1V PQ19 AO4468 2 PR60 100K_6 PQ8 DMN601K-7 PQ13 DMN601K-7 PQ7 DMN601K-7 PR57 1M_6 0_4 PR87 HWPG_1.8V [34,42] PC39 *2200p/50V_4 +1.1V 5.5A "HWPG_0.9V"=CPU_COREPG A A Size Document Number Rev 1A VCCP 1.1V(UP6111A) Date: Wednesday, May 27, 2009 Sheet 38 of 49 http://hobi-elektronika.net D D VIN +5V_S5 B2-TEST PC158 PR91 10/F_6 PR93 2.2/F_6 B2-TEST PR266 100K_4 *Short_4 15 UP6111AQDD_PIN16 +3V PC160 *0.1u/50V_6 UP6111AQDD_PIN2 [34] HWPG_0.95V C 16 PR227 *10K/F_6 14 PC163 1u/16V_6 NB_CORE EN/DEM BOOT TON UGATE VOUT PHASE VDD FB PGOOD OC VDDP LGATE GND PGND NC TPAD EC10 0.1u/50V_6 PC162 0.1u/50V_6 13 12 UGATE-NB 11 PHASE-NB PL10 1R0uH-3mR/15A PR224 7.15K/F_6 10 PC50 2200p/50V_4 PQ53 AO4468 PR220 OCP: 10A 7.5A PC166 1u/16V_6 PR89 1_6 LGATE-NB + C PQ52 AO4710 17 PC51 1000p/50V_4 CPU_COREPG 4.7u/25V_8 PR222 *Short_6 PU14 UP6111AQDD [15,37] PC53 1u/16V_6 PR221 1M_6 PD3 RB500V-40 NC PC161 *1000p/50V_6 A45 VOUT=(1+R1/R2)*0.75 PC159 *10u/10V_8 PC52 0.1u/50V_6 Rds*OCP=RILIM*20uA R1 PR226 PC164 560u/2.5V_6X5.7 PR225 2.74K/F_4 NB_CORE_FB PC165 *33p/50V_6 +5VPCU PR92 13.3K/F_4 NB_CORE_FB *Short_6 R2 PR85 10K/F_4 PR223 10K/F_6 PC49 0.01u/25V_4 PR90 100_4 PR84 *0_4 HI - 0.95V LOW -1.1V PQ21 DMN601K-7 TON=3.85p*RTON*Vout/(Vin-0.5) TON=3.85p*1M*1/(Vin-0.5) AO4710 Rdson=11.7~14.2mOhm L(ripple current) =(19-1.05)*1.05/(1u*272k*19) ~3.646A Frequency=1/(0.0036767)=272K 14.2m*10=RILIM*20uA RILIM=7.1K - 7.15K Frequency=Vout/(Vin*TON) B +NB_CORE_ON [9] PQ20 DMN601K-7 PR88 *100K_4 B A A Size Document Number Rev 1A NB_CORE(UP6111A) Date: Wednesday, May 27, 2009 Sheet 39 of 49 [PWM] http://hobi-elektronika.net PC132 10u/10V_8 D D PR201 0_6 PC133 0.1u/50V_6 A28 8207A_VBST +0.75V_DDR_VTT VIN 8207A_DH PC131 10u/10V_8 PC135 10u/10V_8 8207A_LX PC136 + 1.71A 8207A_DL 4.7u/25V_8 B2-TEST DRVL CS_GND RT8207A PU11 GND CS MODE V5IN +1.5VSUS A28 17 16 PR48 4.02K/F_6 15 +5V_S5 PC37 1u/6.3V_4 13 PR203 5.1/F_6 *Short_6 + PQ48 AOL1718 PC139 10u/10V_8 NC S5_1.8V PR207 0_6 SUSON [34] S3_1.8V PR208 *0_6 MAINON [34,42,43] PC143 560u/2.5V_6X5.7 PC144 *560u/2.5V_6X5.7 C +3VPCU (For RT8207A VIN + PC36 1000p/50V_4 A45 PR204 100K/F_6 PR49 620K/F_4 PR59 *0_6 [2] PQ47 AOL1718 PC137 1u/6.3V_4 HWPG_1.5V PR202 PR47 1_6 14 12 S5 S3 PGOOD 11 FOR DDR III C VDDQSET COMP NC +5V_S5 V5FILT 10 PC138 0.033u/50V_6 0.75A VTTREF VDDQSNS +SMDDR_VREF OCP 22A 18A 18 VBST DRVH PGND VTTSNS PC134 *100u/25V_6.3*5.8 PL8 0.56uH/25A +1.5VSUS LL 3 VTTGND PQ49 AOL1448 VLDOIN VTT GND C15 EC5 PC130 0.1u/50V_6 2200p/50V_6 20 19 21 22 24 25 23 [34] 400KHZ ) +5V_S5 VDDIO_FB_H PR206 *0_4 PC38 *33p/50V_6 Vout = (PR150/PR149) X 0.75 + 0.75 PR205 10K/F_4 AO1718 Rdson=3.8~4.3mOhm L(ripple current) =(9-1.5)*1.5/(0.56u*400k*9) ~5.58A Vtrip= (22-2.79)(*4.3mohm/2)=0.0413V RILIM=Vtrip/10uA~4.13K 8207A_SET PR54 0_6 PR58 10K/F_4 S3_1.8V +1.5VSUS VDDIO_FB_L [2] S5_1.8V PR61 *0_4 B [36,43] +1.5V_GPU PQ29 AO4468 OK +1.5VSUS +15V B MAIND PR50 SW@1M/F_6 SW@0_6 B2-TEST +1.5V 3.62A PR51 PG_1.5V_EN PR63 SW@1M/F_6 DGPU_1.5V_ON_R [42,43] PR64 SW@22_8 VIN_SRC MAIND PQ9 SW@AO4468 *SW@0_6 2 PR55 PQ10 SW@1M/F_6 SW@DMN601K-7 PR53 SW@100K_4 PQ11 SW@DMN601K-7 PR56 PQ12 SW@DMN601K-7 +1.5V_GPU DGPU_VRON [11,12,41] PC40 *SW@2200p/50V_4 5.63A A A Size Document Number Rev 1A DDR 1.5V(TPS51116) Date: Wednesday, May 27, 2009 Sheet 40 of 49 http://hobi-elektronika.net A A B2-TEST +5V_S5 VIN OCP=33A SW@1u/10V_6 PC7 SW@1u/10V_6 8792VCC 13 14 [42] PG_GPUIO_EN [11,12,40] 8792_EN DGPU_VRON 8792SKIP# 12 PR190 *SW@0_4 TON DH PR185 SW@0_4 BST 8792REF 11 8792BST 8792LX 8792DL PR196 SW@1_6 EN SKIP# REFIN REF ILIM PQ44 SW@AOL1448 EC1 SW@0.1u/50V_6 PC110 SW@0.22u/25V_6 8792ILIM PR193 SPE@44.2K/F_4 Ra PC120 SW@10u/25V_1206 + + + PC19 SW@1000p/50V_4 PR18 SW@75K/F_4 B PC119 *SW@10u/25V_1206 PR31 SW@1_6 15 Rc PC20 SW@2200p/50V_4 PL6 SW@0.36uH/25A 22.5A +VGPU_CORE EP PC6 SW@0.1u/10V_4 8792DH PGOOD FB PC30 SW@0.1u/50V_6 PR22 SW@0_6 PC15 *SW@4700p/25V_4 PQ40 SW@AOL1718 PC25 *SW@330u/2V_7343 PC128 SW@330u/2V_7343 PC28 SW@330u/2V_7343 B PQ41 SW@AOL1718 Place near GND pin15 PC9 SW@1000p/50V_4 PR173 SPE@470K/F_4 PR19 SW@100K_4 Frequency(PR220=200K) PQ1 SW@DMN601K-7 PR175 SW@100K_4 REF-2V PR187 SW@100K_4 [17] GPU_VID1 8792TON VCC DL 8792REFIN 10 A20 VDD PR21 SW@200K/F_4 LX PR7 *SW@0_4 +3V_D_EXT PC121 SW@10u/25V_1206 PU3 SW@MAX8792ETD+T PR13 SW@10K_4 PC108 PR14 *SW@10K_4 PR188 *SW@0_4 A20 +3V_D_EXT +3V A21 B2-TEST C08 Rd 300K PR195 SPE@49.9K/F_4 PC106 SW@0.01u/16V_4 Rb PR172 SPE@220K/F_4 [17] GPU_VID2 PQ2 SW@DMN601K-7 C PR176 SW@100K_4 C PC107 SW@0.01u/16V_4 VIN_SRC +VGPU_CORE D13 Park -XT Madison -Pro PR5 *SW@22_8 PR3 *SW@1M_6 +VGPU_CORE GPU_VID1 (GPIO15) GPU_VID2 (GPIO20) +VGPU_CORE 0 1.05V 0 1.12V 1.0V 1.05V 0.95V 0.95V 1 0.9V 1 0.9V Ra Rb Rc Rd VREF Ra Rb Rc Rd VREF 470K 220K 44.2K 49.9K 2V 332K 130K 39.2K 49.9K 2V 8792_EN PR16 *SW@100K_4 PQ4 *SW@DTC144EU PR12 *SW@1M_6 PQ3 *DMN601K-7 GPU_VID2 (GPIO20) GPU_VID1 (GPIO15) A03 Rc > 39.2K/F_4 (CS33922FB15) D D Ra > 332K/F_4 (CS43322FB15) Rb > 130K/F_4 (CS41302FB00) Size Document Number Rev 1A GPU CORE(MAX8792) Date: Wednesday, May 27, 2009 Sheet 41 of 49 http://hobi-elektronika.net D D A28 +3VPCU 1.95A +1.8V PC197 0.1u/25V_4 A28 16 MAINON PR261 *Short_4 15 PC196 1000p/50V_4 54418-1.8_VFB COMP_PIN7 PR264 15K/F_6 HPA00835RTER VIN PH VIN PH VIN PH EN BOOT VSNS PWRGD COMP GND RT/CLK SS PL15 1uH_7X7X3/11A 11 12 13 PR262 *Short_6 PC199 0.1u/50V_6 14 R1 HWPG_1.8V PC201 *100p/50V_4 [34,38] PR168 100K/F_4 PC194 0.1u/25V_4 PR260 100K/F_4 +3V 22 21 20 19 18 17 PR263 182K/F_4 GND AGND A01 PH10_11_12 10 PC191 10u/10V_8 PC192 10u/10V_8 54418-1.8_VFB PC200 0.01u/25V_4 PC202 1200p/50V_4 R2 C PR169 78.7K/F_4 V0=0.8*(R1+R2)/R2 C PC74 *0.1u/50V_6 +3V B2-TEST B2-TEST B2-TEST PR219 SW@100K_4 PC152 SW@0.1u/50V_6 [41] PG_GPUIO_EN [34,40,43] B VEN VIN GND GND VO NC PG_1.5V_EN +1V [40,43] [34] 1.5A C12 PC68 1u/16V_6 VR2.5_ON PR114 *0_4 PC145 SW@22u/10V_1206 VPP PGOOD VEN VO VIN GND GND PR213 SW@9.1K/F_6 PC71 10u/10V_8 PC153 SW@0.1u/50V_6 PR214 SW@34K/F_6 NC HWPG_2.5V [37,43] +2.5V R1 0.2A PR108 73.2K/F_4 PC67 10u/10V_8 0.8V 1V_ADJ Vout =0.8(1+R1/R2) =1V +3V PU8 RT9025-25PSP HWPG_2.5V=VRON PR112 10K_4 +5VPCU 0_4 +3VPCU 0.8V PC155 SW@10u/10V_8 MAINON PR113 VPP PGOOD +1.5VSUS A44 PU13 SW@RT9018A ADJ DEL PR189 PR217 SW@10K_4 +5VPCU PC154 SW@0.1u/50V_6 B2-TEST ADJ [34,40,43] PU15 PAD PAD PAD PAD PAD PAD PC195 10u/10V_8 R2 PC70 0.1u/50V_6 B PR109 34K/F_6 Vout =0.8(1+R1/R2) =2.5V VGA A A Size Document Number Rev 1A Discharge (2.5V/1.8V) Date: Wednesday, May 27, 2009 Sheet 42 of 49 http://hobi-elektronika.net +3V VRON=HWPG_2.5V CPU_VDDR (0.9V) PC63 *0.1u/50V_6 VRON PR83 *0_4 PR100 0_4 HWPG_2.5V PR98 100K_4 PU7 RT9025-25PSP VPP PGOOD VEN VIN GND GND NC HWPG_0.9V CPU_VDDR PC60 0.1u/50V_6 0.75A PR96 4.02K/F_6 0.8V PC61 10u/10V_8 PR97 30.1K/F_6 PR107 22.1K/F_4 Vout =0.8(1+R1/R2) =0.9V PC62 10u/10V_8 [38] D +1.5VSUS VO ADJ [34,37] D [37,42] +5VPCU PC57 0.1u/50V_6 [11] VDDR_OPT PQ23 DMN601K-7 VIN_SRC PC72 220P/50V_4 PD4 SW1010CPT PR228 1M_6 PQ61 AO3409 C C [34,36,38,44] B2-TEST VIN_SRC +1.8V_GPU 3 S5_ON S5_ON VL PR79 SW@1M/F_6 PG_1.5V_EN C09 PR69 680/F_4 PR70 200K/F_4 LM393_PIN8 +1.8V_GPU SYS_SHDN# PC169 0.1u/50V_6 0.96A PR72 THERMISTOR_10K_6(NTC) PQ16 SW@DMN601K-7 2.469V LM393_PIN2 PR230 200K_6 VGA + [2,4,36,44] PC46 *SW@2200p/50V_4 PQ18 SW@DMN601K-7 1 PQ17 SW@DMN601K-7 PQ60 DMN601K-7 PU5A LM393 PC170 0.1u/50V_6 1 PQ15 SW@AO3404 PR81 SW@1M/F_6 PC43 *SW@1U/10V_4 PR229 *Short_6 3 +1.5V_GPU VL B2-TEST PR74 *SW@0_4 [40,42] PR76 SW@22_8 PR82 SW@1M/F_6 PQ59 DTC144EUA PR180 SW@0_4 Thermal protection +1.8V +15V PR71 200K/F_4 B B S5_ON +3V PR106 1M_6 +5V PR105 22_8 +1.5V +1.8V PR103 22_8 PR104 22_8 PQ14 DMN601K-7 VIN_SRC +15V PR102 22_8 PR101 1M_6 + - PU5B LM393 [36,40] 3 MAIND 3 MAIND MAINON_ON_G 2 PQ26 DMN601K-7 PQ27 DMN601K-7 PQ28 DMN601K-7 PC66 *2200p/50V_4 For EC control thermal protection (output 3.3V) PQ25 DMN601K-7 PQ24 DMN601K-7 PR111 *100K_6 PQ22 DTC144EUA MAINON [34,40,42] PR110 1M_6 B2-TEST A A Size Document Number Rev 1A Discharge /Thermal protection Date: Wednesday, May 27, 2009 Sheet 43 of 49 44 HOLE27 *HG-C315D110P2 HOLE1 *H-C276D110P2-8 NB_CORE HOLE15 *H-C236D142PB HOLE16 *H-C236D142PB HOLE3 *H-C276D110P2-8 For EMI HOLE22 *H-C91D91N +VGPU_CORE VIN HOLE18 *H-C236D161PB EC3 *0.1u/25V_4 HOLE9 *H-C236D157P2 HOLE10 HOLE4 *H-TC197BC122D122P2 *H-C197D122PB EC32 *0.1u/25V_4 EC18 *0.1u/25V_4 HOLE30 *hg-c236d110p2 +1.8V VIN EC52 0.1u/25V_4 +3V_S5 EC51 EC26 0.1u/25V_4 *0.1u/25V_4 EC20 *0.1u/25V_4 EC12 *0.1u/25V_4 EC31 *0.1u/25V_4 +3V_S5 EC21 *0.1u/10V_4 EC22 *0.1u/10V_4 +3V HOLE5 *H-TC197BC122D122P2 +1.1V +3V EC43 *0.1u/10V_4 1 EC6 *0.1u/10V_4 +1.5VSUS VGA +3V 3 HOLE28 *hg-c394d110p2 HOLE14 *hg-c355d110p2 1 HOLE13 *H-C236D161PB 1 HOLE19 *H-C236D161PB +5VPCU A EC11 *0.1u/25V_4 VIN_SRC HOLE25 * H-C276D110P2-8 +5VA B2-TEST 1 1 CPU HOLE2 *HG-C315D110P2 A HOLE12 *H-C236D142PB HOLE11 *H-C236D142PB http://hobi-elektronika.net HOLE17 *H-C276D110P2-8 HOLE7 *O-ZR8-10 HOLE21 *H-CT236B315D110P2 HOLE26 *H-C276D110P2-8 3 EC8 *0.1u/25V_4 B EC23 *0.1u/25V_4 EC14 *0.1u/25V_4 EC42 *0.1u/10V_4 EC7 *0.1u/25V_4 B B2-TEST HOLE23 *H-C236D161PB HOLE8 *H-C236D157P2 HOLE20 *H-C91D91N HOLE6 * H-C236D142P2 +5V +5V EC50 0.1u/10V_4 HOLE29 *H-C157D79PT +5V +5V +5V +5V +3VPCU +5V 1 1 +5V EC49 0.1u/10V_4 EC48 0.1u/10V_4 EC47 0.1u/10V_4 EC46 0.1u/10V_4 EC45 0.1u/10V_4 EC44 0.1u/10V_4 EC40 *0.1u/25V_4 EC30 *0.1u/25V_4 EC24 *0.1u/25V_4 EC28 *0.1u/25V_4 EC35 *0.1u/25V_4 EC39 *0.1u/25V_4 EC29 *0.1u/25V_4 HOLE24 *H-C157D102PT 1 +3V HOLE32 *H-C276D110P2-8 HOLE31 *H-TC236BC161D161P2 EC15 *0.1u/25V_4 EC38 *0.1u/25V_4 EC36 *0.1u/25V_4 EC34 *0.1u/25V_4 EC27 *0.1u/25V_4 EC37 *0.1u/25V_4 EC33 *0.1u/25V_4 C 1 C EC16 *0.1u/25V_4 POWER TEST +5VPCU +5VPCU PC146 *0.1u/25V_4 D PR212 *1.2K/F_4 PR210 VCC CLK GND -CLK TMSNS -OT TMGND EN PD10 *1PS302 PD9 *SW 1010CPT PR211 *22_8 +15V PC140 *0.1u/25V_4 PC141 *0.1u/25V_4 PC142 *0.1u/25V_4 D SYS_SHDN# [2,4,36,43] S5_ON_EN PR209 *0_4 S5_ON [34,36,38,43] PU12 *RT9025-25PSP *THERMISTOR_10K_6(NTC) Size Document Number Rev 1A Hole, Nuts Date: Wednesday, May 27, 2009 44 Sheet of 49 http://hobi-elektronika.net ZR8 Power tree +5VPCU AO4468 S5D> (6.15A) +5V_S5 (3A) USB/B AO4468 MAIND> +5V (3.15A) D ADAPTER D Smart Charger BATTERY +3VPCU ISL88731A RT8206B PU1 PU0001 (4.72A) BT AO3404 S5D> +3V_S5 (1.287A) LAN AO4468 VIN_SRC MAIND> +3V (3.22A) AO3413 +3V_D (3.15A) RT9025 DNI PU7005 DNI +2.5V (0.1875A) HPA00835RTER PU7004 +1.8V +1.8V_GPU DNI AO3404 (1.95A) (0.96A) C +1.5V_GPU AO3404 PG_1.5V_EN> C (2.42A) - AO1413 (18.71A) +1.5VSUS +1.5VSUS G9018A PG_1V_EN> RT9025 HWPG_2.5V> (1.5A) CPU_VDDR (0.75A) PU7003 PU9 VIN +1V PU7002 DNI RT8207A AO4468 +1.5V (7.87A) B B +0.75V_DDR_VTT (1.71A) +SMDDR_VREF (0.75V) +1.1V_S5 UP6111A (0.75A) (5.92A) PU7000 HWPG_1.8V> DNI AO4468 +1.1V (5.54A) DNI HWPG_0.9V> CPU_COREPG> - A PG_GPUIO_EN> UP6111A NB_CORE MAX8792 PU7001 +VGPU_CORE ISL62872 PU5000 +VGPU_IO +VCC_CORE HWPG_2.5V> (7.5A) PU6000 CPU_VDDNB_CORE ISL6265 PU1001 (22.5A) A (4.5A) (27A) (3.54A) Size Document Number Rev 1A Power Tree Date: Wednesday, May 27, 2009 Sheet 45 of 49 http://hobi-elektronika.net DDR3 (DDR) M_A_DQ[63:0] [3,5] M_A_A[15:0] 109 108 79 114 121 101 103 102 104 *Short_4 R1_CKE0 73 *Short_4 R1_CKE1 74 115 110 113 DIMM2_SA0 197 DIMM2_SA1 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 M_A_ODT0 M_A_ODT1 +1.5VSUS D08 [3,5] M_A_DM[7:0] R1_CKE0 R1_CKE1 [3,5] M_A_DQSP[7:0] B [3,5] M_A_DQSN[7:0] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 [3,5] D M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 15 17 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 +1.5VSUS CN16B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST [5] MEMHOT_MA# [3,5] M_A_RST# 198 30 EVENT# RESET# +0.75VSMVREF_SUSA +VREF_CA_A 126 VREF_DQ VREF_CA +3V 13 14 19 20 25 26 31 32 37 38 43 DDR3-DIMM1_H=8.0_RVS VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 PC2100 DDR3 SDRAM SO-DIMM (204P) R260 R587 [5,6,12,26,27] PCLK_SMB [5,6,12,26,27] PDAT_SMB R586 *10K_4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 M_A_BANK0 M_A_BANK1 M_A_BANK2 [3,5] M_A_BANK[0 2] [3] M_A_CS#0 [3] M_A_CS#1 [3] M_A_CLKP1 [3] M_A_CLKN1 [3] M_A_CLKP2 [3] M_A_CLKN2 [3,5] M_A_CKE0 [3,5] M_A_CKE1 A08 [3,5] M_A_CAS# [3,5] M_A_RAS# [3,5] M_A_WE# R200 10K_4 R125 10K_4 R583 *10K_4 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 PC2100 DDR3 SDRAM SO-DIMM (204P) M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 [3] [3] 17 CN16A D C VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 205 206 205 206 C +0.75V_DDR_VTT B DDR3-DIMM1_H=8.0_RVS Place these Caps near So-Dimm0 A52 2DIMM ->P/N:DGMK4000145 +1.5VSUS +VREF_CA_A C419 10u/6.3V_6 C687 10u/6.3V_6 C386 10u/6.3V_6 C403 1u/16V_4 C456 C381 10u/6.3V_6 1u/16V_4 C410 10u/6.3V_6 C395 10u/6.3V_6 C389 *.1u/16V_4 +0.75VSMVREF_SUSA C412 1u/16V_4 C393 *.1u/16V_4 C453 *.1u/16V_4 C353 C824 C823 1u/16V_4 2.2u/6.3V_6 2.2u/6.3V_6 A A +0.75V_DDR_VTT C9775 1U/6.3V_4 C9777 C258 1U/6.3V_4 10u/6.3V_6 Size Document Number Rev 1A DDR3 DIMM-1(H=9.2) Date: Wednesday, May 27, 2009 Sheet 46 of 49 ZR8 Schematic EC Tracking Record A ( For A TEST ) Nov.17 , 2009 EC / Page / Item / Description D C B A http://hobi-elektronika.net A01 Page25/27/28/31/32/36/38/44 Change footprint , due to SMT open issue highlight A02 Page32 Change T/P switch P/N, due to SMT open issue highlight A03 Page42 Modify Madison-Pro & Park-XT VID table A04 Page14 Modify board ID table and R517,R304 support Side-port function A05 Page14 Add R528 support different Side-port VRAM type A06 Page44 Support CPU 45W solution A07 Page02 Change clock gen to no stuff, due to use internal clock source A08 Page06/07/48 Change SO-DIMM SMBUS address A09 Page08/10/11 Add Side-port function A10 Page10 A11 Page10 Stuff R190 A12 Page12 Change dGPU_PWROK from GPIO1 to GPIO32 A13 Page12 Change board ID GPIO pin A14 Page13 Stuff D19,R307,C538 and no stuff D18 Change pull high power rail from +3V_D to +3V A15 Page16 Change R500 from 0ohm to 10k A16 Page12 Connect 25Mhz for GPU workaround design A17 Page18 Modify GPU Power-on sequence table A18 Page18 Remove GPU_IO VID contron pin and change GPU_CORE GPIO pin to GPIO15/20 A19 Page19 Change R107 from 680ohm to 51 ohm and modify design of MEM_RST# Also change R30 to no stuff A20 Page20/22/35/42 A21 Page18 A22 Page25 Delete brightness switch IC control and change to 0ohm solution A23 Page25 Stuff R135,R144 ,due to some CRT monitor can't display A24 Page25 Stuff C776,C787 for EMI request A25 Page25/32 Change connect footprint and P/N A26 Page29/35 Add ODD power switch design and stuff R170 A27 Page33 A28 Page37/41/44 A29 Page37 A30 Page38 Change PC179,PC180 from 22uF/25V to 100uF/25V A31 Page38 Change CPU_CORE enable from VRON to HWPG_2.5V A32 Page30 Change R538,R548 from 48ohm to 68ohm for audio performance A33 Page28 Change R572,R563 to short pad for debug use A34 Page20 Change +VGPU_IO power rail to +VGPU_CORE A35 Page25 Connect CN5 LCD connect shielding pin to GND for ESD issue A36 Page18 Change R65 to no stuff A37 Page22 Reserve OVERT# pull high resistor prevent noise A38 Page33 Add pull low 100k ohm for ODD_EJ,POWER_SAVE signal A39 Page36 Reserve cap for power team request A40 Page30 Stuff ohm resistor for ESD protect use A41 Page02/03/10/11/15/18/20/21/27/30/32/35/36 A42 Page21 Reserve ohm for PLL power use A43 Page38 Remove PR153 & change to 0402 package A44 Page44 Change PR113 from to 10K Ohm & Change enable source to +3V A45 Page38/39/40/41 Stuff PR80,PR89,PR94,PR95,PR47 to Ohm & PC47,PC51,PC64,PC65,PC36 of value to 1000p for EMI request A46 Page36 Change PC111 of value to 1U/25V A47 Page36 Change PR37 of value, from 33K to 150K A48 Page36 Change PR35 of value, from 10K to 39K A49 Page26 Change HDMI connector PN A50 Page7 Change P/N for 3-DIMM H=4.0 STD A51 Page6 Change P/N for 3-DIMM H=4.0 RVS A52 Page48 Change P/N for 3-DIMM H=8.0 RVS A53 Page36 Change battery connector P/N to DFHD08MR099 A54 Page26 Modify HDMI's I2C for DIS D Chane HDMI DDC CLK/DATA port C Reserve +3V_D_ZR8 power rail for GPU leakage issue Reserve VGA_REQ# pin Change Q29,Q30 to no stuff Remove jmuper Change PC193 P/N to low highlimit, due to ME thermal door impact B Change bead P/N for EMI request, the reason is cost down and not STD parts A Size Document Number Rev 1A A Change List - Date: Wednesday, May 27, 2009 Sheet 47 of 49 ZR8 Schematic EC Tracking Record A ( For A TEST ) Nov.17 , 2009 EC / Page / Item / Description A55 Page14 A56 Page33/35 http://hobi-elektronika.net Change board ID power rail from +3V_S5 to +3V Modify WLAN RF_LED control design A57 D A58 Page12 Remove R331 only for A11 version A59 Page12 Add U18,C533 & remove R303 for power sequence A60 Page14 Remove C760,C754,R507& Y7, due to it's for external clock use A61 Page2 Stuff R474,R486 for LAN & WLAN of REQ# A62 Page3/12 A63 Page16 D Stuff R424 and no stuff R286, due to CPU_PRPCHOT# is +1.5VSUS level Change D29 package & Add D24 Note : Change 0ohm to short pad R276,R281,R415,R443,R445,R531,R532,R533,R534,R535,R539,R566,R174,R512,R513,R263,R437,R439,R441,R99 ZR8 Schematic EC Tracking Record B1 ( For B1 TEST ) Dec.09 , 2009 EC / Page / Item / Description C C B01 Page21 Remove DP/TMDS Output Driver Analog Supply from port C&D Due to it's don't to use B02 Page25 Stuff R48 for Discrete platform use B03 Page/10/25 Modify R signal pull low resistor value to 140ohm, due to keep 70 ohm trace impedance B04 Page33 Modify WLAN LED design and change from GPIO82 to GPIO84 B05 Page27 Change LAN layout footprint for "SAW" new package B06 Page13/25 B07 Page33 Reserve CCD USB host from for Port2, due to CCD issue Reserve blue LED power source to 5V, due to White/Blue LED max Vf is more than Green/Orange LED ZR8 Schematic EC Tracking Record C ( For C TEST ) Jan.28 , 2010 EC / Page / Item / Description B A C01 Page02/34 C02 Page04 Remove "CPU_THERMTRIP#" control from SB820, due to BIOS don't support this function Add another "SYS_SHDN#" for H/W shutdown function and add HWPG shutdown design C03 Page09 Add 1uF for monitor test noise issue C04 Page12 Add 0ohm to separate VGA_REQ function, due to it's don't support the function and cause by leakage current concern C05 Page24 Modify VGA note text for R signal impedance control C06 Page24 Add brightness switch control by iGPU switch mode Due to BIOS for C test already support C07 Page29 Reserve EAPD# audio design for "Bo" sound C08 Page41 Change PG_GPUIO_EN pull high power rail from +3V to +3V_D_EXT For Park GPU SG mode hang up issue C09 Page43 Change PR69 FROM 1.2K to 680ohm , the reason is for SDA high temperature (40 degree/20% humidity) auto shutdown issue C10 Page27 Short LPC signal for debug card use C11 Page29 Change R538,R548 from 56ohm to 68ohm for audio performance test FSOV spec requirement C12 Page42 Change PR113 from 10k to 0ohm C13 Page35 Change EC54,EC55 to stuff for ISN issue C14 Page21 Modify DDR3 Memory Aperture size table C15 Page03/40 C16 Page27 C17 Page04 Modify CPU thermal control design from EC or BIOS control and change U16,R254 to no stuff ,Q17,Q18,Q19 to stuff C18 Page03 No stuff R189 B No stuff Q21,D14,R255 for thermal sensor Alert fnction and change to EC or H/W shutdown function Reserve VDDR_SENSE signal to controller IC A Change RP32 to no stuff Note : Change 0ohm to short pad R124,R121,R174,L31,L37,L35,R136,R115,R169,R325,R315,R295,R292,R278,R31,R90,R21,R112,R24,R25,R270,R530,R99,R478,R512,R513,R514,R326,R269,R268,R265,R266,R610,PR73,PR220,PR261 ,PR229 Size Rev 1A A Change List - Date: Document Number Wednesday, May 27, 2009 Sheet 48 of 49 ZR8 Schematic EC Tracking Record A ( For Ramp ) Feb.25 , 2010 EC / Page / Item / Description D C http://hobi-elektronika.net D01 Page03 D02 Page15 Change CPU VDDR_SENSE pull high power rail to CPU_VDDR and remove trace connect to controller IC Modify text note D03 Page12 Change "GBE_COL" ,"GBE_CRS" ,"GBE_RXERR" to GND follow SCL V1.04 version D04 Page14 Change USB PLL power rail source to separate VDDPL_33_USB_S follow SCL V1.04 version D05 Page04 No stuff R267,C450,C344 D06 Page09 Delete R149,R152 layout pad D07 Page36 No stuff PD12 and add PR181, change PR257 from 1k to 390k The purpose is for panasonic battery low power protect issue D08 Page05/46 D09 Page32 Change LED current sense resistor value for LED light measure requirement (Follow ZR7B) D10 Page21 Modify VRAM table D11 Page05/06 D12 Page02 Reserve prochot# for FAN control D13 Page41 No stuff PR16,PQ4,PR3,PR12,PR5,PQ3 Due to MAX8792 had integrate discharge design D14 Page37 Change some component to no stuff, dut to for S1g4 use the same VDD power don't need to compensation difference voltage D No stuff R584,R259,R583,R586 for CKE signal Change R123,R122,Q10,R202,R195,Q14 to no stuff, due to S1g4 don't support MEMHOT function Note : Change 0ohm to hort pad R203,117,R585,R588,R260,R587,PR1,PR2,PR33,PR241,PR147,PR146,PR160,PR256,PR133,PR233,PR152,PR155,PR128,PR142,PR143,PR144,PR145,PR130,PR131,PR115,PR120,PR77,PR226,PR222,PR202,PR262 C B B A A Size Document Number Rev 1A A Change List - Date: Wednesday, May 27, 2009 Sheet 49 of 49 ... BACO feature not used For BACO, refer to the databook (Separate Core power for PCIe bus macros ZR8 Connector to VDDCin non-ower-Xpress desingns PIN different between Broadway and Madison Pin... May 27, 2009 Sheet 20 of Rev 1A 49 http://hobi-elektronika.net PIN STRAPS 22 CONFIGURATION STRAPS ZR8 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING... *H-C236D142PB HOLE11 *H-C236D142PB http://hobi-elektronika.net HOLE17 *H-C276D110P2-8 HOLE7 *O -ZR8- 10 HOLE21 *H-CT236B315D110P2 HOLE26 *H-C276D110P2-8 3 EC8 *0.1u/25V_4 B EC23 *0.1u/25V_4 EC14