Multiprocessor systems on chip design space exploration by Torsten Kempf, Gerd Ascheid, Rainer Leupers

Multiprocessor Systems on Chip Torsten Kempf • Gerd Ascheid • Rainer Leupers Multiprocessor Systems on Chip Design Space Exploration ABC Torsten Kempf RWTH Aachen University Institute for Integrated Signal Processing Systems (ISS) Sommerfeldstr 24 52074 Aachen Germany torsten.kempf@iss.rwth-aachen.de Rainer Leupers RWTH Aachen University Software for Systems on Silicon Templergraben 55 52056 Aachen Germany leupers@iss.rwth-aachen.de Gerd Ascheid RWTH Aachen University Institute for Integrated Signal Processing Systems (ISS) Walter-Schottky-Haus Room 24 A 207 Sommerfeldstr 24 52074 Aachen Germany ascheid@iss.rwth-aachen.de ISBN 978-1-4419-8152-3 e-ISBN 978-1-4419-8153-0 DOI 10.1007/978-1-4419-8153-0 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011921340 c Springer Science+Business Media, LLC 2011  All rights reserved This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com) Dedicated to Meike and Flora, to my brother Tibor and to my parents Brigitte and Wolfgang Preface This book highlights the research conducted in the area of Multi-Processor Systemon-Chip design for more than five years The work documented within was carried out during my time at the Institute of Integrated Signal Processing Systems (ISS) at the RWTH Aachen University More than putting forth a brilliant idea, the conducted work reflects a careful evolution of design methodologies and associated tooling The original motivation dates back to the GRACE++ methodology This early attempt of system level modeling with SystemC targeted the efficient and convenient exploration of complex architectures, with particular focus on communication architectures The tight links to industry partners and the ongoing development turned this technology into a commercialized tool called Architects View Framework At the time I joined the ISS as a researcher, plenty of experience had been gained in modeling System-on-Chip platforms By the investigation of several industrial platforms, we soon discovered that the detailed modeling of processing elements limited the capabilities of design space exploration Accordingly, we extended the methodology to a more abstract modeling of processing elements and, furthermore, broadened it to capture the challenges of temporal and spatial task mapping With the help of many partners from different research cooperations, we have evolved the methodology and were lucky to be able to validate our approach with relevant design problems Finally, this innovative technology was brought to the market and became commercially available in 2009 All the design issues to be found in the development of MPSoC platforms cannot be mastered by a single person Therefore, I am grateful for the strong support of researchers with whom I had the pleasure to work First of all, I would like to thank my supervisor and Prof Gerd Ascheid who is the co-author of this book Apart from his valuable feedback and deep interest in my work, I enjoyed the creative working atmosphere of independent research while being guided by inspiring discussions In the same way, I would like to thank my co-examiner and co-author Prof Rainer Leupers for his support and valuable feedback As mentioned before, my work is based on the Architects View Framework developed by Tim Kogel Not only for supervising my master’s thesis, but also for the joined research projects, I would like to convey my gratitude to Tim vii viii Preface In addition, I would like to thank my former colleague and office-mate Andreas Wieferink who recruited me to the ISS when I was an undergraduate student He was always helpful in solving critical debugging issues I am grateful to all my colleagues at ISS, who supported me in my research work Among them I would like give my special thanks to Filippo Borlenghi, Jeronimo Castrillon, Anupam Chattopadhyay, Meik Dăorpinghaus, Felix Engel, Lei Gao, Niels Hadaschik, Manuel Hohenauer, David Kammler, Kingshuk Karuri, Stefan Kraemer, Hanno Scharwăachter, Stefan Schăurmans, Martin Senst, Martin Witte and Diandian Zhang When performing research in the area of EDA tools, I personally consider tight interaction with semiconductor and EDA companies as essential to address the key design issues Luckily, at ISS I had the unique opportunity to meet many helpful professionals over the years, which gave constant guidance and valuable feedback My special thanks are due to Xavier Buisson, Andreas Hoffmann, Karl Van Rompaey, Bart Vanthournout from CoWare/Synopsys, and to all the professionals we met during the roadshow of the Virtual Processing Unit (VPU) Converting my ideas into usable tools would have not been possible without the help of my postgraduate students I would like to thank all of them for their efforts and hard work Among them, I would like to give special thanks to Jens Reinecke and Stefan Wallentowitz Furthermore, I would like to thank Filippo Borlenghi, Jeronimo Castrillon, and James Wood for reviewing this book I would like to thank my parents for all the constant love and support I also thank my brother for his support and advice My very special thanks go to Meike and my daughter Flora for their support, love, and patience July 2010 Torsten Kempf Contents Introduction 1.1 Organization of the Book Systems for Wireless Communication 2.1 Applications for Mobile Devices 2.1.1 Wireless Communication Domain 2.1.2 Multimedia Applications 2.1.3 General Purpose and Other Applications 2.1.4 Application Impact on Design Methodology 2.2 Hardware Platforms and Components 2.2.1 Processing Elements 2.2.2 Communication Architectures and Memory Subsystems 2.2.3 Hardware Architecture Impact on Design Methodology 2.3 Summary 8 11 12 13 16 19 20 21 Principles of Design Space Exploration 3.1 Evaluation of a Single Design Point 3.1.1 Simulation-Based Approaches 3.1.2 Analytical Approaches 3.1.3 Joint Analytical and Simulation-Based Approaches 3.1.4 Summary of Approaches 3.2 Exploring the Design Space 3.2.1 Summary of Exploration Approaches 3.3 Requirements for Early Design Space Exploration 23 24 26 38 40 40 42 45 45 Related Work 4.1 Simulation-Based Approaches 4.2 Analytical Approaches 4.3 Joint Analytical and Simulation-Based Approaches 4.4 Summary 49 49 51 53 53 ix .. .Multiprocessor Systems on Chip Torsten Kempf • Gerd Ascheid • Rainer Leupers Multiprocessor Systems on Chip Design Space Exploration ABC Torsten Kempf RWTH Aachen University... al., Multiprocessor Systems on Chip: Design Space Exploration, c Springer Science+Business Media, LLC 2011 DOI 10.1007/978-1-4419-8153-0 1,  a Introduction b Fig 1.1 Wireless communication subscriptions... communication subscriptions (Source: Informa Telecoms & Media [1]) (a) Global Subscription Growth and Netadds (b) Regional Subscription Growth Early design space exploration methodology