Bài tập Điện tử cơ bản- SPKT STT 43 (10đ)

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Bài tập Điện tử cơ bản- SPKT STT 43 (10đ)

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Look up the parameters β, Cbc, Cbe or f_T of transistor Q1 and Q2.Static point Q1, Q2.Write equations and draw the load line DCLL and ACLL of Q2. Find maxswing of Vo2.Draw an equivalent smallsignal diagram of the circuit.AV, Zi, Zo, Ai.Draw the output waveform at the output, know that the inputwaveform in the form of sin20000t (mV).Find the lower cutoff frequency of the circuit, drawing the frequency response of the circuit at the low frequency region.Simulate the questions b, f, g. Comment on results and simulations.Know that transistor Q1 and Q2 are D468

HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION FACULTY OF ELECTRICAL AND ELECTRONICS ENGINEERING  BIG EXERCISE SUBJECT: BASIC ELECTRONICS TOPIC 43 Teacher: BUI THI TUYET DAN Student: Student ID: Ho Chi Minh City, May 12th, 2017 TOPIC 43: Give a circuit as shown, find: a Look up the parameters β, Cbc, Cbe or of transistor Q1 and Q2 b Static point Q1, Q2 c Write equations and draw the load line DCLL and ACLL of Q2 Find maxswing of Vo2 d Draw an equivalent small-signal diagram of the circuit e AV, Zi, Zo, Ai f Draw the output waveform at the output, know that the input waveform in the form of sin20000t (mV) g Find the lower cutoff frequency of the circuit, drawing the frequency response of the circuit at the low frequency region h Simulate the questions b, f, g Comment on results and simulations Know that transistor Q1 and Q2 are D468 a Look up the parameters of transistor Q1 Q2     max 120  240   180 2 Cbc= 22 pF fT= 190 Mhz b Static point Q1, Q2 Analyse DC : *Transistor Q1: IB1 = = = 0,019 (mA) →IC1 = β.IB1 = 180.0,019 = 3,42 (mA) VCE1 = VCC – IC1.(R3 + R4) =20 – 3,42.(1 +1)= 13,16 (V)  Q1 = (3,42 mA ; 13,16 V) *Transistor Q2: Rth = = Vth=.VCC = 20= 2,17 (V) IC2 =β.IB=β.== 1,39 (mA) VCE2= VCC – IC2.(R7+R8)=20 -1,39.(1+1)= 17,22 (V)  Q2 = (1,39mA ; 17,22V) c Write equations and draw the load line DCLL and ACLL of Q2 Find maxswing of * DCLL: IC2 = -.VCE2 + VCC DCLL: IC2 = -.VCE2 +10 (mA) * ACLL:  ACLL: d Draw an equivalent small-signal diagram of the circuit e AV, Zi, Zo, Ai k = 3,366 (k f Draw the output waveform at the output, know that the input waveform in the form of sin20000t (mV) Ta có: Suy : f= =3,184 kHz Dạng sóng = 18,7sin20000t (mV) => Output signal in phase with input signal and amplitude: vmaxp=18,7 (mV) f Find the lower cutoff frequency of the circuit, drawing the frequency Vi(mV) response of the circuit at the low frequency region - = t(us) Với:-1= =20,86 Ω Vo(mV) - Total gain: 18,7 (dB) t(us) -18,7 18,7 13,22 1,623 f (kHz) g Simulate the questions b, f, g Comment on results and simulations Simulation results b From simulation data, we have a static workpoint Q1(3,453mA; 13,076V) and Q2(1,32mA; 17,353V) Comment the simulation results On the 1st floor Simulation results Simulation results Absolute error Absolute error On the 2st floor Simulation results Simulation results Absolute error Absolute error Simulation results f Output waveform Vo=16,078 mV Conment: The output waveform is similar to the calculated result Simulation results g Comment: Absolute error Summary: There is a difference between the results of the simulation and the results of calculations due to the operating conditions of the transistor as temperature, is the cause of the error between the results of calculation and simulation However, the insignificant error should be acceptable ... the questions b, f, g Comment on results and simulations Simulation results b From simulation data, we have a static workpoint Q1(3,453mA; 13,076V) and Q2(1,32mA; 17,353V) Comment the simulation... error Simulation results f Output waveform Vo=16,078 mV Conment: The output waveform is similar to the calculated result Simulation results g Comment: Absolute error Summary: There is a difference... results of the simulation and the results of calculations due to the operating conditions of the transistor as temperature, is the cause of the error between the results of calculation and simulation

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