kiến trúc máy tính phạm minh cường chương ter2 part1 instructions language of the computer [sinhvienzone.com]

Si nh Vi en Z on e co m Computer Architecture Chapter 2: MIPS Dr Phạm Quốc Cường Adapted from Computer Organization the Hardware/Software Interface – 5th Computer Engineering – CSE – HCMUT SinhVienZone.com https://fb.com/sinhvienzonevn Vi en Z on e co Language: a system of communication consisting of sounds, words, and grammar, or the system of communication used by people in a particular country or type of work (Oxford Dictionary) Si nh • m Introduction http://media.apnarm.net.au/img/media/images/2013/08/14/computer_language_t620.jpg SinhVienZone.com https://fb.com/sinhvienzonevn m Introduction (cont.) Si nh Vi en Z on e co • To command a computer’s hardware: speak its language http://media.apnarm.net.au/img/media/images/2013/08/14/computer_language_t620.jpg SinhVienZone.com https://fb.com/sinhvienzonevn Si nh Vi en Z on e co m Instruction Set Architecture (ISA) SinhVienZone.com https://fb.com/sinhvienzonevn e co Vi en Z Arithmetic Data transfer Logical Conditional branch Unconditional jump Si nh – – – – – on • Stored-program concept • Instruction category: m Von Neumann Architecture SinhVienZone.com https://fb.com/sinhvienzonevn Si nh Vi en Z on e co m Computer Components SinhVienZone.com https://fb.com/sinhvienzonevn en Z on e co m Instruction Execution Vi • Instruction fetch: from the memory Si nh – PC increased – PC stores the next instruction • Execution: decode and execute SinhVienZone.com https://fb.com/sinhvienzonevn m The MIPS Instruction Set en Z on e co • MIPS architecture • MIPS Assembly Inst  MIPS Machine Instr • Assembly: Si nh • Machine: Vi – add $t0, $s2, $t0 – 000000_10010_01000_01000_00000_100000 • Only one operation is performed per MIPS instruction SinhVienZone.com https://fb.com/sinhvienzonevn Vi en Z on e co Simplicity favors regularity Smaller is faster Make the common case fast Good design demands good compromises Si nh • • • • m IS Design Principles SinhVienZone.com https://fb.com/sinhvienzonevn m MIPS Operands Vi en Z on $s0-$s7: corresponding to variables $t0-$t9: storing temporary value $a0-$a3 $v0-$v1 $gp, $fp, $sp, $ra, $at, $zero, $k0$k1 Si nh – – – – – e co • 32 32-bit registers • 230 memory words (4 byte): accessed only by data transfer instructions (memory operand) • Immediate 10 SinhVienZone.com https://fb.com/sinhvienzonevn m Arithmetic Instructions: Example Si nh Vi en Z on e co • Q: what is MIPS code for the following C code f = (g + h) – (i + j); If the variables g, h, i, j, and f are assigned to the register $s0, $s1, $s2, $s3, and $s4, respectively • A: add $t0, $s0, $s1 # g + h add $t1, $s2, $s3 # i + j sub $s4, $t0, $t1 # t0 – t1 13 SinhVienZone.com https://fb.com/sinhvienzonevn Vi en Z on – Register – Address: a value used to delineate the location of a specific data element within a memory array e co • Move data b/w memory and registers m Data Transfer Instructions Si nh • Load: copy data from memory to a register • Store: copy data from a register to memory 14 SinhVienZone.com https://fb.com/sinhvienzonevn Register Memory address on Opcode e co m Data Transfer Instructions (cont.) en Z • Memory address: offset(base register) Si nh Vi – Byte address: each address identifies an 8-bit byte – “words” are aligned in memory (address must be multiple of 4) 15 SinhVienZone.com https://fb.com/sinhvienzonevn m Data Transfer Instructions (cont.) Vi en Z on lw: load word sw: store word lh: load half ($s1 = {16{M[$s2+imm][15]},M[$s2 + imm]}) lhu: load half unsigned ($s1 = {16’b0,M[$s2 + imm]}) sh: store half lb: load byte lbu: load byte unsigned sb: store byte ll: load linked word sc: store conditional lui: load upper immediate $s1 = {imm,16’b0} Si nh – – – – – – – – – – – e co • Opcode: 16 SinhVienZone.com https://fb.com/sinhvienzonevn m Memory Operands e co • Main memory used for composite data – Arrays, structures, dynamic data on • To apply arithmetic operations en Z – Load values from memory into registers – Store result from register to memory • MIPS is Big Endian Si nh Vi – Most-significant byte at least address of a word – c.f Little Endian: least-significant byte at least address 17 SinhVienZone.com https://fb.com/sinhvienzonevn m Memory Operand Example e co • C code: en Z on g = h + A[8]; – g in $s1, h in $s2, base address of A in $s3 • Compiled MIPS code: Vi – Index requires offset of 32 Si nh • bytes per word lw $t0, 32($s3) add $s1, $s2, $t0 # load word 18 SinhVienZone.com https://fb.com/sinhvienzonevn m Memory Operand Example e co • C code: en Z on A[12] = h + A[8]; – h in $s2, base address of A in $s3 • Compiled MIPS code: Si nh Vi – Index requires offset of 32 lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word 19 SinhVienZone.com https://fb.com/sinhvienzonevn m Registers vs Memory on e co • Registers are faster to access than memory • Operating on memory data requires loads and stores en Z – More instructions to be executed Si nh Vi • Compiler must use registers for variables as much as possible – Only spill to memory for less frequently used variables – Register optimization is important! 20 SinhVienZone.com https://fb.com/sinhvienzonevn m Immediate Operands addi $s3, $s3, e co • Constant data specified in an instruction on • No subtract immediate instruction en Z – Just use a negative constant addi $s2, $s1, -1 Si nh Vi • Design Principle 3: Make the common case fast – Small constants are common – Immediate operand avoids a load instruction 21 SinhVienZone.com https://fb.com/sinhvienzonevn m The Constant Zero on – Cannot be overwritten e co • MIPS register ($zero) is the constant en Z • Useful for common operations Si nh Vi – E.g., move between registers add $t2, $s1, $zero 22 SinhVienZone.com https://fb.com/sinhvienzonevn e co • Given an n-bit number m Unsigned Binary Integers en Z • Range: to +2n – • Example on x  x n1 2n1  x n2 2n2    x121  x 20 Si nh Vi – 0000 0000 0000 0000 0000 0000 0000 10112 = + … + 1×23 + 0×22 +1×21 +1×20 = + … + + + + = 1110 • Using 32 bits – to +4,294,967,295 23 SinhVienZone.com https://fb.com/sinhvienzonevn e co • Given an n-bit number m 2s-Complement Signed Integers on x   x n1 2n1  x n2 2n2    x1 21  x 20 Range: –2n – to +2n – – • Example en Z  Si nh Vi – 1111 1111 1111 1111 1111 1111 1111 11002 = –1×231 + 1×230 + … + 1×22 +0×21 +0ì20 = 2,147,483,648 + 2,147,483,644 = 410 ã Using 32 bits – –2,147,483,648 to +2,147,483,647 24 SinhVienZone.com https://fb.com/sinhvienzonevn • Bit 31 is sign bit – for negative numbers – for non-negative numbers e co m 2s-Complement Signed Integers 0: 0000 0000 … 0000 –1: 1111 1111 … 1111 Most-negative: 1000 0000 … 0000 Most-positive: 0111 1111 … 1111 Si nh – – – – Vi en Z on • –(–2n – 1) can’t be represented • Non-negative numbers have the same unsigned and 2s-complement representation • Some specific numbers 25 SinhVienZone.com https://fb.com/sinhvienzonevn ...Vi en Z on e co Language: a system of communication consisting of sounds, words, and grammar, or the system of communication used by people in a particular country or type of work (Oxford Dictionary)... http://media.apnarm.net.au/img/media/images/2013/08/14 /computer _language_ t620.jpg SinhVienZone.com https://fb.com/sinhvienzonevn m Introduction (cont.) Si nh Vi en Z on e co • To command a computer? ??s hardware: speak its language http://media.apnarm.net.au/img/media/images/2013/08/14 /computer _language_ t620.jpg... m Arithmetic Instructions: Example Si nh Vi en Z on e co • Q: what is MIPS code for the following C code f = (g + h) – (i + j); If the variables g, h, i, j, and f are assigned to the register