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Lecture Introduction to computing systems (2/e): Chapter 10 - Yale N. Patt, Sanjay J. Patel

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Chapter 10 - And, finally...the stack. In this chapter, the following content will be discussed: The stack: its basic structure, interrupt-driven I/O, arithmetic using a stack, data type conversion, our final example: the calculator.

Chapter 10 And, Finally Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display A Final Collection of ISA-related Topics Stacks • Important low-level data structure ASCII-Decimal Conversion • Converting between human-friendly and computer-friendly representations Interrupt-Driven I/O • Efficient, device-controlled interactions 10­2 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Stacks A LIFO (last-in first-out) storage structure • The first thing you put in is the last thing you take out • The last thing you put in is the first thing you take out This means of access is what defines a stack, not the specific implementation Two main operations: PUSH: add an item to the stack POP: remove an item from the stack 10­3 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display A Physical Stack Coin rest in the arm of an automobile Initial State 1995 1996 1998 1982 1995 1998 1982 1995 After One Push After Three More Pushes After One Pop First quarter out is the last quarter in 10­4 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display A Hardware Implementation Data items move between registers Empty: Yes ////// ////// ////// ////// ////// Initial State Empty: TOP No #18 ////// ////// ////// ////// After One Push Empty: TOP No #12 #5 #31 #18 ////// After Three More Pushes Empty: TOP No #31 #18 ////// ////// ////// After Two Pops 10­5 TOP Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display A Software Implementation Data items don't move in memory, just our idea about there the TOP of the stack is TOP ////// ////// ////// ////// ////// x3FFF Initial State #18 ////// ////// ////// ////// R6 x4000 After One Push TOP R6 #18 #31 #5 #12 ////// x4003 #18 #31 #5 #12 ////// TOP x4001 R6 After Three More Pushes After Two Pops By convention, R6 holds the Top of Stack (TOS) pointer 10­6 TOP R6 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Basic Push and Pop Code Push ADD STR R6, R6, #1 R0, R6, #0 ; increment stack ptr ; store data (R0) LDR ADD R0, R6, #0 ; load data from TOS R6, R6, #-1 ; decrement stack ptr Pop 10­7 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Pop with Underflow Detection If we try to pop too many items off the stack, an underflow condition occurs • Check for underflow by checking TOS before removing data • Return status code in R5 (0 for success, for underflow) POP LD R1, EMPTY ; ADD R2, R6, R1 ; BRz FAIL ; LDR R0, R6, #0 ADD R6, R6, #-1 AND R5, R5, #0 ; RET FAIL AND R5, R5, #0 ; ADD R5, R5, #1 RET EMPTY FILL xC001 EMPTY = -x3FFF Compare stack pointer with x3FFF SUCCESS: R5 = FAIL: R5 = 10­8 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Push with Overflow Detection If we try to push too many items onto the stack, an overflow condition occurs • Check for underflow by checking TOS before adding data • Return status code in R5 (0 for success, for overflow) PUSH FAIL MAX LD R1, MAX ADD R2, R6, BRz FAIL ADD R6, R6, STR R0, R6, AND R5, R5, RET AND R5, R5, ADD R5, R5, RET FILL xBFFC ; MAX = -x4004 R1 ; Compare stack pointer ; with x3FFF #1 #0 #0 ; SUCCESS: R5 = #0 ; FAIL: R5 = #1 10­9 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Arithmetic Using a Stack Instead of registers, some ISA's use a stack for source and destination operations: a zero-address machine • Example: ADD instruction pops two numbers from the stack, adds them, and pushes the result to the stack Evaluating (A+B)·(C+D) using a stack: (1) push A (2) push B (3) ADD (4) push C (5) push D (6) ADD (7) MULTIPLY (8) pop result 10­10 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Binary to ASCII Conversion Converting a 2's complement binary value to a three-digit decimal number • Resulting characters can be output using OUT Instead of multiplying, we need to divide by 100 to get hundreds digit • Why wouldn't we use a lookup table for this problem? • Subtract 100 repeatedly from number to divide First, check whether number is negative • Write sign character (+ or -) to buffer and make positive 10­18 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Binary to ASCII Conversion Code (part of 3) ; R0 is between -999 and +999 ; Put sign character in ASCIIBUF, followed by three ; ASCII digit characters BinaryToASCII LEA R1, ASCIIBUF ; pt to result string ADD R0, R0, #0 ; test sign of value BRn NegSign LD R2, ASCIIplus ; store '+' STR R2, R1, #0 BR Begin100 NegSign LD R2, ASCIIneg ; store '-' STR R2, R1, #0 NOT R0, R0 ; convert value to pos ADD R0, R0, #1 10­19 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Conversion (2 of 3) Begin100 Loop100 End100 LD LD ADD BRn ADD BR STR LD ADD R2, ASCIIoffset R3, Neg100 R0, R0, R3 End100 R2, R2, #1 ; add one to digit Loop100 R2, R1, #1 ; store ASCII 100's digit R3, Pos100 R0, R0, R3 ; restore last subtract LD LD ADD BRn ADD BR R2, ASCIIoffset R3, Neg10 R0, R0, R3 End10 R2, R2, #1 ; add one to digit Loop10 ; Loop100 10­20 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Conversion Code (3 of 3) End10 STR R2, R1, #2 ; store ASCII 10's digit ADD R0, R0, #10 ; restore last subtract ; LD R2, ASCIIoffset ADD R2, R2, R0 ; convert one's digit STR R2, R1, #3 ; store one's digit RET ; ASCIIplus ASCIIneg ASCIIoffset Neg100 Pos100 Neg10 FILL FILL FILL FILL FILL FILL x2B x2D x30 xFF9C 100 xFFF6 ; ; ; ; plus sign neg sign zero -100 ; -10 10­21 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Interrupt-Driven I/O Timing of I/O controlled by device • tells the processor when something interesting happens  Example: when character is entered on keyboard  Example: when monitor is ready for next character • processor interrupts its normal instruction processing and executes a service routine (like a TRAP)  figure out what device is causing the interrupt  execute routine to deal with event  resume execution • no need for processor to poll device, waiting for events  can perform other useful work Interrupt is an unscripted subroutine call, triggered by an external event 10­22 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display When to Use Interrupts When timing of external event is uncertain • Example: incoming packet from network When device operation takes a long time • Example: start a disk transfer, disk interrupts when transfer is finished • processor can something else in the meantime When event is rare but critical • Example: building on fire save and shut down! 10­23 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display How is Interrupt Signaled? External interrupt signal: INT • device sets INT=1 when it wants to cause an interrupt Interrupt vector • 8-bit signal for device to identify itself (may be different for other processors) • also used as entry into system control block, which gives starting address of Interrupt Service Routine (ISR)  like TRAP INT CPU Controller Device vector What if more than one device wants to interrupt? • external logic controls which one gets to drive signals 10­24 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display How does Processor Handle It? Look at INT signal just before entering FETCH phase • If INT=1, don’t fetch next instruction • Instead:  save state (PC and condition codes) on stack  use vector to fetch ISR starting address; put in PC After service routine, RTI instruction restores condition codes and old PC • need a different return instruction, because RET gets PC from R7, no condition codes Processor only checks between STORE and FETCH phases why? 10­25 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display More Control At the device • control register has “Interrupt Enable” bit • must be set for interrupt to be generated interrupt enable ready KBSR interrupt signal to processor At the processor • sometimes have “Interrupt Mask” register (LC-2 does not) • when set, processor ignores INT signal • why?  Example: don’t want to interrupt while in ISR 10­26 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (1) Program A ////// ////// ////// ////// ////// R6 PC x3006 ADD x3006 Executing ADD at location x3006 when Device B interrupts 10­27 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (2) Program A ////// x3007 R6 CC for ADD ////// ////// PC ISR for Device B x6200 x3006 ADD x6210 RTI x6200 Push PC and condition codes onto stack, then transfer to Device B service routine (at x6200) 10­28 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (3) Program A ////// x3007 R6 CC for ADD ////// ////// PC ISR for Device B x6200 x3006 ADD x6202 AND x6210 RTI x6203 Executing AND at x6202 when Device C interrupts 10­29 Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (4) Program A ////// x3007 CC for ADD x6203 R6 CC for AND PC ISR for Device B x6200 x3006 ADD x6202 AND ISR for Device C x6210 RTI x6300 x6300 x6315 Push PC and condition codes onto stack, then transfer to Device C service routine (at x6300) 10­30 RTI Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (5) Program A ////// x3007 R6 CC for ADD x6203 CC for AND PC ISR for Device B x6200 x3006 ADD x6202 AND ISR for Device C x6210 RTI x6300 x6203 x6315 Execute RTI at x6315; pop CC and PC from stack 10­31 RTI Copyright © The McGraw-Hill Companies, Inc Permission required for reproduction or display Example (6) Program A ////// x3007 R6 CC for ADD x6203 CC for AND PC ISR for Device B x6200 x3006 ADD x6202 AND ISR for Device C x6210 RTI x6300 x3007 x6315 Execute RTI at x6210; pop CC and PC from stack Continue Program A as if nothing happened 10­32 RTI ... 3) Begin100 Loop100 End100 LD LD ADD BRn ADD BR STR LD ADD R2, ASCIIoffset R3, Neg100 R0, R0, R3 End100 R2, R2, #1 ; add one to digit Loop100 R2, R1, #1 ; store ASCII 100 's digit R3, Pos100 R0,... ASCIIneg ASCIIoffset Neg100 Pos100 Neg10 FILL FILL FILL FILL FILL FILL x2B x2D x30 xFF9C 100 xFFF6 ; ; ; ; plus sign neg sign zero -1 00 ; -1 0 10­21 Copyright © The McGraw-Hill Companies, Inc Permission... R0, R0, R3 ; restore last subtract LD LD ADD BRn ADD BR R2, ASCIIoffset R3, Neg10 R0, R0, R3 End10 R2, R2, #1 ; add one to digit Loop10 ; Loop100 10 20 Copyright © The McGraw-Hill Companies,

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