ĐIỆN tử VIỄN THÔNG 22functions v9 khotailieu

Functions and Procedures Objectives After completing this module, you will be able to: • • • Declare a subprogram within a package, architecture, or process Write functions and procedures Call a subprogram within an architecture or process Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Outline • • • • • • • Functions and Procedures - 22 - Using Subprograms Procedures Parameter Classes Range Attributes Functions Testbench and Common Usage Summary © 2007 Xilinx, Inc All Rights Reserved Using Subprograms • • Most large designs use common functional blocks repeatedly In both behavioral and RTL VHDL code, commonly used functions can be defined within a subprogram – – – • The subprogram can then be called as necessary throughout the design Provides flexibility and modularity to the code Reduces the volume of coding necessary in a large design VHDL offers two types of subprograms: functions and procedures Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Functions versus Procedures • • Functions and procedures differ in their usage and capabilities Functions are used as an operator in an expression – – • Their parameters (arguments) can only be inputs (not outputs or inouts) They must return a single result Procedures can be used as a sequential or concurrent statement – – Their arguments can be inputs, outputs, or inouts They contain sequential statements that produce an effect Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Outline • • • • • • • Functions and Procedures - 22 - Using Subprograms Procedures Parameter Classes Range Attributes Functions Testbench and Common Usage Summary © 2007 Xilinx, Inc All Rights Reserved Procedure Structure • • A procedure can be declared with or without arguments If arguments are listed, they allow greater utilization throughout the design Identifier Keyword Local Declarations • procedure PROC1 is variable VAR1 ; begin (sequential statements .) end procedure PROC1 ; A procedure that has no parameters can be called simply by using its identifier, such as PROC1 ; Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Procedure Parameters • Procedure arguments are similar to port declarations—they can be inputs, outputs, or bidirectional – – – Mode in can be read, but not changed; treated as constant Mode out cannot be read, only assigned to; copied back to caller Mode inout can be read and assigned to; copied back to caller procedure PROC2 ( IN1: in ; OUT1: out ; BI_DIR1: inout ) is variable VAR2 ; begin Formal (sequential statements .) Parameters end procedure PROC2 ; • There are similar restrictions in terms of their usage within the procedure Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Passing Parameters • If a procedure has arguments, it is called using its identifier and the actual parameters, which then map to the formal parameters That is, PROC2 ( D_IN, D_OUT, D_IO ); procedure PROC2 ( IN1: in ; OUT1: out ; BI_DIR1: inout ) is variable VAR2 ; begin (sequential statements .) end procedure PROC2 ; Functions and Procedures - 22 - © 2007 Xilinx, Inc All Rights Reserved Associating Parameters • As with the port map declaration, the call expression can explicitly bind the formal and actual parameters via “named” association That is, PROC2 ( IN1 => D_IN, OUT1 => D_OUT, BI_DIR1 => D_IO ); Formal  Actual procedure PROC2 ( IN1: in ; OUT1: out ; BI_DIR1: inout ) is variable VAR2 ; begin (sequential statements .) end procedure PROC2 ; Functions and Procedures - 22 - 10 © 2007 Xilinx, Inc All Rights Reserved Function Structure • • Function parameters are inputs only and the return type must be specified The function is an operand in a given expression Identifier Keyword Return Specification function FUNC1 ( parameters ) return is begin (sequential statements .) end function FUNC1 ; Functions and Procedures - 22 - 27 © 2007 Xilinx, Inc All Rights Reserved Function Example • This function is declared within the architecture and is used to calculate the parity for a given bit_vector architecture RTL of Mod1 is function PAR_GEN ( BV: in bit_vector ) return bit is variable PAR : bit := ‘0’; begin - - function for I in BV’range loop PAR := PAR xor BV (I) ; end loop ; return PAR ; end function PAR_GEN ; begin - - architecture DATA_FRAME "00011111" , => "00111111" , => "01111111" , => "11111110" ); procedure BIT_SHIFT ( IN_VEC : in BIT_ARRAY ; signal OUT_VEC : out BIT_ARRAY ) is begin for i in IN_VEC'range loop OUT_VEC(i)