Wiley wireless LAN radios system definition to transistor design dec 2007 ISBN 0471709646 pdf

Wireless LAN Radios System Definition to Transistor Design Arya Behzad John B Anderson, Series Editor IEEE Press Series on Microelectronic Systems Stuart K Tewksbury and Joe E Brewer, Series Editors IEEE Solid-State Circuits Society, Sponsor IEEE PRESS WILEY-INTERSCIENCE A JOHN WILEY & SONS, INC., PUBLICATION Wireless LAN Radios IEEE Press Series on Digital & Mobile Communication The IEEE Press Digital and Mobile Communication Series is written for research and development engineers and graduate students in communication engineering The burgeoning wireless and personal communication fields receive special emphasis Books are of two types, graduate texts and the latest monographs about theory and practice John B Anderson, Series Editor Ericsson Professor of Digital Communication Lund University, Sweden Advisory Board John B Anderson Dept of Information Technology Lund University, Sweden Joachim Hagenauer Dept of Communications Engineering Technical University Munich, Germany Rolf Johannesson Dept of Information Technology Lund University, Sweden Norman Beaulieu Dept of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada Books in the IEEE Press Series on Digital & Mobile Communication John B Anderson, Digital Transmission Engineering, Second Edition Rolf Johannesson and Kamil Sh Zigangirov, Fundamentals of Convolutional Coding Raj Pandya, Mobile and Personal Communication Systems and Services Lajos Hanzo, P J Cherriman, and J Streit, Video Compression & Communications over Wireless Channels: Second to Third Generation Systems and Beyond Lajos Hanzo, F Clare, A Somerville and Jason P Woodard, Voice Compression and Communications: Principles and Applications for Fixed and Wireless Channels Mansoor Shafi, Shigeaki Ogose and Takeshi Hattori (Editors), Wireless Communications in the 21st Century Raj Pandya, Introduction to WLLs: Application and Development for Fixed or Broadband Services Christian Schlegel and Lance Perez, Trellis and Turbo Coding Kamil Zigangirov, Theory of Code Divison Multiple Access Communication Arya Behzad, Wireless LAN Radios: System Definition to Transistor Design Wireless LAN Radios System Definition to Transistor Design Arya Behzad John B Anderson, Series Editor IEEE Press Series on Microelectronic Systems Stuart K Tewksbury and Joe E Brewer, Series Editors IEEE Solid-State Circuits Society, Sponsor IEEE PRESS WILEY-INTERSCIENCE A JOHN WILEY & SONS, INC., PUBLICATION IEEE Press 445 Hoes Lane Piscataway, NJ 08854 IEEE Press Editorial Board Mohamed E El-Hawary, Editor in Chief R Abari S Basu A Chatterjee T Chen T G Croda S Farshchi B M Hammerli R J Herrick S V Kartalopoulos M S Newman Kenneth Moore, Director of IEEE Book and Information Services (BIS) Catherine Faduska, Senior Acquisitions Editor Jeanne Audino, Project Editor IEEE Solid-State Circuits Society, Sponsor IEEE SSCS-Liaison to IEEE Press, Stuart K Tewksbury Copyright © 2008 by the Institute of Electrical and Electronics Engineers, Inc Published by John Wiley & Sons, Inc., Hoboken, New Jersey All rights reserved Published simultaneously in Canada No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning, or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 750-4470, or on the web at www.copyright.com Requests to the Publisher for permission should be addressed to the Permissions Department, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ 07030, (201) 748-6011, fax (201) 748-6008, or online at http://www.wiley.com/go/permission Limit of Liability/Disclaimer of Warranty: While the publisher and author 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content that appears in print may not be available in electronic format For information about Wiley products, visit our web site at www.wiley.com Wiley Bicentennial Logo: Richard J Pacifico Library of Congress Cataloging-in-Publication Data is available ISBN 978-0471-70964-0 Printed in the United States of America 10 Contents Preface Acronyms ix xi CHAPTER 802.11 Flavors and System Requirements 1.1 Definition 1.2 WLAN Market Trends 1.3 History of 802.11 1.4 802.11: b, a, or g? 1.5 802.11b Standard 1.6 802.11a Channel Allocation 1.7 802.11a and 802.11g: OFDM Mapping 1.7.1 Multipath Fading 1.8 802.11a/g: Data Rates 1.9 802.11a/g OFDM Packet Construction 1.10 802.11 System Requirements 1.10.1 Receiver Sensitivity 1.10.2 Transmitter Error Vector Magnitude 1.10.3 Transmitter Spectral Mask 1.11 Vector Signal Analysis 1 10 13 14 14 21 24 24 24 26 28 33 CHAPTER Radio Receiver and Transmitter Architectures 2.1 Architectures 2.1.1 Superheterodyne Receiver 2.1.1.1 Choice of Intermediate Frequency in Superheterodyne Receiver 2.1.2 Low IF Receiver 2.1.3 Direct-Conversion Receiver 2.1.4 Receiver Architectures: Summary 2.1.5 Superheterodyne Transmitter 43 43 44 47 51 55 59 60 v vi 2.2 CONTENTS 2.1.6 Low IF Transmitter 2.1.7 Direct-Conversion Transmitter 2.1.8 Polar Modulators Process Choices: CMOS versus SiGe BiCMOS 64 64 66 67 CHAPTER Analog Impairments and Issues 3.1 Receiver Sensitivity and Noise Figure 3.2 Receiver DC Offsets and LO Leakage 3.3 Receiver Flicker Noise 3.4 Receiver Interferers and Intermodulation Distortion 3.4.1 IP3, IP2, and P1dB 3.4.2 Tools for Analyzing Modulated Signal Distortion 3.5 Receiver Image Rejection 3.5.1 Superheterodyne Receiver 3.5.2 Low IF Architecture 3.5.3 Direct-Conversion Receiver 3.6 Quadrature Balance and Relation to Image Rejection 3.7 Quadrature Balance and Relation to EVM 3.8 Other Transmitter (Modulator) Impairments 3.9 Peak-to-Average Ratio and Relation to Linearity and Efficiency 3.10 Local Oscillator Pulling in PLL 3.11 Phase Noise in PLL 3.12 Far-Out Phase Noise 3.13 Effect of Phase Noise on OFDM Systems 3.14 Effect of Frequency Errors on OFDM 3.15 Summary of Analog/RF Impairments 73 73 75 79 83 83 96 102 102 104 106 107 109 116 121 CHAPTER Some Key Radio Building Blocks 4.1 Low Noise Amplifier 4.2 Mixer and its Local Oscillator Buffers 4.3 Power Amplifier 4.4 Fully Integrated VCO 4.5 Multifrequency (Stacked) Mixer 4.6 Open-Loop Transconductance Linearization Circuit 137 137 142 148 153 157 158 CHAPTER Calibration Techniques 5.1 VCO Calibration 5.2 Automatic Frequency Control 5.3 Quadrature Error and Local Oscillator Feedthrough Calibration 5.4 Bias Current Calibrations (R Calibration) 161 163 165 172 124 126 130 131 132 135 175 CONTENTS 5.5 5.6 Filter Time-Constant Calibration (RC Calibration) Other Calibrations vii 176 177 CHAPTER Case Studies 6.1 Case Study 1: A CMOS 802.11a Transceiver 6.1.1 Architecture and Circuit Implementation 6.1.2 Receiver 6.1.3 Transmitter 6.1.4 Phase-Locked Loop 6.2 Case Study 2: High Performance WLAN Transmitter Utilizing Quadrature and LOFT Calibration 179 179 179 181 183 186 189 CHAPTER 197 7.1 7.2 197 202 203 203 205 207 209 211 211 216 217 7.3 Brief Discussion Of 802.11n and Concluding Remarks Need for 802.11n 802.11a/b/g/n MIMO Transceiver 7.2.1 Architecture and Circuit Implementation 7.2.1.1 Receiver 7.2.1.2 Transmitter 7.2.1.3 PLL and LO Generation 7.2.1.4 Calibration Techniques 7.2.2 Packaging Issues 7.2.3 Measurement Results 7.2.4 MIMO Case Study Conclusion Concluding Remarks References 221 Annotated Bibliography 223 Index 233 About the Author 241 ANNOTATED BIBLIOGRAPHY 227 26 M Steyaert et al., “A 2V CMOS Cellular Transceiver Front-End,” IEEE Journal of Solid-State Circuits, Dec 2000, pp 1895–1907 This work presents the design and implementation of a 2-V cellular transceiver front end in a standard 0.25-μm CMOS technology The prototype integrates a low IF receiver (low noise amplifier, I/Q mixers, and VGAs) and a direct up-conversion transmitter (I/Q mixers and preamplifier) on a single die together with a complete phase-locked loop, including a 64/79 prescaler, a fully integrated loop filter, and a quadrature VCO with onchip inductors Design trade-offs have been made over the boundaries of the different building blocks to optimize the overall system performance All building blocks feature circuit topologies that enable comfortable operation at low voltage As a result, the IC operates from a power supply of only V, while consuming 191 mW in receiver (RX) mode and 160 mW in transmitter (TX) mode To build a complete transceiver system for 1,8-GHz cellular communication, only an antenna, an antenna filter, a power amplifier, and a digital baseband chip must be added to the analog front end This work shows the potential of achieving the analog performance required for the class I/II DCS-1800 cellular system in a standard 0.25-μm CMOS technology without tuning or trimming 27 J Fenk, “Highly Integrated RF ICs for GSM and DECT Systems—A Status Review,” JSSC, Dec 1997 TDMA-based digital systems like GSM for cellular and DECT for cordless application have created an increasing market within Europe and gained widespread acceptance also outside Europe This paper gives an overview of both systems The system requirements and their influences on highly integrated RF ICs for GSM and DECT are discussed in detail The various trends of progresses in integration of both systems will be shown, with the different advantages and the disadvantages of the concepts in use The challenges of increasing the level of integration and an outlook to the future will be presented 28 J Strange et al., “A Direct Conversion Transceiver for Multi-Band GSM Application,” paper presented at the IEEE RFIC Symposium, Boston, 2000 The use of direct-conversion receiver topologies has been marked by many technical problems, particularly when used in a TDMA environment This paper describes a receiver architecture that overcomes many of the traditional problems associated with direct conversion This architecture has been applied in the design of a GSM multiband transceiver that also features a development of the offset PLL transmitter together with a fast-locking fractional-N synthesizer 29 A Behzad et al., “A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for IEEE 802.11a Wireless LAN Standard,” JSSC, Dec 2003 A fully integrated CMOS direct-conversion 5-GHz transceiver with automatic frequency control is implemented in a 0.18-␮m digital CMOS process and housed in an LPCC-48 package This chip, along with a companion baseband chip, provides a complete 802.11a solution The transceiver consumes 150 mW in receive mode and 380 mW in transmit mode while transmitting +15-dBm output power The receiver achieves a sensitivity of better than –93.7 and –73.9 dBm for and 54 Mb/s, respectively (even using hard-decision decoding) The transceiver achieves a 4-dB receive noise figure and a +23-dBm transmitter saturated output power The transmitter also achieves a transmit error vector magnitude of –33 dB The IC occupies a total die area of 11.7 mm2 and is packaged in a 48-pin LPCC package The chip passes better than ±2.5 kV ESD performance Various integrated self-contained or system level calibration capabilities allow for high performance and high yield 228 ANNOTATED BIBLIOGRAPHY 30 D H Morais and K Feher, “The Effects of Filtering and Limiting on the Performance of QPSK, Offset QPSK, and MSK Signals,” IEEE Transactions on Communications, vol 28, pp 1999–2006, Dec 1980 The effects on spectral densities, symbol wave shapes, and Pe versus S/N performances, resulting from the addition of filtering followed by hard limiting on raised cosine filtered QPSK, offset QPSK, and MSK point-to-point radio systems, are studied A mathematical model and physical insight are presented into the crosstalk phenomenon between quadrature channels, created in the systems by the effect of limiting on filtered signals This crosstalk is shown to result whether the filtering is ideal or otherwise Computer generated and measured eye diagrams showing crosstalk as predicted on a filtered, then limited, offset QPSK signal are given Measured and computed spectral density results are given which are in close agreement with each other, indicating that the computer model provides a good representation of the real system In addition, an explanation of the shape of the power spectra associated with filtered, then limited, modulated signals is provided by studying the symbol wave shapes of these signals Using the spectral density results and the Pe (S/N) performance findings, it is shown that for a microwave system which (1) incorporates an amplitude-limiting amplifying device in the transmitter, (2) must operate within the FCC limits for radiated spectrum, and (3) must operate at a spectral efficiency greater than bit/s/Hz, offset QPSK modulation is the best choice of the three modulation methods studied 31 J F Sevic and J Staudinger, “Simulations of Adjacent Channel Power for Digital Wireless Communication Systems,” Microwave Journal, pp 66–80, Oct 1996 A comparison of nonlinear analysis methods for simulation of power amplifier adjacent-channel power ratio is presented Adjacent-channel power ratio is the linearity figure of merit for digital wireless communication systems employing nonconstantenvelope modulation techniques, such as OQPSK and ␲/4-QPSK Trade-offs in the performance of each method are discussed Using modulation for the TIA IS-95 and the TIA IS-54 standards, measured and simulated results for a single-stage power amplifier are presented 32 A Hajimiri and T Lee, “ Design Issues in CMOS Differential LC Oscillators,” JSSC, pp 717–724, May 1999 An analysis of phase noise in differential cross-coupled inductance–capacitance (LC) oscillators is presented The effect of tail current and tank power dissipation on the voltage amplitude is shown Various noise sources in the complementary cross-coupled pair are identified, and their effect on phase noise is analyzed The predictions are in good agreement with measurements over a large range of tail currents and supply voltages A 1.8-GHz LC oscillator with a phase noise of –121 dBc/Hz at 600 kHz is demonstrated, dissipating mW of power using on-chip spiral inductors 33 P Gray, P Hurst, S Lewis, and R Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed., Wiley, New York, 2001 This edition of the book features coverage of several topics—more advanced CMOS device electronics to include short-channel effects, weak inversion, and impact ionization In addition, coverage of state-of-the-art IC processes shows how modern integrated circuits are fabricated, including heterojunction bipolar transistors, copper interconnect, and low permittivity dielectric materials A comprehensive and unified treatment of bipolar and CMOS circuits is presented 34 T H Lee, Planar Microwave Engineering, Cambridge University Press, New York, 2004 ANNOTATED BIBLIOGRAPHY 35 36 37 38 39 229 This book covers many practical techniques for microwave design and measurements The book covers the following: A microhistory of microwave technology; Introduction to RF and microwave technology; The Smith chart and S-parameters; Impedance matching; Connectors, cables, and waveguide; Lumped passive components; Microstrip, stripline, and planar passive elements; Impedance measurement; Microwave diodes; 10 Mixers; 11 Transistors; 12 Small-signal amplifiers; 13 Low noise amplifiers; 14 Noise figure measurement; 15 Oscillators; 16 Synthesizers; 17 Oscillator phase noise; 18 Phase noise measurement; 19 Sampling oscilloscopes, spectrum analyzers, and probes; 20 Power amplifiers; 21 Antennas; 22 Lumped filters; 23 Microstrip filters J G Proakis and M Salehi, Communication Systems Engineering, Prentice-Hall, Upper Saddle River, NJ, 2002 With an emphasis on digital communications, this edition of the book introduces the basic principles underlying the analysis and design of communication systems In addition, this text gives a solid introduction to analog communications and a review of important mathematical foundation topics S Mehta et al., “An 802.11g WLAN SoC,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp 94–95, Feb 2005 A single-chip IEEE-802.11g-compliant wireless LAN system-on-a-chip (SoC) that implements all RF, analog, digital PHY, and MAC functions has been integrated in a 0.18-␮m CMOS technology The IC transmits 0-dBm EVM-compliant output power for a 64-QAM OFDM signal The overall receiver sensitivities are better than –92 and –73 dBm for data rates of and 54Mb/s, respectively D Tse and P Viswanath, Fundamentals of Wireless Communications, Cambridge University Press, New York, 2005 This textbook takes a unified view of the fundamentals of wireless communication and explains the web of concepts underpinning these advances at a level accessible to an audience with a basic background in probability and digital communication Topics covered include MIMO (multiple input, multiple output) communication, space–time coding, opportunistic communication, OFDM, and CDMA The concepts are illustrated using many examples from wireless systems such as GSM, IS-95 (CDMA), IS-856(1xEV-DO), Flash OFDM, and ArrayComm SDMA systems Particular emphasis is placed on the interplay between concepts and their implementation in systems An abundant supply of exercises and figures reinforce the material in the text This book is intended for use on graduate courses in electrical and computer engineering and will also be of great interest to practicing engineers A Behzad et al “A Fully Integrated MIMO Multiband Direct Conversion CMOS Transceiver for WLAN Apllications (802.11n),” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp 560–561, Feb 2007 A single-chip, multiband, direct-conversion CMOS MIMO transceiver (2×2) targeted for WLAN applications is presented This transceiver is capable of satisfying the requirements of the draft 802.11n standard and achieves PHY rates of >270 Mbps The receivers and transmitters achieve an EVM of better than –41 dB (0.9%) and –40 dB (1.0%) operating in legacy g and a modes, respectively From a 1.8-V supply and with both cores operating, the chip draws 275 mA in RX mode and 280 mA in TX mode D Rahn et al., “A Fully Integrated Multiband MIMO WLAN Transceiver RFIC,” JSSC, pp 1629–1641, Aug 2005 A multiple input–multiple output (MIMO) transceiver RFIC compliant with IEEE 230 40 41 42 43 ANNOTATED BIBLIOGRAPHY 802.11a/b/g and Japan wireless LAN (WLAN) standards is presented The transceiver has two complete radio paths integrated on the same chip When two chips are used in tandem to form a four-path composite beam forming (CBF) system, 15 dB of link margin improvement is obtained The transceiver was implemented in a 47-GHz SiGe technology with 29.1 mm2 die size It consumes 195 mA in RX mode and 240 mA in TX mode from a 2.75-V supply G Chien et al., “A Fully-Integrated Dual-Band MIMO Transceiver IC,” RFIC Digest of Technical Papers, pp., 2006 A monolithic MIMO transceiver IC consisting of two transmitters and three receivers is implemented in a 0.35/spl mu/m SiGe BiCMOS process The receivers achieve a NF of dB in 2.4 GHz and 5.5 dB in GHz, while the transmitters deliver an OP1dB of 11 dBm The MIMO transceiver in full operation consumes approximately 260 mA in RX mode and 245 mA in TX mode from a 3-V supply Y Palaskas et al., “A 5GHz 108Mb/s 2×2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp 368–369, Feb 2006 This paper presents a fully integrated 5-GHz × MIMO WLAN transceiver RFIC implemented in 90-nm CMOS The paper identifies the key MIMO integration issues and proposes techniques to optimize MIMO performance It is shown that crosstalk between the multiple transceivers residing on the same die can degrade MIMO performance and has to be carefully minimized, especially when power amplifiers are integrated on die A shared LO generation and distribution network is designed to maximize MIMO phase noise immunity without introducing undesired crosstalk The fabricated MIMO receiver achieves a sensitivity of –63 dBm while receiving 108 Mbps in MIMO spatial multiplexing mode in the presence of a 25-ns Rayleigh fading channel The sensitivity of a single receiver in the presence of AWGN noise is –76 dBm Linearized 3.3-V, 5-GHz power amplifiers with P1dB = 20.5 dBm deliver average power of +13 and +16 dBm each in MIMO and SISO modes, respectively (EVM = –27/–25 dB) The measured performance demonstrates the effectiveness of the isolation techniques employed The system in a package includes an 18-mm2 die and microstrip front-end matching networks implemented on a flip-chip package C P Lee et al., “A Highly Linear Direct-Conversion Transmit Mixer Transconductance Stage with Local Oscillation Feedthrough and I/Q Imbalance Cancellation Scheme,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp 368–369, Feb 2006 Some of the requirements of the next generation WLAN transmitters are low transmit EVM, a low local oscillator feedthrough (LOFT), a small I/Q imbalance, a wide gaincontrol range, and preferably a minimum number of real-time calibrations In this paper, a highly linear transmit mixer transconductance stage is presented that incorporates a wide gain-control range and a one-time LOFT and I/Q imbalance cancellation scheme to meet these goals K Bult et al., “An Inherently Linear and Compact MOST-Only Current Division Technique,” IEEE Journal of Solid-State Circuits, vol 27, no 12, pp 1730–1735, Dec 1992 A technique is presented for dividing currents accurately and linearly by using MOS transistors only This technique is valid in all operating regions of an MOS transistor With this technique, a volume control circuit is realized with an attenuation of to –84 dB in steps of dB The measured THD is better than –85 dB and the dynamic range is better than 100 dB The chip is realized in a standard digital CMOS process and chip area is 0.22 mm2 ANNOTATED BIBLIOGRAPHY 231 44 A Behzad et al., “A 4.92–5.845 GHz Direct-Conversion CMOS Transceiver for IEEE 802.11a Wireless LAN,” RFIC Digest of Technical Papers, 2004, pp 335–338 A fully integrated CMOS direct-conversion 5-GHz transceiver is implemented in a 0.18␮m digital CMOS process and housed in an LPCC-48 package This chip, along with a companion baseband chip, provides a complete 802.11a solution covering all of the worldwide 4.92- to 5.845-GHz bands The receiver achieves a 3.5-dB NF while the transmitter achieves a +23-dBm saturated output power The integrated PA utilizes a linearization technique to allow for high efficiency while maintaining the linear operation required by QAM64 OFDM signals The transceiver achieves low cost and high yield through the use of various integrated self-contained or system level calibration techniques 45 A Behzad, “Radio Design for MIMO Systems with an Emphasis on IEEE 802.11n,” course presented at IEEE International Solid-State Circuits Conference, San Francisco, 2007 Essential to the overall system design of a MIMO system is the radio design This course provides a brief introduction to the legacy 802.11 a/b/g systems, followed by a discussion of the history of multiple antenna systems and the conventional analog-based techniques such as MRC A general introduction to the 802.11n then follows, which includes the channelization and modulation types, the definition and the description of the concepts behind the multiple spatial streams (M × N), and additional PHY and MAC techniques allowing for higher rates and/or longer reach These features include the use of short guard interval (GI), implicit and explicit beamforming, space–time block codes (STBC), the use of Greenfield mode, and aggregation techniques The requirements of the 802.11n standard such as sensitivity and EVM and their relation to analog impairments such as phase noise, quadrature imbalances, linearity, and crosstalk are also discussed Some specific circuit examples are presented and some unique circuit implementation challenges of MIMO radios are discussed Some measured performance numbers (range and throughput) will be also presented The course wraps up by discussing the future trends of MIMO radio implementation 46 C Balanis, Antenna Theory, 3rd ed., Wiley, Hoboken, NJ, 2005 The discipline of antenna theory has experienced vast technological changes In response, the author has updated his classic text, offering a recent look at the necessary topics New material includes smart antennas and fractal antennas, along with the latest applications in wireless communications Multimedia material on an accompanying CD presents PowerPoint viewgraphs of lecture notes, interactive review questions, Java animations and applets, and MATLAB features Like the previous editions, this third edition is appropriate for electrical engineering and physics students at the senior undergraduate and beginning graduate levels and practicing engineers as well 47 R J Baker, CMOS Circuit Design, Layout and Simulation, 2nd ed., Wiley/IEEE, Hoboken, NJ, 2005 This book covers the practical design of both analog and digital integrated circuits, offering a contemporary view of a wide range of analog/digital circuit blocks, the BSIM model, data converter architectures, and other topics This edition takes a two-path approach to the topics; design techniques are developed for both long- and short-channel CMOS technologies and then compared The results are multidimensional explanations that allow readers insight into the design process 48 R J Baker, CMOS Mixed-Signal Circuit Design, Wiley/IEEE, Hoboken, NJ, 2002 This book builds on the fundamental material in the author’s previous book, CMOS: Cir- 232 ANNOTATED BIBLIOGRAPHY cuit Design, Layout, and Simulation, to provide a textbook and reference for mixed-signal circuit design The coverage is both practical and in-depth, integrating experimental, theoretical, and simulation examples to drive home the why and the how of doing mixedsignal circuit design Some of the highlights of this book include a practical/theoretical approach to mixed-signal circuit design with an emphasis on oversampling techniques; coverage of delta–sigma data converters, custom analog and digital filter design, design with submicrometer CMOS processes, and practical debug prototyping techniques Index AACI (alternate adjacent channel interference) requirement, 88, 104, 131 ACI (adjacent channel interference) requirement, 88, 104 AD (amplitude distortion), 96, 97 Adjacent channel interference (ACI) requirement, 88, 104, 131 AFC (automatic frequency control), 165–171 All-white-Gaussian-noise (AWGN) channel, 196–197 Alternate adjacent channel interference (AACI) requirement, 88, 104 AM-AM distortion, 96–99, 121, 123 AM-PM distortion, 96–99, 121, 123 Amplifiers See Differential amplifiers; HPVGAs (high pass variable-gain amplifiers); LNAs (low-noise amplifiers); PAs (power amplifiers) Amplitude distortion (AD), 96, 97 Amplitude modulation (AM) See AM-AM distortion; AM-PM distortion Antennas: and direct-conversion receivers, 56, 57, 91 and FCC requirements, 33 and IEEE 802.11a/g receivers, 87 and LO leakage, 75–76, 77 and low IF receivers, 52 multiple, 197–200, 212, 214 and receiver phase noise, 129 and superheterodyne receivers, 44, 50 Autocalibration, 119, 161–163, 178–179, 207 See also Calibration Automatic frequency control (AFC), 165–172 AWGN (all-white-Gaussian-noise) channel, 196–197 Backoff, 89, 98, 116, 122–123, 148 Baluns, 94, 149, 178, 179, 203, 205 Band-select filters, 44, 45–46, 47, 48, 52, 56, 77, 103 Bandpass filters, 52–54, 61, 65, 84, 91, 104, 105–106 Baseband blocks: HD-related interference, 119–121 in receiver architecture, 59, 82–83 in transceiver case study, 178 in transmitter architecture, 65–66, 119 Baseband filters, 44–45, 47, 49, 51, 52, 61, 165 Bias current calibration, 175–176 BiCMOS (bipolar CMOS), 70 Bipolar devices: comparison of SiGe transistors with CMOS transistors, 67–71 comparison with MOSFET devices, 81–82, 154–155 flicker noise, 81–82 Calibration: bias current, 175–176 closed-loop, 164 in CMOS 802.11a/b/g/n MIMO transceiver case study, 209–210 for CMOS-based transmitters, 177 DSP-assisted, 161, 163 filter time-constant, 176–177 open-loop, 164–165 self-contained, 161, 163 VCO, 163–165 WLAN radio overview, 161–177 Wireless LAN Radios: System Definition to Transistor Design By Arya Behzad Copyright © 2008 the Institute of Electrical and Electronics Engineers, Inc 233 234 INDEX Calibration (continued) in WLAN transmitter case study, 189–196 Cascodes: folded, 144, 146 in low-noise amplifier design, 140–141, 142 and mixers, 144, 146 in power amplifiers, 148, 151 and VCO pulling, 126 in WLAN transmitter case study, 190 CCDF (complementary CDF), 97, 98, 100, 134 CDF (cumulative distribution function), 97, 134 CDMA (cellular code division multipleaccess) standard, 11, 18, 31, 61, 90, 91, 129 Channel allocations: IEEE 802.11a, 13–15 IEEE 802.11b, 10–12 IEEE 802.11g, 10–12 Channel-select filters, 44, 46, 47, 52, 104 Closed-loop calibration, 164 CMOS (complementary metal-oxidesemiconductor): comparison with BiCMOS, 70–71 comparison with bipolar SiGe transistors, 67–71 flicker noise in devices, 81 in low-noise amplifiers, 139–142 in mixers, 143–144 in power amplifier design, 149–153 power-level calibration, 177 three-stage PA example, 148–149 transceiver case study, 178–189 in VCO design, 154–155 CMOS 802.11a transceiver case study: architecture, 178–180 block diagrams, 179–180 circuit implementation, 179–180 performance characteristics, 187–189 receiver, 181–183 transmitter, 183–185 Code rates, 21, 22, 23 Complementary CDF (CCDF), 97, 98, 100, 134 Constellation diagrams: IEEE 802.11a, 34, 35, 36, 37 and polar modulators, 66–67 and quadrature balance, 110–114 transmitter output, 66–67, 110–114, 185–186 VSA examples, 34–41 Cumulative distribution function (CDF), 97, 134 Data rates: and automatic frequency control, 171 in CMOS 802.11a/b/g/n MIMO transceiver case study, 201 CMOS 802.11a transceiver case study, 182–183, 184 and far-out phase noise, 130 in history of IEEE 802.11, 6–8 IEEE 802.11a, 8–9, 21–23 IEEE 802.11b, 5, 8–9, 11–12 IEEE 802.11g, 5, 8–9, 21–23 and multipath fading, 17 receiver issues, 26, 74, 75, 88, 89, 107, 182–183 transmitter issues, 28, 123–124, 184 DC offsets, receiver-related, 75–79 Differential amplifiers, 151, 158–160 Direct-conversion architecture: advantages and disadvantages, 56–59 example, 55, 56 overview, 44, 55–56 and receiver flicker noise, 82–83 and receiver image rejection, 106–107 receivers, 44, 55–59, 76–79, 91–92 transmitters, 44, 64–66, 117–119 Direct sequence spread spectrum (DSSS), 6, 7, 11 Diversity, 149, 181, 199–200, 201, 219 DSB (double-sideband) NF vs SSB (singlesideband) NF, 46, 103 DSSS (direct sequence spread spectrum), 6, 7, 11 EVM (error vector magnitude): receiver, 169, 170 relationship to image rejection, 114–116 relationship to quadrature balance, 109–116 transmitter, 26–28 Fading, multipath, 15–17 INDEX Far-out phase noise, 130–131 FCC (Federal Communications Commission), 10, 13, 31, 33, 75, 77, 104, 119, 129 Feedback techniques vs open-loop transductance, 158–160 FER (frame error rate), 88 FHSS (frequency hopping spread spectrum), 6, 11 Filters: band-select, 44, 45–46, 47, 48, 52, 56, 77, 103 bandpass, 52–54, 61, 65, 84, 91, 104, 105–106 baseband, 44–45, 47, 49, 51, 52, 61, 165 channel-select, 44, 46, 47, 52, 104 front-end, 48, 104 high pass, 36, 50, 54, 58, 77, 78, 165–166, 169 RF, 102–106 time-constant calibration techniques, 176–177 Flicker noise, 79–83 Frame error rate (FER), 88 Frequency control, automatic (AFC), 165–171 Frequency conversion See Mixers Frequency errors, effect on OFDM systems, 132–135 Frequency hopping spread spectrum (FHSS), 6, 11 Front-end filters, 48, 104 GaAs (gallium arsenide) devices, 68, 70, 123, 149–150, 153 Gain control: in CMOS 802.11a transceiver case study, 183–185 implementing in low-noise amplifiers, 141–142 providing in transmitters, 118–119 switched-resistance scheme, 141–142 Gilbert quads, 143, 144, 146 GSM (Global System for Mobile) communication, 54, 55, 58, 75, 83, 90 HD (harmonic distortion), 30, 83–84, 119–121, 151, 159–160 235 High pass filters See HPFs (high-pass filters) High pass variable-gain amplifiers See HPVGAs (high pass variable-gain amplifiers) HPFs (high-pass filters), 36, 50, 54, 58, 77, 78–79, 165–166, 169, 205 HPVGAs (high pass variable-gain amplifiers), 181–182, 203, 205 IEEE 802.11 standard: comparison with HyperLAN standard, comparisons among PHY versions, 8–10, 12, 13 data rates, 6, 11–12, 21–23 history, 6–8 MAC layer, 6, 22, 24 overview, 6–8 PHY extensions, 6–8, 24 structure, 6–8 system requirements, 24–33 working groups, 7–8 IEEE 802.11a: channel allocations, 13–15 constellation diagrams, 34, 35, 36, 37 extension, 6, 7, 8–10, 12, 21–23 OFDM coding, 15, 20–21 OFDM packet construction, 24, 25 IEEE 802.11b: channel allocations, 10–12 extension, 6–7, 8–12 IEEE 802.11g: channel allocations, 10–12 extension, 7, 8–10, 12, 21–23 OFDM coding, 15, 20–21 OFDM packet construction, 24, 25 IEEE 802.11n: need for, 195–200 working group, 7–8 IF (intermediate frequency) See also Low IF receivers choosing in superheterodyne receivers, 47–51 and image rejection, 104 zero, 43 IIPs See Input IPs (IIPs); Intercept points (IPs) Image rejection: direct-conversion receivers, 106–107 236 INDEX Image rejection (continued) filter use, 45–46, 47 in low IF architecture, 104–106 and quadrature balance, 107–109 relationship to EVM, 114–116 superheterodyne receivers, 45–46, 47, 102–104 IMD (intermodulation distortion): characterizing circuit nonlinearity, 83–84 product nonsymmetry, 121 and spectral regrowth, 30–31, 32 Inductors, 138–139, 141, 146 Input IPs (IIPs), 86–87 Intercept points (IPs), 59, 84–96, 144, 145 Intermediate frequency (IF) See also Low IF receivers choosing in superheterodyne receivers, 47–49 and image rejection, 104 zero, 43 Intermodulation distortion (IMD): characterizing circuit nonlinearity, 83–84 product nonsymmetry, 121 and spectral regrowth, 30–31, 32 IPs See Intercept points (IPs) IS-95 CDMA standard, 11 See also CDMA (cellular code division multipleaccess) standard LANs (local area networks), wired vs wireless, 1–3 See also Wireless LANs LC-based oscillators, 153–154 Linearity: in circuit building blocks, 158–160 feedback techniques vs open-loop transductance, 158–160 in low-noise amplifiers, 139–140, 141, 142, 143, 144, 145–146 in power amplifiers, 148, 150, 153 as receiver issue, 91–96 as transmitter issue, 121–124 LNAs (low-noise amplifiers): in CMOS 802.11a/b/g/n MIMO transceiver case study, 203 in CMOS 802.11a transceiver case study, 178 defined, 137 in direct-conversion receivers, 55, 56, 57, 59, 106 in IEEE 802.11 standards, 22 implementing gain control, 141–142 linearity, 139–140, 141, 142, 143, 144, 145–146 in low IF receivers, 52, 53, 104–105 overview, 137–138 as receiver building block, 137–142 in superheterodyne receivers, 44–46, 102–104 and transceiver impairments, 75, 76, 77, 79, 91, 102–106, 117 LO generation circuitry, 57, 111, 114, 157, 167–169, 173, 175, 203, 207–209 Local oscillators (LOs): and automatic frequency control, 167–168 buffers for mixers, 146–147 in direct-conversion receivers, 106 leakage and DC offsets, 75 leakage and receiver DC offsets, 75–79 PLLs pulling, 124–126 in superheterodyne receivers, 102 LOFT (LO feedthrough): calibration case study, 189–196 direct-conversion transmitter issue, 117–119 and MI>IQ imbalances, 174–175 and quadrature error, 172–175 as transmitter impairment, 116–119 LOGEN, 60, 147–148, 157, 159 Low IF receivers: advantages and disadvantages, 52, 54 and band-select filters, 77 examples, 52–53 image rejection, 104–106 overview, 44, 51–52 suitability for WLAN systems, 55 Low IF transmitters, 44, 64 Low-noise amplifiers See LNAs (low-noise amplifiers) MAC layer, 6, 22, 24, 70, 181, 188, 205, 218–219 Maximum ratio combining (MRC), 200, 214, 217 MIMO (multi-in, multi-out) systems, 200, 201, 202–217 INDEX Mixers: as building block in wireless transceivers, 142–148 CMOS, 143–144 LO generation, 167–168 multifrequency, 157–158 role of Gilbert quad, 142–148 stacked, 157–158, 169 symbol, 142 transmit-side variable gain, 145–146 MOSFET (MOS field effect transistor) devices: comparison with bipolar devices, 81–82, 154–155 flicker noise, 80–81 and power consumption issues, 93 in VCO design, 154–155 MRC (maximum ratio combining), 200, 214, 217 Multi-in, multi-out (MIMO), 200, 201, 202–217 Multifrequency mixers, 157–158 Multipath propagation, 15–21 Multiple antennas, 199–204, 214, 216 NF (noise figure): in CMOS 802.11a transceiver case study, 180–181 and flicker noise, 83 impact of band-select filter, 45 impact of image-reject filter, 46 linearity tradeoff, 26 and low-noise amplifiers, 137–140, 142 and receiver impairments, 92, 93 and receiver sensitivity, 73–75 and superheterodyne receiver image rejection, 102–104 NMOS devices, 81–82, 144, 146, 155 Noise figure See NF (noise figure) Nonconstant envelope signals, 29, 30–31, 121 OFDM (orthogonal frequency division multiplexing): comparison with CDMA, 18 data rates, 21–23 effect of frequency errors, 132–135 effect of phase noise, 131–132 and IEEE 802.11n, 199, 200–201 237 modulated signals, 88–89 and multipath propagation, 15–21 overview, 15 packet construction, 24, 25 and quadrature signals, 107, 109, 110–111 and subcarrier overlaps, 18–21 and transmitter spectral masks, 32 OIPs See Output IPs (OIPs) OOBs (out-of-band blockers), 103 Open-loop calibration, 164–165 Orthogonal frequency division multiplexing See OFDM (orthogonal frequency division multiplexing) Oscillators, LC-based, 153–154 See also Local oscillators (LOs); VCOs (voltage-controlled oscillators) Out-of-band blockers (OOBs), 103 Out-of-band phase noise, 130–131 Output IPs (OIPs), 86–87 P1dB compression point, 95–96, 98, 99, 123 PAPR (peak-to-average power ratio), 12 See also PAR (peak-to-average ratio) PAR (peak-to-average ratio): defined, 121 OFDM signals, 19–20, 88, 121, 148, 182 overview, 19–20, 29, 31, 32 and polar modulators, 67 relationship to transmitter linearity and efficiency, 121–124 signal differences, 88, 96, 97–98 PAs (power amplifiers): analyzing signal distortion, 97–98, 99, 100–102 CMOS devices in, 149–151 designing for WLAN applications, 149–153 linearity, 148, 150, 153 linearization and efficiency enhancement techniques, 123–124 overview, 148 as radio building block, 148–153 three-stage CMOS example, 148–149 PD (phase distortion), 96, 97 238 INDEX Peak-to-average power ratio (PAPR), 12 See also PAR (peak-to-average ratio) Peak-to-average ratio (PAR) See PAR (peak-to-average ratio) PGAs (programmable gain amplifiers), 44, 52, 56, 82 Phase distortion (PD), 96, 97 Phase-locked loops (PLLs): block diagram, 186 in CMOS 802.11a transceiver case study, 186–189 local oscillator pulling, 124–126 measured phase noise, 184–185 phase noise behavior, 126–130 Phase noise: close-in vs far-out, 129–130 effect on OFDM systems, 131–132 far-out, 130–131 out-of-band, 130–131 in PLLs, 126–130, 186–187 in VCOs, 154–155 PHY layer, 6–8, 24 PLLs See Phase-locked loops (PLLs) PMOS devices, 81, 144, 145, 155 Polar modulators, 66–67 Power amplifiers See PAs (power amplifiers) Power detectors, 174–175, 184 Programmable gain amplifiers (PGAs), 44, 52, 56, 82 Quadrature balance: calibrating imbalances, 172–175 constellation diagrams, 110–114 and direct-conversion receivers, 106–107 in low IF architecture, 104, 106 relationship to error vector magnitude, 109–116 relationship to image rejection, 102, 104, 107–109 in WLAN transmitter case study, 189–196 Receive signal strength indicators (RSSIs), 26, 182, 205 Receivers: architectural overview, 43–44 automatic frequency control, 165–172 in CMOS 802.11a/b/g/n MIMO transceiver case study, 202–205 in CMOS 802.11a transceiver case study, 181–183 comparison of architectures, 49–51, 59–60, 76–77 DC offsets, 75–79 direct-conversion, 44, 55–59, 76–79, 91–92 flicker noise, 79–83 frequency offsets and multipath distortion, 169–172 image rejection, 45–46, 47, 102–107 linearity issue, 91–96 LO leakage, 75–79 low IF, 44, 51–55, 104–106 noise figure, 73–75, 92, 93, 102–104 nonlinearities, 83–102 PLL and PCO phase noise, 129 sensitivity, 24, 26, 73–75 superheterodyne, 43, 44–51, 60, 76, 77, 102–104 Reciprocal mixing, 128, 129, 130–131 RF filters: in low-IF architecture, 51, 104–106 in superheterodyne architecture, 48, 102–104 Root-mean-square (RMS) delay, 17, 18, 28, 116, 154, 169 RSSIs (receive signal strength indicators), 26, 182, 205 SAW (surface acoustic wave) filters, 44, 46, 52, 56, 60 Semiconductors See also CMOS (complementary metal-oxidesemiconductor); SiGe (silicon germanium) devices BiCMOS, 67–71 WLAN chipset market, 3–6 SiGe (silicon germanium) devices: in bipolar buffers, 147 in power amplifiers, 67–69, 70, 123, 139, 149, 150, 153 Signal-to-noise plus interference ratio (SNIR), 104, 130 Signal-to-noise ratio (SNR), 11, 23, 73–75, 79, 137, 198–201 INDEX Silicon germanium (SiGe) devices: in bipolar buffers, 147 in power amplifiers, 67–69, 70, 123, 139, 149, 150, 153 SIMO (single-in, multi-out) systems, 200 SISO (single-in, single-out) systems, 200–201 Sliding IF architecture, 48–49, 63 SNIR (signal-to-noise plus interference ratio), 104, 130 SNR (signal-to-noise ratio), 11, 23, 73–75, 79, 137, 198–201 Spectral masks, 10, 13, 28–33, 61, 64, 98, 100–101, 184–185 Spurious emissions, 33, 129–130 SSB (single-sideband) NF vs DSB (doublesideband) NF, 46, 103 Stacked mixers, 157–158, 169 Superheterodyne receivers: advantages and disadvantages, 49–51 band-select filters, 44, 45–46, 47, 48, 77 baseband filters, 44–45, 47, 49, 51 channel-select filters, 44, 46, 47, 52, 104 choosing intermediate frequency, 47–51 comparison with direct-conversion receivers, 60, 76, 77 and flicker noise, 82 image rejection, 45–46, 47, 102–104 overview, 44–45 role of filters, 44–45 sliding IF option, 48–49 Superheterodyne transmitters: advantages and disadvantages, 62 example, 62–64 overview, 43–44, 60 role of filters, 61 Surface acoustic wave (SAW) filters, 44, 46, 52, 56, 60 Temperature sensors, 177 Through-wafer via technology, 150 Transceivers See also Receivers; Transmitters in CMOS 802.11a/b/g/n MIMO case study, 200–215 in CMOS 802.11a case study, 178–189 Transconductance: in CMOS power amplifier design, 151–153 239 in WLAN transmitter case study, 189–196 Transmitters: architectural overview, 43–44 baseband blocks, 65–66, 119 in CMOS 802.11a/b/g/n MIMO transceiver case study, 205–207 in CMOS 802.11a transceiver case study, 183–186 constellation diagrams, 66–67, 110–114, 185–186 current leakage problem, 116–119 direct-conversion, 44, 64–66, 117–119 error vector magnitude, 26–28 gain control, 118–119 in high performance WLAN case study, 187–194 impairments, 116–121 and LO feedthrough, 116–119 low IF, 44, 64 PLL and PCO phase noise, 129 and polar modulators, 66–67 relationship of PAR to transmitter linearity and efficiency, 121–124 spectral mask passing, 28–33 superheterodyne, 43–44, 60–64 transmit output power vs data rate, 182–183 U.S Federal Communications Commission (FCC), 10, 13, 31, 33, 75, 77, 104, 119, 129 VCOs (voltage-controlled oscillators): in automatic frequency correction, 167, 168 buffers for mixers, 146–147 calibration techniques, 163–165 in CMOS 802.11a/b/g/n MIMO transceiver case study, 207–209 CMOS design topology, 155–156 in direct-conversion receivers, 57 in direct-conversion transmitters, 65 fully integrated, 153–157 in low IF transmitters, 64 in multifrequency stacked mixers, 157–158 phase noise overview, 154–155 and PLL phase noise, 126–129 240 INDEX VCOs (continued) and PLL pulling phenomenon, 124–126 in superheterodyne transmitters, 62, 63 tuning range requirements, 156 Vector signal analysis (VSA): constellation diagrams, 34–41 defined, 34 overview, 33–34 Viterbi decoding, 21, 22, 23, 24, 74, 181 VoIP (voice-over-Internet Protocol), 5, Voltage-controlled oscillators See VCOs (voltage-controlled oscillators) VSA See Vector signal analysis Wireless CDMA (cellular code division multiple-access) standard, 31, 61, 90, 91, 129 Wireless LANs: advantages and disadvantages, 1–3 communication speed issues, 2, 8, 15, 17 comparison with wired LANs, 1–3 defined, market trends, 3–6 network example, 1, overview, 1–3 radio design trends, 218–219 About the Author Arya Behzad, Broadcom Distinguished Engineer, is a director of engineering working on radios for current and future generation wireless products and product-line manager for all wireless LAN radio products Also at Broadcom, he is recognized as one of the most influential contributors to CMOS RF R&D efforts and his product shipments have surpassed the 200million unit mark Mr Behzad has more than 100 patents issued and pending, as well as many publications in the areas of precision analog circuits, cellular transceivers, integrated tuners, gigabit Ethernet, and wireless LANs He has taught courses and presented technical seminars at various conferences and at several universities This book and his IEEE Expert Now course on wireless LAN radio design are both derived from his popular IEEE ISSCC course on the same topic Mr Behzad is serving a sixth year as a member of the IEEE International Solid State Circuits Conference Wireless Technical Committee In the past, he has served as a guest editor of the IEEE Journal of Solid State Circuits and is currently an associate editor of the journal He is a Senior Member of the IEEE In 1994, he earned a Master of Science degree in Electrical Engineering from the University of California at Berkeley Wireless LAN Radios: System Definition to Transistor Design By Arya Behzad Copyright © 2008 the Institute of Electrical and Electronics Engineers, Inc 241 ... As a result the term “WLAN” is almost exclusively utilized to refer to WLAN communications utilizing RF technology Wireless LAN Radios: System Definition to Transistor Design By Arya Behzad Copyright... and Lance Perez, Trellis and Turbo Coding Kamil Zigangirov, Theory of Code Divison Multiple Access Communication Arya Behzad, Wireless LAN Radios: System Definition to Transistor Design Wireless. .. Wireless LAN Radios System Definition to Transistor Design Arya Behzad John B Anderson, Series Editor IEEE Press Series on Microelectronic Systems Stuart K Tewksbury and Joe E Brewer, Series Editors