Nghiên cứu giải pháp nâng cao khả năng chống nhiễu cho các bộ thu định vị GNSS tiên tiến

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Nghiên cứu giải pháp nâng cao khả năng chống nhiễu cho các bộ thu định vị GNSS tiên tiến

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INTRODUCTION Nowadays, GNSS receivers have become core components in many applications ranging from vehicle navigation to unmanned vehicle guidance, from location-based services to environment monitoring. Besides providing position information for many applications, GNSS services also provide a highly precise timescale for synchronizing systems such as telecommunication and network. Hence, the performance of GNSS which have considerable influence on the operation of these services must be guaranteed. In [1] a list of four parameters of GNSS performance is reported: accuracy, availability, continuity, and integrity. Recently, the accuracy of GNSS has been significantly improved with the development of new navigation systems (Galileo-European system and BEIDOU-Chinese system) and the modernization of the existing navigation systems GPS and GLONASS. However, GNSS services are seriously being threatened by the emergence of jamming and spoofing threats. Because GNSS signals are buried under ambient noise, the signals and services of GNSS systems are highly sensitive to interference such as radio frequency interference, jamming and spoofing; meanwhile, the quality of such services is not guaranteed to the conventional users. Technically, the GNSS signal is transmitted from satellites away from Earth (about 20.000 km), so when it comes to receivers, the signal power is smaller than the background noise about 1024 times (26dB) [2]. Therefore, any source of interference (jammer, digital terrestrial communication systems, ionosphere scintillation) may reduce the quality of the received signal, which in turn can disable the operation of the receiver. In addition, because the GNSS systems are often under the management of military based organizations [3] [4] [5], the open services (e.g., GPS L1 C/A, Beidou B1, GLONASS L1OF) are provided to users without any guarantee of their reliability and continuity. However, ensuring reliable and continuous position and time information is essential in modern GNSS receivers. To meet these requirements, receivers must make use of advanced techniques to detect and mitigate interferences so that they can provide the requested continuous position and time information. These techniques are called “interference mitigation techniques”. In recent studies [6] [7] reflecting the state of the art, interference mitigation techniques can be classified according to the position of the algorithm within the processing stages of GNSS receiver chain. In short, they are classified into three groups namely antenna array processing techniques, frontend and digital signal conditioning-based techniques, and correlator/tracking and PVT based techniques Antenna array signal processing technique: A popular method for robust GNSS receiver performance consists in using multiple physical antenna elements which constitute a socalled antenna array. This technique has been studied since the 1940’s and has been widely used in radar and telecommunications applications [8] [9] [10] [11]. Recent studies exploited this technique for GNSS applications considering it as an effective method to mitigate

MINISTRY OF EDUCATION AND TRAINING HANOI UNIVERSITY OF SCIENCE AND TECHNOLOGY NGUYEN DINH THUAN ROBUST SIGNAL PROCESSING TECHNIQUES FOR MODERN GNSS RECEIVERS Major: Computer Engineering Code No.: 9480106 COMPUTER ENGINEERING DISSERTATION SUPERVISORS: Assoc Prof Ta Hai Tung Prof Letizia Lo Presti Hanoi - 2019 TABLE OF CONTENTS STATEMENT OF ORIGINALITY AND AUTHENTICITY ACKNOWLEDGEMENTS TABLE OF CONTENTS LIST OF ACRONYMS LIST OF TABLES LIST OF FIGURES INTRODUCTION 13 FUNDAMENTAL BACKGROUND 18 1.1 GNSS positioning principle 18 1.2 History and development of GNSS 19 1.3 GNSS Threats 20 1.3.1 Multipath 21 1.3.2 Atmosphere 21 1.3.3 Interference 21 1.3.4 Spoofing 21 1.3.5 GNSS Segment errors 21 1.3.6 Cyber Attacks 22 1.4 1.4.1 Signal Conditioning and Sampling 22 1.4.2 Acquisition 23 1.4.3 Tracking and Data Demodulation 23 1.4.4 Positioning Computation 24 1.5 Countermeasures to GNSS Threats 25 1.5.1 Antenna array processing techniques 25 1.5.2 Frontend and Digital Signal Conditioning based techniques 28 1.5.3 Correlator/Tracking and PVT based techniques 29 1.6 GNSS Receiver Architecture 22 GNSS Simulator and effect of sampling frequency 30 GNSS SIGNAL SIMULATOR DESIGN AND IMPLEMENTATION 32 2.1 Modeling methodology 32 2.2 Overview of the modeling of antenna array signals in GNSS receivers 32 2.2.1 General model of the received signal in GNSS receivers 33 2.2.2 Interference 37 2.2.3 Multipath 38 2.2.4 Noise 39 2.3 Effect of sampling frequency on the positioning performance 39 2.3.1 Residual code phase estimation 40 2.3.2 Correlation output calculation 40 2.3.3 Effect of sampling frequency on correlation shape and DLL discriminator function 42 2.3.4 Effect of the sampling frequency and the integration period selection 42 2.3.5 Effect on the presence of Doppler and local oscillator (LO) clock drift 45 2.3.6 Theoretical code tracking loop error estimate 46 2.3.7 Theoretical results evaluation by simulated, and numerical models 49 2.3.8 Effect of Doppler and coherent integration period 50 2.4 Sampling Frequency Effect Mitigation Technique 53 2.4.1 2.5 Performance verification 57 2.5.1 Verification of the simulated antenna array signals 58 2.5.2 Antenna distortion simulation 64 2.5.3 Verification of multipath simulation 66 2.6 Receiver implementation 55 Conclusion 67 ANTENNA ARRAY PROCESSINGS FOR GNSS RECEIVERS 69 3.1 The proposed solution for synchronizing separated antenna array element 69 3.1.1 Determining the samples difference 70 3.1.2 Determining the clock phase shift 71 3.2 Implementation a low-cost antenna array 75 3.3 Antenna array frontend verification 76 3.3.1 Phase difference between frontends 76 3.3.2 Carrier to noise ration improvement 77 3.4 Conclusion 78 GNSS SNAPSHOT PROCESSING TECHNIQUE FOR GNSS RECEIVERS 80 4.1 Proposed Design of GNSS Snapshot Receiver 80 4.1.1 GNSS Grabber 80 Implementation of GNSS Grabber 80 Firmware Architecture 81 4.2 Server Software 81 4.2.1 GNSS signal acquisition 81 4.2.2 Combined Doppler and Snapshot Algorithm 84 4.3 Loosely coupled Snapshot GNSS/INS 89 4.4 Tightly coupled Snapshot GNSS/INS 96 4.5 Results 97 4.5.1 Standalone Snapshot GNSS Receiver 97 4.5.2 Snapshot GNSS/INS Integration 102 4.6 Conclusion 104 CONCLUSIONS AND FUTURE WORKS 105 PUBLICATIONS 107 REFERENCES 109 APPENDIX 116 A Correlation output calculation 116 B Error analysis for coherent early minus late DLL 117 LIST OF ACRONYMS Acronym Meaning ADC Analog to Digital Converter AGC Automatic Gain Control AWGN Additive White Gaussian Noise BB BaseBand BOC Binary Offset Carrier BPSK Binary Phase Shift Keying C/A Coarse/Acquisition C/N0 Carrier-to-Noise-Density Ratio CDC Conventional Differential Combination CDMA Code Division Multiple Access CRC Cyclic Redundancy Check CS Commercial Service DLL Delay Lock Loop DFT Discrete Fourier Transform DSP Digital Signal Processor EGNOS European Geostationary Navigation Overlay Service EU European Union FEC Forward Error Correction FFT Fast Fourier Transform FPGA Field Programmable Gate Array FOC Full Operational Capability GLONASS Global Orbiting Navigation Satellite System I Inphase IF Intermediate Frequency Q Quadrature PVT Position Velocity Time SDR Software Defined Radio LIST OF TABLES Table 2.1: GNSS Simulator Features 57 Table 2.2: The coordinate of elements 58 Table 2.3: The direction of visible satellites 59 Table 2.4: The carrier phase relative to the first element of each satellite at the four elements of the array 59 Table 2.5: The simulation scenario 60 Table 2.6: Estimated carrier phase using the post-correlator beamforming tracking loop 62 Table 4.1: Configuration of the GPS grabber 97 Table 4.2: Information of acquired satellites 99 LIST OF FIGURES Figure 1.1: Satellite navigation principle 18 Figure 1.2: Typical GNSS Threats 20 Figure 1.3: Signal conditioning and sampling stage 22 Figure 1.4: Acquisition Architecture 23 Figure 1.5: Tracking Architecture 23 Figure 1.6: Transmission time estimation in GNSS receivers 24 Figure 1.7: Interference mitigation techniques in GNSS receivers 25 Figure 1.8: The traditional low-cost architecture of antenna array for GNSS applications 27 Figure 1.9: The correlation between GPS signal grabbed by antenna array 28 Figure 1.10: Spectrum and histogram of GNSS signal in the absence of interference 28 Figure 1.11: Snapshot positioning architecture 29 Figure 2.1: Geometry of antenna array 33 Figure 2.2: The model of the received signal for a single antenna 33 Figure 2.3: GPS multi-antenna frontend 34 Figure 2.4: Flowchart of the simulator 35 Figure 2.5: Bandlimited Gaussian interference model 38 Figure 2.6: Multipath model 38 Figure 2.7: Effect of sampling frequency on the positioning performance 39 Figure 2.8: Residual code phases versus the number of samples per code chip with 4fc < fs < 5fc 40 Figure 2.9: Normalised correlator and EML discriminator functions for different sampling frequencies Results are obtained by correlating the incoming signal with various local generated replica signals that have the time delay from−Tc to Tc with step = 10-2Tc 42 Figure 2.10: Correlation shapes for ms integration with various sampling frequencies 43 Figure 2.11: Ambiguous synchronization between a local PRN code and two different incoming analog signals of the same PRN sequence, but with slightly differing code phase offset 43 Figure 2.12: Correlation shapes and their errors with respect to the ideal correlation at a sampling frequency fs =16.3676 MHz using various coherent integration periods 44 Figure 2.13: Representation of code tracking loop [54] 46 Figure 2.14: DLL jitter versus different sampling frequencies (step= fc) for a GPS L1 C/A with C/N0=40 dB-Hz, BL=0.5 Hz, T=1 ms, and fixed BW βr = 2fc 48 Figure 2.15: Upper bound and lower bound of the DLL jitter versus different sampling frequencies (step = 5∗10-2 fc) for a GPS L1 C/A with C/N0=45 dB-Hz, BL=0.5 Hz, T=1 ms, and βr = fs 49 Figure 2.16: Mean values of two error bounds σs1 and σs2 versus different sampling frequencies (step = 10-1 fc) for a GPS L1 C/A with C/N0=45 dB-Hz, BL=0.5 Hz, T=1 ms, and βr = fs 49 Figure 2.17: DLL tracking error comparison among the simulated, numerical and theoretical models (step = 10-1 fc) for a GPS L1 C/A with T=1 ms, and βr = fs 50 Figure 2.18: DLL tracking error versus Doppler frequencies fD for different integration periods T when the sampling frequency is an integer multiple of the nominal code rate (ns=4), in which the blue dotted lines indicate the typical Doppler range 51 Figure 2.19: DLL tracking error versus integration periods T GPS L1 C/A is used with fs = 4.092 MHz (ns=4), C/N0=40 dB-Hz, BL=0.5 Hz, T=1 ms, and βr = fs 52 Figure 2.20: DLL tracking error versus Doppler frequencies fD for different integration periods T when the sampling frequency is a non-integer multiple of the nominal code rate 52 Figure 2.21: Code chip selection versus jitter values with M=4, where Triangle, circle, and diamond dots indicate samples belonging to (k−1)th, kth , and (k+1)th chips, respectively 54 Figure 2.22: Correlator shapes versus different jitter techniques for GPS L1 C/A signal, where τ runs in the range [−Tc,Tc] with step interval =10−3Tc, fs=4.092 MHz, fD = Hz, βr = fs and θNCO(0) = 0.125 55 Figure 2.23: Pseudo-code algorithm that can be used to implement jittering solution on SDR receiver 56 Figure 2.24: The results after applying the mitigation technique 57 Figure 2.25: Antenna array configuration 59 Figure 2.26: Post-correlator beamforming receiver architecture [30] 61 Figure 2.27: Scatter diagram of the tracking output of the satellite PRN01 at elements 62 Figure 2.28: Estimated position of elements (East-North) 64 Figure 2.29: Estimated position of elements (Up) 64 Figure 2.30: Element patterns utilized for simulation (East-North) 65 Figure 2.31: The C/N0 of the satellite PRN 65 10 Figure 2.32: Multipath error 67 Figure 3.1: The architecture of antenna array based GNSS receiver 69 Figure 3.2: Time difference between elements 71 Figure 3.3: Navigation message 71 Figure 3.4: The architecture of the system to determine the phase offset 72 Figure 3.5: The impact of clock phase shift 73 Figure 3.6: The loop filter using for estimating the clock drift 74 Figure 3.7: The estimated frequency shift using the loop filter 74 Figure 3.8: The scatter plot of the signal after mitigating clock phase shift 75 Figure 3.9: The 3-elements antenna array frontend modified from turner RTL2832Us 76 Figure 3.10: The setup of the verification of the frontend using a GPS simulator 77 Figure 3.11: Tracking output of satellites in view 77 Figure 3.12: 𝑪/𝑵𝟎 of the satellite PRN 09 for the received signal at every element and beamed signal 78 Figure 4.1: The architecture of the GNSS grabber 80 Figure 4.2: The flowchart of the grabber firmware 81 Figure 4.3: Acquisition search space 82 Figure 4.4: Probability of Detection w.r.t 𝑪/𝑵𝟎 with 𝑷𝒇𝒂 = 𝟏𝟎 − 𝟑 84 Figure 4.5: FFT-based acquisition 84 Figure 4.6: Snapshot solution diagram 88 Figure 4.7: Traditional loosely-coupled GPS/INS integration 90 Figure 4.8: INS mechanization [3] 94 Figure 4.9: Tightly-coupled integration scheme 96 Figure 4.10: The prototype of GNSS grabber 98 Figure 4.11: Acquisition result of the grabbed signal 98 Figure 4.12: The position converged after iterations 100 Figure 4.13: The positioning accuracy of the proposed solution 101 Figure 4.14: Power consumption comparison of our proposed solution and Ublox LEA 6T 102 Figure 4.15: The experiment setup 102 11 Frequency on GNSS Code Tracking." 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𝐶{𝑘}𝑁 𝑒 𝑀𝑘 −1 −𝑖𝜔𝑁𝑀𝑘 𝑘=0 𝑇0 𝑁−1 ∞ ∑ 𝑒 −𝑖𝜔𝑚 𝑚=0 = ∑ 𝐶{𝑘}𝑁 𝑒 −𝑖𝜔𝑘𝑁𝑀𝑘 𝑘=0 ∑ 𝛿[𝑛] 𝑛=−∞ 𝑠𝑖𝑛(𝑀𝑘 𝜔/2) −𝑖(𝑀𝑘 +1)𝜔 𝑒 𝑠𝑖𝑛(𝜔/2) (A.2) so it can be illustrated in frequency domain as: 𝑇0 𝑁−1 𝐶(𝑓) = ∑ 𝐶{𝑘}𝑁 𝑒 −𝑖2𝜋𝑓𝑇𝑠 𝑁𝑀𝑘 𝑘=0 𝑠𝑖𝑛(𝑀𝑘 𝜋𝑓𝑇𝑠 ) −𝑖(𝑀 +1)𝜋𝑓𝑇 𝑘 𝑠 𝑒 𝑠𝑖𝑛(𝜋𝑓𝑇𝑠 ) (A.3) and its reverse Fourier transform is: 𝛽𝑟 ⁄2 𝑇0 𝑁−1 𝑀𝑘 −1 ∑ ∑ 𝐶𝑘 𝛿[𝑛 − 𝑚 − 𝑁𝑀𝑘 ] = 𝑇𝑠 𝑘=0 𝑚=0 ∫ 𝐶(𝑓)𝑒 𝑖2𝜋𝑓𝑇𝑠 𝑛 𝑑𝑓 (A.4) −𝛽𝑟 /2 where βr is the receiver front-end bandwidth Replacing (A.4) to (6), it yields to: (A.5) 116 𝑁𝐿 −1 𝑇0 𝑎𝑁−1 𝑀𝑘 −1 𝑅(𝜏) 𝐴𝑠 𝑇𝑠 = ∑ 𝑁𝐿 ∑ 𝐶{𝑘}𝑁 𝛿[𝑛 − 𝑚 − 𝑁𝑀𝑘 − ⌊𝜏 + 𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋ 𝑇𝑠 ] ∫ ∑ 𝑛=0 𝑘=0 𝛽𝑟 ⁄2 𝑁𝐿 −1 = 𝐴𝑠 𝑇𝑠 ∫ 𝑁𝐿 𝐴𝑠 𝑇𝑠 ≅ 𝑁𝐿 𝐴𝑠 𝑇𝑠 = 𝑁𝐿 ∑ 𝐶{𝑘}𝑁 𝛿[𝑛 − 𝑚 − 𝑁𝑀𝑘 − ⌊𝜏 + 𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋ 𝑇𝑠 ]𝑒 𝑖2𝜋𝑓𝑇𝑠 𝑛 𝑑𝑓 ∑ 𝐶(𝑓) ∑ ∫ −𝛽𝑟 /2 𝑘=0 𝑚=0 𝑇0 𝑁−1 𝑠𝑖𝑛(𝜋𝑓𝑀𝑘 𝑇𝑠 ) 𝑖2𝜋𝑓𝑇𝑠 (𝑁𝑀 +⌊𝜏+𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋𝑇𝑠 ) 𝑘 ∑ ( ) 𝐶{𝑘}𝑁 𝑒 ∑ 𝐶{𝑙}𝑁 𝑒 −𝑖2𝜋𝑓𝑇𝑠 𝑙𝑀𝑙 𝑑𝑓 𝑠𝑖𝑛(𝜋𝑓𝑇𝑠 ) 𝑘=0 𝑙=0 𝑖2𝜋𝑓𝑇𝑠 (⌊𝜏+𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋𝑇𝑠 ) |𝐶{𝑘}𝑁 | 𝑒 𝑇0 𝑁−1 𝑠𝑖𝑛(𝜋𝑓𝑀𝑘 𝑇𝑠 ) ∑ ( ) 𝑖2𝜋𝑓𝑇𝑠 ((𝑁𝑀 −𝑁𝑀 )+⌊𝜏+𝜃𝑁𝐶𝑂(𝑘)𝑇𝑐 ⌋𝑇𝑠 ) 𝑑𝑓 𝑠𝑖𝑛(𝜋𝑓𝑇𝑠 ) 𝑘 𝑙 + ∑ 𝐶{𝑘}𝑁 𝐶{𝑙}𝑁 𝑒 𝑘=0 𝛽𝑟 ⁄2 𝑇0 𝑁−1 ∫ −𝛽𝑟 /2 ( 𝑇0 𝑁−1 = 𝐴𝑠 ∑ 𝑁𝐿 𝑘=0 𝐶(𝑓)𝑒 𝑖2𝜋𝑓𝑇𝑠𝑛 𝑑𝑓 −𝛽𝑟 /2 𝑚=0 𝑇0 𝑁−1 𝑀𝑘 −1 𝑛=0 𝛽 − 𝑟 𝛽𝑟 ⁄2 𝑇0 𝑁−1 𝛽𝑟 ⁄2 𝛽𝑟 ⁄2 ∫ −𝛽𝑟 /2 𝑙=0,𝑙≠𝑘 ) sin(𝜋𝑓𝑀𝑘 𝑇𝑠 ) 𝑖2𝜋𝑓𝑇 (⌊𝜏+𝜃 (𝑘)𝑇 ⌋ ) 𝑠 𝑁𝐶𝑂 𝑐 𝑇𝑠 𝑑𝑓 𝑇𝑠 ( ) 𝑒 sin(𝜋𝑓𝑇𝑠 ) for a pseudorandom noise code sequence Ck, k=0, 1, 2, , N, all misaligned chips with k = l have equal probability of having +1 or −1 values Their product sum approaches zero B Error analysis for coherent early minus late DLL Define an error signal at the output of the real-part operator in the coherent early minus late TOA estimator as 𝑒(𝜖) = ℜ{ 𝑅(𝜖 − Δ/2) − 𝑅(𝜖 + Δ/2) 𝑇0 𝑁−1 𝑀𝑘 −1 𝑁𝐿 −1 √𝐶𝑠 + ∑ 𝑤(𝑛) ( ∑ 𝑁𝐿 𝑛=0 ∑ 𝐶{𝑘}𝑁 𝛿[𝑛 − 𝑚 − 𝑘𝑀𝑘 − ⌊𝜖 − Δ/2 + 𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋ 𝑇𝑠 ] 𝑘=0 𝑚=0 𝑇0 𝑁−1 𝑀𝑘 −1 − ∑ 𝑘=0 (B.1 ) ∑ 𝐶{𝑘}𝑁 𝛿[𝑛 − 𝑚 − 𝑘𝑀𝑘 − ⌊𝜖 + Δ/2 + 𝜃𝑁𝐶𝑂 (𝑘)𝑇𝑐 ⌋ 𝑇𝑠 ])} 𝑚=0 where ε = t0 −ts is the code phase misalignment, to is the mean value of the un-smoothed TOA estimate (tu), ts is the smoothed TOA estimate, and ∆ is the Early - Late code space (0

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