VLSI Physical Design Automation

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VLSI Physical Design Automation

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VLSI Physical Design Automation Misc Topics and Conclusion Prof David Pan dpan@ece.utexas.edu Office: ACES 5.434 06/06/18 Other Design Styles: FPGA • Field Programmable Gate Array • First introduced by Xilinx in 1984 • Pre-fabricated devices and interconnect, which are programmable by user • Advantages: – – – – short turnaround time low manufacturing cost fully testable re-programmable • Particularly suitable for prototyping, low or mediumvolume production, device controllers, etc 06/06/18 Comparison of Design Styles Full-Custom Standard Cell Gate Array FPGA Cell size variable fixed height fixed fixed Cell type variable variable fixed programma ble Cell placement variable in row fixed fixed Interconnections variable variable variable programma ble all layers all layers routing layers only no layers Fabrication layers 06/06/18 Comparison of Design Styles Full-Custom Standard Cell Gate Array FPGA Area compact compact to moderate moderate large Performance high high to moderate moderate low Design cost high medium medium low Time-to-market long medium medium short 06/06/18 Programming Technologies • • • • SRAM to control pass transistor / multiplexer EPROM – UV light Erasable PROM EEPROM – Electrically Erasable PROM Antifuses – One time programmable • They are different in ease of manufacturing, manufacturing reliability, area, ON and OFF resistance, parasitic capacitance, power consumption, re-programmability 06/06/18 Typical FPGA Architecture • Consists of: Logic modules, Routing resources, and I/O modules Logic Module IO Module Routing Tracks & Switch boxes 06/06/18 FPGA Architecture Examples Array-based Model Row-based Model Logic Sea-of-Gates Model Module Hierarchical Model Routing resources overlayed on logic modules 06/06/18 Two Types of Logic Modules Look-Up Table (LUT) based: • A block of RAM to store the truth table • A k-input 1-output functions needs 2k bits • k is usually or e.g., f=ABC+ABC Multiplexer based: C B A A B 06/06/18 f Two Types of Switchboxes • First Type: • Second Type: 06/06/18 Several Segmentation Models • Non-Segmentation Model: 0 0 0 0 Not connecting Connecting 0 0 0 • Uniform Segmentation Model: 0 0 0 0 Fuse or Programmable switch 0 0 0 06/06/18 10 MCM and SiP • Multi-Chip Module • System in package (SiP) – Different package styles – Thermal consideration for 3D • Alternative packaging approach for high performance systems • Similar to PCB and IC layout problems, but – PCB layout tools cannot handle the dense and complex wiring structure of MCM – IC layout tools cannot handle the complex electrical, thermal and geometrical constraints 06/06/18 19 Example: Pentium Substrate size: 32mmx32mm Package size: 43mmx43mm (4 times smaller) 06/06/18 20 Partitioning • Partitioning a circuit so that each sub-circuit can be implemented into a chip • MCM may contain as many as 100 chips • Need to consider timing constraints and thermal constraints • In addition, also need to consider traditional I/O constraints and area constraints 06/06/18 21 Placement • # of components is much less as compared to IC placement • However, need to consider timing constraints and thermal constraints (as bare chips are placed close to each other) • Routing is done in routing layers, not between chips • So no routing region needs to be allocated 06/06/18 22 Routing • Main objective is to satisfy timing constraints • Another objective is to minimize # of routing layers, not to minimize routing area – Cost is directly proportional to # of layers • Crosstalk, skin effect and parasitic effect are important considerations • Wires are of smaller pitch and more dense than PCB layout 06/06/18 23 EE382 V Conclusions 06/06/18 24 What Have Been Taught? • Introduced different problems in Physical Design • Numerous algorithms which are different in terms of – – – – – – – – design styles objectives constraints techniques optimality efficiency robustness 06/06/18 25 What Is Important? • Understand the problems – How to formulate the problems, represent the constraints, solutions, etc – Reasonable assumptions/abstractions • Know fundamental algorithms to solve the problems • However, the world keeps on changing: – – – – – technology objectives constraints requirement on solution quality computational power • It is more important to learn how to think – formulate the problem – solve it smartly 06/06/18 26 Problem Solving Techniques • Greedy Algorithm • Simulated Annealing/Genetic Algorithm • Mathematical Programming – Linear, Quadratic, Integer Linear, geometric, posynomial, … • Dynamic Programming • Reduction to graph problems – min-cut, max-cut, shortest path, longest path, bipartite matching, minimum spanning tree, etc • Divide-and-Conquer • Many different heuristics • 06/06/18 27 VLSI Design Cycle System Specification Architectural Design Micro-Architectural Specification Functional Design Timing & Relationship Between Units Logic Design RTL (in HDL) Circuit Design Netlist 06/06/18 28 VLSI Design Cycle Netlist Physical Design Layout Fabrication Mask Packaging And Testing Packaged Chips 06/06/18 29 Conventional Physical Design Cycle Partitioning Floorplanning & Placement Routing 06/06/18 30 Technology Trend and Challenges Source: ITRS’03    Interconnect determines the overall performance In addition: noise, power => Design closure Furthermore: manufacturability => Manufacturing closure 06/06/18 31 New Trends in Physical Design • For nanometer IC designs, interconnect dominates • New physical effects – – – – Noise: coupling, P/G noise Power: leakage, power/voltage islands Manufacturability: yield, printability Reliability, … • More and more vertical integration – Logic synthesis coupled with physical design – Interconnect optimizations & design planning – Physical design as a bridge between lower level modeling and higher level optimization/planning • Existing CAD algorithms are far away from optimal 06/06/18 32 Check points  Problem solving skills on underlying physical design algorithms  Know what’s behind the scene of CAD tools  Know the trend and critique ability if given a new research paper  Project study of a topic of your choice and implementation (through class project)  Presentation skill  Paper writing and job preparation 06/06/18 33

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Mục lục

  • VLSI Physical Design Automation

  • Other Design Styles: FPGA

  • Comparison of Design Styles

  • Slide 4

  • Programming Technologies

  • Typical FPGA Architecture

  • FPGA Architecture Examples

  • Two Types of Logic Modules

  • Two Types of Switchboxes

  • Several Segmentation Models

  • Slide 11

  • Comparison of Segmentation Models

  • Physical Design of FPGAs

  • Partitioning

  • Placement

  • Routing

  • Structured ASIC

  • Physcial Design Automation of MCMs and SiPs

  • MCM and SiP

  • Example: Pentium

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