2015 International Conference on Advanced Technologies for Communications (ATC) A 180-nm CMOS RF Transmitter for UHF RFID Reader Khanh Nguyen Tuan Cuong Huynh P.M Analog Group Integrated Circuit Design Research and Education Center (ICDREC), Vietnam National University Ho Chi Minh-City, Vietnam E-mail: khanh.nguyentuan@icdrec.edu.vn Department of Telecommunication, Faculty of Electrical and Electronic Engineering Vietnam National University, University of Technology Ho Chi Minh-City, Vietnam E-mail: hpmcuong@hcmut.edu.vn the isolation between transmitter and receiver, the reader need only one antenna The reader waits for a backscatter signal from the tag and then a connecting was established between reader and tag Next, the reader will send data modulated ASK signal following PIE to the tag, and tag will be returned signal modulated ASK following Miller or FM0 [3] Abstract— This paper presents the design of the RF transmitter of RFID reader using 180-nm CMOS technology at 868 MHz The design of RF transmitter of RFID reader in this paper includes up-conversion mixer, balun and class E of power amplifier These results are maximum output power of 20.34 dBm, OP1dB of 19.3 dBm, PAE of 38.35% and power consumption of 168.57 mW The choice of transmitter architecture is determined by number of oscillators, external filters, wanted and un-wanted emission… The architecture and frequency planning of the transmitter must be tradeoff with the architecture of the receiver in a transceiver for simple, low power, PLL architecture In direct conversion transmitter, the output carrier frequency is equal to the LO frequency, modulation and up-conversion occur in the same circuit (Fig 2) Direct conversion transmitter architecture is the best choice for high level of integration and system on chip [2] Keywords—CMOS; UHF RFID Reader; transmitter; power amplifier (PA) class E I INTRODUCTION Radio frequency identification (RFID) applications are growing in many areas, such as object tracking systems, access control and animal identification [1] The RFID reader can access the information from the tag with the communication network The RFID system operating at low frequencies (125 kHz or 13.56 MHz) are limited in their distances and data rates With longer distance and higher data rates, the UHF frequency band RFID system will be used And to meet the demand of low cost, long battery life, the CMOS technology is believed to be the most candidates toward the system on a chip (SoC) In almost transceivers, the design of RF transmitters for wireless applications has many challenges such as the number of off-chip components, the tradeoff between the output power, the efficiency and the required linearity [2] Fig Communication between RFID reader and passive tag This paper presents the design of the RF transmitter of RFID reader integrated circuit (IC) using 180 nm CMOS technology at 868MHz following the European Telecommunications Standard Institute (ETSI EN 302 208) for RFID at frequency 865 -868 MHz [3] Section II describes the transmitter architecture Next, the design of PA, Mixer and balun are provided in Section III Section IV provides the simulation and layout results The conclusion of this paper is presented in Section V III CIRCUITS DESIGN The proposed transmitter architecture consists of I/Q upconversion mixer, balun, driver (class A PA) and power amplifier (class E PA) (Fig 2) The transmitter adopts a direct up-conversion I/Q modulation This work II TRANSMITTER ARCHITECTURE Passive tag is the most useful tag in RFID system because it requires no battery, simple and low cost The communication between the RFID reader and passive tag are shown in Fig First, the transmitter of RFID reader sends a continuous wave to the tag for power transfer By using the circulator which has 978-1-4673-8374-5/15/$31.00 ©2015 IEEE Fig Direct Conversion transmitter architecture with I/Q modulation 254 2015 International Conference on Advanced Technologies for Communications (ATC) tradeoff between the linearity and power consumption of this balun (Fig 5) [7, 8] A Power Amplifier Figure shows a schematic diagram of the two stages single ended power amplifier The first stage is a class E power amplifier at switching mode, which designed by Mr Sokal [4, 5] The cascode structure helps the class E have a good isolation and voltage between the drain and the source is lower 3.56Vdd The bias voltage is approximate the threshold voltage for good switching The second stage is a linear mode power amplifier, class A which is designed with the bias voltage larger than the threshold voltage Resistor R0 and capacitor C0 improve the stability of power amplifier Fig Schematic of active balun using transistor IV SIMULATION RESULTS This transmitter of UHF RFID reader IC was designed using 180 nm CMOS technology The power, efficiency, gain and linearity are the important parameters of the transmitter The output power of mixer, balun and driver were careful designed for input of the PA To consider the parasitic of inductors, the on chip inductors which used in this paper were designed by IE3D software as figure Off chip Fig Schematic of power amplifier class E and driver class A B Up-Conversion Mixer The up conversion mixer which shown in Fig is the Gilbert architecture [6] Fig Onchip inductor designed by IE3D After connecting all designs and simulation, the layout of them is shown in figure In this layout, the on chip inductors is exported from IE3D to Cadence by a gds file and the dimension of this transmitter is 2.75x0.87 mm2 All the component is on chip The output and inter stage matching circuits and radio frequency chokes (RFC) are off the chip Fig Schematic of up-conversion mixer with I/Q modulation The cascode current mirror (N1 to N3) applied a constant current for input stage (N4 and N5) [7] The input stage of I and Q up-conversion mixer are combined to one stage for simple and high level of integration The baseband signal (Vi) are up-converted to 868 MHz (Vrf) when combined with an ideal LO signal At the RF stage, the filter includes L1 and C1 are resonant at center frequency The on chip inductor L1 is designed and optimized using IE3D EM simulator Resistor R4 and R5 improve the linearity of the mixer Fig Layout of RF transmitter Table I shows the summarized results in the comparison with the others from published CMOS PA paper With supply voltage of 1.8 V and 2.5 V, the PA has the maximum output power of 21.3 dBm, Power Added Efficiency (PAE) of 38.35%, OP1dB of 20.77 dBm and the Power consumption of 152 mW Figure shows the relationship between PAE and Pout of PA in this paper by using a highly efficient nonlinear PA combined with a linear PA C Balun To transfer the differential signal from the output of the mixer to single ended signal of the driver, a balun is proposed Passive balun has no power consumption, but it takes a large area because of the coupled spiral inductors Active balun has very small chip area because it uses transistors There is a 255 2015 International Conference on Advanced Technologies for Communications (ATC) TABLE I SIMULATION RESULTS OF PA Parameter Frequency Stage/Class PA (this paper) 868MHz 2/A, E [9] 915MHz 2/AB, E [10] 900MHz 2/AB Vdd Output power max OP1dB 1.8V/2.5V 1.8V/2.5V 1.8V 20.77dBm 14.5dBm 18.4dBm -120 PAE 38.35% 32.1% 35.4% -140 40dB 27dB 23.3dB 152mW 271mW Power Gain Power consumption 21.1dBm This paper 0.18μm 868MHz Yes 38.35% [11] 0.18μm 900MHz Yes NA 19.3dBm Gain NF (DSB) Power consumption PAE (PA) OP1dB -80 -100 20.6dBm 27.38dB 17.8dB 22dB - 14.8dB 11.2dB NA - 168.57mW 191.4mW 195.7mW - 10 20 (OP1dB) (-11.25, -2.98974) Pout 1st order 868MHz -4 -6 -8 -10 -12 -20 -10 10 20 Pin (dBm) Fig 11 OP1dB of Balun Finally, all of these blocks are integrated to the RF transmitter RFID reader These results are maximum output power of 20.34 dBm, OP1dB of 19.3 dBm (Fig 12) and power consumption of 168.57 mW in Table II 22 Output power at 1dB compression point (-16.48, 19.301) 20 Output Power (dBm) PAE (%) Pout 18 PAE Pout (dBm) 40 30 -10 -2 The simulation results show that the mixer provides -3.3 dB of conversion gain and the input referred third order intercept point (IIP3) of 11.7 dBm (Fig 10), output power at 1dB compression point (OP1dB) of -5.127 dBm with power consumption of 6.87 mW only 10 -20 Results of balun have power gain of 17.71 dB and OP1dB of -2.98 dBm (Fig 11) with power consumption of 9.7 mW 16.4dBm (868000000, 38.35) IIP3 -30 Fig 10 IIP3 of up-conversion mixer 18dBm (868000000, 20.918) 1st order 868.1MHz 3rd order 867.9MHz Pin (dBm) - [13] 0.18μm UHF Yes 35.4% Pout 3rd order -60 -40 [12] 0.18μm UHF Yes 31% 20 (11.7, 5.43) 1st order -160 SIMULATION RESULTS OF RF TRANSMITTER IN THIS PAPER Parameter Technology Frequency PA onchip OIP3 -40 Pout (dBm) TABLE II 20.0dBm -20 Pout (dBm) 21.3dBm 20 16 1st order 868MHz 14 12 10 20 -10 10 -20 -30 400.0M 600.0M 800.0M 1.0G 1.2G 1.4G 1.6G Frequency(Hz) TABLE III 30 25 PAE (%) -10 -5 PAE (20.615689967376, 37.245661148089) 35 COMPARATION BETWEEN RESULTS OF SCHEMATIC AND POST LAYOUT SIMULATION Schematic OP1dB (dBm) 20.77 Power (dBm) @ 868MHz 20.91 Post Layout Schematic Post Layout Schematic Post Layout 14.98 -5.1 -10.89 -2.98 -4.48 14.18 - Parameter 20 15 PA 10 Mixer -5 -30 -15 The post layout simulation results of this paper are shown in Table III: Fig Output power and PAE of PA 40 -20 Fig 12 OP1dB of RF transmitter -30 200.0M -25 Pin (dBm) -20 -10 10 20 Balun Pout (dBm) Fig Pout vs PAE of PA 256 2015 International Conference on Advanced Technologies for Communications (ATC) V CONCLUSION Output Power PA_Schematic Output Power PA_PostLayout (868000000, 20.918) 20 The RF transmitter of UHF RFID reader is designed using 180 nm technology The RF transmitter has 2.75x0.87 mm2 die size while consumes 168.57 mW, the maximum output power of 20.34 dBm, OP1dB of 19.3 dBm and PAE of 38.35% Output waveform of PA is the ASK The results of Post Layout, efficiency, linearity will be improved and can be used for UHF RFID reader Besides, the external component will affect to all performance, especially the output power of PA It’s essential to quantify the effects that package parasitic will have on the circuit being designed (868000000, 14.18) O utput Pow er (dBm ) 10 -10 -20 -30 200.0M 400.0M 600.0M 800.0M 1.0G 1.2G 1.4G 1.6G Frequency (Hz) Fig 13 Results of schematic and post-layout simulation of PA Figure 14 shows the output signal output of each block Baseband ACKNOWLEDGMENT Output Mixer I/Q The author wish to thank Dr Cuong Huynh P.M for his advices and members of RFIC Group at Ho Chi Minh University of Technology for their helpful comments in this paper Thanks to Ministry of Science and Technology, Viet Nam and VNU HCM for the grant in the form of a state-level research project with Code number: DAKHCN.2011/DT-03 Output Balun Input driver Output PA Fig 14 Signal waveform of each block in this paper The results of corner and temperature of Balun, Mixer and PA are shown in Fig 15, 16, 17, respectively OP1dB OP1dB OP1dB OP1dB OP1dB Balun at at at at at REFERENCES 27C-tt -3.14dBm -44C-tt -3.063dBm 85C-tt -3.392dBm 27C-ff -1.177dBm 27C-ss -7.27dBm [1] [2] Pout (dBm) (-11.131, -1.177) (-12.21, -3.063) (-11.4, -3.14) [3] (-10.876, -3.392) -5 [4] (-12.19, -7.27) 1st order 868MHz -10 -10 10 [5] Pin (dBm) Fig 15 Results of corner and temperature OP1dB simulation of Balun OP1dB at 27C-tt -6.34dBm Mixer OP1dB at -44C-tt -6.774dBm (2.7028, -3.466) OP1dB at 85C-tt -6.08dBm OP1dB at 27C-ff -3.466dBm OP1dB at 27C-ss -9.623dBm (4.018, -6.08) (-0.543, -6.774) (2.197, -6.34) (1.5945, -9.623) Pout (dBm) -5 -10 [6] [7] [8] [9] -15 -20 -25 [10] -30 1st order 868MHz -20 -10 10 Pin (dBm) [11] Pout (dBm) Fig 16 Results of corner and temperature OP1dB of Mixer PA 45 PAE (%) 40 35 30 25 20 15 10 -5 -10 -15 -20 -25 -30 -35 200.0M 400.0M 600.0M 800.0M 1.0G [12] Pout 27C-tt 20.51dBm PAE 27C-tt 36.08% Pout -44C-tt 20.55dBm PAE -44C-tt 35.08% Pout 85C-tt 20.306dBm PAE 85C-tt 34.109% Pout 27C-ff 20.876dBm PAE 27C-ff 34.109% Pout 27C-ss 20.08dBm PAE 27C-ss 37.76% 1.2G 1.4G [13] 1.6G Frequency (Hz) Fig 17 Results of corner and temperature Pout and PAE of PA 257 Klaus Finkenzeller, RFID Handbook, 2nd ed., New York: Wiley, 2003 Behzad Razavi “RF Transmitter Architectures and Circuits”, IEEE, 1999 European Standard (Telecommunications series) RFID equipment operating in the band 865MHz to 868MHz with power levels up to 2W, ETSI EN 302 208- 1, V1.1.1 Andrei Grebennikov, Nathan O Sokal, Switchmode RF Power Amplifiers, Linacre House, Jordan Hill, Oxford, UK, 2007 Nathan O Sokal, Alan D Sokal, “Class E- A new class of high efficiency tuned single-ended switching Power Amplifier”, IEEE JSSC, June 1975 Cuong Huynh, Microwave/RF Integrated Circuit Design, HCM University of Technology, Chapter 5, 2014 Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw Hill, New York, 2001 Behzad Razavi, RF Microelectronics, 2nd edition, Prentice Hall, 2011 Gao Tongqiang, et al, “Design and Analysis of a Highly Integrated CMOS Power Amplifier for RFID Reader”, IEEE, 2008 HanKefeng, et al, “A 900 MHz, 21dBm CMOS linear power amplifier with 35% PAE for RFID readers”, Chinese Institute of Electronics, 2010 Kyonggon Choi, et al, “CMOS DSB Transmitter with Low TX Noise for UHF RFID Reader System on Chip”, IEEE, 2010 Jingchao Wang, et al, “A fully Integrated CMOS UHF RFID Reader Transceiver for Handheld Applications”, IEEE CICC, 2009 Tongqiang Gao, et al, “A Novel CMOS Transmitter Front end for Mobile RFID Reader”, IEEE, 2009 ... consumption, but it takes a large area because of the coupled spiral inductors Active balun has very small chip area because it uses transistors There is a 255 2015 International Conference on Advanced... power amplifier, class A which is designed with the bias voltage larger than the threshold voltage Resistor R0 and capacitor C0 improve the stability of power amplifier Fig Schematic of active balun... schematic diagram of the two stages single ended power amplifier The first stage is a class E power amplifier at switching mode, which designed by Mr Sokal [4, 5] The cascode structure helps the class