Kỹ thuật viễn thông lab 6

INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) DIGITAL LOGIC SYSTEMS LABORATORY Lab COUNTER IC Full name: Student Number: Class: Date: DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) I/ OBJECTIVES After completing this experiment, you should be able to:  Implement the decade counters, dual decade counters and presettable 4-bit binary up/down counter  Design programmable frequency division  Understand the operations of some IC counters II/ COMPONENTS REQUIRED Main board and sub board of Digital Logic System Kit IC 74LS90 : Decade Counters IC 74LS193: Presettable 4-bit binary up/down counter IC 74LS390: Dual 4-Bit Decade Counter III/ INTRODUCTION Decade and binary counter 74LS90  Implement given circuit and get the results  Use an extra IC 74LS00 and wire them as a MOD-6 counter Dual 4-bit decade counters 74LS390  Wire the 74LS390 as a MOD-100 counter  Wire the 74LS390 as a MOD-60 counter Presettable 4-bit binary up/down counter  Describe the function of each input and output  Variable MOD number using the 74193 (Up and Down counter) IV/ PRE-LAB - Pre-lab includes reading the lab assignment in advance, answering the questions or doing the calculations, and if necessary reviewing the material in the textbook All prelab preparation must be recorded and dated in the lab sheet prior doing the lab The lab instructor will check your pre-lab write-up and sign your pre-lab sheet - Answering all the questions, fulfill the truth table and draw circuit or logic diagram (in figures 3, 5, 6, 9, 10, 11) on this experiment before doing the lab - If you don’t prepare the pre-lab, you will not allowed to experiment IV/ EXPERIMENT COMMON ANODE 7-SEGMENT LED & DECODER IC 74LS47 Figure – IC7447 and 7-segment - LED DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE)  The pins a, b, c, d, e, f, g of IC 7447 are connected to a, b, c, d, e, f, g of 7-segment led display shown in figure  The data inputs D, C, B, A are connected to switches  The control inputs LT, RBI, BI/RBO are connected to switches and they are in the appropriate states to make the circuit operating  Fulfill the truth table of IC7447 in Table Inputs Control inputs Data inputs LT RBI RBO D C B A 1 1 1 1 1 X X 1 1 1 1 1 X 1 1 1 1 1 1 0 0 0 0 0 1 1 1 X X X X X X 0 1 0 1 0 X X X Outputs a b c d e Display f g 1 1 X X X Table – True table of IC7447  What is the function of the pins: Lamp-Test (LT), Ripple-Blanking Input (RBI), Blanking Input or Ripple Blanking Output (BI/RBO): Lamp Test (LT): Ripple-Blanking Input (RBI): Blanking Input/Ripple Blanking Output (BI/RBO): Decade counter 74LS90 DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) Figure 2: IC 74LS90 IC 74LS90 contains a divide-by-two counter and a divide-by-five counter Each counter can be used separately or tied together (QA to input B) to form BCD counter 74LS90 have Master Reset inputs (R0(1), R0(2)) and Master Set inputs (R9(1), R9(2)) a.Implement BCD counter Imlement BCD counter using 74LS90 • Connect Clock signal to CLKA • Connect QA to CLKB • Connect R01, R02, R91, R92 to switches for controlling operations • Connect outputs (QA, QB, QC, QD) to BCD to 7-segment display block 14 C LO C K SW 1,2,3,4 C LKA C LKB R R R R 0 9 2 Q Q Q Q A B C D 12 11 BCD TO 7-SEGMENT DISPLAY 74LS90 Figure 3: BCD counter b Use an extra IC 74LS00 and wire them as a MOD-7 counter (counting from to 6)  Draw the circuit appropriately in figure  Implement the circuit and observe the results on 7-segment-led Figure – Mod counter using 74LS90 and 74LS00  Show the way to implement: DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) IC 74LS390: DUAL 4-BIT DECADE COUNTER Figure – Logic diagram of 74LS390    IC 74LS390 includes decimal counters as figure CLR: Clear (high level active) QA, QB, QC and QD: outputs of the MOD-10 counter a Wire the 74LS390 as a MOD-100 counter  Implement the circuit shown in logic diagram of Figure  The outputs QA, QB, QC and QD are connected to BCD TO 7-SEGMENT DISPLAY  The CLR inputs are connected to switches to control the circuit operation C LO C K SW U 1A C KA C KB C LR Q Q Q Q A B C D Q Q Q Q A B C D BCD TO SEGMENT DISPLAY 74LS390 15 12 SW 14 U 1B C KA C KB C LR 13 11 10 BCD TO SEGMENT DISPLAY 74LS390 Figure 6: Counter having M=100  Observe and explain the results b Wire the 74LS390 as a MOD-60 counter DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE)   Use only an extra IC 74LS00 for wiring a counter having M = 60 Draw the circuit appropriately in figure  Show the way to implement: Figure – Mod-60 counter PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER 74LS193 The counter IC 74LS193 has: • Data inputs: P3P2P1P0 • Count up pin: CLKU (CPU) • Count down pin:CLKD(CPD) • Load pin: LOAD ( PL ) • Data output :Q3Q2Q1Q0 • Clear pin: CLR (MR) • Carry pin: CO ( TCU ) • Borrow pin: BO ( TC D ) Figure 8: 74LS193 a The function of each input and output  The outputs QA, QB, QC, QD and CO , BO are connected to Led display as figure  The inputs are connected to switches Set P3P2P1P0 are equal to 0000  1Hz clock is used for COUNT UP (CLKU) and COUNT DOWN (CLKD) DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) SW0 SW1 SW2 SW3 15 10 SW4 SW5 14 11 P P P P 74LS193 U Q Q Q Q C LKD C LKU BO C O 13 12 C LR LO AD Figure – 74LS193 Logic and connection diagram Check the following functions (fulfill the Table 1): CLR 0 0→1 LOAD 1 1→0 1 UP CLK X X DOWN CLK X X FUNCTION Table  Let the circuit count up and down What is the output state of CO and BO ?  What is the function of CO and BO ? b Programmable up counters  Design a counter count up from 0100 to 1111 Show the way to implement: Draw the logic diagram in figure 10: Figure 10 - Counter count up from 0100 to 1111 DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE)  Counter count up from 0000 to 1100 Show the way to implement: Draw the logic diagram in figure 11: Figure 11 - Counter count up from 0000 to 1100  Counter count up from 0100 to 1101 Show the way to implement: Draw the logic diagram in figure 12: Figure 12 - Counter count up from 0100 to 1101 DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE) c Programmable down counters  Design a counter count down from 1111 to 0100 Show the way to implement: Draw the logic diagram in figure 13: Figure 13 - Counter count down from 1111 to 0100  Counter count down from 1101 to 0000 Show the way to implement: Draw the logic diagram in figure 14: Figure 14 - Counter count down from 1101 to 0000 DIGITAL LOGIC SYSTEMS Page of 10 INTERNATIONAL UNIVERSITY SCHOOL OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING (EE)  Counter count down from 1101 to 0100 Show the way to implement: Draw the logic diagram in figure 15: Figure 15 - Counter count down from 1101 to 0100 ********* DIGITAL LOGIC SYSTEMS Page 10 of 10 ... preparation must be recorded and dated in the lab sheet prior doing the lab The lab instructor will check your pre -lab write-up and sign your pre -lab sheet - Answering all the questions, fulfill... IV/ PRE -LAB - Pre -lab includes reading the lab assignment in advance, answering the questions or doing the calculations, and if necessary reviewing the material in the textbook All prelab preparation... table and draw circuit or logic diagram (in figures 3, 5, 6, 9, 10, 11) on this experiment before doing the lab - If you don’t prepare the pre -lab, you will not allowed to experiment IV/ EXPERIMENT