ĐỒ án cấu TRÚC máy TÍNH LAB3 DESIGN a MIPS 32 BIT SINGLE CYCLE CPU

ĐỒ án cấu TRÚC máy TÍNH LAB3 DESIGN a MIPS 32 BIT SINGLE CYCLE CPU

 PHÂN CÔNG CÔNG VIỆC ĐỒ ÁN CẤU TRÚC MÁY TÍNH LAB3: DESIGN A MIPS 32 -BIT SINGLE - CYCLE CPU  Công việc cụ thể ST T Tên thành viên Công việc Đóng góp 1 Nguyễn Văn Cường + Tìm hiểu lại LAB 1: Thiết kế RegisterFile 32 by 32 +Tìm hiểu hoạt động và thiết kế : Khối Control, Khối dịch trái, Khối mở rộng + Slide: phần I. 30% 2 Đặng Ngọc Hoàng + Tìm hiểu lại LAB2: Thiết kế bộ tính toán ALU. +Tìm hiểu hoạt động và thiết kế: Thanh ghi PC, Khối JR_Control, Các khối Multiplexor + Slide: phần II 1,2. 30% 3 Lê Hữu Việt + Tìm hiểu lại chương 4 sách COD Tìm hiểu hoạt động và thiết kế: ALUControl, MIPS, Khối mô phỏng Stimulate + Slide: phần II3,III. + Báo cáo. + Mô phỏng lệnh trên Quartus 40%  Tiến trình làm việc: - Tìm hiểu tài liệu theo nhiệm vụ được giao. - Thảo luận nhóm thống nhất sơ đồ khối cần thực hiện. - Viết Code cho từng khối. - Chia sẻ hiểu biết của từng thành viên trong nhóm về phần mình thiết kế. - Ghép nối các khối với nhau, hiệu chỉnh thiết kế. - Mô phỏng trên ModelSim và sơ đồ khối ở Quartus. Lab3: Design a MIPS 32 -bit Single-Cycle CPU  Yêu cầu thiết kế:     Yêu cầu chung:   !"#$%&' ()* +,-./)!012*3"  4/5*/6/&5*7 889.9.9:9;9.;9<9=>-9:  6//?*&@/!A*/BC)6D*EFG@9FHI&JKLMNO  6/!P1Q)!R*&@//B RIS*/T) (U/&5*"F@(&O  Tập lệnh:  5*&@V7 • ADD(I9(N9( 7 W(IXYW(NXZW( XO • JR(N7 YW(NXO • SLT(I9(N9( 7 -[\W(NX]W( X^W(IXYL$LLLLLLL  &N W(IXYL$LLLLLLLLO • SUB(I9(N9( 7 W(IXYW(NXW( XO  5*&@V-7    • BNE(N9( 9,,_7 [\W(NX`YW( X^YZDZ.*a$ \-,,_^]] &NYZDO  • LW( 9,,_\(N^7W( XY,WW(NXZ.*a$ \-,,_^XO • SW( 9,,_\(N^7,WW(NXZ.*a$ \-,,_^XYW( XO XOR-( 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0@# !":" & Bộ tính toán – ALU:  FG.H;IJ KALMN;LMNN 0 KA/O0 KPQA/ R LS3 /4/-L  QR CTU=VWX0Y!  QLS3M==Z=[\]L^_`F CTa=:X4/M  Q/4M==Z=[\]L^_=bF :X4/=`=^ TU].HN  Q/-L CTUVVWXc KdALMCe=f;IJE0:PCg==hPM;IJ i=Z=[    Bảng 1. Tín hiệu điều khiển ALU  ;IJ/0/4RLS3/-L;   !"  R/-LLS3/4   !"/0   !"; 3 !"0: 31/10 3/0 ;0/!/0/1/ H000!/00100 H0!/0 j0:!/0: :&: :;0: 77OOk,$IO@NOOdlk;mJ 3 !" /2'!/!!"n;"1/ /2'!/";"10 2'!!"!"" / 2'!/LS3"n;!" 77Od,l;mk, //-L6" 77R 3+ !":  2'!!:!"!""""  2'!!:"&"'"(")"  2'!!:"*"+"!""  2'!!&:"""&"'"  2'!!':&"(")"*"+"  2'!!(:'"!""""  2'!!):("&"'"(")"  2'!!*:)"*"+"!""  2'!+:*":":":":!"  2'!!:+":)":(":'":&"  2'!!R:*":+" 77/4 3 !"4 /2'!/4!"n;"/ /2'!/&4";"0 2'!4"4!"4" / 2'!/'/44"n;!"   y  ' Bộ nhớ dữ liệu – Data Memory: - d=oVWXp/0\;IJMCg/=qALM - dV`=/PCBr[/[=I@=s./CTU==h CBr[/ - dV`=/P=r[LM0\=^[=H@=s.@CTUt ==h=r[LM  #//.////3//3/0./  !"/3// 3/0./  !"/// ) !"//! !"  !"  L [...]... buf29(readdata[29],temp[29]), buf14(readdata[14],temp[14]), buf30(readdata[30],temp[30]), buf15(readdata[15],temp[15]), buf31(readdata[31],temp[31]); always @(posedge clk) if (writeenable) begin datamem[address]=writedata[31:24]; datamem[address+1]=writedata[23:16]; datamem[address+2]=writedata[15:8]; datamem[address+3]=writedata[7:0]; end always @(address or datamem[address] or datamem[address+1] or datamem[address+2]...ĐỒ ÁN CẤU TRÚC MÁY TÍNH – LAB 3 buf #1000 buf0(readdata[0],temp[0]), buf16(readdata[16],temp[16]), buf1(readdata[1],temp[1]), buf17(readdata[17],temp[17]), buf2(readdata[2],temp[2]), buf18(readdata[18],temp[18]), buf3(readdata[3],temp[3]), buf19(readdata[19],temp[19]), buf4(readdata[4],temp[4]), buf20(readdata[20],temp[20]), buf5(readdata[5],temp[5]), buf21(readdata[21],temp[21]), buf6(readdata[6],temp[6]),... ALU - KHOI TINH TOAN CHINH */ assign ALUin1 = ReadData1; Mux_2x32to32 Mux_Input_ALU( ALUin2, ReadData2, Extend, ALUSrc); ALU ALU_Unit(ALUResult, ALUin1, ALUin2, Carry, Zero, Overflow, Negative, ALU_Control); ALU_Control_Unit ALUControl( ALU_Control, ALUOp, Funct); /* DATA MEMORY - BO NHO DU LIEU */ assign Mem_WriteData = ReadData2; assign Mem_Address = ALUResult; DataMem DataMemory( Mem_ReadData, ALUResult,... buf22(readdata[22],temp[22]), buf7(readdata[7],temp[7]), buf23(readdata[23],temp[23]), buf8(readdata[8],temp[8]), buf24(readdata[24],temp[24]), buf9(readdata[9],temp[9]), buf25(readdata[25],temp[25]), buf10(readdata[10],temp[10]), buf26(readdata[26],temp[26]), buf11(readdata[11],temp[11]), buf27(readdata[27],temp[27]), buf12(readdata[12],temp[12]), buf28(readdata[28],temp[28]), buf13(readdata[13],temp[13]),... Reg_WriteData; wire [4:0] WriteRegister; // Gia tri cac thanh ghi // Gia tri ghi vao thanh ghi dich // Thanh ghi dich // KHAI BAO DATA MEMORY wire [31:0] Mem_ReadData, Mem_Address, Mem_WriteData; // Du lieu xuat ra tu bo nho // Dia chi DataMemory // Du lieu ghi vao bo nho ( = ReadData2) // KHAI BAO SHIFTER wire [31:0] Bne_shift_in, Bne_shift_out, Jump_shift_in, Jump_shift_out; // Ngo vao bo dich trai (BNE)... wire Zero, Negative, Overflow, Carry; // 2 ngo vao cua bo ALU // Ket qua cua bo ALU // Cac co` cua bo ALU wire JR_Control; wire Bne_Control; wire [1:0] ALU_Control; // Tin hieu dieu khien lenh Jump Register // Tin hieu dieu khien lenh BNE // Tin hieu ra cua ALU_Control_Unit wire [31:0] Extend; // 3 2bit mo rong dau cua 1 6bit immediate // KHAI BAO REGISTER FILE wire [31:0] ReadData1,ReadData2; wire [31:0]... trị c a tín hiệu điều khiển ALUop từ bộ điều khiển trung tâm và 6 -bit Function giãi mã từ lệnh để tạo ra tín hiệu điều khiển ALUControl cho bộ tính toán ALU Bảng 3 Giá trị c a ALUop và ALUControl Code: NHÓM 28 Page 15 ĐỒ ÁN CẤU TRÚC MÁY TÍNH – LAB 3 module ALU_Control_Unit(ALUControl,ALUop,Funct); input [1:0]ALUop; input [5:0]Funct; output [1:0]ALUControl; reg [1:0] ALUControl; wire [7:0] ALUCtrl; assign... or datamem[address+2] or datamem[address+3]) begin temp={datamem[address],datamem[address+1],datamem[address+2],datamem[address+3]}; end initial begin $writememb("data.txt", datamem); end endmodule 6 Khối điều khiển trung tâm – Control Unit: - Tạo ra các tín hiệu điều khiển: + RegDst: Chọn thanh ghi đích cho RegisterFile RegDst = 0: Rt là thanh ghi đích, lệnh loại I RegDst = 1: Rd là thanh ghi đích,... Mem_WriteData, MemWrite, MemRead, clk); Mux_2x32to32 Mux_WriteData( Reg_WriteData, ALUResult, Mem_ReadData, MemtoReg); /* BNE CONTROL */ assign Bne_shift_in = Extend; Shiftleft2 Shift_bne( Bne_shift_out, Bne_shift_in); Add_3 2bit Adder_bne( PC_4, Bne_shift_out,,, Bne_Address); not #(50) notBNE(NotZero,Zero); and #(50) andBNE(Bne_Control,Branch,NotZero); Mux_2x32to32 Mux_BNE( PC_Bne, PC_4, Bne_Address,... c a Control_Unit Code: module Control_Unit( RegDst, ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, Branch, ALUop, Jump, SignZero z,OpCode); input [5:0]OpCode; output Jump,RegDst,ALUSrc,MemtoReg,RegWrite,MemRead,MemWrite,Branch,SignZero; output [1:0]ALUop; reg Jump,RegDst,ALUSrc,MemtoReg,RegWrite,MemRead,MemWrite,Branch,SignZero; reg [1:0]ALUop; NHÓM 28 Page 12 ĐỒ ÁN CẤU TRÚC MÁY TÍNH – LAB 3 always . CÔNG CÔNG VIỆC ĐỒ ÁN CẤU TRÚC MÁY TÍNH LAB3: DESIGN A MIPS 32 -BIT SINGLE - CYCLE CPU  Công việc cụ thể ST T Tên thành viên Công việc Đóng góp 1 Nguyễn Văn Cường + Tìm hiểu lại LAB 1: Thiết kế. ở Quartus. Lab3: Design a MIPS 32 -bit Single- Cycle CPU  Yêu cầu thiết kế:     Yêu cầu chung:   !"#$%&' ()* +, - ./)!012*3". Multiplexor: - #,)& M&$@($KaK/u* *1j//@N (r& - #,)& M&$@($ a /u**EFG@ ~/@"#9Ik&5)FQ N (r&FG/u*&41m/t/g&5*