Broadband Circuits for Optical Fiber Communication phần 8 potx

Table 8.1 Examples for high-speed laser driver prOdUCtS. Company & Product Agere LG 1625AXF Agere LG 1627BXC Infineon S896A006 Maxim MAX3867 Nortel YAO8 Philips OQ2545HP 2.5 90 2.5 100 2.5 2.5 90 2.5 150 2.5 120 65 85 60 60 80 60 40 520 GaAs HFET 60 730 GaAs HFET 60 1.5 165 Si BJT 100 2.0 205 100 I .4 350 Si BJT 1 00 3.0 350 Si BJT Agere TLADO 1 1 OG 10.0 30 100 120 1.7 780 GaAs HFET Agere TCLDOl 1 OG 10.0 25 100 100 780 GaAs HFET Maxim MAX3930 10.0 29 100 I00 1.6 540 SiGe HBT Table 8.2 Examples for high-speed modulator driver products. Agere LG 1626DXC 2.5 90 3.0 (s) 1.5 730 GaAs HFET Agere TMODOl 10G 10.0 30 5.4 (d) 1,400 GaAs HFET Giga GD19901 10.0 45 6.0 (d) (3,200) GaAs HFET Giga GD 19903 10.0 45 10.0 (d) (8,600) GaAs HFET Maxim MAX3935 10.0 34 3.0 (s) I .2 550 SiGe HBT OKI KGL4 115F 10.0 40 2.7 (s) 1 .o 1,300 GaAs HFET ~~- ~~~ ~~~ AMCC S76803 48.0 7 7.0 (d) SiGe HBT Velocium AUH232 43.0 8 8.0 (s) 1,250 GaAs HFET RESEARCH DIRECTIONS 307 0 In GaAs-HFET technology, a 20-Gb/s laser driver has been reported in [196]; 40-Gb/s modulator drivers with a single-ended swing of 2.9Vpp and 6V,, have been reported in [79] and [ 1721, respectively. 0 In InP-HBT technology, a 20-Gb/s modulator driver with 4.0-V,, single-ended swing and a 40-Gb/s EAM driver with 2.2-V,, single-ended swing have been reported in [89] and [66], respectively. Higher Integration. Another area of research aims at higher integration by com- bining the laser diode, monitor photodiode, and the driver circuit on the same chip, creating a so-called optoelectronic integrated circuit (OEIC). For example, a com- plete transmitter consisting of a 1.5-pm distributed feedback (DFB) laser and an HFET driver circuit have been integrated on a single InP substrate [84]. However, it is a challenge to combine laser and cincuit technologies effectively into a single one because of the significant structural differences between lasers and transistors. For example, lasers require mirrors or gratings for their operation, whereas transistors don’t. As a result, transmitter OEICs are not as far advanced as receiver OEICs. An alternative to the above-mentioned monolithic OEICs is the integration of lasers and drivers by means of flip-chip technology. An important advantage of this flip-chip OEIC approach is that the technologies for the laser chip and the driver chip can be chosen (and optimized) independently, thus avoiding the compromises of monolithic OEICs. Lower Power. With increasing miniaturization of the transceiver modules, the heat generated by the driver becomes a moire serious problem. When using an uncooled laser, the heat from the driver may degrade the laser’s performance and lifetime; when using a cooled laser, the thermoelectric cooler must work extra hard to remove the heat from the laser and the driver. Therefore, low-power laser drivers are a subject of great interest. The power dissipation and the associated heating can be reduced by lowering the supply voltage and coupling the driver directly to the laser, that is, avoiding a trans- mission line and the losses due to matching and termination resistors. Copackaging techniques can be used to keep the package and interconnect parasitics small. To ob- tain a good eye quality in direct-coupled high-speed drivers, it is important to model the L-C parasitics accurately and to dampen them sufficiently to minimize ringing and jitter. Lower Cost. Another area of research is focusing on the design of high- performance drivers in low-cost, mainistream technologies. For the reasons already given in Section 5.5, digital CMOS is of particular interest. For example, 1 O-Gb/s, 0.18-pm CMOS laser drivers have been reported in [ 1281 and [31]. A laser driver for a fiber-to-the-home system must be very low cost to be competitive with traditional telecom services and low power to minimize the size and cost of the back-up battery. Such a CMOS burst-mode laser driver consuming only 15 mW has been reported in [ 1621. 308 LASER AND MODULATOR DRIVERS 8.6 SUMMARY The main specifications of digital laser and modulator drivers are as follows: 0 The modulation and bias current ranges for laser drivers, which must be large enough to operate the desired laser under worst-case conditions. In particular, uncooled lasers require large current ranges. 0 The output voltage range (or compliance voltage) for laser drivers. The low end of this range should be as low as possible to permit DC coupling of the laser while maintaining a low supply voltage. 0 The modulation and bias voltage ranges for modulator drivers, which must be large enough to operate the desired modulator under worst-case conditions. In particular, high-speed Mach-Zehnder (MZ) modulators require a large modu- lation voltage (or voltage swing). 0 The power dissipation, which should be as low as possible to save power and limit undesirable heat generation. 0 The rise and fall times, which must be short compared with the bit period. However, the rise time of laser drivers should not be too short to limit the generation of optical chirp. 0 The pulse-width distortion, which usually is compensated with an adjustable pulse-width control circuit. 0 The jitter generation, which must be very low for SONET compliant transmitter. In addition, some standards, such as SONET, require that the transmitted optical signal complies with a given eye mask. The output stage of most laser and modulator drivers is based on the current- steering circuit, which has the following advantages: high switching speed, low noise generation, low noise sensitivity, and programmability of the output signal swing. DC or AC coupling can be used to connect the current-steering output stage to the laser or modulator load. AC coupling permits a lower supply voltage, but requires more external components. The driver can be connected to the laser or modulator either directly (eg, through a short bond wire) or through an impedance-matched transmission line (with or without back termination). The use of a transmission line permits a larger distance between the driver and the laser or modulator. A predriver, which provides voltage gain and a low-impedance output, normally is used to drive the large output stage. Pulse-width control to compensate for pulse- width distortions usually is implemented by introducing an adjustable offset voltage at the input of the predriver. A flip-flop for data retiming can be used to reduce jitter and pulse-width distortions at the driver output. In laser drivers, an automatic power control (APC) circuit uses negative feedback from the monitor photodiode to keep the optical output power, and optionally the extinction ratio (ER), constant. Similarly, for MZM drivers, an automatic bias control (ABC) circuit is required to stabilize PROBLEMS 309 the operating point of the MZ modulatlor. Some laser drivers feature an end-of-life detector, which issues an alert that the laser must be replaced soon. Burst-mode laser drivers require a very high interburst ER and a special APC circuit that operates correctly for a bursty data signal. Analog laser/modulator drivers must be highly linear to minimize signal distortions and thus often incorporate a linearization scheme. Laser and modulator drivers have been implemented in a wide variety of technolo- gies including metal-semiconductor FET (MESFET), heterostructure FET (HFET), BJT, heterojunction bipolar transistor (IIBT), BiCMOS, and CMOS. Currently, researchers are working on 40-Gb/s modulator drivers and beyond, drivers integrated with the laser or modulator on the same chip, low-power laser drivers, as well as laser and modulator drivers in low-cost technologies such as CMOS. 8.7 PROBLEMS 8.1 Switching a Current-Steering Circuit. (a) Calculate the differential voltage necessary to completely switch an FET current-steering circuit (without source degeneration). The tail current is IM and the FETs can be described by the quadratic model ID = pnC&/2 . W/L . (VGS - VTH)*. (b) Calculate the differential voltage necessary to switch a BJT current-steering circuit (without emitter degeneration) such that 99% of the tail current flows into one output. The tail current is IM, and the I3JTs can be described by the model Ic = ko . exP(vBE/ VT). 8.2 Interconnect Inductance. A 5.1!-V, lO-Gb/s laser driver has 30-ps rise and fall times (measured from 20% to 80%) and is programmed for a modula- tion current of 5OmA. The DC-coupled laser and the series resistor together drop 2.5 V (when the laser is on) and the driver has a compliance voltage of 1.5 V. What is the maximum inductsnce that can be tolerated in the driver-to- laser interconnection? 8.3 Current Efficiency for Passive Rack Termination. A laser driver is imple- mented with a passive back termination, RT that matches the characteristic impedance of the transmission line, Ro. The laser’s IN characteristics can be modeled as VL = VTH + RLD . IL . To provide matching with the transmission line, a resistor Rs = RO - RLD is used in series with the laser. The tail cur- rent of the output stage is Ih and the bias current, which is injected into the laser through an FWC, is I;. (a) What fractions of Ih and I; end up doing useful work in the laser? (b) How large are these fractions given Ro = 25 Q, RLD = 6 a, and VTH = 1 V? 8.4 Passive vs. Active Back Termination. Calculate the output voltage, vg. as a function of the input voltage, 111, and the output current, ig, for the three idealized circuits shown in Fig. 8.38. How do these circuits relate to a driver with passive and active back termiination? 310 LASER AND MODULATOR DRIVERS Fig. 8.38 Three implementations of a voltage controlled source with output resis- tance R. 8.5 Pulse-Width Controller. A pulse-width controller operating according to the principle illustrated in Fig. 8.13 receives an input signal with the differential voltage swing 4‘’ and the symmetrical 20% to 80% rise/fall times t~ = tF. (a) Given the offset voltage VOS, what is the pulse-width distortion, tpw~, that it can compensate? Assume that VOS << 4”. (b) Given t~ = t~ = 0.3 UI and VOS = -0.14’’ . . . 0.14’, what is the range of PWD that can be compensated? 8.6 Speed of MOS CML. A MOS CML inverter, consisting of an n-MOS differ- ential pair, load resistors R and R’, and a tail-current source Il, is loaded by another identical inverter. The differential output voltage swing of the inverter is 4’ and the differential input switching voltage (peak-to-peak) is 4Ym,,. (a) Assuming the quadratic MOS model and considering only the gate-source capacitance, calculate the 20% to 80% rise/fall times in response to a square- wave input signal. (b) Assuming the “large-signal gain” upd)/~~ml,, is set to its minimum value of one, how does the speed depend on the logic swing, $’? 8.7 Power Penalty due to Finite APC Loop Bandwidth. A single-loop APC with a simple R-C loop filter, as shown in Fig. 8.16, is used to control the average output power of a transmitter. Assume that the gain A of the op amp is frequency independent, a change in laser current AIL causes the monitor-photodiode current to change by .$ . AIL, and a change in bias control voltage AVBC causes the bias current to change by g, . A VBC. What is the low-frequency cutoff of the transmitter and how large is the associated power penalty? 8.8 Extinction Ratio and Slope Efficiency. A laser driver with a single-loop APC has a constant modulation current lM, whereas the bias current IB is controlled such that the average optical power remains at p. (a) How does the extinction ratio depend on the slope efficiency of the laser? Assume that the optical power from the laser is P = 6 .( IL - ITH) for laser currents above threshold, IL > ITH, and zero for laser currents below threshold. (b) What value does ER assume if the slope efficiency drops by 30% and the original extinction was perfect? (c) What nominal ER value is required such that ER > 8.2 dB is guaranteed even if the slope efficiency drops by 1 O%? 8.9 Modulation Current Control. The slope efficiency and the threshold current of a laser have been measured as a function of the temperature and are given PROBLEMS 311 in Table 8.3. A laser driver with a single-loop APC controls the bias current of this laser such that the average optical power is held at -3 dBm. Excluding the dual-loop APC approach, how can the modulation current be controlled such that the ER remains substantially constant? Table 8.3 Laser characteristics for Problem 8.9. Temperature Slope Efficiency Threshold Current (“C) (mW/mA) (mA) -40 20 80 0.08 0.07 0.05 2 10 35 8.10 Automatic Bias Control for MZMs. In an ABC circuit for MZMs as shown in Fig. 8.20, the pilot tone oscillator generates a sine wave with the frequency w/2x and an amplitude of 1 V; the mixer has a gain of 20dB/V. Assuming the MZM transmits a long string of ones, the output signal from the TIA is uo = Vo[l f . sin(wt)]. What is the signal at the mixer output and what is the resulting bias voltage? 8.11 Mark-Density Compensation. :Show mathematically that if the mark density within each burst always is 50%, the switch So in the burst-mode APC circuit of Fig. 8.23 can be omitted and ]REF can be replaced by IREF/2. This Page Intentionally Left Blank Appendix A Eye Diagrams The eye diagram is an intuitive graphical representation of electrical and optical communication signals. The quality of these signals (the amount of intersymbol interference [ISIJ, noise, and jitter) can be judged from the appearance of the eye. Eye diagrams frequently are used in the literature to document signals in optical receivers and transmitters. In the following, we explain how to produce eye diagrams from measurements and simulations. We also discuss how to determine the eye openings and eye margins of an eye diagram. Definition. The waveform of a communication signal, such as a non-return-to- zero (NRZ), a return-to-zero (RZ), or a 4-level pulse amplitude modulation (PAM-4) signal, can be turned into an eye diagram or eye pattern by folding the time axis modulo a whole number of bit (or syimbol) intervals. For example, in Fig. A. 1, the waveform of an NRZ signal with mild IS1 is folded modulo a two-bit interval. To do that, the waveform is first cut into two-bit segments: half a bit on the left, a full bit in the center, and half a bit on the right. Because the IS1 in our example is limited to just one bit to the right and heft, there are essentially eight distinct segments corresponding to the three-bit binary words: 000,001,010,011, 100, 101, 110, and 11 1 (see the left-hand side of Fig. A. 1 :I. In the case of a signal with stronger JSI, more segments with distinct shapes exist and must be taken into account. Next, all these segments are superimposed, as shown on the right-hand side of Fig. A.l, resulting in the eye diagram. 313 314 EYE DIAGRAMS 0 0 011 0 1 011 1 0 011 1 1 011 -c 1 Eye Diagram: Fig. A. 1 all possible bit sequences. Construction of an eye diagram by superimposing the waveforms corresponding to An important advantage of the eye diagram over the linear signal waveform is that all possible bit transitions can be displayed in a compact representation. Measurement. The setup shown in Fig. A.2 can be used to display an eye diagram on an oscilloscope. A pulse pattern generator produces an NRZ data signal and a clock signal. The data signal usually encodes a pseudorandom bit sequence (PRBS), which can be produced with a feedback shift register, as shown in Fig. 1.4. The data signal is passed through the device under test (DUT) and the output signal is fed to the vertical input of an oscilloscope. To display the eye diagram on the oscilloscope, it must be triggered from the clock signal, not the data signal. Usually, the bit-clock signal from the pattern generator is used for this purpose, as shown in Fig. A.2. Alternatively, a phase-locked loop (PLL) can be used to recover a periodic trigger signal from the output signal of the DUT. However in this case, the eye diagram will be somewhat different: on one hand, some low-frequency jitter produced in the DUT is suppressed because it is tracked by the PLL, on the other hand, some new jitter produced in the PLL is added to the eye. Some oscilloscopes have the option to display the frequency at which a certain point in the eye is reached with a color code, so-called color grading. Figure A.3 shows the eye diagram of an NRZ signal obtained with a sampling oscilloscope. 315 Pulse Pattern Generator Oscilloscope Fig, A2 Measurement of an eye diagram with an oscilloscope. Fig. A.3 Eye diagram of an NRZ signal measured with a sampling oscilloscope. Darker regions are sampled more often. Simulation. To produce an eye diagTam with a circuit simulator such as SPICE- without the need for a specialized post processor-the following method can be used. First, generate a linear ramp voltage with a period of two bit intervals and rapid fall time. Then, plot the data signal against this ramp voltage instead of the time axis as usual. This trick will take care of the folding of the data signal waveform. A drawback of this simple method is that the ramp has a finite fall time, creating spurious trace- back lines across the eye diagram. This problem can be solved by generating a pulse voltage that is always zero except for the trace-back period, where it assumes a large value. When this voltage is added to the data signal, the trace-back lines move outside of the eye diagram and can be “clipped away” by choosing an appropriate plotting window. The following Celerity‘ code illustrates how to produce an e ‘iagram: * PRBS input signal (10 Gb/s, 30-ps rise/fall time, and 1-V swing) VI VI VGND TABLE(0 &IV + 15P &PVO 85P &PVO + 115P &PV1 485P &PV1 + 515P &PVO 585P &PVO + 615P &PVl 685P &PV1 + 715P &PVO 985P &PVO ’Celerity is a SPICE-like circuit simulator from Cadence Design Systems. Inc . 8. 3 Laser characteristics for Problem 8. 9. Temperature Slope Efficiency Threshold Current (“C) (mW/mA) (mA) -40 20 80 0. 08 0.07 0.05 2 10 35 8. 10 Automatic Bias Control for. idealized circuits shown in Fig. 8. 38. How do these circuits relate to a driver with passive and active back termiination? 310 LASER AND MODULATOR DRIVERS Fig. 8. 38 Three implementations of. Table 8. 1 Examples for high-speed laser driver prOdUCtS. Company & Product Agere LG 1625AXF Agere LG 1627BXC Infineon S896A006 Maxim MAX 386 7 Nortel YAO8 Philips OQ2545HP