1. Trang chủ
  2. » Kỹ Thuật - Công Nghệ

MOSFET MODELING FOR VLSI SIMULATION - Theory and Practice Episode 14 potx

40 394 0

Đang tải... (xem toàn văn)

Tài liệu hạn chế xem trước, để xem đầy đủ mời bạn chọn Tải xuống

THÔNG TIN TÀI LIỆU

Thông tin cơ bản

Định dạng
Số trang 40
Dung lượng 1,85 MB

Nội dung

496 9 Data Acquisition and Model Parameter Measurements 1321 S. H. Lin and J. Reuter, ‘The complete doping profile using MOS CV technique’, Solid-state Electron., 26, pp. 343-351 (1983). 1331 G. Baccarani, H. Rudan, G. Spaini, H. Maes, W. V. Ander Vorst, and R. Van Overstraeten, ‘Interpretation of C-V measurements for determining the doping profile in semiconductors’, Solid-state Electron., 23, pp. 65-7 I (1980). 1341 C. P. Wu, E. C. Douglas, and C. W. Mueller, ‘Limitations of the C-V technique for ion-implanted profiles’, IEEE Trans. Electron Devices, ED-22, pp. 319 329 (1975). [35] B. J. Gordon, ‘On-line capacitance-voltage doping profile measurement’, IEEE Trans. Electron Devices, ED-27, pp. 2268-2272 (1980). [36] K. Lehovec, ‘C-V profiling of steep dopant distribution’, Solid-State Electron., 27, [37] I. G. McGillivray, J. M. Robertson, and A. J. Walton, ‘Improved measurement of doping profile in silicon using CV techniques’, IEEE Trans. Electron Devices, ED-35, pp. 174-179 (1988). 1381 K. Iniewski and C. A. T. Salama, ‘A new approach to CV profiling with sub-debye- length resolution,’ Solid-state Electron., 34, pp. 309-3 14 (1991). [39] G. Lubberts, ‘Rapid determination of semiconductor doping and flatband voltage in large MOSFETs’, J. Appl. Phys., 48, pp. 5355-5356 (1977). 1401 J. A. Wikstrom and C. R. Viswanathan, ‘A direct depletion capacitance measurement technique to determine the doping profile under the gate of a MOSFET’, IEEE Trans. Electron Devices, ED-34, pp, 2217-2219 (1987). [41] M. Shannon, ‘DC measurement of the space charge capacitance and impurity profile beneath the gate of an MOST’, Solid-state Electron., 14, pp. 1099-1 106 (1971). [42] M. G. Buchler, ‘Dopant profiles determined from enhancement-mode MOSFET DC measurements’, Appl. Phys. Lett., 31, pp. 848-850 (1977). 1431 M. H. Chi and C. M. Hu, ‘Errors in threshold-voltage measurements of MOS transistors for dopant-profile determinations’, Solid-state Electron., 24, pp. 313-316 (1981). 1441 G. P. Carver, ‘Influence of short-channel effects on dopant profiles obtained from the DC MOSFET profile method’, IEEE Trans. Electron Devices, ED-30, pp. 948-953 (1983). [45] N. Kasai, N. Endo, A. Ishitani, and Y. Kurogi, ‘Impurity profile measurement using VT - Vss characteristics,’ NEC Res. & Develop., 74, pp. 109-114 (1984). 1461 K. lniewski and A. Jakubowski, ‘A new method for the determination of channel depth and doping profile in buried-channel MOS transistors’, Solid-state Electron., [47] D. W. Feldbaumer and D. K. Schroder, ‘MOSFET doping profiling’, IEEE Trans. Electron Devices, ED-18, pp. 135-139 (1991). [48] H. G. Lee, S. Y. Oh, and G. Fuller, ‘A Simple and accurate method to measure the threshold voltage of an enhancement-mode MOSFET’, IEEE Trans. Electron Dev., [49] H. S. Wong, M. H. White, T. J. Krutsick, and R. V. Booth, ‘Modeling of transconduc- tance degradation and extraction of threshold voltage in thin oxide MOSFETs’, Solid-state Electron., 30, pp. 953-968 (1987). [SO] R. V. Booth, H. S. Wong, M. H. White, and T. J. Krutsick, ‘The effect of channel implants on MOS transistor characterization’, IEEE Trans. Electron Devices, ED-34, 1511 S. Jain, ‘Measurement of threshold voltage and channel length of submicron MOSFETs’, Proc. IEE, Pt. I, 135, pp. 162-164 (1988). [52] M. J. Deen and Z. X. Yan, ‘A new method for measuring the threshold voltage of small-geometry MOSFETs from subthreshold conduction’, Solid-state Electron., 33, pp. 1097-1 I05 (1984). 31, pp. 1259-1264 (1988). ED-29, pp. 346-348 (1982). pp. 2501 -2508 (1 987). pp. 503-511 (1990). References 497 [53] C. G. Sodini, T. W. Ekstedt, and J. L. Moll, ‘Charge accumulation and mobility in thin dielectric MOS transistors’, Solid-state Electron., 25, pp. 833-841 (1982). [54] N. D. Arora and G. Sh. Gildenblat, ‘A semi-empirical model of the MOSFET inversion layer mobility for low-temperature operation’, IEEE Trans. Electron Devices, ED-34, pp. 89-93 (1987). [55] J. Kooman, ‘Investigation of MOST channel conductance in week inversion’, Solid-State Electron., 16, pp. 801-810 (1973). [56] M. S. Liang, J. Y. Choi, P. K. KO, and C. M. Hu, ‘Inversion-layer capacitance and mobility of very thin gate-oxide MOSFETs’, IEEE Trans. Electron Devices, ED-33, 1571 P M. D. Chow and K L. Wang, ‘A new AC technique for accurate determination of channel charge and mobility in very thin gate MOSFETs’, IEEE Trans. Electron Devices, ED-33, pp. 1299-1 304 (1986). [58] G. Sh. Gildenblat, C L. Huang, and N. D. Arora, ‘Split C-V measurements of low temperature MOSFET inversion layer mobility,’ Cryogenics, 29, pp. 1163-1 166 (1989) [58a] C. L. Huang, J. Faricelli, and N. D. Arora, ‘A new technique for measuring MOSFET inversion layer mobility’, IEEE Trans. Electron Devices, ED-40, pp. 11 34-1 139 (1993). 1591 A. Hairapetian, D. Gitlin, and C. R. Viswanathan, ‘Low-temperature mobility measurements on CMOS devices’, IEEE Trans. Electron Devices, ED-36, pp. 1448-1445 (1989). [60] K. Terada and H. Muta, ‘A new method to determine effective MOSFET channel length’, Japanese J. Appl. Phys., 18, pp. 953-959 (1979). [61] J. G. J. Chern, P. Chang, R. F. Motta, and N. Godinho, ‘A new method to determine MOSFET channel length’, IEEE Electron Device Lett., EDL-I, pp. 170-173 (1980). 1621 S. E. Laux, ‘Accuracy of an effective channel length/external resistance extraction algorithm for MOSFETs’, ED-31, pp. 1245-1251 (1984). [631 J. Scarpulla and J. P. Krusius, ‘Improved statistical method for extraction of MOSFET effective channel length and resistance’, IEEE Trans. Electron Devices, 1641 B. J. Sheu, C. Hu, P. K. KO, and F C. Hsu, ‘Source-and-drain series resistance of LDD MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 365-367 (1984). [65] K. K. Ng and J. R. Brews, ‘Measuring the effective channel length of MOSFETs’, IEEE Circuits and Devices Magazine, 6, pp. 33-38, Nov. 1990. C661 M. R. Wordeman, J. Y C. Sun, and S. E. Laux, ‘Geometry effects in MOSFET channel length extraction algorithms’, IEEE Electron Device Lett., EDL-6, pp. 186- 188 (1985). 1671 J. Y C. Sun, M. R. Wordeman, and S. E. Laux, ‘On the accuracy of channel length pp. 409-413 (1986). ED-34, pp. 1354-1359 (1987). characterization of LDD MOSFETs’, IEEE Trans. Electron Devices, ED-33, pp, 1556-1562 (1986). .I [68] D. J. Mountain, ‘Application of electrical effective channel length and external resistance measurement techniques to a submicrorneter CMOS process’, IEEE Trans. Electron Devices, ED-36, pp. 2499-2505 (1989). [69] G. J. Hu, C. Chang, and Y. T. Chia, ‘Gate-voltage-dependent effective channel length and series resistance of LDD MOSFETs’, IEEE Trans. Electron Devices, ED-34, [70] J. Ida, A. Kita, and F. Ichikawa, ‘Accurate characterization of gate-N- overlapped LDD with the new Leff extraction method, IEEE IEDM, Tech. Dig., pp. 219-222 ( 1990). 1711 K. L. Peng, and M. A. Afromowitz, ‘An improved method to determine MOSFET channel length’, IEEE Electron Device Lett., EDL-3, pp. 360-362 (1982). pp. 2469-2475 (1987). 498 9 Data Acquisition and Model Parameter Measurements [72] J. Whitfield, ‘A modification on an improved method to determine MOSFET channel length’, IEEE Electron Device Lett., EDL-6, pp. 109-110 (1985). [73] J. H. Satter, ‘Effective length and width of MOSFETs determined with three transistors’, Solid-state Electron., 30, pp. 821-828 (1987). [74] D. Takacs, W. Muller, and U. Schwabe, ‘Electrical measurement of feature sizes in MOS Si-gate VLSI technology,’ IEEE Trans. Electron Devices, ED-27, pp. 1368- 1373 (1980). [75] K. L. Peng, S. Y. Oh, M. A. Afromowitz, and J. L. Moll, ‘Basic parameter measurement and channel broadening effect in the submicron MOSFET,’ IEEE Electron Device Lett., EDL-5, pp. 473-475 (1984). [76] C. Hao, B. Cabon-Till, S. Cristoloveanu, and G. Ghibaudo, ‘Experimental determina- tion of short-channel MOSFET parameters’, Solid-state Electron., 28, pp. 1025- 1030 (1985). [77] L. Chang and J. Berg, ‘A derivative method to determine a MOSFETs effective channel length and width electrically’, IEEE Electron Device Lett., EDL-7, pp. 229- 231 (1986). 1781 D. Takacs. W. Muller. and U. Schwabe. ‘Electrical measurement of feature sizes in L- MOS Si-gate VLSI technology’, IEEE Trans. Electron Devices, ED-27, pp. 1368-1373 (1980). 1791 P. P. Such and R. L. Johnston, ‘Experimental derivation of the source and drain resistance of MOS transistors’, IEEE Trans. Electron Devices, ED-27, pp. 1556- 1162 (1980). [SO] F. H. De La Moneda, H. N. Kotecha, and M. Shatzkes, ‘Measurement of MOSFET constant’, IEEE Electron Device Lett., EDL-3, pp. 10-12 (1982). [81] G. Krieger, R. Sikora, P. P. Cuevas, and M. N. Misheloff, ‘Moderately doped NMOS(M-LDD)-hot electron and current drive optimization’, IEEE Trans. Electron Devices, ED-38, pp. 121-127 (1991). [82] G. Ghibaudo, ‘New method for the extraction of MOSFET parameters’, Electronic Letters, 24, pp. 543-545, 28th April 1988. [83] Y. R. Ma and K. L. Wang, ‘A new method to electrically determine effective MOSFET channel width’, IEEE Trans. Electron Devices, ED-29, pp. 1825-1827 (1982). [S4] B. J. Sheu and P. K. KO, ‘A simple method to determine channel widths for conventional and LDD MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 485-486 (1984). [85] N. D. Arora, L. A. Bair, and L. M. Richardson, ‘A new method to determine the MOSFET effective channel width’, IEEE Trans. Electron Devices, ED-37, pp. 81 1-814 (1990). [86] P. Vitanov, U. Schwabe, and I. Eisele, ‘Electrical characterization of feature sizes and parasitic capacitances using a single structure’, IEEE Trans. Electron Devices, ED-31, [87] E. J. Korma, K. Visser, J. Snijder, and J. F. Verwey, ‘Fast determination of the effective channel length and the gate oxide thickness in polycrystalline silicon MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 368-370 (1984). [88] B. J. Sheu and P. K. KO, ‘A capacitance method to determine channel lengths for conventional and LDD MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 491-493 (1984). [SY] C. T. Yao, I. A. Mack, and H. C. Lin, ‘Accuracy of effective channel-length extraction using the capacitance method’, IEEE Electron Device Lett., EDL-7, pp. 268-270 (1986). [90] J. Scarpulla, T. C. Mele, and J. P. Krusius, ‘Accurate criterion for MOSFET effective gate length extraction using the capacitance method, IEEE IEDM, Tech. Dig., pp. pp. 96-100 (1984). 722-725 (1987). References 499 [91] N. D. Arora, D. A. Bell, and L. A. Bair, ‘An accurate method of determining MOSFET gate overlap capacitance’, Solid-state Electron., 35, pp. 1817-1822 (1992). [92] P. Antognetti, C. Lombardi, and D. Antoniadis, ‘Use of process and 2-D MOS simulation in the study of doping profile influence on S/D resistance in short channel MOSFETs’, IEDM, Tech. Digest, pp. 574-577 (1981). [93] M. H. Seavey, ‘Source and drain resistance determination for MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 479-481 (1984). [94] K. K. Ng and W. T. Lynch, ‘Analysis of the gate-voltage dependent series resistance of MOSFETs’, IEEE Trans. Electron Devices, ED-33, pp. 965-972 (1986). [95] A. Vladimirescu and S. Liu, ‘The simulation of MOS integrated circuits using SPICET, Memorandum No. UCB/ERL M80/7, Electronics Research Laboratory, University of California, Berkeley, October 1980. [96] T. Y. Chan, P. K. KO, and C. Hu, ‘A simple method to characterize substrate current in MOSFETs’, IEEE Trans. Electron Device Lett., EDL-5, pp. 505-507 (1984). [97] D. Lau, G. Gildenblat, C. G. Sodini, and D. E. Nelsen, ‘Low temperature substrate current characterization of n-channel MOSFETs’, IEEE-IEDM85, Technical Digest, pp. 565-568 (1985). [98] R. V. H. Booth and M. H. White, ‘An experimental method for determination of the saturation point of a MOSFET’, IEEE Trans. Electron Devices, ED-31, pp. 247-251 (1984). 1991 W. Y. Jang, C. Y. Wu, and H. J. Wu, ‘A new experimental method to determine the saturation voltage of a small-geometry MOSFET’, Solid-state Electronic, 31, pp. [loo] H. Iwai and S. Kohyama, ‘On-chip capacitance measurement circuits in VLSI structures’, IEEE Trans. Electron Devices, ED-29, pp. 1622-1626 (1982). [loll J. Oristian, H. Iwai, J. Walker, and R. Dutton, ‘Small geometry MOS transistor capacitance measurements method using simple on-chip circuit’, IEEE Electron Device Lett., EDL-5, pp. 395-397 (1984). [lo21 H. Iwai, J. Oristian, J. Walker, and R. Dutton, ‘A scaleable technique for the measurements of intrinsic MOS capacitance with atto-Farad range’, IEEE Trans. Electron Devices, ED-32, pp. 344-356 (1985). [lo31 J. J. Paulous, ‘Measurement of minimum-geometry MOS transistor capacitances’, [lo41 C. T. Yao and H. C. Lin, ‘Comments on small geometry MOS transistor capacitance measurements method using simple on-chip circuit’, IEEE Electron Device Lett., [lo51 J. Oristian, H. Iwai, J. Walker, and R. Dutton, ‘A reply to comments on “small geometry MOS transistor capacitance measurements method using simple on-chip circuit”’, IEEE Electron Device Lett., EDL-6, pp. 64-67 (1985). [lo61 J. J. Paulos and D. A. Antoniadis, ‘Measurement of minimum geometry MOS transistor capacitances’, IEEE Trans. Electron Devices, ED-32, pp. 357-363 (1985). Also see J. J. Paulos, ‘Measurement and modeling of small geometry MOS transistor capacitance’, Ph.D thesis, Massachusetts Institute of Technology, Cambridge, 1984. [lo71 M. Furukawa, H. Hatano, and K. Hanihara,, ‘Precision measurement technique of integrated MOS capacitor mismatching using a simple on-chip circuit’, IEEE Trans. Electron Devices, ED-33, pp. 938-944 (1986). [lo81 K. C. K. Weng and P. Yang, ‘A direct measurement technique for small geometry MOS transistor capacitances’, IEEE Electron Device Lett., EDL-6, pp. 40-42 (1985). [lo91 H. Ishiuchi, Y. Matsumoto, S. Sawada, and 0. Ozawa, ‘Measurement of intrinsic capacitance of lightly doped drain (LDD) MOSFET’s’, IEEE Trans. Electron Devices, 1421-1431 (1988). ED-32, pp. 357-363 (1985). EDL-6, p. 63 (1985). ED-32, pp. 2238-2242 (1985). so0 9 Data Acquisition and Model Parameter Measurements [l lo] Y. T. Yeow, ‘Measurement and numerical modeling of short channel MOSFET gate capacitances’, IEEE Trans. Electron Devices, ED-35, pp. 2510-2519 (1987). [lll] B. J. Sheu and P. K. KO, ‘Measurement and modeling of short-channel MOS transistor gate capacitances’, IEEE J. Solid-state Circuits, SC-22, pp. 464-472 (1 987). [I 121 P. Leclaire, ‘High resolution intrinsic MOS capacitance measurement system’, EESDERC 1987, Tech. Digest., pp. 699-702 (1987). [I 131 C. T. Yao, ‘Measurement and modeling of intrinsic terminal capacitances of a metal-oxide-semiconductor field effect transistor’, Ph.D. Thesis, University of Maryland. [I 141 T. Y. Chan, A. T. Wu, P. K. KO, and C. Hu, ‘A capacitance method to determine the gate-to-drain/source overlap length of MOSFET’s’, IEEE Electron Device Lett., [I IS] J. Scarpulla, T. C. Mele, and J. P. Krusius, ‘Accurate criterion for MOSFET effective gate length extraction using the capacitance method’, IEEE IEDM, Tech. Dig., pp. 722-725 (1987). [I 161 C. S. Oh, W. H. Chang, B. Davari, and Y. Tur, ‘Voltage dependence of the MOSFET gate-to-source/drain overlap’, Solid-state Electron., 33, pp. 1650- 1652 (1990). EDL-8, pp. 269-271 (1987). 10 Model Parameter Extraction Using Optimization Method In the previous chapter we had discussed the experimental setup needed for acquiring the different types of data required for MOSFET model parameter measurements and/or extraction. We had also discussed linear regression methods to determine basic MOSFET parameters. In this chapter we will be concerned with the nonlinear optimization techniques for extracting the device model parameters for various DC and AC models. These techniques are general purpose model parameter extraction methods that can be used for any nonlinear physical model. There are many books devoted to the area of optimization. Our intent here is only to provide an introduction to the optimization technique as applied to the device model parameter extraction. Various optimization programs (also called optimizers), which have been reported in the literature for device model parameter extraction, differ mainly in the optimization algorithms used. We will first discuss methods used for model parameter extraction for any MOSFET model. This will be followed by some basic definitions, which will be useful in understanding the optimization methods in general, and then discuss the optimization algorithms that are most widely used for the device model parameter extraction. The estimation of the accuracy of the extracted parameters will be discussed using confidence intervals and the confidence region approach. We will conclude this chapter with examples of extracting DC and AC model parameters. 10.1 Model Parameter Extraction There are basically two ways to extract the model parameter values of any MOSFET model from the device I-V data or C-V data; (1) the linear regression (analytical) method, and (2) the nonlinear optimization (numerical) method. 502 10 Model Parameter Extraction Linear Method. In this method, the device model equations are approxi- mated by linear functions which represents the device characteristic in a limited region of the device operation [ l]-[3]. Linear regression (linear least-squares) method is then applied to those linear functions. Thus, in this method the model parameters are determined from the data local to the region of the device characteristic in which the parameter is dominant. The extracted parameter is then assumed to be known and is then used to extract further parameters. Because only few parameters are determined at one time and parameters are determined sequentially, this method is also referred to as sequential method. This method generally produces parameter values that have obvious physical meaning. The linear regression methods discussed in Chapter 9 to determine param- eters such as AL, AW, po, Q,y, etc., fall in this category. However, this approach is somewhat tedious and time consuming, and since each param- eter value is determined by few data points, the results are not accurate over the entire data space. Also this method does not account for the interaction of the parameters among themselves and their influence in other region of operation, other than that from which it was obtained. Furthermore, as devices are scaled down it is difficult to observe linear regions of the device characteristics, and therefore special efforts are required to isolate group of parameters describing model behavior under different operating conditions. Optimization Method. In this approach, the model parameters are extracted by curve fitting the model equations to a set of measured device data in all the regions of device operation using nonlinear least square optimization techniques [4]-[13]. Starting from the ‘educated guess’ values for these parameters, a complete set of optimum parameters are thus extracted using numerical methods to minimize the error between the model and the measured data. The ‘educated guess’ values required for the parameters are often obtained from analytical methods discussed above. The drawback of this method is that any combination of values will provide a working fit to the measured characteristics due to there being sufficient interaction between the parameters. Thus, it is not always clear as to which are the correct values. Further, parameter redundancy can lead to optimum parameter sets which are physically unrealistic. Using constraints on the parameter values and/or using sensitivity analysis on the parameters help relieve the problem [S], but does not solve it. Nonetheless, this method produces a better fit to the data over the entire data space, though at the sacrifice of some physical insight. Moreover, the whole extraction program can easily be automated so that using automatic prober units statistical distribution of the parameters can be obtained without much effort. We have already seen that virtually all MOSFET models implemented in circuit simulators consists of different sets of equations representing different 10.1 Model Parameter Extraction 503 regions of device operation. In other words, these models have separate equations for linear, saturation and subthreshold regions of the device operation with explicit formulations for threshold voltage, saturation voltage, etc. Many of the parameters are used only in a subset of these equations and therefore the approach to extract all parameters simultaneously is not a good strategy. It turns out that it is more practical to extract the parameters by coupling the optimization technique with the approach used in the analytical method. Thus, the parameters are extracted from one set of local data (limited part of device operating range) using optimization method in conjunction with relevant model equations. Those parameters are then frozen while determining other parameters from different local data set. Once this regional approach is completed, the data covering all regions of operation is then used to extract all the model parameters to obtain the best overall fit. This accounts for model parameter interaction as well as for the parameters which affect the device characteristics in the region of operation other than from which they were extracted earlier. Thus, in this approach, the parameters are generally split into four groups as shown in Table 10.1: 0 Group I-this group of parameters are generally known from the technological process data; for example, gate oxide capacitance Cox, junction depth Xj, etc. These parameters are therefore not optimized and their values are assumed known. 0 Group 11-the parameters determined from the I-V characteristics in the linear region of operation of the device at low V,, are grouped in this category. The parameters in this group are determined from data set A (cf. section 9.1). The V,, model parameters that characterize the device threshold voltage fall in this group. Group 111-the parameters in this group are mobility and electric field related model parameters and are extracted from I,, - V,, curves with varying V,, and constant V,, (data set B). These characteristics are in the linear and saturation regions of device behavior. Group IV-the parameters determined from the I-V characteristics in the subthreshold region of device operation are grouped in this category. Table 10.1. Drain current model parameters grouped in four categories Group Model parameters 504 10 Model Parameter Extraction The procedure outlined above is one of the strategies that can be used for extracting optimum set of model parameters. However, it is possible to have any other extraction strategy coupled with the optimization technique that result in reliable parameter values. We will now discuss how an optimization method is used for parameter extraction. But before doing that, it will be instructive to discuss some basic definitions [14]-[18] which will help understand the optimization technique as used for model parameter extraction. 10.2 Basics Definitions in Optimization Let p be the model parameter vector' P= Iil Pn (10.1) such that pj is the value of the jth model parameter and n is the total number of parameters. In short, the parameter vector p could be written as p = [pl, p2,. . . , pJT; the superscript T denotes transpose of the matrix (10.1). For example, for the SPICE Level 3 MOSFET model p takes the following form:2 p = cv,,, y, CLo 71T. This n-dimensional p space is usually called parameter space. Now suppose there exist a function F such that F(p) is a measure of the modeling error incurred when the parameter p is used. The function F(p) is usually called the objective function, error criterion or performance measure. Thus, an objective function F(p) is a measure for comparing the computed or simulated behavior (response) with that of the experimentally measured or desired behavior. It is assumed that the function F(p) is a real-valued function and is at least once continuously differentiable with respect to the parameter p. ' In this chapter we will designate vectors by a boldface lowercase letter. A matrix will be designated by boldface capital letter, while elements of the matrix (individual values in the matrix) is designated by lower case letter. In the notation for an element [aij] of a matrix A, the first subscript refers to the row and second to the column. One may mentally visualize the subscript ij in the order + 1. Note that the vector p does not include parameters such as device channel length L and width W, and bias voltages (V,,, V,,, etc.) that are not varied during the optimization process. 10.2 Basics Definitions in Optimization 505 The optimum parameter value exist at a point p* when F(p*) is minimum. Therefore, the problem of optimization (process of choosing the optimum set of parameters) is reduced to choosing p such that F(p) is minimized. Maximization of an objective function is essentially the same problem as minimization, because maximization of F(p) is the same as minimization of - F(p). A point p* in the parameter space is a global minimum of F(p) if F(p*) I F(p) for all p in the region of interest. If only the strict inequality < holds for p in the neighborhood of p*, we are dealing with a local minimum of F(p). As an example of local and global minima, a function F(p) of single param- eter p given by F(~) = p4 - 1 ip3 + 37p2 - 45p + 60 is plotted against p (see Figure 10.1). In a given interval of p, this function has two minima (at p = 1 and p = 5) one of which is the global (at p = 5) minima. Normally, we do not know the shape of the function F(p), particularly when p is a function of many variables. From the minimization function we cannot conclude whether or not the minimum found is a global minimum. The possible occurrence of a local minima thus introduces an uncertainty into the solution. Since no computationally tractable algorithm is known for finding the global minima of an arbitrary function [20], in practice minimization is carried out several times starting from different initial guess values for the parameters and observing the parameter value which gives the smallest error. In a device model, the objective function F(p) is a measure of the discrepancy or error that is to be minimized between the measured response, say experimental drain current Zexp(i), and computed current (from model GLOBAL MINIMA 3 P Fig. 10.1 One dimensional function F(p) showing local and global minima 01 " " I' " ' [...]... to the following standard form [ 3 3 ] 1 1=(112)a :-, - it"i2 - 1dt 1-a=( 10.71) 0 r(n/2) where r(.) represents the gamma function and t = +a' The above expression is the integral of the well known Chi-Squared probability density function For a specified probability and number of degrees of freedom, ie., given n and a, the integral equation (10.71) can be solved iteratively for a, - a (see Chapter 6... ,A, and Q is a matrix whose jth column is the eigenvector e j By combining Eq (10.65) with Eq (10.63 )and defining a new coordinate vector h = [ h , , h2, ,hj, , h,lT as (10.66) h = Q'(P - P,) the confidence region ellipsoid becomes (p - p,)'C-'(p - p,) = hTD,h = U: -u (10.67) It can be easily seen that the matrix D; is the covariance matrix for the transformed parameter vector h Since D; has no off-diagonal... hyper-ellipsoid with center at the origin and coordinates p t l , : ,p , - pt, If u2 represents a specific value, then p2 i u2 defines the interior of a hyper-ellipsoid in n-dimensional space and p = u produces hypersurfaces of constant probability density Therefore, if p1 (10.64) 10.5 Confidence Limits on Estimated Model Parameter 525 then the hyper-ellipsoidal region p2 I a:-u is called the lOO(1 -. .. off-diagonal terms Cij(iZ j ) are the covariance between the parameters For the case W = I (unit weights), Eq (10.58) reduces to m-n (10.59) It should be pointed out that the above expression for the covariance matrix C is strictly valid only for a linear models, and hence, is only approximate for nonlinear models with the approximation being better for cases which are less nonlinear It is common practice. .. presented earlier can be used without any change In our example of two functions I,, and gd,, we will have (10.57) where W, and W, are the relative weights for the current and conductance respectively, wi is the weight for each data point (current or conductance) and r12(p )and rG,(p)are the error functions for the current and conductances respectively (see Eq 10.3) It is the algorithm given by Eq (10.57)... development of a model for the temperature dependence of the ionization coefficient a which for the holes and electrons can be expressed as c1= ( ): Aiexp - (10.77) where € is the electric field and Ai and Bi are the ionization parameters The temperature dependence of the ionization rate has been generally modeled as [37] Ai=Aio[l +y,,(T-300)] (10.78) T - 300)] Bi = Bi, [1 where Ai, and Bi, are the ionization... Optimizer 53 1 1 lo-' 1 0-2 1 0-3 9 lo4 I 0-5 1 0-6 1 0-7 1" 0 1 0 1 2 1.4 1 6 1.8 2.0 2.2 2.4 2.6 2.8 11 Fig 10.7 DIBL parameter oo versus rn obtained from I,, - V,, data (30 dice from 3 different wafers) The points represent extracted (oo,rn) values corresponding to each die location Different symbols correspond to data from different wafers is held constant and the remaining parameters are re-extracted The... probability of 1 - a The integral (10.64)can be evaluated more conveniently by expressing the confidence region in a coordinate system which coincides with the n axes of the hyper-ellipsoid To obtain this transformation, we first compute the eigenvalues ,Ij ( j = 1,2, ,n) and the corresponding normalized eigenvectors ej of C - l The matrix C - ' can be decomposed to [32 ]-[ 33] c-' = Q D ~ Q ' (10.65)... Hessian, that is, s = -H- (10.33) VF(P) and the parameter change Ap is (10.34) Ap = - H-'VF(p) keeping the step size CI = 1 in this case Thus, in this method the updated parameter vector pk+' is derived from the following iterative algorithm (10.35) pk+' = pk - H-'VF(pk) so that the different steps outlined earlier still apply This algorithm is often referred to as the Newton method for finding the minimum... determination” For example, 95% confidence interval for the normal distribution of a single parameter p is pt - 1 9 6 c p < pt + 1 9 6 ~ ~ where o2 is the variance in the parameter estimate Assuming that the measurement error is normally distributed, then each parameter pi follows the student’s t-distribution with v = rn - n degree of freedom, and has the following lOO( 1- a)% confidence These and other . Devices, ED-35, pp. 17 4-1 79 (1988). 1381 K. Iniewski and C. A. T. Salama, ‘A new approach to CV profiling with sub-debye- length resolution,’ Solid-state Electron., 34, pp. 30 9-3 14 (1991) extraction algorithm for MOSFETs’, ED-31, pp. 124 5-1 251 (1984). [631 J. Scarpulla and J. P. Krusius, ‘Improved statistical method for extraction of MOSFET effective channel length and resistance’,. Sheu, C. Hu, P. K. KO, and F C. Hsu, ‘Source -and- drain series resistance of LDD MOSFETs’, IEEE Electron Device Lett., EDL-5, pp. 36 5-3 67 (1984). [65] K. K. Ng and J. R. Brews, ‘Measuring

Ngày đăng: 13/08/2014, 05:22

TÀI LIỆU CÙNG NGƯỜI DÙNG

TÀI LIỆU LIÊN QUAN