Smart Material Systems and MEMS - Vijay K. Varadan Part 10 ppsx

10.3.4 Polysilicon film deposition Polysilicon comprises small crystallites of single-crystal silicon, separated by grain boundaries. Polysilicon is often used as a structural material in MEMS. It is also used in MEMS and microelectronics for electrode formation and as a conductor or high-value resistor, depending on its doping level (must be highly doped to increase conduc- tivity). Polysilicon is commonly used for MOSFET gate electrodes since it can form an ohmic contact with Si, its resistivity can be made up to 500–525 m cm by doping, and it is easy to pattern. A low-pressure reactor, such as the one shown in Figure 10.8(a), operated at a temperature of between 600 and 650  C, is used to deposit polysilicon by pyr- olyzing silane according to the following reaction: SiH 4 ÀÀÀ! 600  C Si þ2H 2 ð10:6Þ Most common low-pressure processes used for polysili- con deposition operate at pressures between 0.2 and 1.0 torr using 100 % silane. 10.3.5 Deposition of ceramic thin films Ceramics are another major class of materials widely used for silicon-based MEMS. These materials generally have better hardness and high-temperature strength. Both crys- talline as well as non-crystalline materials are used in the context of MEMS. Examples of ceramic-based MEMS include ceramic pressure microsensors for high-tempera- ture pressure measurement [33] and silicon carbide MEMS for harsh environments [34]. In addition to these structural ceramics, functional ceramics such as ZnO, BST and PZT have also been incorporated into MEMS. Ceramic thin films have been fabricated by conven- tional methods, such as RF sputtering [35], laser ablation [36], MOCVD [37] and hydrothermal processes [37]. Even though sputtering is widely used for the deposition of thin films, it has the potential for film degradation by neutral and negative-ion bombardment during its growth. This ‘re-sputtering’ can lead to ‘off-stoichiometric’films and degradation of electrical properties. Figure 10.9 illustrates the inverted cylindrical magne- tron (ICM) RF sputtering gun set-up [38]. This consists of a water-cooled copper cathode which houses a cylind- rical target material surrounded by a ring magnet con- centric with the target. A stainless steel thermal shield is mounted to shield the magnet from the thermal radiation coming from the heated table. The anode is recessed in the hollow-cathode space. It aids in collecting electrons and negative ions minimizing ‘re-sputtering’ the growing film. Outside the deposition chamber, a copper ground wire is attached between the anode and the stainless steel chamber. A DC bias voltage could be applied to the anode to alter the plasma characteristics in the cathode/ anode space. The sputter gas enters the cathode region through the space surrounding the table. Using the above set-up, Cukauskas et al.[38]wereable to deposit BST films at temperatures ranging from 550 to 800  C. The substrate temperature was maintained by two quartz lamps, a type-K thermocouple and a temperature controller. The films were deposited at 135 W to a film thickness of 7000 A  .Thefilms were cooled to room temperature in 1 atm of oxygen before removing them from the deposition unit. This was then followed by annealing the films in 1 atm of flowing oxygen at a temperature of 780  C for 8 h in a tube furnace. 10.4 BULK MICROMACHINING FOR SILICON-BASED MEMS Starting in the early 1960s, bulk micromachining has since matured as the principal silicon micromachining technology. Bulk micromachining is employed to fabri- cate the majority of commercial devices available today. The term ‘bulk micromachining’ arises from the fact that this type of micromachining is used to realize micro- mechanical structures within the bulk of a single-crystal silicon wafer by selectively removing the wafer material. The microstructures fabricated using bulk micromachin- ing may have thicknesses ranging from sub-microns to the full thickness of a wafer (usually 200 to 500 mm), and lateral dimensions ranging from microns to the full diameter of a wafer (usually 75 to 200 mm). For bulk-micromachined silicon microstructures, a wafer-bonding technique is necessary for the assembled Anode Thermal shield Shutter Table with quartz lamps ( T s ≤ 850°C) Ba 0.5 Sr 0.5 TiO 3 Magnet Substrate holder Thermocouple Cr–Al Figure 10.9 Schematic of an ICM sputter gun [38]. 268 Smart Material Systems and MEMS MEMS devices. The bulk micromachining technique allows us to selectively remove significant amounts of silicon from a substrate to form membranes on one side of a wafer, a variety of trenches, holes or other structures (Figure 10.3). In recent years, a vertical-walled bulk micromachining techniques known as single crystal reactive etching and metallization (SCREAM) which is a combination of anisotropic and isotropic plasma etch- ing, is used [29]. The construction of any complicated mechanical device requires not only the machining of individual components but also the assembly of the components to form a complete set. In micromachining, bonding techniques are used to assemble individually micromachined parts to form a complete structure. For example, wafer bonding, when used in conjunction with micromachining techni- ques, allows the fabrication of 3-dimensional structures that are thicker than a single wafer. Several processes have been developed for bonding silicon wafers. The most common bonding process is fusion bonding. These tech- niques are described in Section 10.2.5. In the following sections, we will describe the commonly used bulk micro- machining processes. 10.4.1 Wet etching for bulk micromachining Wet chemical etching is widely used in semiconductor processing. It is used for lapping and polishing to give an optically flat and damage-free surface and to remove contamination that results from wafer handling and storing. Most importantly, it is used in the fabrication of discrete devices and integrated circuits of relatively large dimensions to delineate patterns and to open windows in insulating materials. It is to be noted that most of the wet etching processes are isotropic. That is, etch rate is unaffected by crystallographic orientation. However, some wet etchants are orientation depen- dant, i.e. have the property of dissolving a given crystal plane of a semiconductor much faster than other planes (see Table 10.4). In diamond and zinc blende lattices, the (111) plane is more closely packed than the (100) plane and, hence, for any given etchant the etch rate is expected to be slower. A commonly chemical used orientation-dependent etchant for silicon consists of a mixture of KOH in water and isopropyl alcohol. The etch rate is about 2.1 mm/min for the (110) plane, 1.4 mm/min for the (100) plane and only 0.003 mm/min for the (111) plane at 80  C; therefore, the ratio of the etch rates for the (100) and (110) planes to the (111) plane are very high, at 400:1 and 600:1, respectively. 10.4.2 Etch-stop techniques Properties that make etchants indispensable to the micro- machining of three-dimensional structures are their selectivity and directionality. As etching processes in polar solvents are fundamentally charge-transport phe- nomena, the etch rate will depend on the type of dopant and its concentration, and an external bias. Etch pro- cesses can therefore be made selective by the use of dopants – heavily doped regions etch slower or are halted electrochemically when observing the sudden rise in current through an etched n–p junction. A region at which wet (or dry) etching tends to slow down (or halt) is called an ‘etch stop’. There are several ways in which an etch-stop region can be created. In the following paragraphs, we discuss such methods by which etch selectivity is achieved. In the electrochemical etching of silicon, a voltage is applied between the silicon wafer (anode) and a counter- electrode (cathode) in the etching solution. The funda- mental steps of the etching mechanism are: (1) Injection of holes into the semiconductor to raise it to a higher oxidation state, Si þ . (2) Attachment of negatively charged hydroxyl groups (OH À ) to positively charged Si. (3) Reaction of the hydrated silicon with the complexing agent in the solution. (4) Dissolution of the reaction products into the etchant solution. The conventional electrochemical etch-stop technique is an attractive method for fabricating microsensors and Table 10.4 Anisotropic etching characteristics of different wet etchants for single-crystalline silicon. Reprinted from Applied Surface Science, vol. 164, R.K. Kupka, F. Bouamrane, C. Cremers, and S. Megtert, Microfabrication: LIGA-X and applications, pp. 97–110, Copyright 2000, with permission from Elsevier Etchant Temperature (  C) Etch rate (mm/h) Si (100) Si (110) Si (111) KOH:H 2 O80 841260.21 KOH 75 25–42 39–66 0.5 EDP 110 51 57 1.25 N 2 H 4 H 2 O 118 176 99 11 NH 4 OH 75 24 8 1 Silicon Fabrication Techniques for MEMS 269 micro-actuators since it has the potential for allowing reproducible fabrication of moderately doped n-type silicon microstructures with good thickness control. However, a major limiting factor in the use of this process is the effect of a reverse-bias leakage current in the junction. Since the selectivity between n-type and p-type silicons in this process is achieved through the current-blocking action of the diode, any leakage in this diode will affect the selectivity. In particular, if the leakage current is very large, it is possible for etching to terminate well before the junction is reached. In some situations, the etching process may fail completely because of this leakage. This effect is well known, and alternative biasing schemes employing three (or four) electrodes have been proposed to minimize this problem. Alternately, dopant-selective techniques that use pulsed anodizing voltages applied to silicon samples immersed in etching solutions can be used [39]. In bias-dependent etching, oxidation is promoted by a positive voltage applied to the silicon wafer, which causes an accumulation of holes at the Si–solution interface. Under these conditions, oxidation at the surface proceeds rapidly while the oxide is readily dissolved by the solu- tion. Holes, such as H þ ions, are transported to the cathode and are released as hydrogen (gas). Excess hole–electron pairs can, in addition, be created at the silicon surface, e.g. by optical excitation, to increase the etch rate. Silicon membranes are generally fabricated using the etch-stop phenomenon of a thin, heavily boron-doped layer, which can be epitaxially grown or formed by the diffusion or implantation of boron into a lightly doped substrate. This stopping effect is a general property of basic etching solutions such as KOH, NaOH, ethylene diamine pyroca- techol (EDP) and hydrazine (see Table 10.5). Due to the heavy boron-doping, the lattice constant of silicon decreases slightly. This leads to highly strained membranes that often show slip planes.Theyare,however,tautand fairly rugged, even at a few micron thickness and $1cm diameter. The technique, however, is not suited to stress- sensitive microstructures as this could lead to the movement of structures without an external load. The main benefits of the high-boron etch stop are the independence of crystal orientation, the smooth surface finish and the possibilities it offers for fabricating released structures with an arbitrary lateral geometry in a single etch step. On the other hand, the high levels of boron required are known to introduce considerable mechanical stress into the material, which may cause buckling or even fracture in a diaphragm or other ‘double-clamped’ structures. Moreover, the introduction of electrical components for sensing purposes into these microstructures, such as the implantation of piezoresis- tors, is inhibited by the excessive background doping. The latter consideration constitutes an important limita- tion to the applicability of the high-boron-dose etch stop. The pulsed potential anodization technique is used to selectively etch n-type silicon [39]. The difference in the dissolution time of anodic oxide formed on n-type and p-type silicon samples under identical conditions is used for etch selectivity. However, the difference in dissolution time is believed to be due to a difference in oxidation rates caused by the limited supply of holes in n-type samples [39]. This technique is applicable in a wide range of anodizing voltages, etchant compositions and tempera- tures. It differs from the conventional p–n junction etch stop in that the performance of the etch stop does not depend on the rectifying characteristics or quality of a diode. Using this technique, p-type microstructures of both low and moderate doping can be fabricated. Hence, the pulsed potential anodization technique opens up the pos- sibility for the creation of fragile microstructures in p-type silicon. The main problems with the conventional electroche- mical etch stop and the pulsed potential anodization techniques are related to the etch holders required for contacting the epitaxial layer (and the substrate with several electrodes) and for protecting the ‘epitaxial-side’ of the wafer from the etchant. Any leakage in these holders interferes with proper operation of the etch stop. Moreover, mechanical stress introduced by the holder reduces production yield substantially. The development Table 10.5 Dopant-dependent etch rates of selected silicon wet etchants. W.C. Tang, ‘‘Micromechanical devices at JPL for space exploration,’’ IEEE Aerospace Applications Conference Proceedings, vol. 1, ß 1998 IEEE Etchant Temperature (100) Etch rate (mm/min) for (100) Etch rate (mm/min) for (diluent) (  C) boron doping (10 19 cm À3 boron doping $ 10 20 cm À3 EDP (H 2 O) 115 0.75 0.015 KOH (H 2 O) 85 1.4 0.07 NaOH (H 2 O) 65 0.25–1.0 0.025–0.1 270 Smart Material Systems and MEMS of a reliable wafer holder for anisotropic etching with an electrochemical etch stop is not straightforward. The process of making contact to the wafer itself can also be critical and difficult to implement. Therefore a single-step fabrication of released structures with either a conven- tional electrochemical etch stop or pulsed potential ano- dization techniques may be troublesome. An alternative etch-stop technique which does not require any external electrodes (or connections to be made to the wafer) has been recently developed. This new technique is referred to as the photovoltaic electro- chemical etch-stop technique (PHET) [40]. The PHET approach can be used to produce the majority of struc- tures that can be formed by either the high-boron or the electrochemical etch-stop process [40]. PHET does not require the high impurity concentrations of the boron etch stop and does not require external electrodes or an etch holder as in the conventional electrochemical etch- stop or pulsed anodization techniques. Free-standing p-type structures with an arbitrary lateral geometry can be formed in a single etch step. In principle, PHET is to be seen as a two-electrode electrochemical etch stop where the potential and current required for anodic growth of a passivating oxide is not applied externally, but is generated within the silicon itself. The potential essentially consists of two components, being the photo- voltage across an illuminated p–n junction and the ‘Nernst’ potential of an n-Si/metal/etchant solution elec- trochemical cell. The buried oxide process generates microstructures by means of exploiting the etching characteristics of a buried layer of silicon dioxide. After implanting oxygen into a silicon substrate using suitable ion-implantation techniques, high-temperature annealing causes the oxy- gen ions to interact with the silicon to form a buried layer of silicon dioxide. The remaining thin layer of single- crystal silicon can still support the growth of an epitaxial layer from a few microns to many tens of microns thick. In micromachining, the buried silicon dioxide layer is used as an etch stop. For example, the etch rate of an etchant such as KOH slows down markedly as the etchant reaches the silicon dioxide layer. However, this process has the potential for generating patterned silicon-dioxide- buried layers by appropriately implanting oxygen. 10.4.3 Dry etching for micromachining As discussed above, bulk micromachining processes using wet chemical etchants, such as EDP, KOH and hydrazine, can yield microstructures on single-crystal silicon (SCS) by ‘undercutting’ the silicon wafer. The etch stop in these cases can be either crystal-orientation- dependent or dopant-concentration-dependent. How- ever, the type, shape and size of the SCS structures that can be fabricated with the wet chemical etch techniques are severely limited. On the other hand, a dry-etch-based process sequence has been developed to produce suspended, SCS mechanical structures and actuators [41]. This process is known as the SCREAM (single crystal reactive etching and metallization) pro- cess. SCREAM uses RIE processes to fabricate released SCS structures with lateral feature sizes down to 250 nm and with arbitrary structure orientations on a silicon wafer. SCREAM includes process options to make integrated, ‘side-drive’ capacitor actuators. A compati- ble high step-coverage metallization process using metal sputter deposition and isotropic metal dry etch is used to form ‘side-drive’ electrodes. The metalliza- tion process complements the silicon RIE processes used to form the ‘movable’ SCS structures. The SCREAM process can be used to fabricate com- plex circular, triangular structures in SCS, often with a single mask. These structures can include integrated, high-aspect-ratio and conformable capacitor actuators. The capacitor actuators are used to generate electrostatic forces and so produce micromechanical motion. 10.5 SILICON SURFACE MICROMACHINING Since the beginning of the 1980s, much interest has been directed towards micromechanical structures fabricated by a technique called surface micromachining. The resulting ‘2½-dimensional’ structures are mainly located on the surface of a silicon wafer and exist as a thin film – hence, the ‘half-dimension’. The dimensions of these surface-micromachined structures can be an order of magnitude smaller than bulk-micromachined structures. The main advantage of surface-micromachined structures is their easy integration with IC components, since the same wafer surface can also be processed for the IC elements. Surface micromachining does not shape the bulk silicon, but instead builds structures on the surface of the silicon by depositing thin films of ‘sacrificial layers’ and ‘structural layers’ and by removing eventually the sacrificial layers to release the mechanical structures (Figure 10.10). The dimensions of these surface- micromachined structures can be several orders of mag- nitude smaller than bulk-micromachined structures. The prime advantage of surface-micromachined structures is their easy integration with IC components, since the Silicon Fabrication Techniques for MEMS 271 wafer is also the ‘working’ one for the IC elements. Surface micromachining can therefore be used to build monolithic MEMS devices. Surface micromachining could also be performed using dry-etching methods. Plasma etching of the silicon substrate with SF 6 /O 2 -based and CF 4 /H 2 -based gas mix- tures is advantageous since high selectivities for the photoresist, silicon dioxide and aluminum masks can be achieved. However, when using plasma etching, a large ‘undercut’ of the mask is observed. This is due to the isotropic fluorine-atom-etching of silicon which is known to be high compared with the vertical etch induced by ion bombardment. In contrast, reactive-ion etching of poly-Si using a chlorine/fluorine gas combina- tion produces virtually no ‘undercut’ and almost vertical etch profiles when using a photoresist as a masking material. Thus, rectangular silicon patterns which are up to 30 mm deep can be formed by using chlorine/ fluorine plasmas out of poly-Si films and silicon wafer surfaces. Silicon microstructures fabricated by surface micro- machining are usually planar (or two dimensional) struc- tures. Other techniques involving the use of thin-film structural materials released by the removal of an under- lying sacrificial layer have helped to extend conventional surface micromachining into the ‘third dimension’.By connecting polysilicon plates to the substrate and to each other with hinges, 3-D micromechanical structures can be assembled after release. Another approach to 3-D structures have used the conformal deposition of poly- silicon and sacrificial oxide films to fill deep trenches previously etched in the silicon substrate. Sacrificial-layer technology generally uses polycrys- talline rather than single-crystal silicon (SCS) as the structural material for the fabrication of microstructures. Low-pressure chemical vapor deposition (LPCVD) of polysilicon is well known in standard IC technologies and has excellent mechanical properties similar to those of SCS. When polycrystalline silicon is used as the structural layer, sacrificial-layer technology normally employs silicon dioxide as the sacrificial material. This sacrificial layer is required during the fabrication process to realize some microstructures but does not constitute any part of the final device. The key processing steps in sacrificial-layer technol- ogy are: (1) Deposition and patterning of a sacrificial silicon dioxide layer on the substrate. (2) Deposition and definition of a polysilicon film. Lithography Lithography Mask Mask Sacrificial layer (silicon dioxide) Development of the sacrificial layer Removal of the sacrificial layer Deposition of the structural layer Patterning of the structural layer Polycrystalline silicon Final structure (1) (2) (3) (4) (6)(5) Figure 10.10 Processing steps for a typical micromachining process [23]. Reproduced by permission of Gabor Kiss 272 Smart Material Systems and MEMS (3) Removal of the sacrificial oxide by lateral etching in hydrofluoric acid (HF), i.e. etching away of the oxide underneath the polysilicon structure. Here, we refer to polysilicon and silicon dioxide as the structural and sacrificial materials, respectively. Several other material combinations are also used in surface micromachining. 10.5.1 Material systems in sacrificial layer technology An important consideration in the fabrication of an ideal mechanical microstructure is that it is without any residual mechanical stress, so that the films deposited have no significant residual strain. In particular, doubly supported free-standing structures will buckle in the presence of a relatively modest residual compressive strain in the struc- tural material. By choosing the appropriate deposition conditions and by optimizing the annealing step, an almost strain-free structural material layer can be obtained. Surface micromachining requires a compatible set of structural materials, sacrificial materials and chemical etchants. The structural materials must possess the phy- sical and chemical properties that are suitable for the desired application. In addition, the structural materials must have appropriate mechanical properties, such as high yield and fracture strengths, minimal creep and fatigue and good wear resistance. The sacrificial materi- als should also be able to avoid device failure during the fabrication process. Furthermore, they should have good adhesion and a low residual stress in order to eliminate device failure by delamination and/or cracking. The etchants must have excellent etch selectivity and they must be able to etch-off the sacrificial materials without affecting the structural ones. In addition, the etchants must also have appropriate viscosity and surface tension characteristics. The common IC-compatible materials used in surface micromachining are as follows. (1) Poly-Si/silicon diox- ide – LPCVD-deposited poly-Si as the structural material and LPCVD-deposited oxide as the sacrificial material. The oxide is readily dissolved in HF solution without the poly-Si being affected. Together with this material sys- tem, silicon nitride is often used for electrical insulation. (2) Polyimide/aluminum – in this case, polyimide is the structural material and aluminum is the sacrificial mate- rial. Acid-based etchants are used to dissolve the alumi- num sacrificial layer. (3) Silicon nitride/poly-Si – silicon nitride is used as the structural material, whereas poly-Si is the sacrificial material. For this material system, silicon anisotropic etchants, such as KOH and EDP, are used to dissolve the poly-Si. (4) Tungsten/silicon dioxide – CVD-deposited tungsten is used as the structural material with oxide as the sacrificial material. HF solu- tion is used to remove the sacrificial oxide. Other IC- compatible materials, such as silicon carbide, ‘diamond- like’ carbon, zinc oxide and gold, are also used. 10.5.1.1 Polycrystalline silicon/silicon dioxide The poly-silicon/silicon dioxide material system is the most common one used in the silicon-surface micro- machining of MEMS. This uses poly-silicon deposited by LPCVD as the structural material and a thermally grown (or LPCVD) oxide as the sacrificial material. The oxide is readily dissolved in HF solution, without affecting the poly-silicon. Silicon nitride is often used, together with this material system for electrical insula- tion. The advantages of this material system include the following: (1) Both poly-silicon and silicon dioxide are used in IC processing and, therefore, their deposition technolo- gies are readily available. (2) Poly-silicon has excellent mechanical properties and can be doped for various electrical applications. Dop- ing not only modifies the electrical properties but can also modify the mechanical properties of poly-silicon. For example, the maximum ‘mechanically-sound’ length of a free-standing beam is significantly larger for a phosphorous-doped compared with undoped poly-silicon. However, in most cases the maximum length attainable is limited by the tendency of the beam to stick to the substrate. (3) The oxide can be thermally grown and deposited by CVD over a wide range of temperatures (from about 200 to 1200  C) which is very useful for various processing requirements. However, the quality of oxide will vary with the deposition temperature. (4) The material system is compatible with IC processing. Both poly-silicon and silicon dioxide are standard materials for IC devices. This commonality makes them highly desirable in sacrificial-layer-technology applications which demand integrated electronics. 10.5.1.2 Polyimide/aluminum In this second material system, the polymer ‘polyimide’ is used for the structural material while aluminum is used for the sacrificial material. Acid-based aluminum etch- ants are used to dissolve the aluminum sacrificial layer. Silicon Fabrication Techniques for MEMS 273 The three main advantages of this material system are: (1) Polyimide has a small elastic modulus which is $ 50 times smaller than that of polycrystalline silicon. (2) Polyimide can take large strains before fracture. (3) Both polyimide and aluminum can be prepared at relatively low temperatures (< 400  C). (4) However, the main disadvantage of this material system lies with polyimide in that it has unfavorable viscoe- lastic characteristics (i.e. it tends to creep) and so such devices may exhibit considerable parametric drift. 10.5.1.3 Other material systems In the third material system of silicon nitride/poly-Si, silicon nitride is used as the structural material and poly-Si as the sacrificial material. For this material system, silicon anisotropic etchants such as KOH and EDP are used to dissolve the poly-Si. In the fourth material system of tungsten/oxide, tung- sten deposited by CVD is used as the structural material with the oxide as the sacrificial material. Here again, an HF solution is used to remove the sacrificial oxide. Similarly, silicon nitride is employed as the structural material with aluminum as the sacrificial layer instead of poly-Si. 10.6 PROCESSING BY BOTH BULK AND SURFACE MICROMACHINING Many MEMS devices are fabricated by either bulk micromachining or surface micromachining, as described in the previous sections. Their relative merits and demer- its are compared in Table 10.6. It is possible to combine advantages of both of these approaches by following a ‘mixed route’ for fabricating MEMS. The process flow for a ‘microgripper’ fabricated with this mixed approach is shown in Figure 10.11. In the first step, with thermally grown silicon dioxide as a mask, boron is diffused into the wafer at 1125  C. The masking SiO 2 and borosilicate glass (BSG) grown during this diffusion are removed. Then, a 2 mm thick layer of phosphosilicate glass (PSG) and a 2.5 mm thick polysilicon layer are deposited by LPCVD. This polysilicon layer is patterned by RIE in a CCl 4 plasma. Polysilicon at the back side of the wafer is later removed. Then, the PSG film is deposited in three steps to reach a thickness of 6 mm. This is used for diffusing phosphorous into the polysilicon layer (by annealing at 1000  C) and to protect it while bulk micro- machining. The alignment window in Figure 10.11(c) is used for ‘front-to-back’ reference. Break lines are pat- terned on the PSG around the polysilicon gripper area to prevent cracks. The PSG film on the back side is also patterned. Unwanted silicon from the back side is removed by etching in EDP (bulk micromachining). On the front side, the EDP causes undercut etching of channels beneath the PSG break line, eventually connecting to the open space caused from the back side etch. The PSG film (sacrificial layer) is then removed from both the top and bottom. Thus, the structure on the top side of the wafer is thought of as being fabricated by surface micromachining. 10.7 LIGA PROCESS Even though miniaturization is immensely increased by silicon surface micromachining, the small sizes/masses created are often insufficient for viable sensors and, particularly, actuators. The problem is most acute in Table 10.6 Comparison of bulk-and surface-micromachining processes for MEMS fabrication. Aspect Bulk Surface micromachining micromachining Maturity Well established Relatively new Ruggedness Yes – structures can withstand vibration Less rugged and shock Die area Large mass/area Small mass/area (reduced (suitable for accelero meters,increases cost) sensitivity, reduces cost) IC Not fully integrated IC compatible compatibility Structural Limited Wide range geometry possible Materials Well characterized Relatively new 274 Smart Material Systems and MEMS capacitive mechanical microsensors and especially capa- citively driven micro-actuators because of the low cou- pling capacitances. Deep etching techniques, such as LIGA, have been developed in order to address this problem but are difficult to realize for silicon. ‘LIGA’ is a German acronym for Lithographie, Galvanoformung, Abformung (lithography, galvanoform- ing, molding). This versatile technique was developed by the Research Center in Karlsruhe in Germany in the early 1980s using X-ray lithography for mask exposure, galva- noforming to form the metallic parts and molding to produce micro-parts with plastics, metals, ceramics, or their combinations [42,43]. A schematic diagram of the LIGA process flow is shown in Figure 10.12. The X-ray LIGA relies on synchrotron radiation to obtain necessary X-ray fluxes and uses X-ray proximity printing. Inherent advantages are its extreme precision, depth of field and very low intrinsic surface roughness [44]. With the LIGA process, the microstructure heights can be up to hundreds of microns to several millimeters, while the lateral resolution is kept at the submicron level due to the advanced X-ray lithography. Various materials can be incorporated into the LIGA process, allowing electrical, magnetic, piezoelec- tric, optical and insulating properties of sensors and actuators with a high-aspect ratio, which are not possible to make with the silicon-based processes. In addition, by combining the sacrificial layer technique and the LIGA process, advanced MEMS with moveable microstructures p + support cantilever Si wafer Si die Si die PSG PSG V- g roove V-groove Poly Etch channel Open space Alignment window Si wafer Poly PSG PSG break line Alignment window Poly PSG Si wafer PSG p + Si wafer PSG Poly p + Si wafer p + (a) (b) (c) (d) (e) Figure 10.11 Process flow for MEMS ‘microgripper’ fabricated with bulk and surface micromachining. C J. Kim, A.P. Pisano, and R.S. Muller, Silicon-Processed overhanging microgripper, J. Microelectromechanical Systems, Vil. 1, # 1992 IEEE Silicon Fabrication Techniques for MEMS 275 can be built (Figure 10.13). However, the high production cost of the LIGA process, due to the fact that it is not easy to access the X-ray source, limits the application of LIGA. Another disadvantage of the LIGA process relies on the fact that structures fabricated using LIGA are not truly three-dimensional, because the third dimension is always in a ‘straight’ feature. The quality of fabricated structures often depends on secondary effects during exposure and effects like resist adhesion. A similar technique, UV-LIGA, relying on thick UV resists, is a useful fabrication process, but with less precision. Modulating the spectral properties of synchrotron radiation, 3-D components with different size regimes can be fabricated using X-ray lithography [44]. Considerations for these cases are shown in Table 10.7. Figure 10.12 Schematic of the LIGA process [23]. Reproduced by permission of Gabor Kiss 276 Smart Material Systems and MEMS Figure 10.13 Combination of LIGA process and sacrificial layer process [45]. A. Rogner, et al., ‘‘LIGA based flexible microstructures for fiber chip coupling,’’ J. Micromech. Microeng., vol. 1, 1991, # IOP Table 10.7 X-ray lithography for various feature sizes [44]. Reprinted from Applied Surface Science, vol. 164, R.K. Kupta, F. Bouamrane, C. Cremers, and S. Megtert, Microfabrication: LIGA-X and applications, pp. 97–110, Copyright 2000, with permission from Elsevier Feature Low-aspect-ratio High-aspect-ratio High-aspect-ratio High-aspect-ratio nanostructures nanostructures microstructures ‘cm structures’ Photon energy range 500 eV–2 keV 2–5 keV 4–15 keV > 15 keV Exposable resist < 5 mm < 50 mm < 1mm < 2cm (PMMA) thickness Membrane SiC, 2 mm; diamond, Be, 50 mm; Be, 300 mm; Be, 500 mm; thickness 5 mm Be, 20 mm D263, 5 mm D263, 15 mm D263, 50 mm Absorber (Au, W) 100–500 nm 500nm to 10–20 mm20–50 mm thickness 10 mm Proximity contrast <10 dB 10–15 dB 15–20 dB >20 dB Development time s–min min–hh–days days Application Rapid mass production 2-D photonic Micromechanics, — of nanostructures crystals micro-optics Silicon Fabrication Techniques for MEMS 277 [...]... polymer and conducting polymer layers, elastic moduli to support the deformation initiated by MEMS devices, excellent overall dimensional stability (allowing local mobility) and long-term Smart Material Systems and MEMS: Design and Development Methodologies V K Varadan, K J Vinoy and S Gopalakrishnan # 2006 John Wiley & Sons, Ltd ISBN: 0-4 7 0-0 936 1-7 282 Smart Material Systems and MEMS Table 11.1 in MEMS. .. the synchronized beam scanning and the z-axis motion, complicated 3-D micro-parts are built in a layerby-layer fashion Various MSL systems aimed at improving the precision and speed of fabrication have been developed Scanning MSL [7–9,11,12] and projection MSL [10, 13–15] are the two major approaches Scanning MSL builds the solid micro-objects in a spot-by-spot and line-by line fashion, while projection... basic IH process, a mass-producible IH process, called the Mass-IH process, was proposed by Ikuta et al in 286 Smart Material Systems and MEMS 1996 to demonstrate the possibility of mass production of 3-D microstructures by MSL [10] The Mass-IH process uses optical fibers for multi-beam scanning An array composed of numerous single-mode optical fibers is used here to enable high-speed production of multiple... to obtain crack-free metal and ceramic micro-parts Thermal elimination of the organic components or catalytical de-binding can be used for a polyacetal-based polymer system The sintering procedure is done inside a tube furnace A reducing N2/H2 atmosphere is necessary to sinter metal microstructures, although ceramic micro-parts can be sintered in air The 296 Smart Material Systems and MEMS fabrication... thick) and are cured with UV light After forming a certain number of layers ($ 30) of negative materials, the positive ink heavily loaded with metal powders (e.g 50 vol%) is ‘knifed’ onto the assembly, filling the voids (Figure 11.19) This step is followed by curing of the filled material 298 Smart Material Systems and MEMS Table 11.6 Micro-electroplating: materials and features Type a Material plated Material. .. necessary for MEMS to form micro-metallic structures with 3-D and high-aspect-ratio features In contrast, only single-layer electroplating is often required for electronics Materials electroplated for MEMS include gold, copper, aluminum, nickel and their alloys, for micro systems with different applications (Table 11.6) Mask less electroplating is done by either localized electroplating or laser-enhanced... high-aspectratios and even 3-D features [60] Micro-electroplating can be divided into two major categories: throughmask-plating (or through-mold-plating) and mask-less plating The electroplated micro-parts can be either directly used for functional devices or act as molds for subsequent micromolding Most of the micro-electroplating processes used for MEMS belong to throughmask-plating (Figure 11.18),... for micro-scale sintering, microwave sintering may be a good choice since the heating uniformity will be fairly good 11.4.2 Jet molding Jet molding is a process developed for microfabrication of metal and ceramic microstructures Mixture of gas and 294 Smart Material Systems and MEMS Table 11.3 Typical experimental conditions for jet molding of Ag and PZT ultra-fine particles (< 0.1 mm) is heated and ejected... (wafers), it is limited to 2-D or very limited 3-D structures, it is incompatible with many chemical and biological substances and fabrication requires sophisticated, expensive equipment operated in a clean-room environment These often limit the low-cost potential of silicon-based MEMS Polymer-based MEMS are gaining momentum rapidly due to their potential for conformability and other special characteristics... polymers and ceramics Materials preparation: ball milling of UV monomer system and Ceramic powders CAD design Microstereolithography De-binder (burnout) and sintering Figure 11.16 Schematic of the flow for ceramic microstereolithography and post-processing Table 11.4 Micro-photomolding with powders in an unsaturated polyester- or PMMA-based resins Powder materia SiO2 Al2O3 ZrO2 SiC TiO2 Carbonyl–Fe Ag/Al Particle . overall dimen- sional stability (allowing local mobility) and long-term Smart Material Systems and MEMS: Design and Development Methodologies V. K. Varadan, K. J. Vinoy and S. Gopalakrishnan #. real 3-D and high-aspect-ratio microstructures, processibility of various materials, a ‘mask-less’ and cost- effective process, a medium range of accuracy (3–5 mm) and the possibility of ‘desktop’. real-mask-projection MSL can produce high-aspect-ratio micro-fabrications with a few different cross-sections at a high fabrication preci- sion. However, for truly 3-D micro-fabrications, a num- ber