Advanced mems packaging

Tai Lieu Chat Luong Advanced MEMS Packaging This page intentionally left blank Advanced MEMS Packaging John H Lau Chengkuo Lee C S Premachandran Yu Aibin New York Chicago San Francisco Lisbon London Madrid Mexico City Milan New Delhi San Juan Seoul Singapore Sydney Toronto Copyright © 2010 by The McGraw-Hill Companies, Inc All rights reserved Except as permitted under the United States Copyright Act of 1976, no part of this publication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system, without the prior written permission of the publisher ISBN: 978-0-07-162792-4 MHID: 0-07-162792-8 The material in this eBook also appears in the print version of this title: ISBN: 978-0-07-162623-1, MHID: 0-07-162623-9 All trademarks are trademarks of their respective owners Rather than put a trademark symbol after every occurrence of a trademarked name, we use names in an editorial fashion only, and to the benefit of the trademark owner, with no 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claim or cause whatsoever whether such claim or cause arises in contract, tort or otherwise About the Authors John H Lau earned a Ph.D in theoretical and applied mechanics from the University of Illinois He has also earned three master’s degrees He currently is a visiting professor at the Hong Kong University of Science & Technology (HKUST) His research interests cover a broad range of enabling technologies for 3D IC and system-in-package integration for RoHS-compliant electronics, optoelectronics, photonics, and MEMS packaging Prior to joining HKUST, Dr Lau was the director of the Microsystems, Modules, and Components Laboratory at the Institute of Microelectronics in Singapore for years and a Senior Scientist/MTS at Agilent/Hewlett-Packard in California for more than 25 years With more than 35 years of R&D and manufacturing experience, he has authored or co-authored more than 400 peer-reviewed technical publications, books, book chapters, and papers Dr Lau has received awards from ASME and IEEE, and is a Fellow of both organizations Chengkuo Lee received a Ph.D in precision engineering from the University of Tokyo, and has also earned two master’s degrees He worked as a researcher in several labs and then managed the MEMS device division at the Metrodyne Microsystem Corporation in Taiwan Dr Lee co-founded Asia Pacific Microsystems, Inc., in Taiwan, and served as vice president He is now an assistant professor in the Department of Electrical and Computer Engineering at National University of Singapore and a senior member of the technical staff at the Institute of Microelectronics in Singapore He has authored or co-authored about 200 conference papers, extended abstracts, and peer-reviewed journal articles, and holds eight U.S patents in the MEMS and nanotechnology fields C S Premachandran earned a master of technology degree in solid state technology from the Indian Institute of Technology, Madras He has held managerial/ executive positions at Indian Telephone Industries, Sun Fiber Optics, and Delphi Automotive Systems Since 1998 he has worked as a member of the technical staff in the Microsystems, Modules, and Components Laboratory at the Institute of Microelectronics, Singapore He has authored or co-authored more than 50 conference papers and journal articles and holds 10 U.S patents He is a Senior Member of IEEE His research interests are in MEMS and biosensor, optical, and advanced packaging Yu Aibin received a Ph.D in electrical and electronic engineering from Nanyang Technological University in Singapore He is a senior research engineer in the Microsystems, Modules, and Components Laboratory at the Institute of Microelectronics in Singapore His research interests include advanced packaging and MEMS design, fabrication, and packaging Dr Yu has authored or co-authored more than 60 technical publications Contents Foreword xv Preface xvii Acknowledgments xxi Introduction to MEMS 1.1 Introduction 1.2 Commercial Applications of MEMS 1.3 MEMS Markets 1.4 Top 30 MEMS Suppliers 1.5 Introduction to MEMS Packaging 1.6 MEMS Packaging Patents since 2001 1.6.1 U.S MEMS Packaging Patents 1.6.2 Japanese MEMS Packaging Patents 1.6.3 Worldwide MEMS Packaging Patents References 1 2 5 6 21 Advanced MEMS Packaging 2.1 Introduction 2.2 Advanced IC Packaging 2.2.1 Moore’s Law versus More Than Moore (MTM) 2.2.2 3D IC Integration with WLP 2.2.3 Low-Cost Solder Microbumps for 3D IC SiP 2.2.4 Thermal Management of 3D IC SiP with TSV 2.3 Advanced MEMS Packaging 2.3.1 3D MEMS WLP: Designs and Materials 2.3.2 3D MEMS WLP: Processes References 47 47 47 Enabling Technologies for Advanced MEMS Packaging 3.1 Introduction 3.2 TSVs for MEMS Packaging 3.2.1 Via Formation 3.2.2 Dielectric Isolation Layer (SiO2) Deposition 27 43 47 49 52 58 67 68 72 76 81 81 81 82 86 vii viii Contents 3.2.3 3.3 3.4 3.5 3.6 3.7 Barrier/Adhesion and Seed Metal Layer Deposition 3.2.4 Via Filling 3.2.5 Cu Polishing by Chemical/ Mechanical Polish (CMP) 3.2.6 Fabrication of an ASIC Wafer with TSVs 3.2.7 Fabrication of Cap Wafer with TSVs and Cavity Piezoresistive Stress Sensors for MEMS Packaging 3.3.1 Design and Fabrication of Piezoresistive Stress Sensors 3.3.2 Calibration of Stress Sensors 3.3.3 Stresses in Wafers after Mounting on a Dicing Tape 3.3.4 Stresses in Wafers after Thinning (Back-Grinding) Wafer Thinning and Thin-Wafer Handling 3.4.1 3M Wafer Support System 3.4.2 EVG’s Temporary Bonding and Debonding System 3.4.3 A Simple Support-Wafer Method for Thin-Wafer Handling Low-Temperature Bonding for MEMS Packaging 3.5.1 How Does Low-Temperature Bonding with Solders Work? 3.5.2 Low-Temperature C2C Bonding 3.5.3 Low-Temperature C2W Bonding 3.5.4 Low-Temperature W2W Bonding MEMS Wafer Dicing 3.6.1 Fundamentals of SD Technology 3.6.2 Dicing of SOI Wafers 3.6.3 Dicing of Silicon-on-Silicon Wafers 3.6.4 Dicing of Silicon-on-Glass Wafers RoHS-Compliant MEMS Packaging 3.7.1 EU RoHS 3.7.2 What Is the Definition of X-Free (e.g., Pb-Free)? 3.7.3 What Is a Homogeneous Material? 3.7.4 What Is the TAC? 3.7.5 How Is a Law Published in the EU RoHS Directive? 87 89 91 92 93 93 93 95 98 101 104 104 105 108 111 112 113 122 124 126 126 129 130 130 133 133 134 134 135 135 Contents 3.7.6 3.7.7 3.7.8 References EU RoHS Exemptions Current Status of RoHS Compliance in the Electronics Industry Lead-Free Solder-Joint Reliability of MEMS Packages Advanced MEMS Wafer-Level Packaging 4.1 Introduction 4.2 Micromachining, Wafer-Bonding Technologies, and Interconnects 4.2.1 Thin-Film Technologies 4.2.2 Bulk Micromachining Technologies 4.2.3 Conventional Wafer-Bonding Technologies for Packaging 4.2.4 Plasma-Assisted Wafer-Bonding Technologies 4.2.5 Electrical Interconnects 4.2.6 Solder-Based Intermediate-Layer Bonding 4.3 Wafer-Level Encapsulation 4.3.1 High-Temperature Encapsulation Process 4.3.2 Low-Temperature Encapsulation Process 4.4 Wafer-Level Chip Capping and MCM Technologies 4.5 Wafer-Level MEMS Packaging Based on Low-Temperature Solders: Case Study 4.5.1 Case Study: In/Ag System of Noneutectic Composition 4.5.2 Case Study: Eutectic InSn Solder for Cu-Based Metallization 4.6 Summary and Future Outlook References Optical MEMS Packaging: Communications 5.1 Introduction 5.2 Actuation Mechanisms and Integrated Micromachining Processes 5.2.1 Electrostatic Actuation 5.2.2 Thermal Actuation 5.2.3 Magnetic Actuation 135 138 138 149 157 157 158 158 159 168 172 172 175 176 177 178 180 182 183 193 202 203 209 209 211 212 215 219 ix 538 Index HTHH See high-temperature, highhumidity HTS See high-temperature-storage test hysteresis loops, isothermal fatigue tests, 313f I IBL See intermediate bonding layer ICP See inductively coupled plasma ICs See integrated circuits ICT See in-circuit test IMCs See intermetallic compounds IMOD See interferometric modulator displays In-Ag phase diagram, 182f In-Ag system, on noneutectic composition, 183–194 in-circuit test (ICT), 146 inductive-coupled plasma (ICP)-based deep reactive ion etching system, from STS, 84 inductively coupled plasma (ICP), 165 infrared bolometer, vacuum package for, 327 infrared bolometer vacuum package, 342f infrared package, 335 injection molding, replication technologies and, 363 inkjet printers, 2, in-line VOA, 244 schematic of, 245f in-plane displacement, 216 insertion loss, in wafer level package, 441f In-Sn layer, 118 In-Sn low-temperature solders vs Cu bonding rings, 195t In-Sn phase diagram, 183f InSn solder vs Ti/Cu/Ni/Au UBM metallization, 196f In/Sn/Cu systems, after eutectic bonding, 194 Instron microtester, 96 insulating oxide layer, 178 integrated circuits (ICs), integrated circuits (ICs) packaging, advanced, 47–67 integrated circuits (ICs) packaging industry, 158 integrated micromachining processes, 221–224 in optical MEMS applications, 211–224 Intel’s roadmap, of packagearchitecture transitions, 52f interconnects, 158–178 interdigitated comb actuation, 215 interfacial cracks, after reliability tests, 200, 201f interfacial microstructure: of joint bonding, 198f of seal joints, 200, 201f interference signal, from mirror package, 429f interferometric modulator displays (IMOD), intermediate bonding layer (IBL), 184, 184f solder-based, 175–176 intermetallic compounds (IMCs), 56, 115, 118, 119, 176, 182 ion milling etching, 163 ion-bombardment etching, 163 isothermal fatigue tests, 309–313 capacitance-gauge calibration curve, 312f hysteresis loops, 313f load drop curves, 312f results, 312–313, 313f sample preparation of, 309 of solder sealing ring, 300 test setup/procedures, 309–312 isotropic geometries, 159 J Japanese patents, on MEMS packaging, 21–27 joint bonding, interfacial microstructure of, 198f Joule heating effect, 215 junction temperature, of Cu-filled TSV chips, 64f, 65f, 67f K KGDs See known good dies Knowles Electronics, known good dies (KGDs), 50 KOH See potassium hydroxide Korean Aerospace Research Institute, 251 Kovar case, 170 L lab-on-a-chip (LOC), 354, 355 land-grid array (LGA), 279 large chips, 50 larger volume expansion, 216 large-scale optical switch packages, 275 large-scale optical switches, 233–237 laser ablation, 126 laser breading, 126 laser machining, MEMS cap wafer by, 83f Index laser source, detected by screen, 406f laser welding, 340 lateral electrical feedthrough, 3D MEMS packaging: assembly process for, 73f, 75f wire-bonding with, 68f lead exemptions, RoHS, 135, 136, 137, 138 lead zirconate titanate (PZT), 220 actuators/mirror, 257f layer, 256, 257 3D VOA, 256 lead-free MEMS PBGA solder joints, reliability tests of, 146–148 lead-free solder, material properties of, 142–145 lead-free solder joints, 81 quality of, 146 reliability of, 138–149 lead-free 256-pin PBGA package, 147f, 148f leak rates, 200 Lexmark, LGA See land-grid array lift-off technique: Au-Sn solder, 145 handler wafer for, 458f, 461f light clipping loss, 283 light path, in probe, 414f light-to-heat conversion (LTHC) layer, 105, 105f linearity of attenuation, 252 liquid etchants, 167f lithography determined planar-layer structure, 240 Littman-Metcalf geometry, 262 LMP See low-melting point load drop curves, isothermal fatigue tests, 312f loading conditions, of photonic package, 305 LOC See lab-on-a-chip long plating time, Cu overburden from, 89f long-haul networks, 210 long-term room-temperature storage: of Ag-In, 187–188 bonded interface after, 189f Lorentz-force actuation, 219 low cost/simple packaging, 179 low outgassing rate, of vacuum package, 327 low temperature bonding, 112–113 fundamentals of, 112f schematic, 112f with solders, 112–113 low-cost solder microbumps, for 3D IC SiP, 52–58 lower substrate: of OCT endoscope, 405f for single-mode optical fiber, 404, 404f low-melting point (LMP), 182 low-pressure chemical vapor deposition (LPCVD), 176, 196 low-pressure glow-discharge plasmas, 163 low-temperature aging, bonded interface under, 190f low-temperature bonding, for MEMS packaging, 111–126 low-temperature C2C bonding, 112–121 low-temperature C2W bonding, 122–124 low-temperature processes, WLP using, 179f, 180f low-temperature solder, 112f low-temperature wafer bonding, 175 low-temperature wafer-level encapsulation, 178–182, 179f, 180f LPCVD See low-pressure chemical vapor deposition L-shaped curved beam, 266f LTHC layer See light-to-heat conversion layer Lucent Technology, 239, 240, 276, 277f, 278 M magnetic actuation, in optical MEMS applications, 219 MANs See metropolitan-area networks manufacturability, optical MEMS applications, 264–268 MARS See mechanical antireflection switch material properties, in structural modeling, 336t matrix controller chip (MCC), 297 maximum concentration value (MCV), 134 MCC See matrix controller chip MCDM technology See multichip direct mounting technology MCM technologies See multiple-chip module technologies MCV See maximum concentration value Measurement Specialties, Inc., mechanical amplification, bent-beam structures for, 217 mechanical antireflection switch (MARS), 238 mechanical bending, shearing, and twisting tests, 140 mechanically disjointed material, 134 539 540 Index melting temperature, of composite solder, 118 membrane material: actuation force on, 382t, 383t permeability of, 381–384, 382t, 383t, 384t memory chip, 3D IC stacking, 52f MEMS See microelectromechanical systems mercury exemptions, RoHS, 135 metal contact switches, design, 479 metal housing, of optical switches, 282f metal/ceramic packaging, MEMS device cost with, 341f metallization lines and probing pads, of piezoresistive stress sensors, 94f metallization/solder patterning, on TSV, 461f metropolitan-area networks (MANs), 210, 238 metropolitan-scale fiber rings, 225 MFL See Micro Fabrication Laboratory Micro Fabrication Laboratory (MFL), 86 micro total analysis systems, 353 microactuators, 211 microbolometers, microbumps, 50 microcracks, 192 microdisplays, microelectromechanical systems (MEMS): commercial applications of, emerging, industrial application areas, market forecast, 2–5 as MTM, 49 size of, top 30 suppliers, vacuum and, 327 value market forecast, 3f volume market forecast, 4f wafer, 68f microelectromechanical systems (MEMS)-based DGE filter, 239 microelectromechanical systems (MEMS)-based tunable laser, packaged, 263f microelectromechanical systems (MEMS) cap wafer: with cavity, 83f by KOH wet etch, 83f by laser machining, 83f TSV fabricated, 83f microelectromechanical systems (MEMS) chip, after SD dicing, 131f microelectromechanical systems (MEMS) device: ASIC wafer bonding, 124f bonded on ASIC chip, 72f CMOS, 168 microsolder-bumped, 70 pick and placement of, 123f solder-bumped, 70 with TSV substrate, 69, 69f solder-bumped flip-chip, on ASIC chip, 69, 69f, 72f wafer, 67 wire bonded, on ASIC chip, 71f microelectromechanical systems (MEMS) device cost: with metal/ceramic packaging, 341f with wafer-level packaging, 341f microelectromechanical systems (MEMS) micromirror, optical probe with, 400f microelectromechanical systems (MEMS) motion analyzer, vacuum measurement using, 467–468, 467f, 468f microelectromechanical systems (MEMS) packaging, 5–6, 157 advanced, 67–68 Au-Sn solders for, 145 cap for, challenges of, 157 enabling technologies for, 81–150 expense of, functions of, Japanese patents on, 21–27 lead-free solder-joint reliability, 138–149 low-temperature bonding for, 111–126 piezoresistive stress sensors for, 93–104 protection in, 158 TSVs for, 81–82 U.S patents on, 6–21 worldwide patents on, 27–43 microelectromechanical systems (MEMS) technology: commercial success factors, 157 contributions to microoptical systems, 211 research on, 157 microelectromechanical systems (MEMS) VOA, 238, 239, 240 diffractive, 259f, 260 eight-channel, 264f retroflective, 249f with rotary-comb actuator, 248, 250f SEM photograph of, 241f with shutter, 267f surface-micromachined, 241f Index microelectromechanical systems (MEMS) wafer, with TSV, 452–458, 453f, 454f, 455f, 456f, 457f microelectromechanical systems (MEMS) wafer dicing, 126–133 microelectromechanical systems (MEMS) wafer-level packaging, advanced, 157–203 microelectronics, bioapplications of, 354 microfabrication technology, microfluidic cartridge: with 12 reservoirs, 388f self-contained, 371–377 microfluidic chip, for DNA/RNA extraction, 355f microfluidic components, 357–361 capillary-force passive valve in, 359f reagent injection port in, 359f substrate channels in, 359f microfluidic device, design of, 353 microfluidic package, 362–364 biochip attachment to, 365–366 biologic testing, 392–393 for DNA, 371f with fluid, 379f fluid testing, 391–392 with fluid/electric interconnections, 369f with fluidic chip, 358f PDMS, 364–370 with reservoirs, 372f without reservoirs, 366–370 rubber membrane and, 384f schematic, 357f with self-contained reservoirs, 371–374 substrate fabrication, 377–381, 378f microfluidics, 3, 353 capillary electrophoresis and, 353 cell sorting and, 353 DNA analysis and, 353 high through-put screening and, 353 PCR and, 353 protein analysis and, 353 microfuel cells, micromachining, 158–178 micromechanical elements, micromirror: in biosensor packaging, 401, 401f device, 185f, 226 fiber-alignment with, 428f microoptical systems, MEMS technology contributions to, 211 micro-opto-electromechanical systems (MOEMS), 1, micropads, 112f microresistive heater, 181 microsolder-bumped, MEMS device, 70 microtips, miniaturization, 353 mirror curvature: coupling efficiency and, 415–417, 416f, 417t tilted fold mirror and, 415 , 416f working distance and, 415 , 416f mirror device See also micromirror electrical connection of, 423f on silicon substrate, 423f mirror package, interference signal from, 429f mirror-array package, 281f Mo substrate, time-history deflection of, 323f, 324f MOEMS See micro-optoelectromechanical systems moisture-sensitivity tests, 140 molded surface-micromachining and bulk etch release (MOSBE) II process, 222 mirrors made by, 224f process flow of, 223f mole fraction, 120f molybdenum substrate, 299 Moore’s Law, 47–49 Moore’s observation of silicon integration, 48f of transistors on IC, 48f more than Moore (MTM), 47, 49 MEMS as, 49 morphotropic phase boundary (MPB), 220 MOSBE See molded surfacemicromachining and bulk etch release II process mounting on dicing tape, stresses in wafers after, 98–101, 98f movement-translation micromechanism (MTM), 240 MPB See morphotropic phase boundary MTM See more than Moore; movement-translation micromechanism multichanneled variable optical attenuators (MVOAs), 264 histogram of, 265f multichip direct mounting (MCDM) technology, 280, 281f multi/demultiplexers (MUXs/ DEMUXs), 238 multiple-chip module (MCM) technologies, wafer-level chip capping and, 180–184 Murata, MUXs/DEMUXs See multi/ demultiplexers MVOAs See multichanneled variable optical attenuators 541 542 Index N Najafi, K., 181 nanoelectromechanical systems (NEMS), Nanyang Technological University (NTU), 240, 251, 252 NDT See nondestructive testing NEDO See New Energy and Industrial Technology Development Organization NEMS See nanoelectromechanical systems New Energy and Industrial Technology Development Organization (NEDO), 132 Ni layer, 53 non-BOSCH process, 84 nondestructive testing (NDT), 91 noneutectic composition, In-Ag system on, 183–194 nonlinear analyses, of 3D photonic switch, 306–309 NTU See Nanyang Technological University numerical aperture, 406 O OADM See optical add/dropmultiplexing OCT See optical coherence tomography OEO See optical-electrical-optical off-axis misalignment–based light-attenuation, 242 Official Journal of the EU, 134 Okamoto GNX 200, 91, 101 Olivettii-Jet, Omron, on-chip active alignment, 211 one-level packaging, for RF-MEMS, 525–526, 526f optical add/drop-multiplexing (OADM), 225 optical alignment accuracy, 211 optical back-reflection, 279, 281 optical bubble switch, 302f optical coherence tomography (OCT), 398–400 bioimaging, 397 with optical probes, 399f optical coherence tomography (OCT) endoscope, lower substrate of, 405f optical coherence tomography (OCT) system, 398 optical communication applications, VOA for, 237–261 optical cross-connect (OXC), 225, 233, 264 optical crosstalk, 279, 281 optical device, fully assembled, 298f optical efficiency testing, 431–432, 432f, 432t optical fibers, alignment of, 226 optical MEMS applications, 159, 327–351 actuation mechanisms in, 211–224 electrostatic actuation in, 212–217 electrostatic VOA and, 269–275 integrated micromachining processes in, 211–224 magnetic actuation in, 219 manufacturability, 264–268 optical switches and, 275–285 packaging of, 211, 261–285 piezoelectric actuation in, 219–221 reliability issues, 261–285 self-assembly, 264–268 small-scale optical switches in, 225–233 testing, 261–285 thermal actuation in, 215–219 optical MEMS packaging, 297–325 3D packaging, 297–301 optical MEMS systems, 209–286 telecommunication applications of, 210 optical model, of probe, 412–415 optical network topologies, 210 optical path, power detection on, 415t optical power, Gaussian distribution of, 407f optical probes: alignment of, 427 assembly of, 421–427 axial scanning test result of, 427–429, 428f, 429f configuration of, 404–406 housing, 425–427, 426f imaging, 429–430, 430f, 431f light path in, 414f with MEMS micromirror, 400f OCT with, 399f optical model of, 412–415 optical stimulation of, 414f testing, 427–432 optical properties/theories, 406–410 optical stimulation, 412–421 for beam size study, 413f for coupling efficiency, 413f of probe, 414f optical switches, 209, 225–237 dynamic reliability of, 283 large-scale, 233–237 metal housing of, 282f optical MEMS applications and, 275–285 performance parameters, 283 small-scale, 225–233 static reliability of, 283, 284f Index optical switching technology, optical-electrical-optical (OEO), 225 optical-loss mechanisms, for 2D optical switch mirrors, 283 optoelectronics hybrid package, 262f optofluidic technology, 261 orientation effect, 66 out-of-plane microstructures, 157 overlapping heat sources, 66 overload failure, 138 OXC See optical cross-connect P package deflection: calculation method of, 319f at cooling temperatures, 319f by finite-element method, 317–320 by Twyman-Green interferometry method, 314–317 package sealing techniques, 340 package-architecture transitions, Intel’s roadmap of, 52f parabolic micromirror pair, 252 parallel shift effect, 279 parallel-plate actuation, 215 passivation layers, 53 patents, Japanese, on MEMS packaging, 21–27 patents, U.S., on MEMS packaging, 6–21 patents, worldwide, on MEMS packaging, 27–43 path-length-dependent loss, 283 patterned-planar-layer structure, 240 PBDEs See polybrominated diphyenyl ethers PBDs See polybrominated diphyenyls PBGA See plastic ball-grid array PCB See printed circuit board PCR See polymer chain reaction PCT See pressure-cook test PDMS See polydimethylsiloxane PECVD See plasma-enhanced chemical vapor deposition perforated support wafer, 109f wafer device and, 110f PGA See plastic grid array phosphosilicate glass (PSG), 168 photonic package: finite-element model of, 303f loading conditions of, 305 photonic switch: boundary-value problem of, 302–306 geometry of, 302 materials, 302–305 packaging elements, 299 photoresist lithography, 108, 109f photoresist patterns, 159 PID See proportional-integral-derivative piezoelectric actuation, in optical MEMS applications, 219–221 piezoelectric materials, 220 piezoresistive coefficients, 98 determined by the stress-sensor strip, 96f piezoresistive stress sensors, 81 calibration of, 95–98 design/fabrication of, 93–94 for MEMS packaging, 93–104 metallization lines and probing pads of, 94f rosette of, 94f pin valve: closed, 375f design, 374–375 open, 376f three level of sealing, 376f Pirani vacuum sensor, 178 planar lightwave circuit (PLC), 297 on silicon chip, 298f planar micropositioners, 218 planar tilted mirror, 3D VOAs of, 255f plasma deposition, dielectric isolation layer (SiO2) deposition by, 87f plasma etchants, 167f plasma generation, 172 plasma-assisted etching, 162 plasma-assisted wafer-bonding technologies, 172 plasma-enhanced chemical vapor deposition (PECVD), 86, 87f, 94, 102, 102f, 103f, 110 Plasm-Therm chamber, 111f plastic ball-grid array (PBGA), 146, 147f, 148f plastic grid array (PGA), 235 platen, independent biasing of, 84 PLC See planar lightwave circuit PMMA See poly(methyl methacrylate) point EDX analysis, 118t Poisson’s ratio, 302 polarization-dependent loss, 252 poly(methyl methacrylate) (PMMA), 170, 360–361 thermal compress bonding of, 386t polybrominated diphyenyl ethers (PBDEs), 133 polybrominated diphyenyls (PBDs), 133 polycrystalline silicone layer, 178 polydimethylsiloxane (PDMS), 360 layers, 364, 365, 366 microfluidic packages, 364–370 polydimethylsiloxane (PDMS) substrate: bonding, 367f DNA chip attached to, 368f upper/lower, 366f 543 544 Index polymer chain reaction (PCR), microfluidics and, 353 polymer chain reaction (PCR) amplification, for DNA extraction, 394 polymer chain reaction (PCR) thermal cycle conditions, for DNA extraction, 395t polymer passivation, 165 polymer sealing interface, wafer-level packaging approach using, 171f polymer-based bonding, 175 polymeric microfabrication methods, 362 polymer/metal coatings, 180f polypropylene to PMMA bonding process optimization of, 389t for reservoir/channel layer, 387–389, 387f polysilicon, 172 mirror, 214f plate, 215 shutter, 214f thermal actuators, 216–217 polysilicon-based surface micromachining, 221, 225 poly(methyl methacrylate) (PMMA) to PMMA bonding for channel layer, 385–387 side view, 386f polyvinylidene fluoride (PVDF), 220 pop-up microshutter, 268 pop-up mirror, 226f postbonding annealing additional, 188–194 effect of, 186–187 postbonding temperature stability, 175 potassium hydroxide (KOH), 160 potassium hydroxide (KOH)-etched mirror, 227 potassium hydroxide (KOH) wet etch advantages of, 84 MEMS cap wafer by, 83f power cycling tests, 140 pressure sensors, pressure-cook test (PCT), 121, 140 primary/secondary flats, of and wafers for both n- and p-type doping, 161f printability test, 146 printed circuit board (PCB), 58 projectors, displays in, proportional-integral-derivative (PID), 317 protection, in MEMS packaging, 158 protein analysis, microfluidics and, 353 PSG See phosphosilicate glass pull tests, 146 bond interface after, 116f of bonding couples, 114, 114f fracture surfaces after, 115 interface after, 116f PZT See lead zirconate titanate R radiofrequency microelectromechanical systems (RF-MEMS), advanced packaging of, 515–528 chip capping of, 516–523, 517f one-level packaging for, 525–526, 526f reliability of, 526–528, 527f, 527t sealing method for, 518–523, 518f, 519f, 520f, 521f, 522f, 523f thin-film capping for, 523–525, 524f, 525f value market forecast, 4f volume market forecast, 5f zero-level packaging of, 515–525, 516f, 517f radiofrequency microelectromechanical systems (RF-MEMS) switches, 475–493, 486f classification, 476t design of, 475–484 fabrication of, 484–489, 487f, 488f, 489f mechanical design, 479–484 mechanical performance of, 489–492, 490f, 491f performance comparison of, 476t radiofrequency performance of, 489, 490f reliability of, 492 surface micromachining of, 484–488 radiofrequency microelectromechanical systems (RF-MEMS) tunable band-pass filters, 504–512 analog tuning of, 505–506, 505f, 506f digital tuning of, 506–512, 507f, 508f, 509f, 510f, 511f radiofrequency microelectromechanical systems (RF-MEMS) tunable capacitors, 495–504, 499f, 500f analog tuning of, 496–503 area tuning of, 502–503, 502f, 503f digital tuning of, 503–504, 503f, 504f gap tuning of, 497–501, 497f radius of curvature (ROC), 234 RDL See redistribution layers Index reaction zone, Cu/Sn-In solder interlayer, 115, 117f reactive-ion etching (RIE), 84, 163 reagent cross-mixing, 355 reagent injection port, in microfluidic components, 359f reagent protocol, for DNA/RNA extraction, 356t reagent valve, 370f reconfigurable optical add/drop multiplexers (ROADM), 210 redistribution layers (RDL), for TSVs, 82 reflection mirror, 185 reflection VOA, schematic of, 246f refractive-type VOA, 251 relative permittivity, 212 reliability engineering, of solder joints, 140–142, 141f reliability issues, optical MEMS applications, 261–285 reliability study, of bonded interface, 198, 198f reliability tests: definition of, 139 interfacial cracks after, 200, 201f of lead-free MEMS PBGA solder joints, 146–148 methods of, 140 objective of, 139 vacuum maintenance and, 469–471, 469f, 470f, 471f repeatability, 280 replication technologies: casting method and, 362–363 hot embossing and, 363 injection molding and, 363 reservoir membrane, design, 380f reservoir/channel layer, polypropylene to PMMA bonding for, 387–389, 387f reservoirs: with aluminum foil, 380f cylindrical, 373f design, 371–374 external actuator acting on, 372f microfluidic package with, 372f microfluidic package without, 366–370 modified design of, 381f reagent storage in, 370f self-contained, 371–374 of thermoplastic material, 392f residual gas analysis (RGA), 346 on vacuum sealing, 347t resistance measurement, 101 resistive element, on silicon chip, 299 Restriction of the Use of Certain Hazardous Substances (RoHS), 81, 297 cadmium exemptions, 136 deca-BDE exemption, 136 electronics industry compliance of, 138 in European Union, 133–134 exemptions in European Union, 133–134 hexavalent chromium exemptions, 136, 137 lead exemptions, 135, 136, 137, 138 mercury exemptions, 135 retroflective MEMS VOA, 249f retroflective mirrors, VOA with, 253f RF-MEMS See radiofrequency microelectromechanical systems RGA See residual gas analysis RIE See reactive-ion etching ring-type networks, 225 ROADM See reconfigurable optical add/drop multiplexers Robert Bosch, ROC See radius of curvature Rohms and Hass, strong-removal-rate slurry from, 91 RoHS See Restriction of the Use of Certain Hazardous Substances rosette, of piezoresistive stress sensors, 94f rotary-comb actuator: DRIE-derived planar VOAs and, 248–251 MEMS VOA with, 248, 250f for VOA, 248–251 rubber membrane, microfluidic package and, 384f S sacrificial oxide layer, 178 sacrificial polymer, thermal decomposition of, 179 sacrificial polysilicon, 259 sacrificial wafer: removal, 462–464, 462f, 463f, 464f wafer level package with, 450, 451f, 452f wafer level package without, 450– 452, 452f, 453f salt-atmosphere tests, 140 SAM See scanning acoustic microscopy scan angle, 234 scanning acoustic microscopy (SAM), solder joint FA and, 141 scanning electron microscopy (SEM), solder joint FA and, 141 545 546 Index scanning mirrors, thermally driven, 218 scratch-drive actuator (SDA), 214, 214f SD OCT See spectral-domain OCT SD technology See stealth dicing technology SDA See scratch-drive actuator seal joint, TEM/EDX analysis of, 198, 199f, 199t seal joints, interfacial microstructure of, 200, 201f seal ring, 125f cap wafer with, 124f sealed vacuum package, construction of, 328f sealing method, for RF-MEMS, 518– 523, 518f, 519f, 520f, 521f, 522f, 523f sealing ring, thermal fatigue life prediction of, 314 seam welding, 340 Seiko Epson, self-assembled VOA, 266f self-assembly, optical MEMS applications, 264–268 self-assembly mechanism, 268f self-contained microfluidic cartridge, 371–377 self-contained reservoirs, 371–374 SEM See scanning electron microscopy Sematech’s cost model of DRIE vs laser, 83f for TSVs, 83, 83f sensitivity vs vacuum, for bolometer, 330f sensor wafer, layers of, 102 series capacitive switch, 480f shear strength, 121If shear test, 146, 198 shear-creep- time-history, 307, 308f shear-stress time-history, 307, 308f shock (drop) tests, 140 shunt capacitive switch, 477f circuit of, 478f shutter/single-reflection mirror, DRIEderived planar VOAs and, 242–247 side-beam structure, 230 sidewall metallizations, 299 signal lines, 68f silicon (Si), internal transformation of, 132 silicon base, 113f silicon cap, 113f silicon carbide, 160 silicon carrier, 52f silicon chip, 52f PLC on, 298f resistive element on, 299 well-bonded flat, 116f silicon chip/silicon carrier scanning electron microscope image of, 57f underfill between, 57f silicon crystal orientation, 160 silicon dioxide deposition chamber, 111 silicon etching mechanism, 162 silicon integration, Moore’s observation of, 48f silicon micromachining, selection of, 163, 164t silicon microphones, silicon microshutter, 239 silicon nitride, 160 silicon nitride film, 176 silicon optical bench (SiOB) for 3D micromirror, 422f fabrication, 421–422 silicon optical bench (SiOB) substrate 3D micromirror on, 424f GRIN lens on, 424f silicon pressure sensors, silicon region, TEM image of, 117f silicon rubber, actuation force on, 383t Silicon Sensing Systems, silicon substrate, mirror device on, 423f silicon-on-glass wafers, dicing of, 130–133, 132f silicon-on-insulator (SOI) wafers, 126 dicing of, 129, 131f silicon-on-silicon wafers, dicing of, 130 SiN film sealing, 176 single-crystal silicon layer, 178 single-element bolometer: time response, 348f vacuum package development, 348f single-mode optical fiber: in biosensor packaging, 401–403 lower substrate for, 404, 404f upper substrate for, 403, 403f single-reflection-type VOA, curves of wavelength-dependent loss for, 243f SiOB See silicon optical bench SiP See system-in-package SIR test See surface-insulationresistance test slow chips, 50 small chips, 50 small-scale optical switches, 225–233 SMT See surface mount technology SnAgCu solder bump, 92 SOI wafers See silicon-on-insulator wafers solder joint, reliability engineering of, 140–142, 141f Index solder joint FA: cross-sectioning and, 141 dye and pry and, 141 EDX and, 142 FIB and, 141 high-power microscopy and, 141 methods, 141–142 SAM and, 141 SEM and, 141 TAMI and, 142 TEM and, 142 visual inspection and, 141 x-ray inspection and, 141 XRD and, 142 solder joints, through-wafer vertical interconnects with, 174f solder microbumps, 53 solder microbumps/under-bumpmetallurgy (UBM) pads, distribution of, 53f solder sealing, 340 solder sealing ring, isothermal fatigue tests of, 300 solderability test, 146 solder-based intermediate-layer bonding, 175–176 solder-based thermocompression bonding, 169 solder-bumped, MEMS device, 70 with TSV substrate, 69, 69f solder-bumped flip-chip, MEMS device, on ASIC chip, 69f, 72f solder-bumped MEMS device flipchip, with vertical electrical feed-through TSV, 71f solders, low temperature bonding with, 112–113 solder-spreading test, 146 spectral-domain OCT (SD OCT), 399 spot size, 406 sputtering rate, 163 SS OCT See swept-source OCT stack wafers, bonded 8-in diameter, 186f staggered heat sources, 66 on Cu-filled TSV chips, 67f Stark, B H., 181 static actuated displacement, 214 static displacement, of comb actuator, 213 static reliability, of optical switches, 283, 284f stealth dicing (SD) technology, 126, 128f images of, 130f MEMS chip after, 131f principles of, 126–129, 127f processes of, 127–128 STMicroelectronics, stress: compressive, 102 as a function of wafer thickness, 101 tensile, 102 thermomechanical, 104 vs wafer thickness, 102f stress and applied force equation, 96 stress components, on thin wafers, 101t stress measurement locations, on stress-sensor wafer, 99f stress sensors resistances, as function of applied stress, 97f stresses in wafers: after mounting on dicing tape, 98–101, 98f after thinning, 101–104 stress-sensor strip, piezoresistive coefficients determined by the, 96f stress-sensor wafer: bow data/bending profiles of, 100f stress measurement locations on, 99f strong-removal-rate slurry, from Rohms and Hass, 91 structural modeling, material properties in, 336t STS See Surface Technology Systems substrate assembly, 405 substrate bonding, PDMS, 367f substrate channels, in microfluidic components, 359f substrate fabrication, microfluidic package, 377–381, 378f SU-8, 170 sulfur hexafluoride (SF6), 84 support-wafer, bonded perforated, 111f support-wafer fabrication process flow, 109f support-wafer method, 110 surface micromachining, 221 of RF-MEMS switches, 484–488 surface mount technology (SMT), 113, 176 Surface Technology Systems (STS), 84 inductive-coupled plasma (ICP)based deep reactive ion etching system from, 84 surface-activation bonding, 172 surface-insulation-resistance (SIR) test, 146 surface-micromachined MEMS VOA, 241f surface-micromachined polycrystalline silicon substrate, 213 surface-micromachined polysilicon pop-up shutter, 226f surface-micromachined silicon shutter, 227f 547 548 Index swept-source OCT (SS OCT), 398–399 switch time, 280 switching time, 230 SYLGARD 184 silicone elastomer kit, 364 system-in-package (SiP), 49 with high input-output pin counts, 175 solutions, 158 thermal resistance of, 63f Systron Donner, T Ta adhesion layer, 53 TAC See Technical Adaptation Committee TAMI See tomographic acoustic microimaging Tango System’s AXCECA chamber, 87, 87f tape expansion, 128f Taxi Instruments, TCT See thermal cycling test TEC See thermal expansion coefficient Technical Adaptation Committee (TAC), 135 TECs See thermoelectric coolers telecommunication applications, of optical MEMS systems, 210 Telecordia GR1209 regulation, 275 Telecordia GR1221 regulation, 272, 275 TEM See transmission electron microscope TEM/EDX analysis, of seal joint, 198, 199f, 199t temperature cycling condition, 306f temperature cycling tests, 140 temperature maps, for chip thickness, 65f temperature stability, bolometer chip, 331 temperature stability measurement, of TECs, 333f temperature stabilization during cooling, of bolometer package, 335f temperature stabilization during heating, of bolometer package, 335f temperature-profiling test, 146 temporary bonding, 106–107 tensile creep-strain rate, 144, 144f tensile stress, 102 tensile test, 390–391, 390f, 391f test-die temperature, 333 tetramethyl ammonium hydroxide (TMAH), 160, 223, 261 thermal actuator: design of, 218 in optical MEMS applications, 215–219 VOA using, 271–275 thermal bimorph, 215 thermal compress bonding, of PMMA, 386t thermal cycling deflections, 300 thermal cycling test (TCT), 121, 147f thermal decomposition, of sacrificial polymer, 179 thermal expansion coefficient (TEC), 81, 102 thermal fatigue life prediction, of sealing ring, 314 thermal issues, 50, 51 thermal management, of 3D IC SiP with TSV, 58–67 thermal optimization, for bolometer package, 330–335 thermal performance, of 3D IC stacked TSV chips with nonuniform heat source, 63–67 with uniform heat source, 61–62, 61t thermal resistance of Cu-filled TSV chips, 64f, 67f of SiP, 63f thermal-bimorph actuator, 215 thermally activated slide lift-off approach, 107 thermocompression approach, 175 thermocompression bonding, 384–391 thermoelectric coolers (TECs), 297, 331 bolometer package with, 332, 332f die temperature stability with, 334f temperature stability measurement of, 333f thermomechanical stress, 104 thermoplastic material, reservoirs of, 392f thin-film capping, for RF-MEMS, 523–525, 524f, 525f thin-film technologies, 158–159 thinning, stresses in wafers after, 101–104 thin-wafer handling, 50, 81 wafer thinning and, 104–111 3D circuits, 50 3D IC integration, 47, 49 of copper-filled TSV chips, 58, 59f with WLP, 49 3D IC packaging roadmap, 51f 3D IC SiP, for low-cost solder microbumps, 52–58 3D IC SiP with TSV, thermal management of, 58–67, 59f 3D IC stacked TSV chips maximum junction temperature, 62f Index 3D IC stacked TSV chips (Cont.): thermal performance of with nonuniform heat source, 63–67 with uniform heat source, 61–62, 61t 3D IC stacking, 50, 51, 52f 3D MEMS packaging, 49f designs of, 68f with lateral electrical feed-through, assembly process for, 73f, 75f with vertical electrical feed-through, assembly process for, 73f, 74f wire-bonding, with lateral electrical feedthrough, 68f 3D MEMS WLP: designs, 68–72 materials, 68–72 processes, 72–76 3D micromirror: SiOB for, 422f on SiOB substrate, 424f 3D optical switches, 233, 234 based on Z-configuration, 277, 278f simple configuration of, 277f 3D packaging, of optical MEMS packaging, 297–301 3D photonic switch, nonlinear analyses of, 306–309 3D VOAs, 254–258 collimating lens in, 256f optical microscope photograph of, 271f of planar tilted mirror, 255f PZT, 256 schematic, 256f 3M UV-Curable Liquid Adhesive LC-2201, 105 3M wafer support system, 104–105, 104f with glass supporting plate, 105, 105f process flow, 106f three-plate tunable capacitor, 501f through-silicon vias (TSVs), 50, 51, 52 ASIC wafer with, 91–92 cap wafer/cavity with, 93 copper electroplating in, 458f cost, 82 design software, 82 design technology for, 82 for MEMS packaging, 81–82 with MEMS wafer, 452–458, 453f, 454f, 455f, 456f, 457f metallization/solder patterning on, 461f quality inspection of, 91 RDL for, 82 through-silicon vias (TSVs) (Cont.): Sematech’s cost model of, 83, 83f via formation, 82–86 wafer fabrication process, 92f, 455–462 wafer warpage, 82 wafer yields of, 82 through-silicon vias (TSVs) fabricated, MEMS cap wafer, 83f through-silicon vias (TSVs) MEMS device solder bonded, on ASIC chip, 71f through-silicon vias (TSVs) substrate, microelectromechanical systems (MEMS) device, solder-bumped with, 69f through-wafer vertical interconnects, with solder joints, 174f Ti adhesion layer, 53 Ti barrier/adhesion layer and Cu seed layer, 87f by Alchimer’s electrografting, 88, 88f depositions of, 88 fabrication process parameters for, 88f Ti/Cu/Ni/Au UBM, bonded devices using, 197f Ti/Cu/Ni/Au UBM metallization vs In-Sn solder, 196f tilted fold mirror, mirror curvature and, 415 , 416f time response, single-element bolometer, 348f time-history deflection, 307, 307f time-history stick and slide friction status, 325f of Mo substrate, 323f, 324f TMAH See tetramethyl ammonium hydroxide tomographic acoustic microimaging (TAMI), solder joint FA and, 142 total analysis systems, 353 transistor structure, 112f transistors on IC, Moore’s observation of, 48f transmission electron microscope (TEM), 115 solder joint FA and, 142 transmission state, H-beam-driven optical switch in, 231f transverse resolution, 409 trench sidewalls, vapor-silica interface of, 299 trench-refilled polysilicon film, 223 TSVs See through-silicon vias tunable filters, 210 tunable lasers, 210 25-W CO2 laser, 132 549 550 Index 2D optical switch, 232, 232f 2D optical switch mirrors, optical-loss mechanisms for, 283 two-axis mirror, 233 process flow, 236f with wafer-bonded electrostatic actuator, 235f two-plate tunable capacitor, 499f Twyman-Green interferometry method, 300 finite-element model, 315f measurement results, 317 package deflection by, 314–317 procedure, 316 sample preparation, 315 simulation results, 318f temperature conditions, 317, 317f test results, 318f test setup, 316, 316f U UBM pads See under-bumpmetallurgy pads Ulis, ultrasonic agitation, handler wafer during, 460f ultraviolet curable liquid adhesive, 105 under-bump-metallurgy (UBM), 113, 145, 184 under-bump-metallurgy (UBM) layer, on germanium window, 344f under-bump-metallurgy (UBM) pads, 53 under-bump-metallurgy (UBM) pads/ solder microbumps, distribution of, 53f under-bump-metallurgy (UBM) rings, 196 underfill, between silicon chip/silicon carrier, 57f unsaturates, 165 upper substrate, for single-mode optical fiber, 403 upper/lower substrates assembly, 402f of PDMS, 366f U.S patents, on MEMS packaging, 6–21 U-shaped thermal actuator, 216, 216f V vacuum: MEMS and, 327 vs warpage of germanium window, 339f vacuum maintenance, reliability testing and, 469–471, 469f, 470f, 471f vacuum measurement: bolometer package, 346–350 using MEMS motion analyzer, 467–468, 467f, 468f vacuum package: of bolometer, 340–343 challenges of, 328–329 cross section of, 331f elements of, 327 hermeticity of, 327 for infrared bolometer, 327 low outgassing rate of, 327 outgassing study in, 346 requirements of, 328 single-element bolometer, 348f at wafer level, 341f vacuum permittivity, 212 vacuum sealing: RGA test on, 347f wafer level, 464–467, 465f, 466t valve, reagent, 370f van der Waals forces, 365 vapor etching, 162 vapor-phase sacrificial-layer etching, 222 vapor-silica interface, of trench sidewalls, 299 variable optical attenuators (VOA) dark-type, 244 early development work on, 238 electromagnetic actuation, 261 H-shaped beam-driven, 273 in-line, 244 for optical communication applications, 237–261 with retroflective mirrors, 253f rotary-comb actuator for, 248–251 self-assembled, 266f single-port, 237 using H-shaped beam actuator, 272f using thermal actuator, 271–275 using various mechanisms, 258–261 V-beam actuator, 229f V-beam electrothermal actuators, 253, 253f vernier-type latching mechanism, 260 vertical electrical feed-through, 3D MEMS packaging with, assembly process for, 73f, 74f, 75f, 76f vertical electrical feed-through TSV, solder-bumped MEMS device flip-chip with, 71f vertical interconnects, V-grooves with, 173f vertical-comb actuator, 235 with step height difference, 236f vertical-comb-driven two-axis mirror, bulk-micromachining process for, 236 Index V-groove mirror, 261 V-grooves: anisotropic wet-etched Si, 173 with vertical interconnects, 173f via corner rounding process, 85t via filling, 89–91 via formation, in TSVs, 82–86 via tapering process, 85t vibration tests, 140 visual inspection, solder joint FA and, 141 VOA See variable optical attenuators void-free joints, 183 V-shaped beam actuator, 217, 217f V-shaped torsion springs, 235 VTI Technologies, W W2W bonding See wafer-to-wafer bonding wafer-bonded electrostatic actuator, two-axis mirror with, 235f wafer bonding, 110f, 340 experiment, 194 handler wafer for, 459f process flow, 110f technologies, 158–178 wafer bow, 102 wafer debonding, 110f wafer device, perforated support wafer and, 110f wafer fabrication process, of TSVs, 455–462 integration flow and, 92f wafer level: vacuum package at, 341f vacuum sealing, 464–467, 465f, 466t wafer level package: electric field distribution in, 440f electrical modeling and, 438 insertion loss in, 441f package structure and, 438–442, 442f process, 448–458, 449f requirements, 437–448 with sacrificial wafer, 450, 451f, 452f without sacrificial wafer, 450–452, 452f, 453f wafer separation process, 458–462 wafer thickness: vs stress, 102f stress as a function of, 101 wafer thinning, 50, 81 thin-wafer handling and, 104–111 wafer warpage, of TSVs, 82 wafer yields, of TSVs, 82 wafer-based batch-type process, 181 WaferBOND, 106 Waferbond remover solution, 109 wafer-level chip capping, MCM technologies and, 180–184 wafer-level encapsulation, 176–182 high-temperature, 177–178, 177f low-temperature, 178–182, 179f, 180f wafer-level MEMS packaging, 158 wafer-level packaging (WLP), 47 with high-temperature processes, 177f with low-temperature processes, 179f, 180f MEMS device cost with, 341f using polymer sealing interface, 171f wafer-level 3D package, for accelerometer, 471–473, 472f, 472t, 473f wafer-to-wafer (W2W) Au-Sn solder bonding, 146 wafer-to-wafer (W2W) bonding, 51 schematic, 125f warpage of germanium window bolometer package and, 338t vs vacuum, 339f Waste Electrical and Electronic Equipment (WEEE), 133 wavelength equalizers, 264 wavelength-dependent loss, 252 wavelength-dependent loss curves, for single-reflection-type VOA, 243f wavelength-division-multiplexing (WDM), 210, 224, 264 WDM See wavelength-divisionmultiplexing WEEE See Waste Electrical and Electronic Equipment weight fraction, 120f well-bonded flat silicon chip, 116f well-bonded flat silicon chip, wellbonded pattern chips and, 116f wet etchants, selection of, 163, 164t wet isotropic silicon etch solution, 159 wet thermal oxidation, dielectric isolation layer (SiO2) deposition by, 86f wetting balance test, 146 wire-bonding, 3D MEMS packaging, with lateral electrical feedthrough, 68f WLP See wafer-level packaging working distance, mirror curvature and, 415 , 416f worldwide patents, on MEMS packaging, 27–43 X x-ray diffraction (XRD), 115 solder joint FA and, 142 x-ray inspection, solder joint FA and, 141 551 552 Index x-ray inspection test, 146 XRD See x-ray diffraction Y yield loss, 264 Yole Development, 2, Young’s modulus, 144, 144f, 302 Z Z-configuration, 3D optical switches based on, 277, 278f zero-bias state, 244 zero-level packaging, of RF-MEMS, 515–525, 516f, 517f ZnO thin films, 220