Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors , , , Martin Held , Stefan P Schießl , Dominik Miehler, Florentina Gannott, and Jana Zaumseil Citation: Appl Phys Lett 107, 083301 (2015); doi: 10.1063/1.4929461 View online: http://dx.doi.org/10.1063/1.4929461 View Table of Contents: http://aip.scitation.org/toc/apl/107/8 Published by the American Institute of Physics APPLIED PHYSICS LETTERS 107, 083301 (2015) Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors Martin Held,1,2,a) Stefan P Schießl,1,2,a) Dominik Miehler,1 Florentina Gannott,1,2 and Jana Zaumseil2,b) Department of Materials Science and Engineering, Friedrich-Alexander-Universit€ at Erlangen-N€ urnberg, Erlangen D-91058, Germany Institute for Physical Chemistry, Universit€ at Heidelberg, Heidelberg D-69120, Germany (Received 27 June 2015; accepted 12 August 2015; published online 25 August 2015) Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both The ultra-thin PMMA layer ensures a low density of trap states at the semiconductordielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties Transistors with these thin ( 70 nm), high capacitance (100–300 nF/ cm2) hybrid dielectrics enable low operating voltages (100 nm) and thus low capacitances These issues led to the idea of using organic buffer layers on oxide dielectrics15 and hybrid dielectrics consisting of layers16 or blends17 of high-k and low-k insulators Especially, layered hybrid dielectrics consisting of a polymer insulator at the semiconductor surface and a pinhole-free high-k material with higher breakdown strength are attractive as they combine the a) M Held and S P Schießl contributed equally to this work Author to whom correspondence should be addressed Electronic mail: zaumseil@uni-heidelberg.de b) 0003-6951/2015/107(8)/083301/4 advantageous properties of both and can be applied to a wide range of semiconductors.12,18–20 Here, we demonstrate a high-capacitance bilayer hybrid dielectric of poly(methyl methacrylate) PMMA and ALD HfOx for top-gate FETs that can be processed at low temperatures compatible with polymer substrates It enables low drive voltages (