On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film Masaharu Kobayashi and Toshiro Hiramoto Citation: AIP Advances 6, 025113 (2016); doi: 10.1063/1.4942427 View online: http://dx.doi.org/10.1063/1.4942427 View Table of Contents: http://aip.scitation.org/toc/adv/6/2 Published by the American Institute of Physics Articles you may be interested in Fully ALD-grown TiN/Hf0.5Zr0.5O2/TiN stacks: Ferroelectric and structural properties AIP Advances 109, 192903192903 (2016); 10.1063/1.4966219 Experimental confirmation of temperature dependent negative capacitance in ferroelectric field effect transistor AIP Advances 100, 163504163504 (2012); 10.1063/1.4704179 Ferroelectricity in yttrium-doped hafnium oxide AIP Advances 110, 114113114113 (2011); 10.1063/1.3667205 Experimental evidence of ferroelectric negative capacitance in nanoscale heterostructures AIP Advances 99, 113501113501 (2011); 10.1063/1.3634072 AIP ADVANCES 6, 025113 (2016) On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film Masaharu Kobayashia and Toshiro Hiramoto Institute of Industrial Science, The University of Tokyo 4-6-1, Komaba, Meguro-ku, Tokyo, 153-8505, Japan (Received November 2015; accepted February 2016; published online 16 February 2016) Internet-of-Things (IoT) technologies require a new energy-efficient transistor which operates at ultralow voltage and ultralow power for sensor node devices employing energy-harvesting techniques as power supply In this paper, a practical device design guideline for low voltage operation of steep-slope negative-capacitance field-effecttransistors (NCFETs) operating at sub-0.2V supply voltage is investigated regarding operation speed, material requirement and energy efficiency in the case of ferroelectric HfO2 gate insulator, which is the material fully compatible to Complementary Metal-Oxide-Semiconductor (CMOS) process technologies A physics-based numerical simulator was built to design NCFETs with the use of experimental HfO2 material parameters by modeling the ferroelectric gate insulator and FET channel simultaneously The simulator revealed that NCFETs with ferroelectric HfO2 gate insulator enable hysteresis-free operation by setting appropriate operation point with a few nm thick gate insulator It also revealed that, if the finite response time of spontaneous polarization of the ferroelectric gate insulator is 10-100psec, 1-10MHz operation speed can be achieved with negligible hysteresis Finally, by optimizing material parameters and tuning negative capacitance, 2.5 times higher energy efficiency can be achieved by NCFET than by conventional MOSFETs Thus, NCFET is expected to be a new CMOS technology platform for ultralow power IoT C 2016 Author(s) All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/) [http://dx.doi.org/10.1063/1.4942427] I INTRODUCTION Modern mobile computing including wearables and emerging Internet-of-Things (IoT) technologies such as smart sensor network demand extremely low power Large-Scale-Integration (LSI) systems.1 Especially if the power is supplied by energy harvesting sources, ultralow power consumption as low as µW or less will be required for a chip to conduct data sensing, data processing, and data communication At transistor level, the most effective way to reduce power consumption is lowering supply voltage (Vdd) However, if Vdd is lowered, drive current of the transistor is also reduced If the drive current is reduced, the circuit delay is increased and off-state leakage current keeps flowing during the period, which is not desirable from the low power perspective For mobile computing and sensor network applications, it is preferable for the device to become active and complete program tasks in the short time period, and then stand by in sleep mode for the rest of the time Therefore, for the given program tasks, switching energy is an important metric for low power devices In order to achieve energy-efficient switching at given Vdd, Ion/Ioff needs to be as high as possible.2 To increase Ion/Ioff , it is commonly understood that subthreshold slope (SS) needs to be small SS is generally expressed by SS = (∂Ψ s /∂Vg )−1(∂log10 I/∂Ψ s )−1, where Ψ s and Vg are surface a Address correspondence to: masa-kobayashi@nano.iis.u-tokyo.ac.jp 2158-3226/2016/6(2)/025113/10 6, 025113-1 © Author(s) 2016 025113-2 M Kobayashi and T Hiramoto AIP Advances 6, 025113 (2016) potential and gate voltage, respectively The first term of the right hand side of the equation of SS represents the electrostatics of a metal-oxide-semiconductor (MOS) capacitor, meaning how efficiently Vg can bend the silicon band On the other hand, the second term of the right hand side of the equation of SS represents the conductance, meaning how much current can be driven by the band bending In the conventional MOS Field-Effect-Transistor (FET), ∂Ψ s /∂Vg does not exceed one because of the voltage divider between the gate dielectric and silicon channel The second term is ∼2.3kT/q because the transport in subthreshold region is dominated by diffusion transport of excess minority carriers, of which distribution is described by Boltzmann distribution, at the source side of the MOSFET It is therefore known that SS has the minimum limit of 60mV/dec To overcome the limit of 60mV/dec, there have been extensive researches to enhance the second term by employing novel steep-slope transistors such as tunneling FET (TFET)3 and impact ionization MOSFET (IMOS).4 However, TFET and IMOS have their own issues such as low drive current, complicated process flow, and necessity of modifying circuit layout for TFET, and high on-set lateral voltage, reliability issue, and complicated process flow for IMOS Then negative capacitance FET (NCFET) has been proposed by Salahuddin et al.,5 as an alternative steep slope transistor to overcome the classical limit of 60mV/dec, and has been extensively studied.5–11 NCFET has the same structure as MOSFET except that ferroelectric thin film is used as a gate insulator If ferroelectric material is used as a gate insulator, ∂Ψ s /∂Vg can possibly exceed one because of the nonlinear characteristics of the ferroelectric, so called, negative capacitance Negative capacitance has been, in fact, experimentally observed in ferroelectric thin film,10 which paves the new road to the innovative device technology NCFET has the same electron transport mechanism of drift and diffusion as conventional MOSFETs, so that it can drive higher current than tunnel-based FETs thanks to the higher channel charge density brought by amplified Ψ s at the same off-current Therefore, NCFET has been attracting more interests because it has possibility to break the limit of SS=60mV/dec and exceed the drive current of conventional MOSFETs In addition, NCFET is a symmetric device with respect to source and drain upon device operation, which is beneficial in development and production of new device technology Standard pull-up and pull-down CMOS logic circuits as well as pass-gate CMOS circuits which flow current in both directions between source and drain can be built by NCFET It is not necessary to largely modify the logic circuit architecture and IP macro design from the conventional MOSFET Although NCFET is a promising candidate of a steep slope transistor, there had been obstacles in process integration If conventional ferroelectric materials such as Lead Zirconate Titanate (PZT) and Barium Titanate (BTO) are used, the thickness of the gate insulator needs to be several hundreds of nanometer in order to balance the large polarization charge density and FET channel charge density, which is not compatible to advanced scaled Complementary MOS (CMOS) frond-end technologies Moreover, the heavy metal contamination to the manufacturing line is also concerned Recently, ferroelectricity is discovered in Hafnium Oxide (HfO2) based thin films by controlling crystalline phase of the films.11–19 The ferroelectric HfO2 thin film has been already applied to Ferroelectric Random Access Memory (FeRAM) using 28nm CMOS technology.19 If the ferroelectric HfO2 thin film is used for NCFETs as well, the fabrication process will become fully CMOS compatible NCFET can be one of the low-cost solution for IoT power requirement without relying on high-cost advanced CMOS technologies, because NCFET can be fabricated by any CMOS technology from the most advanced technologies to mature manufacturing technologies, just by introducing ferroelectric HfO2 gate insulator process In order to promote research and development of NCFET with ferroelectric HfO2 for IoT application, it needs to be demonstrated that NCFET can be designed at ultralow supply voltage with ferroelectric HfO2 as well as with the previously reported ferroelectric material.5,6 A practical device design guideline to achieve sufficiently fast operation speed and reliable operation should be provided so that material parameters are appropriately selected for process development Furthermore, it needs to be quantitatively estimated how much the energy per switching can be lowered by NCFET In this paper, to target sub-0.2V Vdd operation for ultralow voltage and ultralow power IoT application, we study practical device design for an energy-efficient NCFET with a ferroelectric HfO2 gate insulator by tuning its material parameters, based upon physics-based numerical simulations, with respect to operation speed, material requirement, and energy efficiency To verify the 025113-3 M Kobayashi and T Hiramoto AIP Advances 6, 025113 (2016) FIG A schematic of a NCFET with a ferroelectric gate insulator A ferroelectric MOS capacitor is modeled by series connection of ferroelectric and channel capacitance device design and its material requirement quantitatively, published ferroelectric HfO2 data are extensively surveyed and referred to as practical parameter range First, the operation principle of the NCFET is reviewed and its simulation method will be explained Secondly, the simulation results will be shown and discussed with respect to the operation speed, material requirement, and energy efficiency Finally, this work will be summarized II OPERATION PRINCIPLE OF NCFET AND SIMULATION METHOD As explained above, the structure of a NCFET is basically the same as a MOSFET, except that the gate insulator is replaced by a ferroelectric material as shown in Fig The basic operation principle of the NCFET is explained in Refs and A ferroelectric MOS capacitor can be modeled by a series connection of a ferroelectric capacitance and a channel capacitance Fig 2(a) shows the ferroelectric polarization (P) - electric field (E) characteristics and channel charge as a function of Vg In the ferroelectric MOS capacitor, the ferroelectric polarization charge density and the channel charge density should match Therefore, a static operation point of the NCFET is determined by the cross-point of the P-E curve and the channel charge load line The negative capacitance region is where the slope of the P-E curve is negative If these two curves have a single cross-point in the negative capacitance region, the ferroelectric MOS transistor works as NCFET The operation principle of NCFET can be also qualitatively understood from band diagram of NCFET Fig 2(b-i) shows the band diagram corresponding to the operation points of (i) in Fig 2(a) As Vg is applied, a negative oxide field is induced on the gate insulator in the NCFET as opposed to conventional MOSFETs As Vg is increased, the operation point moves to (ii) in Fig 2(a), and the negative oxide field becomes even larger The silicon band bends more than the applied Vg , that is ∆Ψ s /∆Vg >1 as FIG (a) A schematic of a P-E curve and a channel load line as a function of Vg A cross point of these two curves is the static operation point of the NCFET The operation points (i), (ii), and (iii) represent low, middle, and high Vg , respectively The corresponding band diagrams are drawn in Fig 2(b) 025113-4 M Kobayashi and T Hiramoto AIP Advances 6, 025113 (2016) shown in Fig 2(b-ii) This means that the surface potential is effectively amplified against Vg , more channel charges are induced in the channel, and thus higher current is driven in the NCFET than in conventional MOSFETs As Vg is even further increased, the operation point moves to (iii) in Fig 2(a), and the oxide field flips and the band diagram looks the same as conventional MOSFETs as shown in Fig 2(b-iii) Next, the simulation method used in this work is summarized below The ferroelectric MOS capacitor in the NCFET is modeled by series connection of the ferroelectric capacitance and the channel capacitance The modeling and simulation method of ferroelectric MOS capacitor have been established in Refs and The ferroelectric is described by the Landau-Khalatnikov equation,5,6,20 which is a time-dependent phenomenological equation for ferroelectric materials, dG dP =− , (1) dt dP where τ is the characteristics response time of the polarization and G is the Landau free energy G is expressed by, τ α β γ P + P + P − E · P, (2) where α, β, and γ are Landau parameters In this work, the FET channel is described by the Poisson-Schrödinger equation to calculate electrostatics and quantum mechanical states The simple ballistic transport model21 is used for the carrier transport in the NCFET In the simulation, first, a channel charge density is given Then the Poisson-Schrodinger equation is solved to obtain the depletion charge density, inversion charge density, subband energies, surface potential and Fermi level Next, the Landau-Khalatnikov equation is solved to obtain the oxide field Then Vg is determined by adding the surface potential calculated by Poisson-Schrodinger equation and the voltage across ferroelectric gate insulator calculated by (1) and (2) Then the channel charge density is incremented and the calculation is repeated until the final target of the charge density or Vg is reached The flatband voltage is arbitrarily chosen In order to constraint ourselves to realistic material parameters for practical device design, the literatures on the recent ferroelectric HfO2 thin films were extensively surveyed to refer to Fig summarized the representative material parameters such as remanent polarization (Pr ) and coercive field (Ec ) The data are distributed among 0