Advanced Computer Architecture - Lecture 25: Memory hierarchy design. This lecture will cover the following: storage technologies trends and caching; what is outside the processor; storage technologies; RAM and enhanced DRAM; disk storage;...
CS 704 Advanced Computer Architecture Lecture 25 Memory Hierarchy Design (Storage Technologies Trends and Caching) Prof Dr M Ashraf Chughtai Today’s Topics Recap: Processor Performance What is outside the processor Storage Technologies RAM and Enhanced DRAM Disk Storage Summary MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) Recap: Processor Performance Data path and control design of processor Hardware-based and software-based techniques to expose the ILP MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) What is outside processor? performance of a computer MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) What is Outside the Processor? … Cont’d – what is outside the processor? – how the outside systems influence the performance of processors? Whatever is outside the processor is referred to as the I/O system The I/O systems include: – Memory System – Buses and controllers MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) Memory System: An introduction Memory system design for high performance computers Design goal of memory system for high performance computers is to present the user with as much memory as is available MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) Memory Hierarchy: An introduction Fast memory is expensive and cheap memory is slow, therefore a memory hierarchy is organized into several levels cost as low as of the cheapest memory and – speed as fast as of the fastest memory – MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) Memory Hierarchy System Processor Control Memory Speed: Size: Cost: Memory Memory Datapath Memory Memory Slowest Fastest Biggest Smallest Lowest Highest MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) Principle of Memory hierarchy “The principle of locality”, where each type of the module is located in the memory system? MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 10 Enhanced DRAMs 2: Extended data out DRAM (EDO DRAM) – It is the Enhanced FPM DRAM with more closely spaced CAS signals 3: Synchronous DRAM (SDRAM) – It is driven with rising clock edge instead of asynchronous control signals MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 42 Enhanced DRAMs 4: Double Data Rate synchronous DRAM (DDR SDRAM) – It is Enhancement of SDRAM that uses both clock edges as control signals 5: Video RAM (VRAM) – It is like FPM DRAM, but output is produced by shifting row buffer; and is – Dual ported to allow concurrent reads and writes MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 43 Nonvolatile Memories DRAM and SRAM are volatile memories – Lose information if powered off Nonvolatile memories retain value even if powered off – Generic name is read-only memory (ROM) – Misleading because some ROMs can be read and modified MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 44 Nonvolatile Memories Types of ROMs – Programmable ROM (PROM) – Erasable programmable ROM (EPROM) – Electrically erasable PROM (EEPROM) – Flash memory Firmware – Program stored in a ROM Boot time code, BIOS (basic input/output system) graphics cards, disk controllers MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 45 Disk Geometry tracks surface track k gaps spindle sectors MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 46 Disk Geometry (Muliple-Platter View) Aligned tracks formcylinder a cylinder k surface platter surface surface platter surface surface platter surface spindle MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 47 Disk Capacity Capacity: maximum number of bits that can be stored – Recording density (bits/in): number of bits that can be squeezed into a inch segment of a track – Track density (tracks/in): number of tracks that can be squeezed into a inch radial segment – Arial density (bits/in2): product of recording and track density MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 48 Disk Operation (Multi-Platter View) read/write heads move in unison from cylinder to cylinder arm spindle MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 49 Disk Access Time Average time to access some target sector approximated by : – Taccess = Tavg seek + Tavg rotation + Tavg transfer Seek time (Tavg seek) – Time to position heads over cylinder containing target sector – Typical Tavg seek = ms MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 50 Disk Access Time Rotational latency (Tavg rotation) – Time waiting for first bit of target sector to pass under r/w head – Tavg rotation = 1/2 x 1/RPMs x 60 sec/1 Transfer time (Tavg transfer) – Time to read the bits in the target sector – Tavg transfer = 1/RPM x 1/(avg # sectors/track) x 60 secs/1 MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 51 Disk Access Time Example Given: – Rotational rate = 7,200 RPM – Average seek time = ms – Avg # sectors/track = 400 Derived: – Tavg rotation = 1/2 x (60 secs/7200 RPM) x 1000 ms/sec = ms – Tavg transfer = 60/7200 RPM x 1/400 secs/track x 1000 ms/sec = 0.02 ms – Taccess = ms + ms + 0.02 ms Important points: – Access time dominated by seek time and rotational latency – First bit in a sector is the most expensive, the rest are free – SRAM access time is about ns/doubleword, DRAM about 60 ns Disk is about 40,000 times slower than SRAM, 2,500 times slower then DRAM MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 52 Logical Disk Blocks – The set of available sectors is modeled as a sequence of b-sized logical blocks (0, 1, 2, ) Mapping between logical blocks and actual (physical) sectors – Maintained by hardware/firmware device called disk controller – Converts requests for logical blocks into (surface, track, sector) triples MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 53 CPU-Memory Gap 100,000,000 10,000,000 1,000,000 100,000 10,000 1,000 100 10 Disk seek time s n DRAM access time SRAM access time CPU cycle time 1980 MAC/VU-Advanced Computer Architecture 1985 1990 year 1995 Lecture 26 Memory Hierarchy (2) 2000 54 Summary Memory hierarchy organization Design of basic memory modules of DRAM and SRAM Design and working of disk storages Gap between the speed of processor and the storage devices - DRAM, SRAM and Disk is increasing with time MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 55 MAC/VU-Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 56 ... cell MAC/VU -Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 29 MAC/VU -Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 30 MAC/VU -Advanced Computer Architecture. .. MAC/VU -Advanced Computer Architecture Col Address Lec 25 – Memory Hierarchy Design (1) 39 MAC/VU -Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 40 MAC/VU -Advanced Computer Architecture. .. Lec 25 – Memory Hierarchy Design (1) 20 MAC/VU -Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1) 21 MAC/VU -Advanced Computer Architecture Lec 25 – Memory Hierarchy Design (1)