• Tran Viet Khoa, "Thiet ka va xay dung bg diau cha & Giai diau cha 16-QAM",
Khoa luan bao gom
M o dau 1 Chuong 1 Diau cha so 5
Chuong 2 Diau che 16-QAM 20 Chuong 3 Xii li dau phay dong 27 Chuong 4 KT thuat dong bg nhjp 43 Chuong 5 Khoi phuc song mang, Giai diau cha 52
7.6 Thao luan v . Z:'^ ?:
SDR la mot trong phuang thiic hien dai da thiat ka cac he thong truyan tran ph4n mam tran FPGA. Da tai da sii dung SDR nhu la mot giai phap FPGA cho cac ling dung truyan thong. Ba ling dung truyan thong co ban dugc tren FPGA bao gom truyan dan dua tran QAM, truyan dan dua tran DMT va dua tren OFDM da dugc tien hanh trong thoi gian thue hien da tai va dat du qua nhat dinh
Kat qua thu dugc trong khi thue hien da tai da hoan thanh dugc cac nc
ban da dat ra khi dang ki da tai. Dae biet da danh gia dugc ''Anh hu-ong cua ca
lieu tffi do on djnh giai dieu che OFDM ", nhu da giii dang tai tap chi trong
chi Vien Khoa hgc va Cong nghe Quoc gia ).
7.7 K i t luan va k i l n nghj
SDR la mot giai phap da dinh nghTa cac he truyen thong bang phan r nhien ban canh cac giai phap SDR thi nhiau vSn da con phai giai quyat nhu: vi* kha nang sii dung phan ciing va phan mem khi thiet ke mot he thSng, giai thuat den su can doi do cung nhu viec tilp tuc tim kilm cac giai phap cong nghe lini li thong tin, xii li so tin hieu da tim kiam cac thiet ke la cSn thiet. Day la cong vi tinh khoa hgc cong nghe cao viia co tinh dao tao tai truong Dai hgc Cong nghe.
7.8 Tai lieu tham khao
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G L n n ? " ' " ' ' ' "^^ ^^^^' ^ ^^"^ ^^him Tafazolli, Synchronization Techm f n m ^ f M^ ' '^''' ^^^^ ^'^''''^''' Technology Conference^ Vol. 2, pp.
ZUU 1 yr a l l ) .
[3] David Gesbert, Mansoor Shafi, Dashan Shiv, Peter J Smith, and Aymor
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[4] Sia\'ash M.Alamouti, ''A Simple Transmit diversity Technique for [
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[5] John G. Proakis and Dimities G. Manolakis, Digital Signal Processing Principles,
Algorithms and Applications'', Prentice-Hall India Publications, Third Edition, ISBN -
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[6] Jack Voider, 'The CORDIC Trigonometric Computing Technique", IRE
Transactions on Electronic Computing, Vol EC-8, pp.330-334, September 1959.
[7] M.J. Canet, F. Vicedo, V. Almenar, J. Vails, E.R. de Lima, "A common FPGA-
based synchronizer architecture for Hiperlan/2 and 802.11a WLAN systems'". PIMRC
2004, Barcelona, Spain, 2004.
[8] Ray Andraka, "'A survey of CORDIC algorithms for FPGA based computers",
ACM0-89791- 978-5/98/01. 1998.
[9] Meyer-Baese.U, ''Digital Signal Processing with Field Programmable Gate
Arrays'', Springer- Verlag, ISBN 81-8128-045-8, 2003.
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HIPERLAN/2". VTC 2000 (Fall), Atlantic City, USA, 2002.
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[12]J. Terry and J. Fleiskala, " OFDM Wireless LANs: A Theoretical and Practical