Tài liệu C for The Microprocessor Engineer P1 docx

Contents Part I Target Processors 1 1 The 6809 Microprocessor: Its Hardware 2 1.1 Architecture 3 1.2 Outside the 6809 6 1.3 Making the Connection 9 2 The 6809 Microprocessor: Its Software 19 2.1 Its Instruction Set 19 2.2 Address Modes 30 2.3 Example Programs 41 3 The 68000/8 Microprocessor : Its Hardware 56 3.1 Inside the 68000/8 57 3.2 Outside the 68000/8 64 3.3 Making the Connection 71 4 The 68000/8 Microprocessor: Its Software 86 4.1 Its Instruction Set 86 4.2 Address Modes 106 4.3 Example Programs 114 5 Subroutines, Procedures and Functions 122 5.1 The Call-Return Mechanism 123 5.2 Passing Parameters 129 6 Interrupts plus Traps equals Exceptions 141 6.1 Hardware Initiated Interrupts 143 6.2 Interrupts in Software 161 Part II C 167 7 Source to Executable Code 168 7.1 The Assembly Process 170 7.2 Linking and Loading 178 7.3 The High-Level Process 189 v vi Contents 8 Naked C 199 8.1 A Tutorial Introduction 200 8.2 Variables and Constants 202 8.3 Operators, Expressions and Statements 213 8.4 Program Flow Control 224 9 More Naked C 236 9.1 Functions 236 9.2 Arrays and Pointers 245 9.3 Structures 258 9.4 Headers and Libraries 271 10 ROMable C 278 10.1 Mixing Assembly Code and Starting Up 278 10.2 Exception Handling 286 10.3 Initializing Variables 291 10.4 Portability 297 Part III Project in C 309 11 Preliminaries 310 11.1 Specification 313 11.2 System Design 315 12 The Analog World 323 12.1 Signals 323 12.2 Digital to Analog Conversion 329 12.3 Analog to Digital Conversion 337 13 The Target Microcomputer 345 13.1 6809 – Target Hardware 345 13.2 68008 – Target Hardware 350 14 Software inC 355 14.1 Data Structure and Program 355 14.2 6809 – Target Code 359 14.3 68008 – Target Code 370 15 Looking For Trouble 383 15.1 Simulation 384 15.2 Resident Diagnostics 397 15.3 In-Circuit Emulation 408 16 C'est la Fin 416 16.1 Results 416 16.2 More Ideas 420 Contents vii A Acronyms and Abbreviations 423 List of Figures 1.1 Internal 6809/6309 structure. 4 1.2 6809 pinout. 7 1.3 A snapshot of the 6809 MPU reading data from a peripheral device. 10 1.4 Sending data to the outside world. 11 1.5 The structure of a synchronous common-bus microcomputer. 12 1.6 An elementary address decoding scheme. 14 1.7 A simple byte-sized output port. 15 1.8 Talking to a 6116 2 kbyte static RAM chip. 15 1.9 Interfacing a 6821 Peripheral Interface Adapter to the 6809. 17 2.1 Postbyte for pushing and pulling. 20 2.2 Moving 16-bit data at òne go'. 22 2.3 Stacking registers in memory. 23 2.4 16-bit binary to decimal string conversion. 48 2.5 Evaluating factorial n. 51 2.6 A memory mapof the factorial process. 52 3.1 Internal structure pf the 68000. 58 3.2 Internal 68008 structure. 63 3.3 68000 and 68008 DIL packages. 65 3.4 Memory Organization for the 68000. 67 3.5 The structure of an asynchronous common-bus micro-computer. 72 3.6 The 68000/8 Read cycle. 73 3.7 The 68000/8 Write cycle. 75 3.8 A simple address decoder with no-wait feedback circuitry. 77 3.9 A DTACK generator for slow devices. 78 3.10 A simple word-sized output port. 80 3.11 Interfacing 6264 RAM ICs to the 68000 MPU. 81 3.12 Fast EPROM interface. 82 3.13 Interfacing the 68230 PI/T to the 68000's buses. 83 3.14 Interfacing a 6821 Peripheral Interface Adapter to the 68000. 84 4.1 Multiple moves to and from memory. 90 4.2 Multiple precision addition. 93 4.3 Using DBcc to implement a loop structure. 101 4.4 Two examples of machine coding. 114 5.1 Subroutine calling. 124 5.2 Saving the return address on the Stack. 126 5.3 The stack when executing the code of Table 5.3(b), viewed as word-oriented. 128 viii LIST OF FIGURES ix 5.4 The Stack corresponding to Table 5.6. 132 5.5 The Stack used for the BLOCK_COPY subroutine. 134 5.6 The 6809 System stack organized by the array averaging subroutine. 136 5.7 The 68000 System stack organized by the array-averaging subroutine. 138 6.1 Detecting and measuring an asynchronous external event. 142 6.2 Interrupt logic for the 6809 and 68000 processors. 145 6.3 Using a priority encoder to compress 7 lines to 3-line code. 146 6.4 How the 6809 responds to an interrupt request 149 6.5 How the 68000 responds to an interrupt request 151 6.6 Using an external interrupt flag to drive a level-sensitive interrupt line. 153 6.7 Servicing four peripherals with one interrupt. 157 6.8 External interrupt hardware for the 68000 MPU. 158 7.1 Onion skin view of the steps leading to an executable program. 170 7.2 Assembly-level machine code translation. 172 7.3 Assembly environment. 188 7.4 Syntax tree for sum = (n+1) * n/2; 191 7.5 The Whitesmiths C compiler process. 194 8.1 Structure of C programs. 203 8.2 Properties of simple object types. 204 8.3 Basic set of C data types. 205 8.4 Type promotions. 222 8.5 Simple 2-way decisions. 224 8.6 Using else-if to make a multi-way decision. 227 8.7 switch-case multi-way decision. 229 8.8 Loopconstructs. 231 9.1 Layout of C programs. 237 9.2 The System stack as seen from within power(), lines 21 – 38. 243 9.3 Array storage in memory. 249 9.4 A simple write-only port at 0x9000. 255 9.5 Register structure of a 6821 PIA. 262 11.1 A typical long-persistence display. 311 11.2 Characteristic scrolling display of a time-compressed memory. 312 11.3 Block diagram of the electrocardiograph time compressed memory. 316 11.4 A broad outline of system development. 318 11.5 Fundamental chip-level design. 320 11.6 A cost versus production comparison. 322 12.1 The quantization process. 325 12.2 The analog–digital process. 328 12.3 Illustrating aliasing. 329 12.4 A 4th-order anti-aliasing filter. 330 12.5 The R-2R current D/A converter. 331 12.6 Conversion relationships for the network of Fig. 12.5. 333 12.7 A real-world transfer characteristic. 334 x LIST OF FIGURES 12.8 The AD7528 dual D/A converter. 335 12.9 Interfacing the AD7528 to a microprocessor. 336 12.10 A 3-bit flash A/D converter. 338 12.11 A software controlled successive approximation D/A converter. 339 12.12 Functional diagram of the AD7576 A/D converter. 340 12.13 Interfacing the AD7576 to a microprocessor. 342 12.14 Aperture error. 343 13.1 The 6809-based embedded microprocessor implementation. 347 13.2 A PAL-based 6809 address decoder implementation. 349 13.3 The 68008-based embedded microprocessor implementation. 352 13.4 A PAL-based 68008 address decoder implementation. 353 14.1 Data stored as a circular array. 356 15.1 Tracing function sum_of_n(). 392 15.2 Illustrating the function path in reaching line 27. 393 15.3 Simulating the time-compressed memory software. 394 15.4 Simulating an interrupt entry into update(). 395 15.5 Mixed-mode simulation using XRAY68K. 396 15.6 Free-running your microprocessor. 398 15.7 One free-run cycle, showing RAM, A/D and DIG_O/P Enables. 399 15.8 The output_test() traces. 404 15.9 A typical PC-based ICE configuration. 410 16.1 Typical X and Y waveforms, showing two ECG traces covering 2 s. 420 List of Tables 2.1 Move instructions. 21 2.2 Arithmetic operations 24 2.3 Shifting Instructions. 26 2.4 Logic instructions. 27 2.5 Data test operations. 28 2.6 Operations which affect the Program Counter. 29 2.7 The M6809 instruction set 33 2.8 Initializing a 256-byte array. 34 2.9 Source code for sum of n integers program. 45 2.10 Object code generated from Table 2.9. 46 2.11 A superior implementation. 47 2.12 16-bit binary to an equivalent ASCII-coded decimal string. 49 2.13 Fundamental factorial-n code. 53 2.14 Factorial using a look-uptable. 54 4.1 Move instructions. 88 4.2 Arithmetic operations. 91 4.3 Shifting instructions. 95 4.4 Logic Instructions. 97 4.5 Bit-level instructions. 98 4.6 Data testing instructions. 99 4.7 Instructions which affect the Program Counter. 100 4.8 Summary of 68000 instructions. 105 4.9 A summary of 68000 address modes. 113 4.10 Object code for sum of n integers program. 115 4.11 A superior implementation. 116 4.12 Binary to decimal string conversion. 118 4.13 Mathematical evaluation of factorial n. 119 4.14 Factorial using a look-uptable. 120 5.1 Subroutine instructions. 125 5.2 A simple subroutine giving a fixed delay of 100 ms when called. 127 5.3 Transparent 100 ms delay subroutine. 129 5.4 Using a register to pass the delay parameter. 130 5.5 Using a static memory location to pass the delay parameter. 131 5.6 Using the stack to pass the delay parameter. 132 5.7 Making a copy of a block of data of arbitrary length. 133 5.8 Using a frame to acquire temporary data; 6809 code. 137 5.9 Using a Frame to acquire temporary data; 68000 code. 139 xi xii LIST OF TABLES 6.1 6809 code displaying heart rate on an oscilloscope. 155 6.2 68000 code displaying heart rate on an oscilloscope. 160 6.3 Exception related instructions. 162 7.1 Source code for the absolute assembler. 173 7.2 A typical error file. 173 7.3 Listing file produced from the source code in Table 7.1. 174 7.4 Symbol file produced from the absolute source of Table 7.1. 174 7.5 Some common absolute object file formats. 176 7.6 A simple macro creating the modulus of the target operand. 177 7.7 Assembling the Display module with the Microtec Relocatable assembler. 181 7.8 Module 2 after assembly. 183 7.9 Module 3 after assembly. 184 7.10 Linking the three source modules. 185 7.11 Output from the Microtec linker. 187 7.12 A possible Lexical analysis of sum = (n+1)*n/2; 190 7.13 6809 target code for sum = (n+1) * n/2; 193 7.14 Passing a simple program through the compiler of Fig. 7.5. 197 8.1 Definition of function sum_of_n(). 200 8.2 Variable storage class 208 8.3 Initializing variables. 210 8.4 C operators, their precedence and associativity. 215 8.5 Bitwise AND and Shift operations. 218 8.6 A nested if Real-Time Clock interrupt service routine. 225 8.7 An else-if Real-Time Clock interrupt service routine. 226 8.8 Generating factorials using the else-if construct. 228 8.9 Generating factorials using the switch-case construct. 230 8.10 Generating factorials using a while loop. 232 8.11 Generating factorials using a for loop. 234 9.1 The C program as a collection of functions. 240 9.2 Generating factorials using a look-uptable. 247 9.3 Altering an array with a function. 250 9.4 Sending out a digit to a 7-segment port. 256 9.5 Displaying and updating heartbeat. 260 9.6 The PIA as a structure of pointers. 265 9.7 Sending pointers to structures to a function. 267 9.8 Unions. 270 9.9 Using #define for text replacement. 272 9.10 A typical math.h library header (with added comments). 276 10.1 Elementary startupfor a 6809-based system. 280 10.2 Using arrays of pointers to functions to construct a vector table. 281 10.3 A simple Startup/Vector routine for a 68000-based system. 282 10.4 A C-compatible assembler function evaluating the square root. 283 10.5 Using in-line assembly code to set upthe System stack. 284 10.6 Calling a resident function at a known address. 286 10.7 6809 startupfor the system of Table 9.5. 287 LIST OF TABLES xiii 10.8 68000 startupfor the system of Table 9.5. 288 10.9 clock() configured as an interrupt function. 290 10.10A startupfor the Aztec compiler initializing statics/globals. 294 10.11A typical lod68k file to produce an image of initialized data in ROM 295 10.12A startupinitializing statics/globals and setting upthe DPR for zero page. 296 10.13Zero-page storage with the Cosmic 6809 compiler. 297 10.14A portable C program using ANSII library I/O routines. 299 10.15Compiling the same source with a spectrum of CPUs. 303 10.16Tailoring the ANSII I/O functions to suit an embedded target. 305 12.1 Quantization parameters. 326 12.2 C driver for Fig. 12.11. 340 14.1 The fundamental C coding. 357 14.2 The hard_09.h header file. 359 14.3 6809 code resulting from Tables 14.1 and 14.2. 362 14.4 The 6809 Time Compressed Memory Startup. 363 14.5 The machine-code file for the 6809-based time-compressed memory. 364 14.6 The @port directive. 365 14.7 Using _asm() to terminate a NMI/IRQ type interrupt service function. 366 14.8 Optimized 6809 code. 370 14.9 68000 code resulting from Tables 14.1 and 14.2. 373 14.10The 68000 Time Compressed Memory Startup. 375 14.11Machine-code file from Tables 14.9 and 14.10. 376 14.12The @port directive. 377 14.13Using _asm() to terminate an interrupt service function. 378 14.14Optimized 68000 based code. 381 15.1 Simulating the program of Table 4.10. 386 15.2 Tracing the program of Table 2.9. 387 15.3 Tracing a C function. 389 15.4 A report on the variables used in the 68008 TCM system of Table 15.5. 390 15.5 Complete 68008 package, including resident diagnostics. 403 15.6 Code for the 68008 implementation. 407 15.7 An alternative RAM testing module for the 6809 system. 408 15.8 Memory Mapping and Testing. 412 15.9 A window into the hardware using an ICE. 413 16.1 A 6809-based assembly-level coding. 417 16.2 A 68008-based assembly-level coding. 419 PART I Target Processors A major advantage of the use of a high-level language is its independence of the hardware its generated code will eventually run on; that is, its portability. However, one of the main strands of this book is the interaction of software with its hardware environment, and thus it is essential to use real products in both domains. For clarity, rather than describing a multitude of devices, most of the examples are based on just two microprocessors. Two, rather than one, not to loose sight of the portability aspects of high-level code. In this part I describe the Motorola 6809 and 68000/8 microprocessors, the chosen devices. This gives us a hardware target spectrum ranging from 8 through 32-bit architecture. As both microprocessors share a common ancestor, the com- plexity is reduced compared with a non-related selection. Where necessary, other processors are used as examples, but in general the principles are similar irre- spective of target. If the hardware detail seems excessive to a reader with a software background, much may be ignored if building the miniproject circuitry of Part 3 is to be omitted. [...]... read at the end of the cycle irrespective of its validity In such cases MRDY can be used to slow things down, although this is considered an abnormal transition The alternative closed-loop architecture is discussed on page 71 12 C FOR THE MICROPROCESSOR ENGINEER Figure 1.5 The structure of a synchronous common-bus microcomputer MAKING THE CONNECTION 13 As all external devices communicate to the master... However, the MPU does not wait until the end of the current instruction execution 1 This gives a response delay (sometimes called a latency) of 1 2 cycles, as opposed to a worst-case Halt latency of 21 cycles [5] The payback is that because the 8 C FOR THE MICROPROCESSOR ENGINEER processor clock is frozen, the internal dynamic registers will lose data unless periodically refreshed Thus the MPU automatically... complex Q related secondary decoder for simple interface circuitry 18 C FOR THE MICROPROCESSOR ENGINEER References [1] Noyce, R.N and Marcian, E H.; A History of Microprocessor Development at Intel, IEEE Micro, Feb 1981, pp 8 – 21 [2] Cahill, S.J.; Designing Microprocessor- Based Digital Circuitry, Prentice-Hall, 1985, Chapters 8 and 9 [3] Frazer, D.A et al.; Introduction to Microcomputer Engineering, Ellis... present in the system It may also be used to replace Q in Fig 1.7, having the advantage that the output port cannot be erroneously read Care must be taken when interfacing memory chips to choose a device with a suitable access time This is especially true for more recent MPUs, which can run at higher clock rates The access time for a memory chip is normally given 14 C FOR THE MICROPROCESSOR ENGINEER. .. address decoding scheme MAKING THE CONNECTION Figure 1.7 A simple byte-sized output port Figure 1.8 Talking to a 6116 2 kbyte static RAM chip 15 16 C FOR THE MICROPROCESSOR ENGINEER as the duration from the application of a stable address or chip enable until the activation of the cell to be read from or written to In the 6116 RAM, this internal decoding occurs irrespective of the state of the chip enables... ns for a 2 MHz clock Thus a 150 ns access time RAM chip must be used in the latter instance; for example the Hitachi HM6116AP-15 The 6264 RAM has an access time measured from the chip select In this case the address decoder delay must be part of the calculation An example of this is given in Section 3.3 ROM chips are interfaced in a similar fashion, but of course they are readonly Referring to the. .. interface devices which are frequently being accessed, then transferring the segment number 80h into the DP means that 6 C FOR THE MICROPROCESSOR ENGINEER the instruction LDA 5F, coded as 96-5F, actually moves data from 805Fh into Accumulator_A When the 6809 is Reset, the DP is set to 00h and, unless its value is changed, direct addressing is equivalent to zero page addressing The DP can be changed... as the controller for the majority of embedded control applications, and their architecture is sophisticated enough to efficiently support the requirements of high-level languages; more of which in later chapters Furthermore, many MCU families have a core and language derived from their allied 8-bit MPU cousins 2 ARCHITECTURE 1.1 3 Architecture The internal structure of a general purpose microprocessor. .. (pulse width one clock cycle minimum) at this pin forces the MPU to complete its current instruction, save all internal registers (except the System Stack Pointer, SSP) on the System stack and vector to a program whose start address is held in the NMI vector FFFC:Dh The E flag in the CCR is set to indicate that the Entire group of MPU registers (known as the machine state) has been saved The I and F mask... arithmetic logic unit (ALU) implementing Addition, Subtraction, Multiplication, AND, OR, Exclusive-OR, NOT and Shift operations Associated with the ALU is the Code Condition (or Status) register (CCR) Five of the eight CCR bits indicate the status of the result of ALU processes They are: C indicating a Carry or borrow, V for 2's complement oVerflow, Z for a Zero result, N for Negative (or bit 7 = 1) and H for . latency of 21 cycles [5]. The payback is that because the 8 C FOR THE MICROPROCESSOR ENGINEER processor clock is frozen, the internal dynamic registers. (CCR). Five of the eight CCR bits indicate the status of the result of ALU processes. They are: C indicating a Carry or borrow, V for 2's complement oVerflow,